CN209419485U - Booster system response speed translation circuit based on PFM control - Google Patents
Booster system response speed translation circuit based on PFM control Download PDFInfo
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Abstract
The booster system response speed translation circuit that the utility model relates to be controlled based on PFM, the partial pressure of the circuit output end voltage is as sampled voltage compared with comparator reference voltage；The output signal of comparator output signal and turn-on time control circuit acts on PFM module, and PFM module output signal and current over-zero comparator output signal act on the on or off of driving circuit control power tube or rectifying tube；When output end voltage is lower than predeterminated voltage, power tube conducting, rectifying tube cut-off, inductive energy storage, turn-on time control circuit start timing；After reaching preset time, turn-on time control circuit resets PFM module to control driving circuit, power tube cut-off, rectifying tube conducting, and inductance releases energy to output end.Judge that load for underloading or heavy duty, reduces comparator offset electric current at light load according to the duty ratio size of current over-zero comparator output signal or driving circuit output drive signal；Comparator offset electric current is increased when overloaded.
Description
Technical field
The utility model relates to electronic circuit fields, and in particular to a kind of booster system response speed based on PFM control
Translation circuit.
Background technique
As the integrated level of system on chip digital processing element is continuously improved, DSP, ARM are such as integrated into the same chip
Interior, the requirement of carrying load ability and efficiency to power-supply system is higher and higher.It is set developing battery powered portable electronic
When standby, such as mobile phone, MP4, EBOOK, the low-power consumption product such as GPS influences whether entire if power system design is unreasonable
The framework of system, product function combination, the design of software and power distribution framework etc..Portable product is in most cases
It powers by battery, the power management of battery rear end has two kinds of implementations of DC/DC and LDO, respectively there is advantage and disadvantage.When normal work,
DC/DC module can be supplied to the stable voltage of system, and the high efficiency for keeping itself to convert, low fever.LDO has extremely low
Quiescent current, extremely low noise, higher PSRR (power supply ripple inhibition ratio).With the transfer efficiency to power supply, output voltage
Ripple, band carry response speed, volume etc. requires higher and higher, and low-power consumption, the research of DC/DC of high speed become concerned by people
Hot spot.In order to guarantee that electronic equipment efficiently, reliably works, need its power supply that there is low standby power loss, high light-load efficiency
With quick load transient response speed, while volume wants small.Classic pulse width modulation (Pulse Width
Modulation, PWM) switch converters control technology such as voltage mode control and current-mode control is unable to satisfy the requirement.PFM
(Pulse Frequency Modulation, PFM) control technology is a kind of pulse frequency modulated control technology.It becomes switch
The power switch tube of parallel operation is connected in an effective time slot, realizes control signal dutyfactor by the control turn-off time
Adjusting, to maintain the stabilization of output voltage.Compared with traditional PWM control technology, the converter based on PFM control has underloading
High-efficient, the advantages that transient response speed is fast, control loop is simple, has obtained extensive concern in industry and academia and has ground
Study carefully.But by low standby power loss require limited, the switching frequency of system improves to get on always, maintain always 100kHz~
200kHz or so just needs to add for some systems for needing low-voltage ripple if system work is on this frequency
The capacitance of big inductance sensibility reciprocal and output capacitance, so as to cause the increase of system cost.But in some compacts, high performance electricity
It in sub- product, needs that the small in size of power supply, ripple are small, transient response speed is fast, and has strictly to overall system integration degree
Limitation, thus need to select patch type ceramic condenser small in size and patch type inductance small in size.However traditional solution
Certainly method is all to maintain to maintain low output ripple, such system using big inductance and bulky capacitor in the case where low standby current
Overall cost will increase and volume is also larger, to reduce the competitiveness in market.Fig. 1 show a kind of based on PFM control
Boost converter systems block diagram, working principle: output voltage VO UT by feedback resistance R1 and R2 partial pressure after sampled
Voltage FB, sampled voltage FB are compared with reference voltage VREF, the output of comparator and the output of turn-on time control circuit
Signal is sent to PFM, changes the output frequency of PFM, distinguishes control switch pipe M2 and synchronous rectification by overdrive circuit driver
The conducting and shutdown of pipe M1, to change duty ratio, so that the output VOUT of PFM boost converter achievees the effect that pressure stabilizing.
Current over-zero comparator detect synchronous rectifier M1 electric current whether zero passage, synchronous rectifier M1 is turned off if zero passage, is prevented
VOUT is exported by inductance to input VIN electric discharge.
Since the booster system of PFM control needs extremely low quiescent current under standby or underloading, so comparator and mistake
The very little of the bias current design of zero detection comparator is limited and is to cause the response speed of the two comparators very slow
The working frequency of system, to need biggish inductance and biggish output capacitance.
The shortcomings that traditional technology, is: realizing that low ripple, low standby current, strong band carry energy using big inductance bulky capacitor
Power, which results in the increases of system cost, and the volume of system also limits greatly the application in compact occasion, thus
Reduce the competitiveness in market.
Utility model content
Utility model aims to solve prior art deficiencies, provide a kind of output using current over-zero comparator
To judge the weight of load, it can the bias current size for changing comparator according to the output of current over-zero comparator, from
And it is efficient in the case of effectively improving the response speed of the booster converter based on PFM control and being able to maintain zero load or be lightly loaded
Rate, circuit is simple, and whole system cost can be greatly lowered, and effectively improves the working frequency of system and is able to maintain at light load
The booster system response speed translation circuit that high efficiency is controlled based on PFM.The another object of the utility model, which is to provide one kind, to be had
It imitates the working frequency of raising system and keeps low quiescent current at light load, it still can be with using small inductor and small output capacitance
The ripple for keeping low output voltage is underloading or again by the difference load of the output signal of internal current zero-crossing comparator
It carries, to change the bias current of comparator, allows whole system that can be up to 1MHz in working frequency when overloaded even higher,
And can guarantee low quiescent current and high efficiency in the case of being lightly loaded, the raising of system operating frequency is so that can be used small
Inductance and small output capacitance, the booster system response speed that can still keep small output voltage ripple and be controlled based on PFM
Spend translation circuit.
The technical solution of the utility model is the booster system response speed translation circuit based on PFM control,
It is characterized in that the circuit includes: voltage input end, inductance, current over-zero comparator, rectifying tube, power tube, driving
Circuit, PFM module, comparator, divider resistance, output capacitance, turn-on time control circuit, the output end voltage of the circuit
Partial pressure acts on comparator as sampled voltage, makes comparisons with the reference voltage of comparator；The output signal and conducting of comparator
The output signal collective effect of time control circuit changes the output frequency of PFM, the output signal and electric current of PFM in PFM module
The output signal collective effect of zero-crossing comparator controls the on or off of power tube or rectifying tube in driving circuit；Work as output
When voltage being held to be lower than predeterminated voltage, power tube conducting, rectifying tube ends, and inductive energy storage, turn-on time control circuit starts timing；
After reaching preset time, turn-on time control circuit resets PFM module, and then controls driving circuit, cuts power tube
Only, rectifying tube conducting, inductance release energy to the output end of circuit, at this point, according to the output signal of current over-zero comparator or
The output drive signal of driving circuit judges load for underloading or heavily loaded, when at light load, current over-zero comparator detects
The duty ratio of the output drive signal of inductive current zero passage or driving circuit is very low, to reduce the bias current of comparator；When
For when overloaded, current over-zero comparator does not detect that the output drive signal increasing of inductive current zero passage or driving circuit is compared
The bias current of device.
As preferred: the circuit includes: voltage input end VIN, inductance L, current over-zero comparator, rectifying tube M1, power
Pipe M2, driving circuit driver, PFM module, comparator, divider resistance R1、R2, output capacitance COUT, turn-on time control circuit,
It further include output capacitance internal resistance RESR, the rectifying tube M1For PMOS tube, power tube M2For NMOS tube；The voltage input end VIN
Pass sequentially through inductance L, rectifying tube M1Source electrode and drain electrode, output capacitance internal resistance RESR, output capacitance COUTAfter be grounded, the voltage
Input terminal VINPass sequentially through inductance L, power tube M2After be grounded, the power tube M2Drain electrode connect with one end of inductance L, source electrode
First output end of ground connection, grid and driving circuit driver connects, the rectifying tube M1Grid and driving circuit driver
Second output terminal connection, the inverting input terminal of the current over-zero comparator and rectifying tube M1Source electrode, power tube M2And inductance
Common end connection, normal phase input end and the rectifying tube M of L1Drain electrode, output capacitance internal resistance RESRCommon end connection, output end is same
When with the bias current of the first input end of driving circuit driver and comparator setting end connect, divider resistance R1One end with
Rectifying tube M1Drain electrode, output capacitance internal resistance RESRCommon end connection, the other end pass through divider resistance R2Ground connection, comparator it is anti-
Phase input terminal is connected to divider resistance R1、R2Common end, normal phase input end meets reference voltage VREF, comparator output end connection
The first input end of PFM module, the second input terminal connection output end of turn-on time control circuit of PFM module, PFM module
The second input terminal of output end connection driving circuit driver；
The output end voltage VOUTFor rectifying tube M1Drain electrode and output capacitance internal resistance RESRThe voltage of common end；Output end electricity
Press VOUTPartial pressure act on comparator, the reference voltage V of sampled voltage FB and comparator as sampled voltage FBREFIt makes comparisons；
The output signal V that comparator obtainsEAWith the output signal collective effect of turn-on time control circuit in PFM module to change PFM
The output frequency of module；The output signal of PFM and the output signal V of current over-zero comparatorZEROCollective effect is in driving circuit
To control power tube M2Or rectifying tube M1On or off；As output end voltage VOUTWhen lower than predeterminated voltage, sampled voltage FB
Lower than reference voltage VREF, the output signal V of comparatorEA, the output signal of PFM module, driving circuit output signal VP、VN
It is high level, power tube M2Conducting, rectifying tube M1Cut-off, inductance L energy storage, turn-on time control circuit start timing；It reaches pre-
If after the time, turn-on time control circuit, which reset to PFM module, makes its output signal low level, and then makes driving circuit
Output signal VN, VP be low level, power tube M2Cut-off, rectifying tube M1Conducting, inductance L release energy to the output end of circuit,
Meanwhile whether zero passage judges load for heavy duty or underloading to current over-zero comparator detection inductive current；If inductive current zero passage,
The then output signal V of current over-zero comparatorZEROFor high level, load as light condition, at this point, current over-zero comparator is defeated
Signal V outZEROThe bias current for reducing comparator, reduces the quiescent dissipation of circuit；If inductive current does not have zero passage, electricity
Flow through the output signal V of zero comparatorZEROFor low level, load as heavy condition, at this point, the output of current over-zero comparator is believed
Number VZEROThe bias current for increasing comparator improves comparator speed, and circuit work frequency improves.
As preferred: the internal circuit of the comparator includes: nor gate D1、D2, phase inverter E1, PMOS tube P1、P2、P3、
P4、P5、P6, NMOS tube N1、N2、N3、N4、N5, bias voltage VBP, the output signal VZERO of the current over-zero comparator connect or
NOT gate D1First input end, nor gate D2Output end connect nor gate D1The second input terminal, nor gate D1Output end connect
Meet nor gate D2First input end, the output signal VEA connection nor gate D of comparator2The second input terminal, nor gate D1's
Output end connects phase inverter E1Input terminal, phase inverter E1Output end connect PMOS tube P2Grid, PMOS tube P2Source electrode with
PMOS tube P1Drain electrode connection, PMOS tube P2Drain electrode simultaneously with PMOS tube P3Drain electrode and NMOS tube N1Drain electrode connection, PMOS
Pipe P1Source electrode connect with supply voltage, PMOS tube P1Grid and bias voltage VBPConnection, PMOS tube P3Source electrode and power supply electricity
Pressure connection, PMOS tube P3Grid and bias voltage VBPConnection, NMOS tube N1Drain electrode connect with grid lead, NMOS tube N1's
Source electrode ground connection, PMOS tube P4Source electrode connect with supply voltage, PMOS tube P4Grid and PMOS tube P5Grid connection, PMOS
Pipe P4Drain electrode and NMOS tube N2Drain electrode connection, PMOS tube P4Grid connect with drain conductors, NMOS tube N2Grid connect and adopt
Sample voltage FB, NMOS tube N2Source electrode and NMOS tube N3Drain electrode and NMOS tube N4Source electrode connection, NMOS tube N3Grid with
NMOS tube N1Grid connected with the grid of NMOS tube N5, NMOS tube N3Source electrode ground connection, PMOS tube P5Source electrode and supply voltage
Connection, PMOS tube P5Drain electrode and NMOS tube N4Drain electrode connection, NMOS tube N4Grid meet the reference voltage VREF of comparator,
PMOS tube P6Source electrode connect with supply voltage, PMOS tube P6Drain electrode, NMOS tube N5Drain electrode and comparator output end connect
It connects, NMOS tube N5Source electrode ground connection；
As output end voltage VOUTWhen lower than predeterminated voltage, the output signal V of comparatorEAFor high level, VEABy or it is non-
Door D2、D1With phase inverter E1Output low level makes PMOS tube P afterwards2Conducting, so that the bias current of comparator is increased, comparator
Response speed improves；At this point, if load is in heavy duty, the output signal V of current over-zero comparatorZEROFor low level,
PMOS tube P2Constantly on, comparator keeps faster response speed；At this point, if load is in underloading, current over-zero ratio
Compared with the output signal V of deviceZEROFor high level, the output signal VZEROThrough nor gate D1、D2With phase inverter E1After export high level
Make PMOS tube P2Shutdown, to reduce the bias current of comparator, the quiescent dissipation reduction of circuit, efficiency are improved.
As preferred: the circuit includes: voltage input end VIN, inductance L, current over-zero comparator, rectifying tube M1, power
Pipe M2, driving circuit driver, PFM module, comparator, divider resistance R1、R2, output capacitance COUT, turn-on time control circuit,
It further include output capacitance internal resistance RESR, the rectifying tube M1For PMOS tube, power tube M2For NMOS tube；The voltage input end VIN
Pass sequentially through inductance L, rectifying tube M1Source electrode and drain electrode, output capacitance internal resistance RESR, output capacitance COUTAfter be grounded, the voltage
Input terminal VINPass sequentially through inductance L, power tube M2Drain electrode and source electrode after be grounded, the power tube M2Grid simultaneously with driving
The first output end of circuit driver is connected with the bias current of comparator setting end, the rectifying tube M1Grid and driving electricity
The second output terminal of road driver connects, the normal phase input end and rectifying tube M of the current over-zero comparator1Source electrode, power
Pipe M2Drain electrode connected with the common end of inductance L, inverting input terminal and rectifying tube M1Drain electrode, output capacitance internal resistance RESRIt is public
End connection, the output end of the current over-zero comparator are connect with the first input end of driving circuit driver, divider resistance R1
One end and rectifying tube M1Drain electrode and output capacitance internal resistance RESRCommon end connection, divider resistance R1The other end pass through partial pressure
Resistance R2Ground connection, the inverting input terminal of comparator are connected to divider resistance R1、R2Common end, normal phase input end connects reference voltage
VREF, the first input end of the output end connection PFM module of comparator, the second input terminal connection turn-on time control of PFM module
The output end of circuit, the second input terminal of the output end connection driving circuit driver of PFM module；
The output end voltage VOUTFor rectifying tube M1Drain electrode and output capacitance internal resistance RESRThe voltage of common end；
Output end voltage VOUTPartial pressure act on comparator, the base of sampled voltage FB and comparator as sampled voltage FB
Quasi- voltage VREFIt makes comparisons；The output signal V that comparator obtainsEAWith the output signal collective effect of turn-on time control circuit in
PFM module is to change the output frequency of PFM module；The output signal of PFM and the output signal V of current over-zero comparatorZEROAltogether
Same-action controls power tube M in driving circuit driver2Or rectifying tube M1On or off；As output end voltage VOUTIt is lower than
When predeterminated voltage, sampled voltage FB is lower than reference voltage VREF, the output signal V of comparatorEA, PFM module output signal, drive
The output signal V of dynamic circuitP、VNIt is high level, power tube M2Conducting, rectifying tube M1Cut-off, inductance L energy storage, turn-on time control
Circuit processed starts timing；After reaching preset time, turn-on time control circuit, which reset to PFM module, makes its output signal
Low level, and then make the output signal V of driving circuitN、VPFor low level, power tube M2Cut-off, rectifying tube M1Conducting, L pairs of inductance
The output end of circuit releases energy, meanwhile, the first output signal V is passed through according to the first output end of driving circuit driverN's
Duty ratio size judges load for underloading or heavily loaded, as the first output signal VNDuty ratio less than a setting value when, then bear
Carrying is light condition, at this point, the first output signal VNThe bias current for reducing comparator, makes the quiescent dissipation of circuit reduce, protect
Hold the high efficiency under underloading；As the first output signal VNDuty ratio be greater than a setting value when, then load be heavy condition, this
When, the first output signal VNThe bias current for increasing comparator improves comparator speed, and circuit work frequency improves.
As preferred: the internal circuit of the comparator includes: PMOS tube P1、P2、P3、P4, NMOS tube N1、N2、N3、N4、
N5、N6, resistance R0, capacitor C1, bias voltage VBN, the PMOS tube P1、P2、P3、P4Source electrode be separately connected supply voltage, PMOS
Pipe P1Drain electrode and NMOS tube N3Drain electrode connection, PMOS tube P1Grid and PMOS tube P2Grid connection, NMOS tube N3Source
Pole ground connection, NMOS tube N3Grid and NMOS tube N6Grid connection, NMOS tube N3Drain electrode connect with grid lead, PMOS tube
P2Drain electrode and NMOS tube N4Drain electrode connection, PMOS tube P2Grid connect with drain conductors, NMOS tube N4Grid connect sampling
Voltage FB, NMOS tube N4Source electrode, NMOS tube N5Source electrode, NMOS tube N1Drain electrode, NMOS tube N2Drain electrode connection, NMOS tube N1
Source electrode ground connection, the first output signal V of driving circuit driverNPass through resistance R0With NMOS tube N1Grid and capacitor C1's
One end connection, capacitor C1The other end ground connection, NMOS tube N2Grid and bias voltage VBNConnection, NMOS tube N2Source electrode ground connection,
PMOS tube P3Drain electrode and NMOS tube N5Drain electrode connection, PMOS tube P3Grid and PMOS tube P4Grid connection, PMOS tube P3
Grid connect with drain conductors, NMOS tube N5Grid meet the reference voltage V of comparatorREF, PMOS tube P4Drain electrode, NMOS tube
N6Drain electrode and comparator output end connect, NMOS tube N6Source electrode ground connection；
When load is the output signal V of driving circuit at light loadNDuty ratio is less than a setting value, VNThrough resistance R0And capacitor
C1The DC analog level for becoming amplitude very little after filtering makes NMOS tube N1Shutdown is protected to reduce the bias current of comparator
Hold the high efficiency of light condition；When load is the output signal V of driving circuit when overloadedNDuty ratio is greater than a setting value, VNThrough
Resistance R0With capacitor C1Become the biggish DC analog level of amplitude after filtering, makes NMOS tube N1Conducting, thus the biasing of comparator
Electric current is with VNDuty ratio increase and increase, the raising of the response speed of comparator.
Compared with prior art, the utility model has the beneficial effects that
(1) the transformation that two kinds of circuits realize booster system response speed is provided:
First circuit passes through the output signal V of internal current zero-crossing comparatorZERODifference load be underloading or heavy duty,
To change the bias current of comparator, allow whole system that can be up to 1MHz in working frequency when overloaded even higher, and
It can guarantee low quiescent current and high efficiency again in the case of underloading, the raising of system operating frequency allows to using small
Inductance L and small output capacitance COUT, can still keep small output voltage VOUTRipple, circuit is simply cheap, collection
At precision height, so that system has the market competitiveness.
Second circuit utilizes driving signal VNDistinguishing load is underloading or heavy duty, when load is V at light loadNDuty
It is relatively low, when load is V when overloadedNDuty it is bigger, controlled using the difference of duty ratio the bias current of comparator come
Change its response speed, using this method can effectively improve based on PFM control booster converter response speed and
The high efficiency being able to maintain in the case of unloaded or underloading, circuit simple effects are significant, and the cost of whole system is greatly lowered, and improve
The market competitiveness.
It (2) is exactly to detect output voltage V using translation circuit described in the utility modelOUTIt is just improved when lower than setting value
The speed of comparator can suddenly become in load improve the response speed of system when overloaded to avoid output voltage from occurring in this way
A sharp decline improves system suddenly with the response speed in the case of carrying.At this time if load is constantly under case of heavy load,
The output V of current over-zero comparatorZREOIt remains unchanged, the bias current of comparator is protected larger at this time, until load becomes being lightly loaded.
(3) the sound of the booster converter based on PFM control can be improved effectively using translation circuit described in the utility model
The high efficiency answering speed and being able to maintain in the case of unloaded or underloading.Circuit simple effects are significant, and whole system is greatly lowered
Cost, improve the market competitiveness.
(4) translation circuit described in the utility model passes through the output signal V of internal current zero-crossing comparatorZEROOr driving
Signal VNDuty ratio difference load be underloading or heavy duty, to change the bias current of comparator, allow whole system can be with
It is up to that 1MHz is even higher in working frequency when overloaded, and can guarantee low quiescent current and high effect in the case of being lightly loaded
Rate.The raising of system operating frequency allows to using small inductance L and small output capacitance COUT, can still keep small
Output voltage VOUTRipple.Circuit is simply cheap, and it is high to integrate precision, so that system has the market competitiveness.
Detailed description of the invention
Fig. 1 is the boost converter systems block diagram that the prior art is controlled based on PFM；
Fig. 2 is the booster system response speed transformation that first technical solution of the utility model is controlled based on PFM
Circuit block diagram；
Fig. 3 is the specific implementation circuit block diagram of the comparator of first technical solution of the utility model；
Fig. 4 is the booster system response speed transformation that second technical solution of the utility model is controlled based on PFM
Circuit block diagram；
Fig. 5 is the specific implementation circuit block diagram of the comparator of second technical solution of the utility model.
Specific embodiment
The utility model is described in further detail below in conjunction with attached drawing:
Referring to FIG. 2, being first technical solution of the utility model, a kind of boosting based on PFM control is provided
Converter response speed translation circuit, the circuit pass through the output signal V of internal current zero-crossing comparatorZERODifference load is light
It carries or heavily loaded, to change the bias current of comparator.
Referring to FIG. 2, the circuit includes: voltage input end VIN, inductance L, current over-zero comparator, rectifying tube M1, power
Pipe M2, driving circuit driver, PFM module, comparator, divider resistance R1、R2, output capacitance COUT, turn-on time control circuit,
It further include output capacitance internal resistance RESR, the rectifying tube M1For PMOS tube, power tube M2For NMOS tube；The voltage input end VIN
Pass sequentially through inductance L, rectifying tube M1, output capacitance internal resistance RESR, output capacitance COUTAfter be grounded, the voltage input end VINSuccessively
Pass through inductance L, power tube M2After be grounded, the power tube M2Drain electrode connect with one end of inductance L, source electrode ground connection, grid and drive
The first output end connection of dynamic circuit driver, the rectifying tube M1Source electrode connect with one end of inductance L, drain with output electricity
Hold internal resistance RESROne end connection, grid and driving circuit driver second output terminal connect, the current over-zero comparator
Inverting input terminal and rectifying tube M1Source electrode connection, normal phase input end and rectifying tube M1Drain electrode connection, output end simultaneously with driving
The first input end of circuit driver is connected with the bias current of comparator setting end, divider resistance R1One end and rectifying tube M1
Drain electrode connection, the other end pass through divider resistance R2Ground connection, the inverting input terminal of comparator are connected to divider resistance R1、R2Public affairs
End, normal phase input end meet reference voltage V altogetherREF, comparator output end connection PFM module first input end, PFM module
Second input terminal connect the output end of turn-on time control circuit, PFM module output end connection driving circuit driver the
Two input terminals；
The output end voltage VOUTFor rectifying tube M1 drain electrode and output capacitance internal resistance RESRThe voltage of common end；
Output end voltage VOUTPartial pressure act on comparator, the base of sampled voltage FB and comparator as sampled voltage FB
Quasi- voltage VREFIt makes comparisons；The output signal V that comparator obtainsEAWith the output signal collective effect of turn-on time control circuit in
PFM module is to change the output frequency of PFM module；The output signal of PFM and the output signal V of current over-zero comparatorZEROAltogether
Same-action controls power tube M in driving circuit2Or rectifying tube M1On or off；As output end voltage VOUTLower than default electricity
When pressure, sampled voltage FB is lower than reference voltage VREF, the output signal V of comparatorEA, the output signal of PFM module, driving circuit
Output signal VP、VNIt is high level, power tube M2Conducting, rectifying tube M1Cut-off, inductance L energy storage, turn-on time control circuit
Start timing；After reaching preset time, turn-on time control circuit, which reset to PFM module, makes the low electricity of its output signal
It is flat, and then make the output signal V of driving circuitN、VPFor low level, power tube M2Cut-off, rectifying tube M1Conducting, inductance L is to circuit
Output end release energy, meanwhile, according to current over-zero comparator by inductive current whether zero passage judge load to be heavily loaded or
Underloading；If inductive current zero passage, the output signal V of current over-zero comparatorZEROFor high level, load as light condition,
At this point, the output signal V of current over-zero comparatorZEROThe bias current for reducing comparator, reduces the quiescent dissipation of circuit；Such as
Fruit inductive current does not have zero passage, then the output signal V of current over-zero comparatorZEROFor low level, load as heavy condition, this
When, the output signal V of current over-zero comparatorZEROThe bias current for increasing comparator improves comparator speed, circuit work
Frequency improves.
Specifically, if zero cross signal VZEROFor high level, then load is underloading or standby, if zero cross signal VZEROFor
Low level, then load is heavy duty.It thus can be according to zero cross signal VZEROLow and high level determine the biased electrical of comparator
Flow size.If at light load, allowing the bias current of comparator minimum, low quiescent current is kept to be lightly loaded situation to improve system
Under efficiency.If the bias current of comparator when overloaded, is allowed to become larger, the response speed of comparator is improved, so as to allow
It is even higher that whole system working frequency is up to 1MHz.The working frequency of system can be effectively improved using this method and keeps light
Low quiescent current when load can still keep the ripple of low output voltage VO UT using small inductor and small output capacitance, electricity
Road is simply low in cost.
First technical solution of the utility model: pass through the output signal V of internal current zero-crossing comparatorZERODifference
Load is underloading or heavy duty, to change the bias current of comparator, allows whole system can be in working frequency when overloaded
Up to 1MHz is even higher, and can guarantee low quiescent current and high efficiency in the case of being lightly loaded.System operating frequency
Raising allows to using small inductance L and small output capacitance COUT, can still keep small output voltage VOUTRipple.
Circuit is simply cheap, and it is high to integrate precision, so that system has the market competitiveness.
From figure 2 it can be seen that working as VOUTWhen voltage is lower than preset target voltage, i.e. VOUTVoltage value by feedback resistance
R1And R2Voltage FB after partial pressure is lower than reference voltage VREFWhen, comparator exports high level at this time, and at this moment PFM module output is height
Level, the output V of drive module driverP、VNIt is high level, i.e. power tube NMOS tube M2Conducting, synchronous rectifier PMOS tube
M1Cut-off, inductive current is linearly increasing at this time, and inductance stores energy.
In the output V of comparatorEAWhile becoming high level, turn-on time control circuit starts timing, when timing is in advance
If turn-on time control circuit exports high level when the time, PFM module is resetted so that its output becomes low level, this
When VP、VNAlso become low level, power tube NMOS tube M2Cut-off, synchronous rectifier PMOS tube M1Conducting, inductive current is linear at this time
Reduce, inductance releases energy to output.
By analysis above as it can be seen that the speed of comparator is the bottleneck of whole system working frequency limitation, the utility model
Judge that weight is carried using the output signal of current over-zero comparator.As synchronous rectifier PMOS tube M1When conducting, if electric current
Meeting zero passage, then current over-zero comparator can export V in inductive current zero-acrross ing momentZEROFor high level.If current over-zero ratio
Compared with the output V of deviceZEROIt is always maintained at low level and then illustrates that inductive current does not have zero passage, that indicates that load in heavy condition.
So can use the output V of current over-zero comparatorZEROTo judge the weight of load, it can according to current over-zero comparator
Output VZEROChange the bias current size of comparator, to change the response speed of comparator.
The application of technical solution according to fig. 2 please refers to shown in Fig. 3, provides a kind of realization of specific comparator
Circuit, the internal circuit of the comparator include: nor gate D1、D2, phase inverter E1, PMOS tube P1、P2、P3、P4、P5、P6、NMOS
Pipe N1、N2、N3、N4、N5, bias voltage VBP, the output signal V of the current over-zero comparatorZEROMeet nor gate D1It is first defeated
Enter end, nor gate D2Output end connect nor gate D1The second input terminal, nor gate D1Output end connect nor gate D2?
The output signal V of one input terminal, comparatorEAConnect nor gate D2The second input terminal, nor gate D1Output end connect reverse phase
Device E1Input terminal, phase inverter E1Output end connect PMOS tube P2Grid, PMOS tube P2Source electrode and PMOS tube P1Drain electrode
Connection, PMOS tube P2Drain electrode simultaneously with PMOS tube P3Drain electrode and NMOS tube N1Drain electrode connection, PMOS tube P1Source electrode and electricity
The connection of source voltage, PMOS tube P1Grid and bias voltage VBPConnection, PMOS tube P3Source electrode connect with supply voltage, PMOS tube
P3Grid and bias voltage VBPConnection, NMOS tube N1Drain electrode connect with grid lead, NMOS tube N1Source electrode ground connection, PMOS
Pipe P4Source electrode connect with supply voltage, PMOS tube P4Grid and PMOS tube P5Grid connection, PMOS tube P4Drain electrode with
NMOS tube N2Drain electrode connection, PMOS tube P4Grid connect with drain conductors, NMOS tube N2Grid connect sampled voltage FB,
NMOS tube N2Source electrode and NMOS tube N3Drain electrode connection, NMOS tube N3Grid and NMOS tube N1Grid connection, NMOS tube N3
Source electrode ground connection, PMOS tube P5Source electrode connect with supply voltage, PMOS tube P5Drain electrode and NMOS tube N4Drain electrode connection,
NMOS tube N4Grid meet the reference voltage V of comparatorREF, NMOS tube N4Source electrode and NMOS tube N3Drain electrode connection, PMOS tube
P6Source electrode connect with supply voltage, PMOS tube P6Grid and PMOS tube P5Drain electrode connection, PMOS tube P6Drain electrode compared with
The output end of device connects, NMOS tube N5Drain electrode and comparator output end connection, NMOS tube N5Grid and NMOS tube N1Grid
Pole connection, NMOS tube N5Source electrode ground connection；
As output end voltage VOUTWhen lower than predeterminated voltage, the output signal V of comparatorEAFor high level, VEABy or it is non-
Door D1、D2With phase inverter E1Output low level makes PMOS tube P afterwards2Conducting, so that the bias current of comparator is increased, comparator
Response speed improves；At this point, if load is in heavy duty, the output signal V of current over-zero comparatorZEROFor low level,
PMOS tube P2Constantly on, comparator keeps faster response speed；At this point, if load is in underloading, current over-zero ratio
Compared with the output signal V of deviceZEROFor high level, VZEROThrough nor gate D1、D2With phase inverter E1Output high level makes PMOS tube P afterwards2It closes
Disconnected, to reduce the bias current of comparator, the quiescent dissipation reduction of circuit, efficiency are improved.
Specifically, working as VOUTWhen voltage is lower than preset target voltage, i.e. VOUTVoltage value by feedback resistance R1And R2Partial pressure
Voltage FB afterwards is lower than reference voltage VREFWhen, comparator exports V at this timeEAFor high level, exported after nor gate and phase inverter
Low level, at this time PMOS tube P2Conducting, increases the bias current of comparator so that the speed of comparator improves at this time.It should
Detection method is exactly to detect output voltage VOUTThe speed of comparator is just improved when lower than setting value, it in this way can be prominent in load
Become the response speed for improving system when overloaded so to avoid output voltage from a sharp decline occur, improves the unexpected band of system
Response speed in the case of load.At this time if load is constantly under case of heavy load, the output V of current over-zero comparatorZREOThen
It is always low level, then PMOS tube P2Then constantly on, the response speed of comparator is very fast.
When load becomes smaller suddenly or is transformed under no-load condition, then current over-zero comparator can detect inductance electricity at this time
Zero is flowed through, to export VZEROFor high level signal, which generates high level after nor gate and phase inverter
Signal, thus PMOS tube P2Shutdown, reduces the bias current of comparator, to reduce the quiescent dissipation of whole system, improves
Efficiency under system underloading or no-load condition.
In unloaded or underloading, output voltage VOUTIt can slowly reduce, when lower than setting voltage value, comparator
Export VEAThe biasing that a high level increases comparator can be equally exported, then if detecting inductive current mistake in the case of afterflow
Zero, then current zero-crossing signal VZEROMinimum can be reduced to keep high efficiency the bias current of comparator at once.
It please refers to shown in Fig. 4, is to provide the liter based on PFM control for the application of the utility model technical solution
Buckling parallel operation response speed translation circuit, the circuit utilize the output signal V of driving circuitNLoad is distinguished as underloading or weight
It carries, when load is V at light loadNDuty it is relatively low, when load is when overloaded, VNDuty it is bigger.Not using duty ratio
Change its response speed with to control the bias current of comparator.
It please refers to shown in Fig. 4, specific implementation circuit includes: voltage input end VIN, inductance L, current over-zero comparator, rectification
Pipe M1, power tube M2, driving circuit driver, PFM module, comparator, divider resistance R1、R2, output capacitance COUT, turn-on time
Control circuit further includes output capacitance internal resistance RESR, the rectifying tube M1For PMOS tube, power tube M2For NMOS tube；The voltage
Input terminal VINPass sequentially through inductance L, rectifying tube M1, output capacitance internal resistance RESR, output capacitance COUTAfter be grounded, the voltage input
Hold VINPass sequentially through inductance L, power tube M2After be grounded, the power tube M2Drain electrode connect with one end of inductance L, source electrode connects
Ground, grid are connect with the bias current of the first output end of driving circuit driver and comparator setting end simultaneously, the rectification
Pipe M1Source electrode connect with one end of inductance L, drain with output capacitance internal resistance RESROne end connection, grid and driving circuit
The second output terminal of driver connects, the normal phase input end and rectifying tube M of the current over-zero comparator1Source electrode connection, anti-
Phase input terminal and rectifying tube M1Drain electrode connection, output end and driving circuit driver first input end connect, divider resistance R1
One end and rectifying tube M1Drain electrode connection, the other end pass through divider resistance R2Ground connection, the inverting input terminal of comparator are connected to point
Piezoresistance R1、R2Common end, normal phase input end meet reference voltage VREF, comparator output end connection PFM module it is first defeated
Enter end, the output end of the second input terminal connection turn-on time control circuit, the output end of PFM module of PFM module connect driving
The second input terminal of circuit driver；
The output end voltage VOUTFor rectifying tube M1Drain electrode and output capacitance internal resistance RESRThe voltage of common end；
Output end voltage VOUTPartial pressure act on comparator, the base of sampled voltage FB and comparator as sampled voltage FB
Quasi- voltage VREFIt makes comparisons；The output signal V that comparator obtainsEAWith the output signal collective effect of turn-on time control circuit in
PFM module is to change the output frequency of PFM module；The output signal of PFM and the output signal V of current over-zero comparatorZEROAltogether
Same-action controls power tube M in driving circuit driver2Or rectifying tube M1Conducting；As output end voltage VOUTLower than default electricity
When pressure, sampled voltage FB is lower than reference voltage VREF, the output signal V of comparatorEA, the output signal of PFM module, driving circuit
Output signal VP、VNIt is high level, power tube M2Conducting, rectifying tube M1Cut-off, inductance L energy storage, turn-on time control circuit
Start timing；After reaching preset time, turn-on time control circuit, which reset to PFM module, makes the low electricity of its output signal
It is flat, and then make the output signal V of driving circuitN、VPFor low level, power tube M2Cut-off, rectifying tube M1Conducting, inductance L is to circuit
Output end release energy, meanwhile, according to the first output end of driving circuit driver pass through the first output signal VNDuty
Load is judged than size for underloading or heavy duty, as the first output signal VNDuty ratio be less than certain value when, then load be light
Load state, at this point, the first output signal VNThe bias current for reducing comparator reduces the quiescent dissipation of circuit, keeps underloading
Under high efficiency；As the first output signal VNDuty ratio be greater than certain value when, then load be heavy condition, at this point, first is defeated
Signal V outNThe bias current for increasing comparator improves comparator speed, and circuit work frequency improves.
It is applied based on second of the utility model technical solution, as Fig. 5 provides a kind of specific implementation of comparator
Circuit, the internal circuit of the comparator include: PMOS tube P1、P2、P3、P4, NMOS tube N1、N2、N3、N4、N5、N6, resistance R0, electricity
Hold C1, bias voltage VBN, the PMOS tube P1、P2、P3、P4Source electrode be separately connected supply voltage, PMOS tube P1Drain electrode with
NMOS tube N3Drain electrode connection, PMOS tube P1 grid connect with the grid of PMOS tube P2, the source electrode of NMOS tube N3 is grounded, NMOS
Pipe N3Grid and NMOS tube N6Grid connection, NMOS tube N3Drain electrode connect with grid lead, PMOS tube P2Drain electrode with
NMOS tube N4Drain electrode connection, PMOS tube P2Grid connect with drain conductors, NMOS tube N4Grid connect sampled voltage FB,
NMOS tube N4Source electrode and NMOS tube N1Drain electrode connection, NMOS tube N1Source electrode ground connection, driving circuit driver first output
Signal VNPass through resistance R0With NMOS tube N1Grid connection, capacitor C1One end and NMOS tube N1Grid connection, another termination
Ground, NMOS tube N2Grid and bias voltage VBNConnection, NMOS tube N2Drain electrode and NMOS tube N1Drain electrode connection, NMOS tube N2
Source electrode ground connection, PMOS tube P3Drain electrode and NMOS tube N5Drain electrode connection, PMOS tube P3Grid and PMOS tube P4Grid connect
It connects, PMOS tube P3Grid connect with drain conductors, NMOS tube N5Grid meet the reference voltage V of comparatorREF, NMOS tube N5's
Source electrode and NMOS tube N1Drain electrode connection, PMOS tube P4Drain electrode and comparator output end connect, NMOS tube N6Drain electrode with than
Compared with the output end connection of device, NMOS tube N6Source electrode ground connection；
When load is the output signal V of driving circuit at light loadNDuty ratio is less than certain value, VNThrough resistance R0With capacitor C1
The DC analog level for becoming amplitude very little after filtering makes NMOS tube N1Shutdown is kept to reduce the bias current of comparator
The high efficiency of light condition；When load is the output signal V of driving circuit when overloadedNDuty ratio is greater than certain value, the output
Signal VNThrough resistance R0With capacitor C1Become the biggish DC analog level of amplitude after filtering, makes NMOS tube N1Conducting, to compare
The bias current of device is with VNDuty ratio increase and increase, the raising of the response speed of comparator.
Specifically, when load as at light load, driving signal V at this timeNDuty ratio very little, driving signal VNBy resistance R0
With capacitor C1Become the DC analog level of an amplitude very little after filtering, then NMOS tube N1Shutdown, the at this time biasing of comparator
Electric current is minimum, the high efficiency under can keeping unloaded in this way or being lightly loaded；
When load is when overloaded, driving signal V at this timeNDuty ratio it is very big, driving signal VNBy resistance R0With capacitor C1
Become the biggish DC analog level of amplitude after filtering, then NMOS tube N1Conducting, the bias current of comparator will at this time
With driving signal VNDuty ratio size and change, duty ratio is bigger, and filtered DC analog level is bigger, NMOS tube
N1The electric current flowed through is bigger, and the response speed of comparator is faster.
The third application of the utility model technical solution is a kind of booster system response speed based on PFM control
The control method of translation circuit, the circuit include voltage input end VIN, inductance L, current over-zero comparator, rectifying tube M1, function
Rate pipe M2, driving circuit, PFM module, comparator, divider resistance R1、R2, output capacitance COUT, output capacitance internal resistance RESR, conducting
Time control circuit, steps are as follows:
S1, output end voltage VOUTThrough divider resistance R1、R2Partial pressure, obtains sampled voltage FB；
S2, the sampled voltage FB act on comparator, the reference voltage V with comparatorREFIt makes comparisons, comparator obtains
The output signal V of comparatorEA；
The output signal V of S3, the comparatorEAOutput signal collective effect with turn-on time control circuit is in PFM mould
Block obtains the output signal of PFM module；
The output signal V of S4, the output signal of the PFM module and current over-zero comparatorZEROCollective effect is in driving
Circuit driver is used to control power tube M2With rectifying tube M1On or off；
S5, as output end voltage VOUTWhen lower than predeterminated voltage, sampled voltage FB is lower than reference voltage VREF, comparator it is defeated
Signal V outEA, the output signal of PFM module, driving circuit driver output signal VP、VNIt is high level, power tube M2It leads
Logical, rectifying tube M1Cut-off, inductance L energy storage, meanwhile, turn-on time control circuit starts timing；
S6, when timing reach preset time when, turn-on time control circuit to PFM module carry out reset make its output signal
Become low level, and then the output signal V of driving circuitN、VPIt also is low level, power tube M2Cut-off, rectifying tube M1Conducting；
Energy storage in step S5 is released to the output end of circuit by S7, inductance L, and current over-zero comparator passes through inductive current
Whether zero passage judges load for underloading or heavy duty；
If S8, inductive current zero passage, the output signal V of current over-zero comparatorZEROFor high level, load as underloading
State, at this point, the output signal V of current over-zero comparatorZEROThe quiescent dissipation of circuit, drops in the bias current for reducing comparator
It is low；
If inductive current does not have zero passage, the output signal V of current over-zero comparatorZEROFor low level, load is attached most importance to
Load state, at this point, the output signal V of current over-zero comparatorZEROThe bias current for increasing comparator, proposes comparator speed
Height, circuit work frequency improve.
4th technical solution of the utility model is a kind of booster system response speed transformation based on PFM control
The control method of circuit, the circuit include voltage input end VIN, inductance L, current over-zero comparator, rectifying tube M1, power tube
M2, driving circuit, PFM module, comparator, divider resistance R1And R2, output capacitance COUT, output capacitance internal resistance RESR, turn-on time
Control circuit, steps are as follows:
S1, output end voltage VOUTThrough divider resistance R1、R2Partial pressure, obtains sampled voltage FB；
S2, the sampled voltage FB act on comparator, the reference voltage V with comparatorREFIt makes comparisons, comparator obtains
The output signal V of comparatorEA；
The output signal V of S3, the comparatorEAOutput signal collective effect with turn-on time control circuit is in PFM mould
Block obtains the output signal of PFM module；
The output signal V of S4, the output signal of the PFM module and current over-zero comparatorZEROCollective effect is in driving
Circuit driver is used to control power tube M2With rectifying tube M1On or off；
S5, as output end voltage VOUTWhen lower than predeterminated voltage, sampled voltage FB is lower than reference voltage VREF, comparator it is defeated
Signal V outEA, the output signal of PFM module, driving circuit driver output signal VP、VNIt is high level, power tube M2It leads
Logical, rectifying tube M1Cut-off, inductance L energy storage, meanwhile, turn-on time control circuit starts timing；
S6, when timing reach preset time when, turn-on time control circuit to PFM module carry out reset make its output signal
Become low level, and then the output signal V of driving circuitN、VPIt also is low level, power tube M2Cut-off, rectifying tube M1Conducting；
Energy storage in step S5 is released to the output end of circuit, the first output end of driving circuit driver by S7, inductance L
Pass through the first output signal VNDuty ratio size judge the load for underloading or heavily loaded；
S8, when the duty ratio of the first output signal VN be less than certain value when, then load be light condition, at this point, first is defeated
Signal VN reduces the bias current of comparator out, reduces the quiescent dissipation of circuit, keeps the high efficiency under underloading；
When the duty ratio of the first output signal VN is greater than certain value, then load is heavy condition, at this point, the first output letter
Number VN increases the bias current of comparator, improves comparator speed, and circuit work frequency improves.
The above is only the preferred embodiment of the present invention, it is all done according to the utility model claims range it is equal
Deng variation and modification, it should all belong to the covering scope of the utility model claims.
Claims (5)
1. a kind of booster system response speed translation circuit based on PFM control, which is characterized in that the circuit includes: voltage
Input terminal VIN, inductance L, current over-zero comparator, rectifying tube M1, power tube M2, driving circuit driver, PFM module, compare
Device, divider resistance R1、R2, output capacitance COUT, turn-on time control circuit, the partial pressure of the output end voltage of the circuit is as adopting
Sample voltage acts on comparator, makes comparisons with the reference voltage of comparator；Output signal and turn-on time the control electricity of comparator
The output signal collective effect on road changes the output frequency of PFM, the output signal and current over-zero comparator of PFM in PFM module
Output signal collective effect the on or off of power tube or rectifying tube is controlled in driving circuit；When output end voltage is lower than
When predeterminated voltage, power tube conducting, rectifying tube ends, and inductive energy storage, turn-on time control circuit starts timing；When reaching default
Between after, turn-on time control circuit resets PFM module, and then controls driving circuit, makes that power tube cut-off, rectifying tube leads
Logical, inductance releases energy to the output end of circuit, at this point, according to current over-zero comparator output signal or driving circuit it is defeated
Driving signal judges load for underloading or heavily loaded, when at light load, current over-zero comparator detects inductive current zero passage out
Or the duty ratio of the output drive signal of driving circuit is very low, to reduce the bias current of comparator；When for when overloaded, electric current
Zero-crossing comparator does not detect that the duty of the output drive signal of inductive current zero passage or driving circuit is bigger, to increase
The bias current of comparator.
2. the booster system response speed translation circuit according to claim 1 based on PFM control, which is characterized in that described
Circuit further includes output capacitance internal resistance RESR, the rectifying tube M1For PMOS tube, power tube M2For NMOS tube；The voltage input end
VINPass sequentially through inductance L, rectifying tube M1Source electrode and drain electrode, output capacitance internal resistance RESR, output capacitance COUTAfter be grounded, the electricity
Press input terminal VINPass sequentially through inductance L, power tube M2After be grounded, the power tube M2Drain electrode connect with one end of inductance L, source
First output end of pole ground connection, grid and driving circuit driver connects, the rectifying tube M1Grid and driving circuit
The second output terminal of driver connects, the inverting input terminal and rectifying tube M of the current over-zero comparator1Source electrode, power tube M2
And common end connection, normal phase input end and the rectifying tube M of inductance L1Drain electrode, output capacitance internal resistance RESRCommon end connection, it is defeated
Outlet is connect with the bias current of the first input end of driving circuit driver and comparator setting end simultaneously, divider resistance R1's
One end and rectifying tube M1Drain electrode, output capacitance internal resistance RESR common end connection, the other end pass through divider resistance R2Ground connection, than
Inverting input terminal compared with device is connected to divider resistance R1、R2Common end, normal phase input end meets reference voltage VREF, comparator it is defeated
The first input end of outlet connection PFM module, the output end of the second input terminal connection turn-on time control circuit of PFM module,
The second input terminal of the output end connection driving circuit driver of PFM module；
The output end voltage VOUTFor rectifying tube M1Drain electrode and output capacitance internal resistance RESRThe voltage of common end；Output end voltage VOUT
Partial pressure act on comparator, the reference voltage V of sampled voltage FB and comparator as sampled voltage FBREFIt makes comparisons；Comparator
The output signal collective effect of obtained output signal VEA and turn-on time control circuit are in PFM module to change PFM module
Output frequency；The output signal of PFM and the output signal V of current over-zero comparatorZEROCollective effect is controlled in driving circuit
Power tube M2Or rectifying tube M1On or off；As output end voltage VOUTWhen lower than predeterminated voltage, sampled voltage FB is lower than base
Quasi- voltage VREF, the output signal V of comparatorEA, the output signal of PFM module, driving circuit output signal VP、VNIt is height
Level, power tube M2Conducting, rectifying tube M1Cut-off, inductance L energy storage, turn-on time control circuit start timing；Reach preset time
Afterwards, turn-on time control circuit, which reset to PFM module, makes its output signal low level, and then makes the output of driving circuit
Signal VN, VP are low level, power tube M2Cut-off, rectifying tube M1Conducting, inductance L release energy to the output end of circuit, meanwhile,
Whether zero passage judges load for heavy duty or underloading to current over-zero comparator detection inductive current；If inductive current zero passage, electricity
Flow through the output signal V of zero comparatorZEROFor high level, load as light condition, at this point, the output of current over-zero comparator is believed
Number VZEROThe bias current for reducing comparator, reduces the quiescent dissipation of circuit；If inductive current does not have zero passage, electric current mistake
The output signal V of zero comparatorZEROFor low level, load as heavy condition, at this point, the output signal of current over-zero comparator
VZEROThe bias current for increasing comparator improves comparator speed, and circuit work frequency improves.
3. the booster system response speed translation circuit according to claim 2 based on PFM control, which is characterized in that described
The internal circuit of comparator includes: nor gate D1、D2, phase inverter E1, PMOS tube P1、P2、P3、P4、P5、P6, NMOS tube N1、N2、N3、
N4、N5, bias voltage VBP, the output signal VZERO of the current over-zero comparator meets nor gate D1First input end or non-
Door D2Output end connect nor gate D1The second input terminal, nor gate D1Output end connect nor gate D2First input end,
The output signal VEA connection nor gate D of comparator2The second input terminal, nor gate D1Output end connect phase inverter E1Input
End, phase inverter E1Output end connect PMOS tube P2Grid, PMOS tube P2Source electrode and PMOS tube P1Drain electrode connection, PMOS
Pipe P2Drain electrode simultaneously with PMOS tube P3Drain electrode and NMOS tube N1Drain electrode connection, PMOS tube P1Source electrode and supply voltage connect
It connects, PMOS tube P1Grid and bias voltage VBPConnection, PMOS tube P3Source electrode connect with supply voltage, PMOS tube P3Grid
With bias voltage VBPConnection, NMOS tube N1Drain electrode connect with grid lead, NMOS tube N1Source electrode ground connection, PMOS tube P4Source
Pole is connect with supply voltage, PMOS tube P4Grid and PMOS tube P5Grid connection, PMOS tube P4Drain electrode and NMOS tube N2's
Drain electrode connection, PMOS tube P4Grid connect with drain conductors, NMOS tube N2Grid meet sampled voltage FB, NMOS tube N2Source
Pole and NMOS tube N3Drain electrode and NMOS tube N4Source electrode connection, NMOS tube N3Grid and NMOS tube N1Grid and NMOS tube
The grid of N5 connects, NMOS tube N3Source electrode ground connection, PMOS tube P5Source electrode connect with supply voltage, PMOS tube P5Drain electrode with
NMOS tube N4Drain electrode connection, NMOS tube N4Grid meet the reference voltage VREF, PMOS tube P of comparator6Source electrode and power supply electricity
Pressure connection, PMOS tube P6Drain electrode, NMOS tube N5Drain electrode and comparator output end connect, NMOS tube N5Source electrode ground connection；
As output end voltage VOUTWhen lower than predeterminated voltage, the output signal V of comparatorEAFor high level, VEABy nor gate D2、
D1With phase inverter E1Output low level makes PMOS tube P afterwards2Conducting, so that the bias current of comparator is increased, the response speed of comparator
Degree improves；At this point, if load is in heavy duty, the output signal V of current over-zero comparatorZEROFor low level, PMOS tube P2One
Straight conducting, comparator keep faster response speed；At this point, if load is in underloading, the output of current over-zero comparator
Signal VZEROFor high level, the output signal VZEROThrough nor gate D1、D2With phase inverter E1Output high level makes PMOS tube P afterwards2
Shutdown, to reduce the bias current of comparator, the quiescent dissipation reduction of circuit, efficiency are improved.
4. the booster system response speed translation circuit according to claim 1 based on PFM control, which is characterized in that described
Circuit further includes output capacitance internal resistance RESR, the rectifying tube M1For PMOS tube, power tube M2For NMOS tube；The voltage input end
VINPass sequentially through inductance L, rectifying tube M1Source electrode and drain electrode, output capacitance internal resistance RESR, output capacitance COUTAfter be grounded, the electricity
Press input terminal VINPass sequentially through inductance L, power tube M2Drain electrode and source electrode after be grounded, the power tube M2Grid simultaneously with drive
The first output end of dynamic circuit driver is connected with the bias current of comparator setting end, the rectifying tube M1Grid and driving
The second output terminal of circuit driver connects, the normal phase input end and rectifying tube M of the current over-zero comparator1Source electrode, function
Rate pipe M2Drain electrode connected with the common end of inductance L, inverting input terminal and rectifying tube M1Drain electrode, output capacitance internal resistance RESRPublic affairs
End connection, the output end of the current over-zero comparator are connect with the first input end of driving circuit driver altogether, divider resistance
R1One end and rectifying tube M1Drain electrode and output capacitance internal resistance RESRCommon end connection, divider resistance R1The other end by point
Piezoresistance R2Ground connection, the inverting input terminal of comparator are connected to divider resistance R1、R2Common end, normal phase input end connect with reference to electricity
Press VREF, the first input end of the output end connection PFM module of comparator, the second input terminal connection turn-on time control of PFM module
The output end of circuit processed, the second input terminal of the output end connection driving circuit driver of PFM module；
The output end voltage VOUTFor rectifying tube M1Drain electrode and output capacitance internal resistance RESRThe voltage of common end；
Output end voltage VOUTPartial pressure act on comparator as sampled voltage FB, the benchmark electricity of sampled voltage FB and comparator
Press VREFIt makes comparisons；The output signal V that comparator obtainsEAOutput signal collective effect with turn-on time control circuit is in PFM mould
Block is to change the output frequency of PFM module；The output signal of PFM and the output signal V of current over-zero comparatorZEROCollective effect
Power tube M is controlled in driving circuit driver2Or rectifying tube M1On or off；As output end voltage VOUTLower than default electricity
When pressure, sampled voltage FB is lower than reference voltage VREF, the output signal V of comparatorEA, the output signal of PFM module, driving circuit
Output signal VP、VNIt is high level, power tube M2Conducting, rectifying tube M1Cut-off, inductance L energy storage, turn-on time control circuit
Start timing；After reaching preset time, turn-on time control circuit, which reset to PFM module, makes the low electricity of its output signal
It is flat, and then make the output signal V of driving circuitN、VPFor low level, power tube M2Cut-off, rectifying tube M1Conducting, inductance L is to circuit
Output end release energy, meanwhile, according to the first output end of driving circuit driver pass through the first output signal VNDuty
Load is judged than size for underloading or heavy duty, as the first output signal VNDuty ratio less than a setting value when, then load be
Light condition, at this point, the first output signal VNThe bias current for reducing comparator, reduces the quiescent dissipation of circuit, keeps light
High efficiency under carrying；As the first output signal VNDuty ratio when being greater than a setting value, then load is heavy condition, at this point, the
One output signal VNThe bias current for increasing comparator improves comparator speed, and circuit work frequency improves.
5. the booster system response speed translation circuit according to claim 4 based on PFM control, which is characterized in that described
The internal circuit of comparator includes: PMOS tube P1、P2、P3、P4, NMOS tube N1、N2、N3、N4、N5、N6, resistance R0, capacitor C1, biasing
Voltage VBN, the PMOS tube P1、P2、P3、P4Source electrode be separately connected supply voltage, PMOS tube P1Drain electrode and NMOS tube N3Leakage
Pole connection, PMOS tube P1Grid and PMOS tube P2Grid connection, NMOS tube N3Source electrode ground connection, NMOS tube N3Grid with
NMOS tube N6Grid connection, NMOS tube N3Drain electrode connect with grid lead, PMOS tube P2Drain electrode and NMOS tube N4Drain electrode
Connection, PMOS tube P2Grid connect with drain conductors, NMOS tube N4Grid meet sampled voltage FB, NMOS tube N4Source electrode,
NMOS tube N5Source electrode, NMOS tube N1Drain electrode, NMOS tube N2Drain electrode connection, NMOS tube N1Source electrode ground connection, driving circuit
The first output signal V of driverNPass through resistance R0With NMOS tube N1Grid and capacitor C1One end connection, capacitor C1It is another
End ground connection, NMOS tube N2Grid and bias voltage VBNConnection, NMOS tube N2Source electrode ground connection, PMOS tube P3Drain electrode and NMOS
Pipe N5Drain electrode connection, PMOS tube P3Grid and PMOS tube P4Grid connection, PMOS tube P3Grid and drain conductors connect
It connects, NMOS tube N5Grid meet the reference voltage V of comparatorREF, PMOS tube P4Drain electrode, NMOS tube N6Drain electrode and comparator
Output end connection, NMOS tube N6Source electrode ground connection；
When load is the output signal V of driving circuit at light loadNDuty ratio is less than a setting value, VNThrough resistance R0With capacitor C1Filter
The DC analog level for becoming amplitude very little after wave makes NMOS tube N1Shutdown keeps light to reduce the bias current of comparator
The high efficiency of load state；When load is the output signal V of driving circuit when overloadedNDuty ratio is greater than a setting value, VNThrough resistance
R0With capacitor C1Become the biggish DC analog level of amplitude after filtering, makes NMOS tube N1Conducting, thus the bias current of comparator
With VNDuty ratio increase and increase, the raising of the response speed of comparator.
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| CN201920056251.XU CN209419485U (en) | 2019-01-14 | 2019-01-14 | Booster system response speed translation circuit based on PFM control |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201920056251.XU CN209419485U (en) | 2019-01-14 | 2019-01-14 | Booster system response speed translation circuit based on PFM control |
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| CN209419485U true CN209419485U (en) | 2019-09-20 |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109617412A (en) * | 2019-01-14 | 2019-04-12 | 泉芯电子技术(深圳)有限公司 | Booster system response speed translation circuit and its control method based on PFM control |
| CN111226506A (en) * | 2019-12-31 | 2020-06-02 | 宗仁科技(平潭)有限公司 | Power carrier signal identification circuit, method and integrated circuit chip |
| CN111416505A (en) * | 2020-04-14 | 2020-07-14 | 上海顺久电子科技有限公司 | Switching power supply converter |
| CN112433113A (en) * | 2020-11-06 | 2021-03-02 | 上海芯导电子科技股份有限公司 | Light load detection system |
| CN113765379A (en) * | 2021-08-31 | 2021-12-07 | 湖北三江航天万峰科技发展有限公司 | Digital voltage stabilizing device based on current loop control and control method thereof |
| CN113839556A (en) * | 2020-06-24 | 2021-12-24 | 圣邦微电子（北京）股份有限公司 | DC-DC converter and control circuit thereof |
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| CN109617412A (en) * | 2019-01-14 | 2019-04-12 | 泉芯电子技术(深圳)有限公司 | Booster system response speed translation circuit and its control method based on PFM control |
| CN109617412B (en) * | 2019-01-14 | 2024-07-23 | 泉芯电子技术(深圳)有限公司 | Boost system response speed conversion circuit based on PFM control and control method thereof |
| CN111226506A (en) * | 2019-12-31 | 2020-06-02 | 宗仁科技(平潭)有限公司 | Power carrier signal identification circuit, method and integrated circuit chip |
| US12137504B2 (en) | 2019-12-31 | 2024-11-05 | Cr Technology (Pingtan) Co., Ltd. | Identification circuit and method for power-line carrier signal, and integrated circuit chip |
| CN111416505A (en) * | 2020-04-14 | 2020-07-14 | 上海顺久电子科技有限公司 | Switching power supply converter |
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| CN113839556A (en) * | 2020-06-24 | 2021-12-24 | 圣邦微电子（北京）股份有限公司 | DC-DC converter and control circuit thereof |
| CN113839556B (en) * | 2020-06-24 | 2023-08-22 | 圣邦微电子（北京）股份有限公司 | DC-DC converter and control circuit thereof |
| CN112433113A (en) * | 2020-11-06 | 2021-03-02 | 上海芯导电子科技股份有限公司 | Light load detection system |
| CN113765379A (en) * | 2021-08-31 | 2021-12-07 | 湖北三江航天万峰科技发展有限公司 | Digital voltage stabilizing device based on current loop control and control method thereof |
| CN114041639A (en) * | 2021-11-10 | 2022-02-15 | 陕西亚成微电子股份有限公司 | Sensor power supply management system and method |
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