CN109617412A

CN109617412A - Booster system response speed translation circuit and its control method based on PFM control

Info

Publication number: CN109617412A
Application number: CN201910032570.1A
Authority: CN
Inventors: 吴玉强; 黄朝刚
Original assignee: SHENZHEN QX MICRO DEVICES CO Ltd
Current assignee: SHENZHEN QX MICRO DEVICES CO Ltd
Priority date: 2019-01-14
Filing date: 2019-01-14
Publication date: 2019-04-12
Anticipated expiration: 2039-01-14
Also published as: CN109617412B

Abstract

The present invention relates to the booster system response speed translation circuits and control method that are controlled based on PFM, and the partial pressure of circuit output end voltage is as sampled voltage compared with comparator reference voltage；The output signal of comparator output signal and turn-on time control circuit acts on PFM module, and PFM module output signal and current over-zero comparator output signal act on the on or off of driving circuit control power tube or rectifying tube；When output end voltage is lower than predeterminated voltage, power tube conducting, rectifying tube cut-off, inductive energy storage, turn-on time control circuit start timing；After reaching preset time, turn-on time control circuit resets PFM module to control driving circuit, power tube cut-off, rectifying tube conducting, and inductance releases energy to output end.Judge that load for underloading or heavy duty, reduces comparator offset electric current at light load according to the duty ratio size of current over-zero comparator output signal or driving circuit output drive signal；Comparator offset electric current is increased when overloaded.

Description

Booster system response speed translation circuit and its control method based on PFM control

Technical field

The present invention relates to electronic circuit fields, and in particular to a kind of booster system response speed transformation based on PFM control Circuit and its control method.

Background technique

As the integrated level of system on chip digital processing element is continuously improved, DSP, ARM are such as integrated into the same chip Interior, the requirement of carrying load ability and efficiency to power-supply system is higher and higher.It is set developing battery powered portable electronic When standby, such as mobile phone, MP4, EBOOK, the low-power consumption product such as GPS influences whether entire if power system design is unreasonable The framework of system, product function combination, the design of software and power distribution framework etc..Portable product is in most cases It powers by battery, the power management of battery rear end has two kinds of implementations of DC/DC and LDO, respectively there is advantage and disadvantage.When normal work, DC/DC module can be supplied to the stable voltage of system, and the high efficiency for keeping itself to convert, low fever.LDO has extremely low Quiescent current, extremely low noise, higher PSRR (power supply ripple inhibition ratio).With the transfer efficiency to power supply, output voltage Ripple, band carry response speed, volume etc. requires higher and higher, and low-power consumption, the research of DC/DC of high speed become concerned by people Hot spot.In order to guarantee that electronic equipment efficiently, reliably works, need its power supply that there is low standby power loss, high light-load efficiency With quick load transient response speed, while volume wants small.Classic pulse width modulation (Pulse Width Modulation, PWM) switch converters control technology such as voltage mode control and current-mode control is unable to satisfy the requirement.PFM (Pulse Frequency Modulation, PFM) control technology is a kind of pulse frequency modulated control technology.It becomes switch The power switch tube of parallel operation is connected in an effective time slot, realizes control signal dutyfactor by the control turn-off time Adjusting, to maintain the stabilization of output voltage.Compared with traditional PWM control technology, the converter based on PFM control has underloading High-efficient, the advantages that transient response speed is fast, control loop is simple, has obtained extensive concern in industry and academia and has ground Study carefully.But by low standby power loss require limited, the switching frequency of system improves to get on always, maintain always 100kHz~ 200kHz or so just needs to add for some systems for needing low-voltage ripple if system work is on this frequency The capacitance of big inductance sensibility reciprocal and output capacitance, so as to cause the increase of system cost.But in some compacts, high performance electricity It in sub- product, needs that the small in size of power supply, ripple are small, transient response speed is fast, and has strictly to overall system integration degree Limitation, thus need to select patch type ceramic condenser small in size and patch type inductance small in size.However traditional solution Certainly method is all to maintain to maintain low output ripple, such system using big inductance and bulky capacitor in the case where low standby current Overall cost will increase and volume is also larger, to reduce the competitiveness in market.Fig. 1 show a kind of based on PFM control Boost converter systems block diagram, working principle: output voltage VO UT by feedback resistance R1 and R2 partial pressure after sampled Voltage FB, sampled voltage FB are compared with reference voltage VREF, the output of comparator and the output of turn-on time control circuit Signal is sent to PFM, changes the output frequency of PFM, distinguishes control switch pipe M2 and synchronous rectification by overdrive circuit driver The conducting and shutdown of pipe M1, to change duty ratio, so that the output VOUT of PFM boost converter achievees the effect that pressure stabilizing. Current over-zero comparator detect synchronous rectifier M1 electric current whether zero passage, synchronous rectifier M1 is turned off if zero passage, is prevented VOUT is exported by inductance to input VIN electric discharge.

Since the booster system of PFM control needs extremely low quiescent current under standby or underloading, so comparator and mistake The very little of the bias current design of zero detection comparator is limited and is to cause the response speed of the two comparators very slow The working frequency of system, to need biggish inductance and biggish output capacitance.

The shortcomings that traditional technology, is: realizing that low ripple, low standby current, strong band carry energy using big inductance bulky capacitor Power, which results in the increases of system cost, and the volume of system also limits greatly the application in compact occasion, thus Reduce the competitiveness in market.

Summary of the invention

It is an object of the invention to solve prior art deficiency, a kind of output using current over-zero comparator is provided to sentence The weight of disconnected load, it can the bias current size for changing comparator according to the output of current over-zero comparator, to have Response speed of the raising of effect based on the PFM booster converter controlled and the high efficiency being able to maintain in the case of unloaded or underloading, Circuit is simple, and whole system cost can be greatly lowered, and effectively improves the working frequency of system and is able to maintain high at light load The booster system response speed translation circuit that efficiency is controlled based on PFM.It is a further object of the present invention to provide one kind to effectively improve The working frequency and the low quiescent current of holding at light load of system, can still keep low using small inductor and small output capacitance Output voltage ripple, be underloading or heavy duty by the difference load of the output signal of internal current zero-crossing comparator, thus The bias current for changing comparator, allows whole system that can be up to 1MHz in working frequency when overloaded even higher, and is lightly loaded In the case of can guarantee low quiescent current and high efficiency again, the raising of system operating frequency so that can be used small inductance and Small output capacitance, the booster system response speed transformation that can still keep small output voltage ripple and be controlled based on PFM The control method of circuit.

Booster system response speed translation circuit based on PFM control described in the technical solution of the invention is as follows, it is special Different place is that the circuit includes: voltage input end, inductance, current over-zero comparator, rectifying tube, power tube, driving electricity Road, PFM module, comparator, divider resistance, output capacitance, turn-on time control circuit, point of the output end voltage of the circuit Pressure acts on comparator as sampled voltage, makes comparisons with the reference voltage of comparator；When the output signal and conducting of comparator Between control circuit output signal collective effect in PFM module change PFM output frequency, the output signal and electric current mistake of PFM The output signal collective effect of zero comparator controls the on or off of power tube or rectifying tube in driving circuit；Work as output end When voltage is lower than predeterminated voltage, power tube conducting, rectifying tube ends, and inductive energy storage, turn-on time control circuit starts timing；It arrives Up to after preset time, turn-on time control circuit resets PFM module, and then controls driving circuit, end power tube, Rectifying tube conducting, inductance release energy to the output end of circuit, at this point, according to the output signal or driving of current over-zero comparator The output drive signal of circuit judges load for underloading or heavily loaded, when at light load, current over-zero comparator detects inductance The duty ratio of the output drive signal of current over-zero or driving circuit is very low, to reduce the bias current of comparator；When attaching most importance to When load, current over-zero comparator does not detect that the output drive signal of inductive current zero passage or driving circuit increases comparator Bias current.

As preferred: the circuit includes: voltage input end V_IN, inductance L, current over-zero comparator, rectifying tube M₁, power Pipe M₂, driving circuit driver, PFM module, comparator, divider resistance R₁、R₂, output capacitance C_OUT, turn-on time control circuit, It further include output capacitance internal resistance R_ESR, the rectifying tube M₁For PMOS tube, power tube M₂For NMOS tube；The voltage input end V_IN Pass sequentially through inductance L, rectifying tube M₁Source electrode and drain electrode, output capacitance internal resistance R_ESR, output capacitance C_OUTAfter be grounded, the voltage Input terminal V_INPass sequentially through inductance L, power tube M₂After be grounded, the power tube M₂Drain electrode connect with one end of inductance L, source electrode First output end of ground connection, grid and driving circuit driver connects, the rectifying tube M₁Grid and driving circuit driver Second output terminal connection, the inverting input terminal of the current over-zero comparator and rectifying tube M₁Source electrode, power tube M₂And inductance Common end connection, normal phase input end and the rectifying tube M of L₁Drain electrode, output capacitance internal resistance R_ESRCommon end connection, output end is same When with the bias current of the first input end of driving circuit driver and comparator setting end connect, divider resistance R₁One end with Rectifying tube M₁Drain electrode, output capacitance internal resistance R_ESRCommon end connection, the other end pass through divider resistance R₂Ground connection, comparator it is anti- Phase input terminal is connected to divider resistance R₁、R₂Common end, normal phase input end meets reference voltage V_REF, comparator output end connection The first input end of PFM module, the second input terminal connection output end of turn-on time control circuit of PFM module, PFM module The second input terminal of output end connection driving circuit driver；

The output end voltage V_OUTFor rectifying tube M₁Drain electrode and output capacitance internal resistance R_ESRThe voltage of common end；Output end electricity Press V_OUTPartial pressure act on comparator, the reference voltage V of sampled voltage FB and comparator as sampled voltage FB_REFIt makes comparisons； The output signal V that comparator obtains_EAWith the output signal collective effect of turn-on time control circuit in PFM module to change PFM The output frequency of module；The output signal of PFM and the output signal V of current over-zero comparator_ZEROCollective effect is in driving circuit To control power tube M₂Or rectifying tube M₁On or off；As output end voltage V_OUTWhen lower than predeterminated voltage, sampled voltage FB Lower than reference voltage V_REF, the output signal V of comparator_EA, the output signal of PFM module, driving circuit output signal V_P、V_N It is high level, power tube M₂Conducting, rectifying tube M₁Cut-off, inductance L energy storage, turn-on time control circuit start timing；It reaches pre- If after the time, turn-on time control circuit, which reset to PFM module, makes its output signal low level, and then makes driving circuit Output signal VN, VP be low level, power tube M₂Cut-off, rectifying tube M₁Conducting, inductance L release energy to the output end of circuit, Meanwhile whether zero passage judges load for heavy duty or underloading to current over-zero comparator detection inductive current；If inductive current zero passage, The then output signal V of current over-zero comparator_ZEROFor high level, load as light condition, at this point, current over-zero comparator is defeated Signal V out_ZEROThe bias current for reducing comparator, reduces the quiescent dissipation of circuit；If inductive current does not have zero passage, electricity Flow through the output signal V of zero comparator_ZEROFor low level, load as heavy condition, at this point, the output of current over-zero comparator is believed Number V_ZEROThe bias current for increasing comparator improves comparator speed, and circuit work frequency improves.

As preferred: the internal circuit of the comparator includes: nor gate D₁、D₂, phase inverter E₁, PMOS tube P₁、P₂、P₃、 P₄、P₅、P₆, NMOS tube N₁、N₂、N₃、N₄、N₅, bias voltage V_BP, the output signal VZERO of the current over-zero comparator connect or NOT gate D₁First input end, nor gate D₂Output end connect nor gate D₁The second input terminal, nor gate D₁Output end connect Meet nor gate D₂First input end, the output signal VEA connection nor gate D of comparator₂The second input terminal, nor gate D₁'s Output end connects phase inverter E₁Input terminal, phase inverter E₁Output end connect PMOS tube P₂Grid, PMOS tube P₂Source electrode with PMOS tube P₁Drain electrode connection, PMOS tube P₂Drain electrode simultaneously with PMOS tube P₃Drain electrode and NMOS tube N₁Drain electrode connection, PMOS Pipe P₁Source electrode connect with supply voltage, PMOS tube P₁Grid and bias voltage V_BPConnection, PMOS tube P₃Source electrode and power supply electricity Pressure connection, PMOS tube P₃Grid and bias voltage V_BPConnection, NMOS tube N₁Drain electrode connect with grid lead, NMOS tube N₁'s Source electrode ground connection, PMOS tube P₄Source electrode connect with supply voltage, PMOS tube P₄Grid and PMOS tube P₅Grid connection, PMOS Pipe P₄Drain electrode and NMOS tube N₂Drain electrode connection, PMOS tube P₄Grid connect with drain conductors, NMOS tube N₂Grid connect and adopt Sample voltage FB, NMOS tube N₂Source electrode and NMOS tube N₃Drain electrode and NMOS tube N₄Source electrode connection, NMOS tube N₃Grid with NMOS tube N₁Grid connected with the grid of NMOS tube N5, NMOS tube N₃Source electrode ground connection, PMOS tube P₅Source electrode and supply voltage Connection, PMOS tube P₅Drain electrode and NMOS tube N₄Drain electrode connection, NMOS tube N₄Grid meet the reference voltage VREF of comparator, PMOS tube P₆Source electrode connect with supply voltage, PMOS tube P₆Drain electrode, NMOS tube N₅Drain electrode and comparator output end connect It connects, NMOS tube N₅Source electrode ground connection；

As output end voltage V_OUTWhen lower than predeterminated voltage, the output signal V of comparator_EAFor high level, V_EABy or it is non- Door D₂、D₁With phase inverter E₁Output low level makes PMOS tube P afterwards₂Conducting, so that the bias current of comparator is increased, comparator Response speed improves；At this point, if load is in heavy duty, the output signal V of current over-zero comparator_ZEROFor low level, PMOS tube P₂Constantly on, comparator keeps faster response speed；At this point, if load is in underloading, current over-zero ratio Compared with the output signal V of device_ZEROFor high level, the output signal V_ZEROThrough nor gate D₁、D₂With phase inverter E₁After export high level Make PMOS tube P₂Shutdown, to reduce the bias current of comparator, the quiescent dissipation reduction of circuit, efficiency are improved.

As preferred: the circuit includes: voltage input end V_IN, inductance L, current over-zero comparator, rectifying tube M₁, power Pipe M₂, driving circuit driver, PFM module, comparator, divider resistance R₁、R₂, output capacitance C_OUT, turn-on time control circuit, It further include output capacitance internal resistance R_ESR, the rectifying tube M₁For PMOS tube, power tube M₂For NMOS tube；The voltage input end V_IN Pass sequentially through inductance L, rectifying tube M₁Source electrode and drain electrode, output capacitance internal resistance R_ESR, output capacitance C_OUTAfter be grounded, the voltage Input terminal V_INPass sequentially through inductance L, power tube M₂Drain electrode and source electrode after be grounded, the power tube M₂Grid simultaneously with driving The first output end of circuit driver is connected with the bias current of comparator setting end, the rectifying tube M₁Grid and driving electricity The second output terminal of road driver connects, the normal phase input end and rectifying tube M of the current over-zero comparator₁Source electrode, power Pipe M₂Drain electrode connected with the common end of inductance L, inverting input terminal and rectifying tube M₁Drain electrode, output capacitance internal resistance R_ESRIt is public End connection, the output end of the current over-zero comparator are connect with the first input end of driving circuit driver, divider resistance R₁ One end and rectifying tube M₁Drain electrode and output capacitance internal resistance R_ESRCommon end connection, divider resistance R₁The other end pass through partial pressure Resistance R₂Ground connection, the inverting input terminal of comparator are connected to divider resistance R₁、R₂Common end, normal phase input end connects reference voltage V_REF, the first input end of the output end connection PFM module of comparator, the second input terminal connection turn-on time control of PFM module The output end of circuit, the second input terminal of the output end connection driving circuit driver of PFM module；

The output end voltage V_OUTFor rectifying tube M₁Drain electrode and output capacitance internal resistance R_ESRThe voltage of common end；

Output end voltage V_OUTPartial pressure act on comparator, the base of sampled voltage FB and comparator as sampled voltage FB Quasi- voltage V_REFIt makes comparisons；The output signal V that comparator obtains_EAWith the output signal collective effect of turn-on time control circuit in PFM module is to change the output frequency of PFM module；The output signal of PFM and the output signal V of current over-zero comparator_ZEROAltogether Same-action controls power tube M in driving circuit driver₂Or rectifying tube M₁On or off；As output end voltage V_OUTIt is lower than When predeterminated voltage, sampled voltage FB is lower than reference voltage V_REF, the output signal V of comparator_EA, PFM module output signal, drive The output signal V of dynamic circuit_P、V_NIt is high level, power tube M₂Conducting, rectifying tube M₁Cut-off, inductance L energy storage, turn-on time control Circuit processed starts timing；After reaching preset time, turn-on time control circuit, which reset to PFM module, makes its output signal Low level, and then make the output signal V of driving circuit_N、V_PFor low level, power tube M₂Cut-off, rectifying tube M₁Conducting, L pairs of inductance The output end of circuit releases energy, meanwhile, the first output signal V is passed through according to the first output end of driving circuit driver_N's Duty ratio size judges load for underloading or heavily loaded, as the first output signal V_NDuty ratio less than a setting value when, then bear Carrying is light condition, at this point, the first output signal V_NThe bias current for reducing comparator, makes the quiescent dissipation of circuit reduce, protect Hold the high efficiency under underloading；As the first output signal V_NDuty ratio be greater than a setting value when, then load be heavy condition, this When, the first output signal V_NThe bias current for increasing comparator improves comparator speed, and circuit work frequency improves.

As preferred: the internal circuit of the comparator includes: PMOS tube P₁、P₂、P₃、P₄, NMOS tube N₁、N₂、N₃、N₄、 N₅、N₆, resistance R₀, capacitor C₁, bias voltage V_BN, the PMOS tube P₁、P₂、P₃、P₄Source electrode be separately connected supply voltage, PMOS Pipe P₁Drain electrode and NMOS tube N₃Drain electrode connection, PMOS tube P₁Grid and PMOS tube P₂Grid connection, NMOS tube N₃Source Pole ground connection, NMOS tube N₃Grid and NMOS tube N₆Grid connection, NMOS tube N₃Drain electrode connect with grid lead, PMOS tube P₂Drain electrode and NMOS tube N₄Drain electrode connection, PMOS tube P₂Grid connect with drain conductors, NMOS tube N₄Grid connect sampling Voltage FB, NMOS tube N₄Source electrode, NMOS tube N₅Source electrode, NMOS tube N₁Drain electrode, NMOS tube N₂Drain electrode connection, NMOS tube N₁ Source electrode ground connection, the first output signal V of driving circuit driver_NPass through resistance R₀With NMOS tube N₁Grid and capacitor C₁'s One end connection, capacitor C₁The other end ground connection, NMOS tube N₂Grid and bias voltage V_BNConnection, NMOS tube N₂Source electrode ground connection, PMOS tube P₃Drain electrode and NMOS tube N₅Drain electrode connection, PMOS tube P₃Grid and PMOS tube P₄Grid connection, PMOS tube P₃ Grid connect with drain conductors, NMOS tube N₅Grid meet the reference voltage V of comparator_REF, PMOS tube P₄Drain electrode, NMOS tube N₆Drain electrode and comparator output end connect, NMOS tube N₆Source electrode ground connection；

When load is the output signal V of driving circuit at light load_NDuty ratio is less than a setting value, V_NThrough resistance R₀And capacitor C₁The DC analog level for becoming amplitude very little after filtering makes NMOS tube N₁Shutdown is protected to reduce the bias current of comparator Hold the high efficiency of light condition；When load is the output signal V of driving circuit when overloaded_NDuty ratio is greater than a setting value, V_NThrough Resistance R₀With capacitor C₁Become the biggish DC analog level of amplitude after filtering, makes NMOS tube N₁Conducting, thus the biasing of comparator Electric current is with V_NDuty ratio increase and increase, the raising of the response speed of comparator.

Another technical solution of the invention is the booster system response speed translation circuit based on PFM control Control method is characterized in that the circuit includes voltage input end V_IN, inductance L, current over-zero comparator, rectifying tube M₁, power tube M₂, driving circuit, PFM module, comparator, divider resistance R₁、R₂, output capacitance C_OUT, output capacitance internal resistance R_ESR、 Turn-on time control circuit, steps are as follows:

(1) output end voltage V_OUTThrough divider resistance R₁、R₂Partial pressure, obtains sampled voltage FB；

(2) the sampled voltage FB acts on comparator, the reference voltage V with comparator_REFIt makes comparisons, comparator is compared Compared with the output signal V of device_EA；

(3) the output signal V of the comparator_EAOutput signal collective effect with turn-on time control circuit is in PFM module Obtain the output signal of PFM module；

(4) the output signal V of the output signal of the PFM module and current over-zero comparator_ZEROCollective effect is in driving electricity Road driver is used to control power tube M₂With rectifying tube M₁On or off；

(5) as output end voltage V_OUTWhen lower than predeterminated voltage, sampled voltage FB is lower than reference voltage V_REF, comparator it is defeated Signal V out_EA, the output signal of PFM module, driving circuit driver output signal V_P、V_NIt is high level, power tube M₂It leads Logical, rectifying tube M₁Cut-off, inductance L energy storage, meanwhile, turn-on time control circuit starts timing；

(6) when timing reaches preset time, turn-on time control circuit, which reset to PFM module, makes its output signal Become low level, and then the output signal V of driving circuit_N、V_PIt also is low level, power tube M₂Cut-off, rectifying tube M₁Conducting；

Inductance L by step (5) in energy storage be released to the output end of circuit, current over-zero comparator detects inductive current Whether zero passage judges load for underloading or heavy duty；

(8) if inductive current zero passage, the output signal V of current over-zero comparator_ZEROFor high level, load as underloading State, at this point, the output signal V of current over-zero comparator_ZEROThe quiescent dissipation of circuit, drops in the bias current for reducing comparator It is low；

If inductive current does not have zero passage, the output signal V of current over-zero comparator_ZEROFor low level, load is attached most importance to Load state, at this point, the output signal V of current over-zero comparator_ZEROThe bias current for increasing comparator, proposes comparator speed Height, circuit work frequency improve.

Inductance L by step (5) in energy storage be released to the output end of circuit, the first output end of driving circuit driver Pass through the first output signal V_NDuty ratio size judge the load for underloading or heavily loaded；

(8) as the first output signal V_NDuty ratio less than a setting value when, then load be light condition, at this point, first is defeated Signal V out_NThe bias current for reducing comparator reduces the quiescent dissipation of circuit, keeps the high efficiency under underloading；

As the first output signal V_NDuty ratio be greater than a setting value when, then load be heavy condition, at this point, first output Signal V_NThe bias current for increasing comparator improves comparator speed, and circuit work frequency improves.

Compared with prior art, beneficial effects of the present invention:

(1) the transformation that two kinds of circuits realize booster system response speed is provided:

First circuit passes through the output signal V of internal current zero-crossing comparator_ZERODifference load be underloading or heavy duty, To change the bias current of comparator, allow whole system that can be up to 1MHz in working frequency when overloaded even higher, and It can guarantee low quiescent current and high efficiency again in the case of underloading, the raising of system operating frequency allows to using small Inductance L and small output capacitance C_OUT, can still keep small output voltage V_OUTRipple, circuit is simply cheap, collection At precision height, so that system has the market competitiveness.

Second circuit utilizes driving signal V_NDistinguishing load is underloading or heavy duty, when load is V at light load_NDuty It is relatively low, when load is V when overloaded_NDuty it is bigger, controlled using the difference of duty ratio the bias current of comparator come Change its response speed, using this method can effectively improve based on PFM control booster converter response speed and The high efficiency being able to maintain in the case of unloaded or underloading, circuit simple effects are significant, and the cost of whole system is greatly lowered, and improve The market competitiveness.

It (2) is exactly to detect output voltage V using detection method of the present invention_OUTIt just improves and compares when lower than setting value The speed of device can suddenly become in load improve the response speed of system when overloaded to avoid output voltage from occurring greatly in this way The decline of amplitude improves system suddenly with the response speed in the case of carrying.At this time if load is constantly under case of heavy load, electricity Flow through the output V of zero comparator_ZREOIt remains unchanged, the bias current of comparator is protected larger at this time, until load becomes being lightly loaded.

(3) the response of the booster converter based on PFM control can be improved effectively using control method of the present invention Speed and the high efficiency being able to maintain in the case of unloaded or underloading.Circuit simple effects are significant, and whole system is greatly lowered Cost improves the market competitiveness.

(4) translation circuit of the present invention passes through the output signal V of internal current zero-crossing comparator_ZEROOr driving signal V_N Duty ratio difference load be underloading or heavy duty, to change the bias current of comparator, allow whole system can be in heavy duty When working frequency be up to that 1MHz is even higher, and can guarantee low quiescent current and high efficiency in the case of being lightly loaded.System The raising of system working frequency allows to using small inductance L and small output capacitance C_OUT, can still keep small output electricity Press V_OUTRipple.Circuit is simply cheap, and it is high to integrate precision, so that system has the market competitiveness.

Detailed description of the invention

Fig. 1 is the boost converter systems block diagram that the prior art is controlled based on PFM；

Fig. 2 is circuit of first technical solution of the invention based on the PFM booster system response speed transformation controlled Block diagram；

Fig. 3 is the specific implementation circuit block diagram of the comparator of first technical solution of the invention；

Fig. 4 is circuit of second technical solution of the invention based on the PFM booster system response speed transformation controlled Block diagram；

Fig. 5 is the specific implementation circuit block diagram of the comparator of second technical solution of the invention.

Specific embodiment

The present invention is further detailed in conjunction with the accompanying drawings below:

Referring to FIG. 2, being first technical solution of the invention, a kind of boosting inverter based on PFM control is provided Device response speed translation circuit, the circuit pass through the output signal V of internal current zero-crossing comparator_ZERODifference load is that underloading is gone back It is heavy duty, to change the bias current of comparator.

Referring to FIG. 2, the circuit includes: voltage input end V_IN, inductance L, current over-zero comparator, rectifying tube M₁, power Pipe M₂, driving circuit driver, PFM module, comparator, divider resistance R₁、R₂, output capacitance C_OUT, turn-on time control circuit, It further include output capacitance internal resistance R_ESR, the rectifying tube M₁For PMOS tube, power tube M₂For NMOS tube；The voltage input end V_IN Pass sequentially through inductance L, rectifying tube M₁, output capacitance internal resistance R_ESR, output capacitance C_OUTAfter be grounded, the voltage input end V_INSuccessively Pass through inductance L, power tube M₂After be grounded, the power tube M₂Drain electrode connect with one end of inductance L, source electrode ground connection, grid and drive The first output end connection of dynamic circuit driver, the rectifying tube M₁Source electrode connect with one end of inductance L, drain with output electricity Hold internal resistance R_ESROne end connection, grid and driving circuit driver second output terminal connect, the current over-zero comparator Inverting input terminal and rectifying tube M₁Source electrode connection, normal phase input end and rectifying tube M₁Drain electrode connection, output end simultaneously with driving The first input end of circuit driver is connected with the bias current of comparator setting end, divider resistance R₁One end and rectifying tube M₁ Drain electrode connection, the other end pass through divider resistance R₂Ground connection, the inverting input terminal of comparator are connected to divider resistance R₁、R₂Public affairs End, normal phase input end meet reference voltage V altogether_REF, comparator output end connection PFM module first input end, PFM module Second input terminal connect the output end of turn-on time control circuit, PFM module output end connection driving circuit driver the Two input terminals；

The output end voltage V_OUTFor rectifying tube M1 drain electrode and output capacitance internal resistance R_ESRThe voltage of common end；

Output end voltage V_OUTPartial pressure act on comparator, the base of sampled voltage FB and comparator as sampled voltage FB Quasi- voltage V_REFIt makes comparisons；The output signal V that comparator obtains_EAWith the output signal collective effect of turn-on time control circuit in PFM module is to change the output frequency of PFM module；The output signal of PFM and the output signal V of current over-zero comparator_ZEROAltogether Same-action controls power tube M in driving circuit₂Or rectifying tube M₁On or off；As output end voltage V_OUTLower than default electricity When pressure, sampled voltage FB is lower than reference voltage V_REF, the output signal V of comparator_EA, the output signal of PFM module, driving circuit Output signal V_P、V_NIt is high level, power tube M₂Conducting, rectifying tube M₁Cut-off, inductance L energy storage, turn-on time control circuit Start timing；After reaching preset time, turn-on time control circuit, which reset to PFM module, makes the low electricity of its output signal It is flat, and then make the output signal V of driving circuit_N、V_PFor low level, power tube M₂Cut-off, rectifying tube M₁Conducting, inductance L is to circuit Output end release energy, meanwhile, according to current over-zero comparator by inductive current whether zero passage judge load to be heavily loaded or Underloading；If inductive current zero passage, the output signal V of current over-zero comparator_ZEROFor high level, load as light condition, At this point, the output signal V of current over-zero comparator_ZEROThe bias current for reducing comparator, reduces the quiescent dissipation of circuit；Such as Fruit inductive current does not have zero passage, then the output signal V of current over-zero comparator_ZEROFor low level, load as heavy condition, this When, the output signal V of current over-zero comparator_ZEROThe bias current for increasing comparator improves comparator speed, circuit work Frequency improves.

Specifically, if zero cross signal V_ZEROFor high level, then load is underloading or standby, if zero cross signal V_ZEROFor Low level, then load is heavy duty.It thus can be according to zero cross signal V_ZEROLow and high level determine the biased electrical of comparator Flow size.If at light load, allowing the bias current of comparator minimum, low quiescent current is kept to be lightly loaded situation to improve system Under efficiency.If the bias current of comparator when overloaded, is allowed to become larger, the response speed of comparator is improved, so as to allow It is even higher that whole system working frequency is up to 1MHz.The working frequency of system can be effectively improved using this method and keeps light Low quiescent current when load can still keep the ripple of low output voltage VO UT using small inductor and small output capacitance, electricity Road is simply low in cost.

First technical solution of the invention: pass through the output signal V of internal current zero-crossing comparator_ZERODifference load It is underloading or heavy duty, to change the bias current of comparator, whole system can be up in working frequency when overloaded 1MHz is even higher, and can guarantee low quiescent current and high efficiency in the case of being lightly loaded.The raising of system operating frequency Allow to using small inductance L and small output capacitance C_OUT, can still keep small output voltage V_OUTRipple.Circuit It is simple cheap, it is high to integrate precision, so that system has the market competitiveness.

From figure 2 it can be seen that working as V_OUTWhen voltage is lower than preset target voltage, i.e. V_OUTVoltage value by feedback resistance R₁And R₂Voltage FB after partial pressure is lower than reference voltage V_REFWhen, comparator exports high level at this time, and at this moment PFM module output is height Level, the output V of drive module driver_P、V_NIt is high level, i.e. power tube NMOS tube M₂Conducting, synchronous rectifier PMOS tube M₁Cut-off, inductive current is linearly increasing at this time, and inductance stores energy.

In the output V of comparator_EAWhile becoming high level, turn-on time control circuit starts timing, when timing is in advance If turn-on time control circuit exports high level when the time, PFM module is resetted so that its output becomes low level, this When V_P、V_NAlso become low level, power tube NMOS tube M₂Cut-off, synchronous rectifier PMOS tube M₁Conducting, inductive current is linear at this time Reduce, inductance releases energy to output.

By analysis above as it can be seen that the speed of comparator is the bottleneck of whole system working frequency limitation, the present invention is utilized The output signal of current over-zero comparator come judge weight carry.As synchronous rectifier PMOS tube M₁When conducting, if electric current can mistake Zero, then current over-zero comparator can export V in inductive current zero-acrross ing moment_ZEROFor high level.If current over-zero comparator Output V_ZEROIt is always maintained at low level and then illustrates that inductive current does not have zero passage, that indicates that load in heavy condition.So It can use the output V of current over-zero comparator_ZEROTo judge the weight of load, it can according to the defeated of current over-zero comparator V out_ZEROChange the bias current size of comparator, to change the response speed of comparator.

The application of technical solution according to fig. 2 please refers to shown in Fig. 3, provides a kind of realization of specific comparator Circuit, the internal circuit of the comparator include: nor gate D₁、D₂, phase inverter E₁, PMOS tube P₁、P₂、P₃、P₄、P₅、P₆、NMOS Pipe N₁、N₂、N₃、N₄、N₅, bias voltage V_BP, the output signal V of the current over-zero comparator_ZEROMeet nor gate D₁It is first defeated Enter end, nor gate D₂Output end connect nor gate D₁The second input terminal, nor gate D₁Output end connect nor gate D₂? The output signal V of one input terminal, comparator_EAConnect nor gate D₂The second input terminal, nor gate D₁Output end connect reverse phase Device E₁Input terminal, phase inverter E₁Output end connect PMOS tube P₂Grid, PMOS tube P₂Source electrode and PMOS tube P₁Drain electrode Connection, PMOS tube P₂Drain electrode simultaneously with PMOS tube P₃Drain electrode and NMOS tube N₁Drain electrode connection, PMOS tube P₁Source electrode and electricity The connection of source voltage, PMOS tube P₁Grid and bias voltage V_BPConnection, PMOS tube P₃Source electrode connect with supply voltage, PMOS tube P₃Grid and bias voltage V_BPConnection, NMOS tube N₁Drain electrode connect with grid lead, NMOS tube N₁Source electrode ground connection, PMOS Pipe P₄Source electrode connect with supply voltage, PMOS tube P₄Grid and PMOS tube P₅Grid connection, PMOS tube P₄Drain electrode with NMOS tube N₂Drain electrode connection, PMOS tube P₄Grid connect with drain conductors, NMOS tube N₂Grid connect sampled voltage FB, NMOS tube N₂Source electrode and NMOS tube N₃Drain electrode connection, NMOS tube N₃Grid and NMOS tube N₁Grid connection, NMOS tube N₃ Source electrode ground connection, PMOS tube P₅Source electrode connect with supply voltage, PMOS tube P₅Drain electrode and NMOS tube N₄Drain electrode connection, NMOS tube N₄Grid meet the reference voltage V of comparator_REF, NMOS tube N₄Source electrode and NMOS tube N₃Drain electrode connection, PMOS tube P₆Source electrode connect with supply voltage, PMOS tube P₆Grid and PMOS tube P₅Drain electrode connection, PMOS tube P₆Drain electrode compared with The output end of device connects, NMOS tube N₅Drain electrode and comparator output end connection, NMOS tube N₅Grid and NMOS tube N₁Grid Pole connection, NMOS tube N₅Source electrode ground connection；

As output end voltage V_OUTWhen lower than predeterminated voltage, the output signal V of comparator_EAFor high level, V_EABy or it is non- Door D₁、D₂With phase inverter E₁Output low level makes PMOS tube P afterwards₂Conducting, so that the bias current of comparator is increased, comparator Response speed improves；At this point, if load is in heavy duty, the output signal V of current over-zero comparator_ZEROFor low level, PMOS tube P₂Constantly on, comparator keeps faster response speed；At this point, if load is in underloading, current over-zero ratio Compared with the output signal V of device_ZEROFor high level, V_ZEROThrough nor gate D₁、D₂With phase inverter E₁Output high level makes PMOS tube P afterwards₂It closes Disconnected, to reduce the bias current of comparator, the quiescent dissipation reduction of circuit, efficiency are improved.

Specifically, working as V_OUTWhen voltage is lower than preset target voltage, i.e. V_OUTVoltage value by feedback resistance R₁And R₂Partial pressure Voltage FB afterwards is lower than reference voltage V_REFWhen, comparator exports V at this time_EAFor high level, exported after nor gate and phase inverter Low level, at this time PMOS tube P₂Conducting, increases the bias current of comparator so that the speed of comparator improves at this time.It should Detection method is exactly to detect output voltage V_OUTThe speed of comparator is just improved when lower than setting value, it in this way can be prominent in load Become the response speed for improving system when overloaded so to avoid output voltage from a sharp decline occur, improves the unexpected band of system Response speed in the case of load.At this time if load is constantly under case of heavy load, the output V of current over-zero comparator_ZREOThen It is always low level, then PMOS tube P₂Then constantly on, the response speed of comparator is very fast.

When load becomes smaller suddenly or is transformed under no-load condition, then current over-zero comparator can detect inductance electricity at this time Zero is flowed through, to export V_ZEROFor high level signal, which generates high level after nor gate and phase inverter Signal, thus PMOS tube P₂Shutdown, reduces the bias current of comparator, to reduce the quiescent dissipation of whole system, improves Efficiency under system underloading or no-load condition.

In unloaded or underloading, output voltage V_OUTIt can slowly reduce, when lower than setting voltage value, comparator Export V_EAThe biasing that a high level increases comparator can be equally exported, then if detecting inductive current mistake in the case of afterflow Zero, then current zero-crossing signal V_ZEROMinimum can be reduced to keep high efficiency the bias current of comparator at once.

It please refers to shown in Fig. 4, is to provide the boosting change based on PFM control for the application of the technology of the present invention solution Parallel operation response speed translation circuit, the circuit utilize the output signal V of driving circuit_NDistinguishing load is underloading still heavy duty, when Load is V at light load_NDuty it is relatively low, when load is when overloaded, V_NDuty it is bigger.It is controlled using the difference of duty ratio The bias current of comparator processed changes its response speed.

It please refers to shown in Fig. 4, specific implementation circuit includes: voltage input end V_IN, inductance L, current over-zero comparator, rectification Pipe M₁, power tube M₂, driving circuit driver, PFM module, comparator, divider resistance R₁、R₂, output capacitance C_OUT, turn-on time Control circuit further includes output capacitance internal resistance R_ESR, the rectifying tube M₁For PMOS tube, power tube M₂For NMOS tube；The voltage Input terminal V_INPass sequentially through inductance L, rectifying tube M₁, output capacitance internal resistance R_ESR, output capacitance C_OUTAfter be grounded, the voltage input Hold V_INPass sequentially through inductance L, power tube M₂After be grounded, the power tube M₂Drain electrode connect with one end of inductance L, source electrode connects Ground, grid are connect with the bias current of the first output end of driving circuit driver and comparator setting end simultaneously, the rectification Pipe M₁Source electrode connect with one end of inductance L, drain with output capacitance internal resistance R_ESROne end connection, grid and driving circuit The second output terminal of driver connects, the normal phase input end and rectifying tube M of the current over-zero comparator₁Source electrode connection, anti- Phase input terminal and rectifying tube M₁Drain electrode connection, output end and driving circuit driver first input end connect, divider resistance R₁ One end and rectifying tube M₁Drain electrode connection, the other end pass through divider resistance R₂Ground connection, the inverting input terminal of comparator are connected to point Piezoresistance R₁、R₂Common end, normal phase input end meet reference voltage V_REF, comparator output end connection PFM module it is first defeated Enter end, the output end of the second input terminal connection turn-on time control circuit, the output end of PFM module of PFM module connect driving The second input terminal of circuit driver；

Output end voltage V_OUTPartial pressure act on comparator, the base of sampled voltage FB and comparator as sampled voltage FB Quasi- voltage V_REFIt makes comparisons；The output signal V that comparator obtains_EAWith the output signal collective effect of turn-on time control circuit in PFM module is to change the output frequency of PFM module；The output signal of PFM and the output signal V of current over-zero comparator_ZEROAltogether Same-action controls power tube M in driving circuit driver₂Or rectifying tube M₁Conducting；As output end voltage V_OUTLower than default electricity When pressure, sampled voltage FB is lower than reference voltage V_REF, the output signal V of comparator_EA, the output signal of PFM module, driving circuit Output signal V_P、V_NIt is high level, power tube M₂Conducting, rectifying tube M₁Cut-off, inductance L energy storage, turn-on time control circuit Start timing；After reaching preset time, turn-on time control circuit, which reset to PFM module, makes the low electricity of its output signal It is flat, and then make the output signal V of driving circuit_N、V_PFor low level, power tube M₂Cut-off, rectifying tube M₁Conducting, inductance L is to circuit Output end release energy, meanwhile, according to the first output end of driving circuit driver pass through the first output signal V_NDuty Load is judged than size for underloading or heavy duty, as the first output signal V_NDuty ratio be less than certain value when, then load be light Load state, at this point, the first output signal V_NThe bias current for reducing comparator reduces the quiescent dissipation of circuit, keeps underloading Under high efficiency；As the first output signal V_NDuty ratio be greater than certain value when, then load be heavy condition, at this point, first is defeated Signal V out_NThe bias current for increasing comparator improves comparator speed, and circuit work frequency improves.

It is applied based on second of the technology of the present invention solution, if Fig. 5 provides a kind of specific implementation circuit of comparator, The internal circuit of the comparator includes: PMOS tube P₁、P₂、P₃、P₄, NMOS tube N₁、N₂、N₃、N₄、N₅、N₆, resistance R₀, capacitor C₁、 Bias voltage V_BN, the PMOS tube P₁、P₂、P₃、P₄Source electrode be separately connected supply voltage, PMOS tube P₁Drain electrode and NMOS tube N₃ Drain electrode connection, PMOS tube P1 grid connect with the grid of PMOS tube P2, the source electrode of NMOS tube N3 is grounded, NMOS tube N₃Grid Pole and NMOS tube N₆Grid connection, NMOS tube N₃Drain electrode connect with grid lead, PMOS tube P₂Drain electrode and NMOS tube N₄'s Drain electrode connection, PMOS tube P₂Grid connect with drain conductors, NMOS tube N₄Grid meet sampled voltage FB, NMOS tube N₄Source Pole and NMOS tube N₁Drain electrode connection, NMOS tube N₁Source electrode ground connection, driving circuit driver the first output signal V_NPass through electricity Hinder R₀With NMOS tube N₁Grid connection, capacitor C₁One end and NMOS tube N₁Grid connection, the other end ground connection, NMOS tube N₂'s Grid and bias voltage V_BNConnection, NMOS tube N₂Drain electrode and NMOS tube N₁Drain electrode connection, NMOS tube N₂Source electrode ground connection, PMOS tube P₃Drain electrode and NMOS tube N₅Drain electrode connection, PMOS tube P₃Grid and PMOS tube P₄Grid connection, PMOS tube P₃ Grid connect with drain conductors, NMOS tube N₅Grid meet the reference voltage V of comparator_REF, NMOS tube N₅Source electrode and NMOS Pipe N₁Drain electrode connection, PMOS tube P₄Drain electrode and comparator output end connect, NMOS tube N₆Drain electrode and comparator output End connection, NMOS tube N₆Source electrode ground connection；

When load is the output signal V of driving circuit at light load_NDuty ratio is less than certain value, V_NThrough resistance R₀With capacitor C₁ The DC analog level for becoming amplitude very little after filtering makes NMOS tube N₁Shutdown is kept to reduce the bias current of comparator The high efficiency of light condition；When load is the output signal V of driving circuit when overloaded_NDuty ratio is greater than certain value, the output Signal V_NThrough resistance R₀With capacitor C₁Become the biggish DC analog level of amplitude after filtering, makes NMOS tube N₁Conducting, to compare The bias current of device is with V_NDuty ratio increase and increase, the raising of the response speed of comparator.

Specifically, when load as at light load, driving signal V at this time_NDuty ratio very little, driving signal V_NBy resistance R₀ With capacitor C₁Become the DC analog level of an amplitude very little after filtering, then NMOS tube N₁Shutdown, the at this time biasing of comparator Electric current is minimum, the high efficiency under can keeping unloaded in this way or being lightly loaded；

When load is when overloaded, driving signal V at this time_NDuty ratio it is very big, driving signal V_NBy resistance R₀With capacitor C₁ Become the biggish DC analog level of amplitude after filtering, then NMOS tube N₁Conducting, the bias current of comparator will at this time With driving signal V_NDuty ratio size and change, duty ratio is bigger, and filtered DC analog level is bigger, NMOS tube N₁The electric current flowed through is bigger, and the response speed of comparator is faster.

The third application of the technology of the present invention solution is a kind of booster system response speed transformation based on PFM control The control method of circuit, the circuit include voltage input end V_IN, inductance L, current over-zero comparator, rectifying tube M₁, power tube M₂, driving circuit, PFM module, comparator, divider resistance R₁、R₂, output capacitance C_OUT, output capacitance internal resistance R_ESR, turn-on time Control circuit, steps are as follows:

S1, output end voltage V_OUTThrough divider resistance R₁、R₂Partial pressure, obtains sampled voltage FB；

S2, the sampled voltage FB act on comparator, the reference voltage V with comparator_REFIt makes comparisons, comparator obtains The output signal V of comparator_EA；

The output signal V of S3, the comparator_EAOutput signal collective effect with turn-on time control circuit is in PFM mould Block obtains the output signal of PFM module；

The output signal V of S4, the output signal of the PFM module and current over-zero comparator_ZEROCollective effect is in driving Circuit driver is used to control power tube M₂With rectifying tube M₁On or off；

S5, as output end voltage V_OUTWhen lower than predeterminated voltage, sampled voltage FB is lower than reference voltage V_REF, comparator it is defeated Signal V out_EA, the output signal of PFM module, driving circuit driver output signal V_P、V_NIt is high level, power tube M₂It leads Logical, rectifying tube M₁Cut-off, inductance L energy storage, meanwhile, turn-on time control circuit starts timing；

S6, when timing reach preset time when, turn-on time control circuit to PFM module carry out reset make its output signal Become low level, and then the output signal V of driving circuit_N、V_PIt also is low level, power tube M₂Cut-off, rectifying tube M₁Conducting；

Energy storage in step S5 is released to the output end of circuit by S7, inductance L, and current over-zero comparator passes through inductive current Whether zero passage judges load for underloading or heavy duty；

If S8, inductive current zero passage, the output signal V of current over-zero comparator_ZEROFor high level, load as underloading State, at this point, the output signal V of current over-zero comparator_ZEROThe quiescent dissipation of circuit, drops in the bias current for reducing comparator It is low；

4th technical solution of the invention is a kind of booster system response speed translation circuit based on PFM control Control method, the circuit includes voltage input end V_IN, inductance L, current over-zero comparator, rectifying tube M₁, power tube M₂, drive Dynamic circuit, PFM module, comparator, divider resistance R₁And R₂, output capacitance C_OUT, output capacitance internal resistance R_ESR, turn-on time control Circuit, steps are as follows:

Energy storage in step S5 is released to the output end of circuit, the first output end of driving circuit driver by S7, inductance L Pass through the first output signal V_NDuty ratio size judge the load for underloading or heavily loaded；

S8, when the duty ratio of the first output signal VN be less than certain value when, then load be light condition, at this point, first is defeated Signal VN reduces the bias current of comparator out, reduces the quiescent dissipation of circuit, keeps the high efficiency under underloading；

When the duty ratio of the first output signal VN is greater than certain value, then load is heavy condition, at this point, the first output letter Number VN increases the bias current of comparator, improves comparator speed, and circuit work frequency improves.

The foregoing is merely presently preferred embodiments of the present invention, all equivalent changes done according to scope of the invention as claimed with Modification, should all belong to the covering scope of the claims in the present invention.

Claims

1. a kind of booster system response speed translation circuit based on PFM control, which is characterized in that the circuit includes: voltage It is input terminal, inductance, current over-zero comparator, rectifying tube, power tube, driving circuit, PFM module, comparator, divider resistance, defeated Capacitor, turn-on time control circuit, the partial pressure of the output end voltage of the circuit act on comparator as sampled voltage out, with The reference voltage of comparator is made comparisons；The output signal collective effect of the output signal of comparator and turn-on time control circuit in PFM module changes the output frequency of PFM, and the output signal of PFM and the output signal collective effect of current over-zero comparator are in drive Dynamic circuit controls the on or off of power tube or rectifying tube；When output end voltage is lower than predeterminated voltage, power tube conducting, Rectifying tube cut-off, inductive energy storage, turn-on time control circuit start timing；After reaching preset time, turn-on time control circuit PFM module is resetted, and then controls driving circuit, makes power tube cut-off, rectifying tube conducting, inductance to the output end of circuit It releases energy, at this point, judging to load according to the output signal of current over-zero comparator or the output drive signal of driving circuit For underloading or heavy duty, when at light load, current over-zero comparator detects the output driving of inductive current zero passage or driving circuit The duty ratio of signal is very low, to reduce the bias current of comparator；When for when overloaded, current over-zero comparator does not detect The duty of the output drive signal of inductive current zero passage or driving circuit is bigger, to increase the bias current of comparator.

2. the booster system response speed translation circuit according to claim 1 based on PFM control, which is characterized in that described Circuit includes: voltage input end V_IN, inductance L, current over-zero comparator, rectifying tube M₁, power tube M₂, driving circuit driver, PFM module, comparator, divider resistance R₁、R₂, output capacitance C_OUT, turn-on time control circuit, further include output capacitance internal resistance R_ESR, the rectifying tube M₁For PMOS tube, power tube M₂For NMOS tube；The voltage input end V_INPass sequentially through inductance L, rectification Pipe M₁Source electrode and drain electrode, output capacitance internal resistance R_ESR, output capacitance C_OUTAfter be grounded, the voltage input end V_INPass sequentially through electricity Feel L, power tube M₂After be grounded, the power tube M₂Drain electrode connect with one end of inductance L, source electrode ground connection, grid and driving circuit The first output end of driver connects, the rectifying tube M₁Grid connect with the second output terminal of driving circuit driver, institute State the inverting input terminal and rectifying tube M of current over-zero comparator₁Source electrode, power tube M₂And the common end connection of inductance L, positive Input terminal and rectifying tube M₁Drain electrode, output capacitance internal resistance R_ESRCommon end connection, output end simultaneously with driving circuit driver The bias current setting end of first input end and comparator connect, divider resistance R₁One end and rectifying tube M₁Drain electrode, output The common end of capacitor internal resistance RESR connects, and the other end passes through divider resistance R₂Ground connection, the inverting input terminal of comparator are connected to point Piezoresistance R₁、R₂Common end, normal phase input end meets reference voltage V_REF, comparator output end connection PFM module it is first defeated Enter end, the output end of the second input terminal connection turn-on time control circuit, the output end of PFM module of PFM module connect driving The second input terminal of circuit driver；

Output end voltage V_OUTPartial pressure act on comparator as sampled voltage FB, the benchmark electricity of sampled voltage FB and comparator Press V_REFIt makes comparisons；The output signal collective effect of output signal VEA and turn-on time control circuit that comparator obtains are in PFM Module is to change the output frequency of PFM module；The output signal of PFM and the output signal V of current over-zero comparator_ZEROIt is common to make Power tube M is controlled for driving circuit₂Or rectifying tube M₁On or off；As output end voltage V_OUTLower than predeterminated voltage When, sampled voltage FB is lower than reference voltage V_REF, the output signal V of comparator_EA, the output signal of PFM module, driving circuit Output signal V_P、V_NIt is high level, power tube M₂Conducting, rectifying tube M₁Cut-off, inductance L energy storage, turn-on time control circuit are opened Beginning timing；After reaching preset time, turn-on time control circuit, which reset to PFM module, makes its output signal low level, And then make output signal VN, the VP low level of driving circuit, power tube M₂Cut-off, rectifying tube M₁Conducting, inductance L is to circuit Output end releases energy, meanwhile, whether zero passage judges load for heavy duty or underloading to current over-zero comparator detection inductive current；Such as Fruit inductive current zero passage, then the output signal V of current over-zero comparator_ZEROFor high level, load as light condition, at this point, electric Flow through the output signal V of zero comparator_ZEROThe bias current for reducing comparator, reduces the quiescent dissipation of circuit；If inductance Electric current does not have zero passage, then the output signal V of current over-zero comparator_ZEROFor low level, load as heavy condition, at this point, electric current The output signal V of zero-crossing comparator_ZEROThe bias current for increasing comparator, improves comparator speed, and circuit work frequency mentions It is high.

3. the booster system response speed translation circuit according to claim 2 based on PFM control, which is characterized in that described The internal circuit of comparator includes: nor gate D₁、D₂, phase inverter E₁, PMOS tube P₁、P₂、P₃、P₄、P₅、P₆, NMOS tube N₁、N₂、N₃、 N₄、N₅, bias voltage V_BP, the output signal VZERO of the current over-zero comparator meets nor gate D₁First input end or non- Door D₂Output end connect nor gate D₁The second input terminal, nor gate D₁Output end connect nor gate D₂First input end, The output signal VEA connection nor gate D of comparator₂The second input terminal, nor gate D₁Output end connect phase inverter E₁Input End, phase inverter E₁Output end connect PMOS tube P₂Grid, PMOS tube P₂Source electrode and PMOS tube P₁Drain electrode connection, PMOS Pipe P₂Drain electrode simultaneously with PMOS tube P₃Drain electrode and NMOS tube N₁Drain electrode connection, PMOS tube P₁Source electrode and supply voltage connect It connects, PMOS tube P₁Grid and bias voltage V_BPConnection, PMOS tube P₃Source electrode connect with supply voltage, PMOS tube P₃Grid With bias voltage V_BPConnection, NMOS tube N₁Drain electrode connect with grid lead, NMOS tube N₁Source electrode ground connection, PMOS tube P₄Source Pole is connect with supply voltage, PMOS tube P₄Grid and PMOS tube P₅Grid connection, PMOS tube P₄Drain electrode and NMOS tube N₂'s Drain electrode connection, PMOS tube P₄Grid connect with drain conductors, NMOS tube N₂Grid meet sampled voltage FB, NMOS tube N₂Source Pole and NMOS tube N₃Drain electrode and NMOS tube N₄Source electrode connection, NMOS tube N₃Grid and NMOS tube N₁Grid and NMOS tube The grid of N5 connects, NMOS tube N₃Source electrode ground connection, PMOS tube P₅Source electrode connect with supply voltage, PMOS tube P₅Drain electrode with NMOS tube N₄Drain electrode connection, NMOS tube N₄Grid meet the reference voltage VREF, PMOS tube P of comparator₆Source electrode and power supply electricity Pressure connection, PMOS tube P₆Drain electrode, NMOS tube N₅Drain electrode and comparator output end connect, NMOS tube N₅Source electrode ground connection；

As output end voltage V_OUTWhen lower than predeterminated voltage, the output signal V of comparator_EAFor high level, V_EABy nor gate D₂、 D₁With phase inverter E₁Output low level makes PMOS tube P afterwards₂Conducting, so that the bias current of comparator is increased, the response speed of comparator Degree improves；At this point, if load is in heavy duty, the output signal V of current over-zero comparator_ZEROFor low level, PMOS tube P₂One Straight conducting, comparator keep faster response speed；At this point, if load is in underloading, the output of current over-zero comparator Signal V_ZEROFor high level, the output signal V_ZEROThrough nor gate D₁、D₂With phase inverter E₁Output high level makes PMOS tube P afterwards₂ Shutdown, to reduce the bias current of comparator, the quiescent dissipation reduction of circuit, efficiency are improved.

4. the booster system response speed translation circuit according to claim 1 based on PFM control, which is characterized in that described Circuit includes: voltage input end V_IN, inductance L, current over-zero comparator, rectifying tube M₁, power tube M₂, driving circuit driver, PFM module, comparator, divider resistance R₁、R₂, output capacitance C_OUT, turn-on time control circuit, further include output capacitance internal resistance R_ESR, the rectifying tube M₁For PMOS tube, power tube M₂For NMOS tube；The voltage input end V_INPass sequentially through inductance L, rectification Pipe M₁Source electrode and drain electrode, output capacitance internal resistance R_ESR, output capacitance C_OUTAfter be grounded, the voltage input end V_INPass sequentially through electricity Feel L, power tube M₂Drain electrode and source electrode after be grounded, the power tube M₂Grid it is defeated with the first of driving circuit driver simultaneously Outlet is connected with the bias current of comparator setting end, the rectifying tube M₁Grid and driving circuit driver second output End connection, the normal phase input end and rectifying tube M of the current over-zero comparator₁Source electrode, power tube M₂Drain electrode and inductance L Common end connection, inverting input terminal and rectifying tube M₁Drain electrode, output capacitance internal resistance R_ESRCommon end connection, the electric current mistake The output end of zero comparator is connect with the first input end of driving circuit driver, divider resistance R₁One end and rectifying tube M₁'s Drain electrode and output capacitance internal resistance R_ESRCommon end connection, divider resistance R₁The other end pass through divider resistance R₂Ground connection, comparator Inverting input terminal be connected to divider resistance R₁、R₂Common end, normal phase input end meets reference voltage V_REF, the output end of comparator Connect the first input end of PFM module, the output end of the second input terminal connection turn-on time control circuit of PFM module, PFM mould The second input terminal of the output end connection driving circuit driver of block；

Output end voltage V_OUTPartial pressure act on comparator as sampled voltage FB, the benchmark electricity of sampled voltage FB and comparator Press V_REFIt makes comparisons；The output signal V that comparator obtains_EAOutput signal collective effect with turn-on time control circuit is in PFM mould Block is to change the output frequency of PFM module；The output signal of PFM and the output signal V of current over-zero comparator_ZEROCollective effect Power tube M is controlled in driving circuit driver₂Or rectifying tube M₁On or off；As output end voltage V_OUTLower than default electricity When pressure, sampled voltage FB is lower than reference voltage V_REF, the output signal V of comparator_EA, the output signal of PFM module, driving circuit Output signal V_P、V_NIt is high level, power tube M₂Conducting, rectifying tube M₁Cut-off, inductance L energy storage, turn-on time control circuit Start timing；After reaching preset time, turn-on time control circuit, which reset to PFM module, makes the low electricity of its output signal It is flat, and then make the output signal V of driving circuit_N、V_PFor low level, power tube M₂Cut-off, rectifying tube M₁Conducting, inductance L is to circuit Output end release energy, meanwhile, according to the first output end of driving circuit driver pass through the first output signal V_NDuty Load is judged than size for underloading or heavy duty, as the first output signal V_NDuty ratio less than a setting value when, then load be Light condition, at this point, the first output signal V_NThe bias current for reducing comparator, reduces the quiescent dissipation of circuit, keeps light High efficiency under carrying；As the first output signal V_NDuty ratio when being greater than a setting value, then load is heavy condition, at this point, the One output signal V_NThe bias current for increasing comparator improves comparator speed, and circuit work frequency improves.

5. the booster system response speed translation circuit according to claim 4 based on PFM control, which is characterized in that described The internal circuit of comparator includes: PMOS tube P₁、P₂、P₃、P₄, NMOS tube N₁、N₂、N₃、N₄、N₅、N₆, resistance R₀, capacitor C₁, biasing Voltage V_BN, the PMOS tube P₁、P₂、P₃、P₄Source electrode be separately connected supply voltage, PMOS tube P₁Drain electrode and NMOS tube N₃Leakage Pole connection, PMOS tube P₁Grid and PMOS tube P₂Grid connection, NMOS tube N₃Source electrode ground connection, NMOS tube N₃Grid with NMOS tube N₆Grid connection, NMOS tube N₃Drain electrode connect with grid lead, PMOS tube P₂Drain electrode and NMOS tube N₄Drain electrode Connection, PMOS tube P₂Grid connect with drain conductors, NMOS tube N₄Grid meet sampled voltage FB, NMOS tube N₄Source electrode, NMOS tube N₅Source electrode, NMOS tube N₁Drain electrode, NMOS tube N₂Drain electrode connection, NMOS tube N₁Source electrode ground connection, driving circuit The first output signal V of driver_NPass through resistance R₀With NMOS tube N₁Grid and capacitor C₁One end connection, capacitor C₁It is another End ground connection, NMOS tube N₂Grid and bias voltage V_BNConnection, NMOS tube N₂Source electrode ground connection, PMOS tube P₃Drain electrode and NMOS Pipe N₅Drain electrode connection, PMOS tube P₃Grid and PMOS tube P₄Grid connection, PMOS tube P₃Grid and drain conductors connect It connects, NMOS tube N₅Grid meet the reference voltage V of comparator_REF, PMOS tube P₄Drain electrode, NMOS tube N₆Drain electrode and comparator Output end connection, NMOS tube N₆Source electrode ground connection；

When load is the output signal V of driving circuit at light load_NDuty ratio is less than a setting value, V_NThrough resistance R₀With capacitor C₁Filter The DC analog level for becoming amplitude very little after wave makes NMOS tube N₁Shutdown keeps light to reduce the bias current of comparator The high efficiency of load state；When load is the output signal V of driving circuit when overloaded_NDuty ratio is greater than a setting value, V_NThrough resistance R₀With capacitor C₁Become the biggish DC analog level of amplitude after filtering, makes NMOS tube N₁Conducting, thus the bias current of comparator With V_NDuty ratio increase and increase, the raising of the response speed of comparator.

6. a kind of control method of the booster system response speed translation circuit based on PFM control, which is characterized in that the circuit Including voltage input end V_IN, inductance L, current over-zero comparator, rectifying tube M₁, power tube M₂, driving circuit, PFM module, compare Device, divider resistance R₁、R₂, output capacitance C_OUT, output capacitance internal resistance R_ESR, turn-on time control circuit, steps are as follows:

(2) the sampled voltage FB acts on comparator, the reference voltage V with comparator_REFIt makes comparisons, comparator obtains comparator Output signal V_EA；

(3) the output signal V of the comparator_EAIt is obtained with the output signal collective effect of turn-on time control circuit in PFM module The output signal of PFM module；

(4) the output signal V of the output signal of the PFM module and current over-zero comparator_ZEROCollective effect is in driving circuit Driver is used to control power tube M₂With rectifying tube M₁On or off；

(5) as output end voltage V_OUTWhen lower than predeterminated voltage, sampled voltage FB is lower than reference voltage V_REF, the output letter of comparator Number V_EA, the output signal of PFM module, driving circuit driver output signal V_P、V_NIt is high level, power tube M₂It is connected, is whole Flow tube M₁Cut-off, inductance L energy storage, meanwhile, turn-on time control circuit starts timing；

(6) when timing reaches preset time, turn-on time control circuit, which reset to PFM module, becomes its output signal Low level, and then the output signal V of driving circuit_N、V_PIt also is low level, power tube M₂Cut-off, rectifying tube M₁Conducting；

Inductance L by step (5) in energy storage be released to the output end of circuit, whether current over-zero comparator detects inductive current Zero passage judges load for underloading or heavy duty；

(8) if inductive current zero passage, the output signal V of current over-zero comparator_ZEROFor high level, load as light condition, At this point, the output signal V of current over-zero comparator_ZEROThe bias current for reducing comparator, reduces the quiescent dissipation of circuit；

If inductive current does not have zero passage, the output signal V of current over-zero comparator_ZEROFor low level, load as heavily loaded shape State, at this point, the output signal V of current over-zero comparator_ZEROThe bias current for increasing comparator improves comparator speed, electricity Road working frequency improves.

7. a kind of control method of the booster system response speed translation circuit based on PFM control, which is characterized in that the circuit Including voltage input end V_IN, inductance L, current over-zero comparator, rectifying tube M₁, power tube M₂, driving circuit, PFM module, compare Device, divider resistance R₁、R₂, output capacitance C_OUT, output capacitance internal resistance R_ESR, turn-on time control circuit, steps are as follows:

Inductance L by step (5) in energy storage be released to the output end of circuit, the first output end of driving circuit driver passes through First output signal V_NDuty ratio size judge the load for underloading or heavily loaded；

(8) as the first output signal V_NDuty ratio less than a setting value when, then load be light condition, at this point, first output letter Number V_NThe bias current for reducing comparator reduces the quiescent dissipation of circuit, keeps the high efficiency under underloading；

As the first output signal V_NDuty ratio be greater than a setting value when, then load be heavy condition, at this point, the first output signal V_NThe bias current for increasing comparator improves comparator speed, and circuit work frequency improves.