CN208738609U - A kind of vertical cavity surface-emitting laser chip - Google Patents
A kind of vertical cavity surface-emitting laser chip Download PDFInfo
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- CN208738609U CN208738609U CN201821762316.4U CN201821762316U CN208738609U CN 208738609 U CN208738609 U CN 208738609U CN 201821762316 U CN201821762316 U CN 201821762316U CN 208738609 U CN208738609 U CN 208738609U
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- 239000000758 substrate Substances 0.000 claims abstract description 15
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims 2
- 150000002500 ions Chemical class 0.000 claims 2
- 239000004408 titanium dioxide Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
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- Semiconductor Lasers (AREA)
Abstract
The utility model provides a kind of vertical cavity surface-emitting laser chip, including substrate, the N-type DBR layer for being sequentially located at substrate first surface, the first oxide layer, mqw layer, the second oxide layer and p-type DBR layer；First oxide layer includes the centrally located first non-zoneofoxidation and the first zoneofoxidation positioned at the first non-zoneofoxidation surrounding；Second oxide layer includes the centrally located second non-zoneofoxidation and the second zoneofoxidation positioned at the second non-zoneofoxidation surrounding；Wherein, the first zoneofoxidation and the second zoneofoxidation are non-conductive, and the area of the first non-zoneofoxidation is less than the area of the second non-zoneofoxidation.Due to the first non-zoneofoxidation area less than the second non-zoneofoxidation area, therefore, so that electric current is extending transversely in the second non-zoneofoxidation, so that electric current uniformly flows to the first non-zoneofoxidation from the second non-zoneofoxidation, and then the current density in close VCSEL chip center region is increased, the half-wave for reducing VCSEL chip is wide.
Description
Technical field
The utility model relates to field of photoelectric technology, more specifically to a kind of vertical cavity surface-emitting laser chip.
Background technique
VCSEL (Vertical-Cavity Surface-Emitting Laser, vertical cavity surface-emitting laser) chip, because
It is small, cheap and easy of integration for large area array etc. with small in size, round output facula, single longitudinal mode output, threshold current
Advantage, and it is widely used in the fields such as optic communication, light network and optical storage.But the half-wave of existing VCSEL chip is wide still
It is larger, it is unfavorable for VCSEL chip in the application in specific communication field.
Utility model content
In view of this, the present invention provides a kind of vertical cavity surface-emitting laser chips, to reduce the half of VCSEL chip
Wave is wide.
To achieve the above object, the utility model provides the following technical solutions:
A kind of vertical cavity surface-emitting laser chip, including substrate, the N-type DBR layer that is sequentially located at the substrate first surface,
First oxide layer, mqw layer, the second oxide layer and p-type DBR layer；
First oxide layer includes the centrally located first non-zoneofoxidation and positioned at the described first non-zoneofoxidation surrounding
First zoneofoxidation；Second oxide layer include the centrally located second non-zoneofoxidation and be located at the described second non-zoneofoxidation surrounding
The second zoneofoxidation；
Wherein, first zoneofoxidation and second zoneofoxidation are non-conductive, and the area of the first non-zoneofoxidation is small
In the area of the described second non-zoneofoxidation.
Optionally, on the direction perpendicular to the substrate, the projection of the second non-zoneofoxidation is completely covered described
The projection of one non-zoneofoxidation.
Optionally, in first oxide layer Al ion content be greater than second oxide layer in Al ion content,
So that the area of the first non-zoneofoxidation is less than the area of the described second non-zoneofoxidation.
Compared with prior art, technical solution provided by the utility model has the advantage that
Vertical cavity surface-emitting laser chip provided by the utility model, since the area of the first non-zoneofoxidation is less than second
The area of non-zoneofoxidation, therefore, so that electric current is extending transversely in the second non-zoneofoxidation, so that electric current is from the second non-zoneofoxidation
The first non-zoneofoxidation uniformly is flowed to, and then increases the current density close to VCSEL chip center region, reduces VCSEL core
The half-wave of piece is wide.
Detailed description of the invention
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, the accompanying drawings in the following description is only
It is the embodiments of the present invention, for those of ordinary skill in the art, without creative efforts, also
Other attached drawings can be obtained according to the attached drawing of offer.
Fig. 1 is a kind of existing the schematic diagram of the section structure of vertical cavity surface-emitting laser chip；
Fig. 2 is a kind of the schematic diagram of the section structure of vertical cavity surface-emitting laser chip provided by the embodiment of the utility model；
Fig. 3 is the planar structure schematic diagram of the first oxide layer provided by the embodiment of the utility model.
Specific embodiment
As described in background, the half-wave width of existing VCSEL chip is larger.As shown in Figure 1, utility model people studies
It was found that the reason of causing this problem is, during electric current flows to positive electrode 11 from negative electrode 10, since electric current walks shortest path
Diameter effect causes electric current excessively to be concentrated in the fringe region (in dotted line frame) of the non-zoneofoxidation of oxide layer 12, leads to non-zoneofoxidation
The current density of central area is smaller, and then the wavelength for the laser for causing chip to be emitted has different, causes half-wave width larger.
Based on this, the utility model provides a kind of vertical cavity surface-emitting laser chip, of the existing technology to overcome
The above problem, including substrate, the N-type DBR layer for being sequentially located at the substrate first surface, the first oxide layer, mqw layer, the second oxygen
Change layer and p-type DBR layer；
First oxide layer includes the centrally located first non-zoneofoxidation and positioned at the described first non-zoneofoxidation surrounding
First zoneofoxidation；Second oxide layer include the centrally located second non-zoneofoxidation and be located at the described second non-zoneofoxidation surrounding
The second zoneofoxidation；
Wherein, the area of the described first non-zoneofoxidation is less than the area of the described second non-zoneofoxidation.
Vertical cavity surface-emitting laser chip provided by the utility model, due to the first non-zoneofoxidation area not less than second
The area of zoneofoxidation, therefore, so that electric current is extending transversely in the second non-zoneofoxidation, so that electric current is equal from the second non-zoneofoxidation
Uniform flow increases the current density close to VCSEL chip center region to the first non-zoneofoxidation, reduces VCSEL chip
Half-wave it is wide.
It is the core concept of the utility model above, to enable the above objects, features, and advantages of the utility model more
Add and become apparent, the following will be combined with the drawings in the embodiments of the present invention, to the technical scheme in the embodiment of the utility model
It is clearly and completely described, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than complete
The embodiment in portion.Based on the embodiments of the present invention, those of ordinary skill in the art are not before making creative work
Every other embodiment obtained is put, is fallen within the protection scope of the utility model.
The utility model embodiment provides a kind of vertical cavity surface-emitting laser chip, i.e. VCSEL chip, as shown in Fig. 2,
VCSEL chip includes substrate 20, N-type DBR layer (the distributed Bragg for being sequentially located at 20 first surface of substrate
Reflector, Distributed Bragg Reflection layer) the 21, first oxide layer 22, MQW (multiple quantum well, Multiple-quantum
Trap) layer 23, the second oxide layer 24, p-type DBR layer 25, buffer layer 26 and first electrode 27, positioned at the second of 20 second surface of substrate
Electrode 28.Wherein, buffer layer 26 is GaAs layers, and first surface and second surface are two opposite surfaces of substrate 20.
As shown in Figure 1, the first oxide layer 22 is including the centrally located first non-zoneofoxidation 220 and is located at the first non-zoneofoxidation
First zoneofoxidation 221 of 220 surroundings.Second oxide layer 24 includes the centrally located second non-zoneofoxidation 240 and is located at second not
Second zoneofoxidation 241 of 240 surrounding of zoneofoxidation.Wherein, the area of the first non-zoneofoxidation 220 is less than the second non-zoneofoxidation 240
Area, and the first zoneofoxidation 221 and the second zoneofoxidation 241 are non-conductive.
When applying voltage in first electrode 27 and second electrode 28, electric current flows to just from negative electrode, that is, first electrode 27
During electrode, that is, second electrode 28, from the second non-zoneofoxidation 240 mqw layer 23 and the second oxide layer 24 can be flowed to, due to the
For the area of one non-zoneofoxidation 220 less than the area of the second non-zoneofoxidation 240, i.e., the first non-zoneofoxidation 220 is laterally being in X-direction
Length less than the second non-zoneofoxidation 240 be laterally length in X-direction, and the first zoneofoxidation 221 and the second zoneofoxidation 241
Non-conductive, therefore, the electric current for flowing to the first non-zoneofoxidation 220 from the second non-zoneofoxidation 240 can be sent out at the first non-zoneofoxidation 220
Raw congestion so that it is extending transversely in the second non-zoneofoxidation 240 to fail the electric current flowed out in time so that electric current from second not
Each region of zoneofoxidation 240 uniformly flows to the first non-zoneofoxidation 220, and then increases close to VCSEL chip center region
Current density, the half-wave for reducing VCSEL chip are wide.
It should be noted that in the utility model embodiment, as shown in figure 3, the first non-zoneofoxidation 220 and second does not aoxidize
Area 240 can be border circular areas, and certainly, the utility model is not limited to that, in other embodiments, the first non-zoneofoxidation
220 and second non-zoneofoxidation 240 can also be square region or irregular shape region etc..Certainly, in the utility model embodiment,
It is only illustrated so that the first non-zoneofoxidation 220 is identical with the shape of the second non-zoneofoxidation 240 as an example, but the utility model and not only
It is limited to this, that is to say, that the shape of the first non-zoneofoxidation 220 and the second non-zoneofoxidation 240 can also be different.
Optionally, on the direction perpendicular to substrate 20, the projection of the second non-zoneofoxidation 240 is completely covered first and does not aoxidize
The projection in area 220, so that electric current can more uniformly flow to the first non-zoneofoxidation from each region of the second non-zoneofoxidation 240
220。
Optionally, before forming the first oxide layer 22 and the second oxide layer 24, first in the region shape of the first oxide layer 22
At the first film layer, in the second film layer of the region of the second oxide layer 24 formation, the material of the first film layer and the second film layer is AlGaAs.
Later, the first film layer and the second film layer are aoxidized, forms the first film layer including centrally located first not
First oxide layer 22 of zoneofoxidation 220 and the first zoneofoxidation 221 positioned at the described first non-220 surrounding of zoneofoxidation, makes the second film
It includes the centrally located second non-zoneofoxidation 240 and the second zoneofoxidation 241 positioned at the second non-240 surrounding of zoneofoxidation that layer, which is formed,
Second oxide layer 24.
Since the content of Al ion in the first oxide layer 22 is greater than the content of Al ion in the second oxide layer 24, it can
After the completion of oxidation, to make the area of the first non-zoneofoxidation 220 less than the area of the second non-zoneofoxidation 240.
Vertical cavity surface-emitting laser chip provided by the utility model, due to the first non-zoneofoxidation area not less than second
The area of zoneofoxidation, therefore, so that electric current is extending transversely in the second non-zoneofoxidation, so that electric current is equal from the second non-zoneofoxidation
Uniform flow increases the current density close to VCSEL chip center region to the first non-zoneofoxidation, reduces VCSEL chip
Half-wave it is wide.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with other
The difference of embodiment, the same or similar parts in each embodiment may refer to each other.To the upper of the disclosed embodiments
It states bright, can be realized professional and technical personnel in the field or using the utility model.Various modifications to these embodiments pair
It will be apparent for those skilled in the art, the general principles defined herein can not depart from this reality
In the case where with novel spirit or scope, realize in other embodiments.Therefore, the utility model is not intended to be limited to this
These embodiments shown in text, and it is to fit to the widest scope consistent with the principles and novel features disclosed herein.
Claims (3)
1. a kind of vertical cavity surface-emitting laser chip, which is characterized in that including substrate, be sequentially located at the substrate first surface
N-type DBR layer, the first oxide layer, mqw layer, the second oxide layer and p-type DBR layer；
First oxide layer includes the centrally located first non-zoneofoxidation and positioned at the first of the described first non-zoneofoxidation surrounding
Zoneofoxidation；Second oxide layer includes the centrally located second non-zoneofoxidation and positioned at the of the described second non-zoneofoxidation surrounding
Titanium dioxide area；
Wherein, first zoneofoxidation and second zoneofoxidation are non-conductive, and the area of the first non-zoneofoxidation is less than institute
State the area of the second non-zoneofoxidation.
2. chip according to claim 1, which is characterized in that on the direction perpendicular to the substrate, described second is not
The projection of the described first non-zoneofoxidation is completely covered in the projection of zoneofoxidation.
3. chip according to claim 1 or 2, which is characterized in that the content of Al ion is greater than in first oxide layer
The content of Al ion in second oxide layer, so that the area of the first non-zoneofoxidation is less than the described second non-zoneofoxidation
Area.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201821762316.4U CN208738609U (en) | 2018-10-29 | 2018-10-29 | A kind of vertical cavity surface-emitting laser chip |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201821762316.4U CN208738609U (en) | 2018-10-29 | 2018-10-29 | A kind of vertical cavity surface-emitting laser chip |
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| CN208738609U true CN208738609U (en) | 2019-04-12 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109088311A (en) * | 2018-10-29 | 2018-12-25 | 厦门乾照半导体科技有限公司 | A kind of vertical cavity surface-emitting laser chip and preparation method thereof |
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2018
- 2018-10-29 CN CN201821762316.4U patent/CN208738609U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109088311A (en) * | 2018-10-29 | 2018-12-25 | 厦门乾照半导体科技有限公司 | A kind of vertical cavity surface-emitting laser chip and preparation method thereof |
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