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CN207868205U - A kind of silicon carbide diode device - Google Patents

A kind of silicon carbide diode device Download PDF

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CN207868205U
CN207868205U CN201820254563.7U CN201820254563U CN207868205U CN 207868205 U CN207868205 U CN 207868205U CN 201820254563 U CN201820254563 U CN 201820254563U CN 207868205 U CN207868205 U CN 207868205U
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silicon carbide
metal
diode device
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epitaxial layer
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陈彤
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Liuyang Taike Tianrun Semiconductor Technology Co Ltd
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Global Power Technology Co Ltd
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Abstract

本实用新型提供了一种碳化硅二极管器件,其元胞结构包括:自上而下以此设置阳极金属、p型外延层、n型漂移层、n+衬底以及阴极金属,所述p型外延层顶部设有接触槽,所述阳极金属底部设有突起部,所述接触槽与所述突起部相互匹配,解决结势垒肖特基二极管中,由于pn结区域的存在,导通状态下器件有效导通面积较小,导致导通电阻较高的问题。

The utility model provides a silicon carbide diode device, the cell structure of which includes: an anode metal, a p-type epitaxial layer, an n-type drift layer, an n+ substrate and a cathode metal are arranged from top to bottom, and the p-type epitaxial The top of the layer is provided with a contact groove, and the bottom of the anode metal is provided with a protrusion, and the contact groove and the protrusion are matched to each other to solve the junction barrier. In the Schottky diode, due to the existence of the pn junction region, in the conduction state The effective conduction area of the device is small, leading to the problem of high on-resistance.

Description

一种碳化硅二极管器件A silicon carbide diode device

技术领域technical field

本实用新型涉及一种碳化硅二极管器件。The utility model relates to a silicon carbide diode device.

背景技术Background technique

碳化硅是一种新兴的第三代半导体材料,具有良好的物理特性和电学特性,被广泛地用于制备高压大功率和高温抗辐照电子器件。碳化硅肖特基二极管是最早实现商业化的碳化硅半导体器件,常见的商业化肖特基二极管为肖特基势垒二极管(SchottkyBarrier Diodes)和结势垒肖特基二极管(Junction Barrier Schottky Diodes)。Silicon carbide is an emerging third-generation semiconductor material with good physical and electrical properties, and is widely used in the preparation of high-voltage, high-power and high-temperature radiation-resistant electronic devices. Silicon carbide Schottky diodes are the earliest commercialized silicon carbide semiconductor devices. Common commercial Schottky diodes are Schottky Barrier Diodes and Junction Barrier Schottky Diodes. .

传统的结势垒肖特基二极管利用反偏PN结的空间电荷区为SBD结构承受反向偏压,从而能够在保证阻断电压的基础上,适当降低肖特基势垒高度以降低正向压降,同时减小二极管反偏漏电。然而,由于在结势垒肖特基二极管中,离子注入结区域并不能够导电,因此器件的有效导通面积减小了,这一缺点限制了JBS器件导通电流密度的进一步提高。The traditional junction barrier Schottky diode uses the space charge region of the reverse-biased PN junction to bear the reverse bias voltage for the SBD structure, so that the height of the Schottky barrier can be appropriately reduced to reduce the forward voltage while ensuring the blocking voltage. voltage drop while reducing diode reverse bias leakage. However, in the junction barrier Schottky diode, the ion-implanted junction region cannot conduct electricity, so the effective conduction area of the device is reduced, which limits the further improvement of the conduction current density of the JBS device.

发明内容Contents of the invention

本实用新型要解决的技术问题,在于提供一种碳化硅二极管器件,解决结势垒肖特基二极管中,由于pn结区域的存在,导通状态下器件有效导通面积较小,导致导通电阻较高的问题。The technical problem to be solved by the utility model is to provide a silicon carbide diode device to solve the problem that in the junction barrier Schottky diode, due to the existence of the pn junction region, the effective conduction area of the device in the conduction state is small, resulting in conduction High resistance problem.

本实用新型是这样实现的:一种碳化硅二极管器件,其元胞结构包括:自上而下以此设置阳极金属、p型外延层、n型漂移层、n+衬底以及阴极金属,所述p型外延层顶部设有接触槽,所述阳极金属底部设有突起部,所述接触槽与所述突起部相互匹配。The utility model is achieved in the following way: a silicon carbide diode device, the cell structure of which includes: an anode metal, a p-type epitaxial layer, an n-type drift layer, an n+ substrate and a cathode metal are arranged from top to bottom, and the The top of the p-type epitaxial layer is provided with a contact groove, and the bottom of the anode metal is provided with a protrusion, and the contact groove and the protrusion are matched with each other.

进一步地,所述n型漂移层的掺杂浓度范围为2×1014cm-3至1×1016cm-3,所述n型漂移层的厚度为5um至200um。Further, the doping concentration of the n-type drift layer ranges from 2×10 14 cm -3 to 1×10 16 cm -3 , and the thickness of the n-type drift layer ranges from 5um to 200um.

进一步地,所述p型外延层的掺杂浓度大于等于1×1019cm-3Further, the doping concentration of the p-type epitaxial layer is greater than or equal to 1×10 19 cm -3 .

进一步地,所述p型外延层的厚度为0.2um至1um,所述接触槽的宽度为4um至16um,所述接触槽底部至n型漂移层顶部距离小于等于5nm。Further, the thickness of the p-type epitaxial layer is 0.2um to 1um, the width of the contact groove is 4um to 16um, and the distance from the bottom of the contact groove to the top of the n-type drift layer is less than or equal to 5nm.

进一步地,所述阳极金属为Ni或Ti,所述阴极金属为Ni。Further, the anode metal is Ni or Ti, and the cathode metal is Ni.

进一步地,所述阳极金属的宽度14um至46um。Further, the width of the anode metal is 14um to 46um.

本实用新型的优点在于:本实用新型一种碳化硅二极管器件,可应用于广泛的电压范围,具有良好的导通特性和反向恢复特性。该结构的制备工艺与常规碳化硅二级管器件兼容,由于在相同器件面积的情况下,具有更大的电流导通面积;The utility model has the advantages that: the utility model is a silicon carbide diode device, which can be applied to a wide voltage range and has good conduction characteristics and reverse recovery characteristics. The preparation process of this structure is compatible with conventional silicon carbide diode devices, because it has a larger current conduction area under the same device area;

并且,本实用新型在常规SBD器件的基础上,引入高掺杂的p型阳极区域,使器件在正向导通时,载流子能够通过隧穿效应通过p型区域;在反向阻断状态下,外延pn结承受反向偏压,相比于SBD和JBS器件利用肖特基结承受反向偏压,该二极管利用pn结承受反偏电压,能够降低阻断状态下的漏电流。Moreover, on the basis of conventional SBD devices, the utility model introduces a highly doped p-type anode region, so that when the device is conducting forward, the carriers can pass through the p-type region through the tunneling effect; in the reverse blocking state Next, the epitaxial pn junction is subjected to reverse bias voltage. Compared with SBD and JBS devices that use Schottky junction to withstand reverse bias voltage, the diode uses pn junction to withstand reverse bias voltage, which can reduce the leakage current in the blocking state.

附图说明Description of drawings

下面参照附图结合实施例对本实用新型作进一步的说明。The utility model will be further described below in conjunction with the embodiments with reference to the accompanying drawings.

图1为本实用新型实施例的碳化硅二极管器件元胞结构示意图。FIG. 1 is a schematic diagram of a cell structure of a silicon carbide diode device according to an embodiment of the present invention.

图2为本实用新型实施例的步骤流程图。Fig. 2 is a flowchart of the steps of the embodiment of the utility model.

图3为本实用新型实施例提供的一种碳化硅二极管器件的制造方法中形成接触槽的示意图一。FIG. 3 is a first schematic diagram of forming a contact groove in a method for manufacturing a silicon carbide diode device provided by an embodiment of the present invention.

图4为本实用新型实施例提供的一种碳化硅二极管器件的制造方法中形成接触槽的示意图二。FIG. 4 is a second schematic diagram of forming a contact groove in a method for manufacturing a silicon carbide diode device provided by an embodiment of the present invention.

图5为本实用新型实施例提供的一种碳化硅二极管器件的制造方法中形成接触槽的示意图三。FIG. 5 is a third schematic diagram of forming a contact groove in a method for manufacturing a silicon carbide diode device provided by an embodiment of the present invention.

图6为本实用新型实施例提供的一种碳化硅二极管器件的制造方法中形成接触槽的示意图四。FIG. 6 is a fourth schematic diagram of forming contact grooves in a method for manufacturing a silicon carbide diode device provided by an embodiment of the present invention.

图7为本实用新型实施例提供的一种碳化硅二极管器件的制造方法中形成接触槽的步骤流程图。FIG. 7 is a flowchart of the steps of forming contact grooves in a method of manufacturing a silicon carbide diode device provided by an embodiment of the present invention.

具体实施方式Detailed ways

请参阅图1所示,本实用新型碳化硅二极管器件,其是由多个元胞结构并联形成的,该元胞结构包括:自上而下以此设置阳极金属4、p型外延层3、n型漂移层2、n+衬底1以及阴极金属5,所述p型外延层3顶部设有接触槽,所述阳极金属4底部设有突起部,所述接触槽与所述突起部相互匹配,所述n型漂移层2的掺杂浓度范围为2×1014cm-3至1×1016cm-3,所述n型漂移层2的厚度为5um至200um,所述p型外延层3的掺杂浓度大于等于1×1019cm-3,所述p型外延层3的厚度为0.2um至1um,所述接触槽的宽度为4um至16um,所述接触槽底部至n型漂移层2顶部距离小于等于5nm,所述阳极金属4为Ni或Ti,所述阴极金属5为Ni,所述阳极金属4的宽度14um至46um;通过改变p型外延层3的厚度,掺杂浓度和中央接触槽的宽度和深度,可以在导通电阻和阻断漏电之间做出优选。See also shown in Fig. 1, the silicon carbide diode device of the present invention, it is formed by the parallel connection of a plurality of cellular structures, and this cellular structure comprises: anode metal 4, p-type epitaxial layer 3, p-type epitaxial layer 3, n-type drift layer 2, n+ substrate 1 and cathode metal 5, the top of the p-type epitaxial layer 3 is provided with a contact groove, the bottom of the anode metal 4 is provided with a protrusion, and the contact groove and the protrusion are matched with each other , the doping concentration range of the n-type drift layer 2 is 2×10 14 cm -3 to 1×10 16 cm -3 , the thickness of the n-type drift layer 2 is 5um to 200um, and the p-type epitaxial layer The doping concentration of 3 is greater than or equal to 1×10 19 cm -3 , the thickness of the p-type epitaxial layer 3 is 0.2um to 1um, the width of the contact groove is 4um to 16um, and the bottom of the contact groove reaches the n-type drift The distance between the top of layer 2 is less than or equal to 5nm, the anode metal 4 is Ni or Ti, the cathode metal 5 is Ni, and the width of the anode metal 4 is 14um to 46um; by changing the thickness of the p-type epitaxial layer 3, the doping concentration and the width and depth of the central contact groove can be optimized between on-resistance and blocking leakage.

所述阳极金属4选择Ni/Ti,目的是形成阳极接触,填充接触槽的同时形成场板结构,场板的长度为5um至15um,目的是降低器件元胞边缘处的电场集中。所述阴极金属5选择Ni,目的是形成阴极欧姆接触。The anode metal 4 is Ni/Ti, the purpose is to form an anode contact, and form a field plate structure while filling the contact groove. The length of the field plate is 5um to 15um, and the purpose is to reduce the electric field concentration at the edge of the device cell. Ni is selected as the cathode metal 5 in order to form a cathode ohmic contact.

如图2所示,本实用新型碳化硅二极管器件的制备方法,具体包括如下步骤:As shown in Figure 2, the preparation method of the silicon carbide diode device of the present invention specifically comprises the following steps:

在n+衬底1上通过外延生长n型漂移层2;growing an n-type drift layer 2 by epitaxy on the n+ substrate 1;

在所述n型漂移层2上通过外延生长p型外延层3;growing a p-type epitaxial layer 3 on the n-type drift layer 2 by epitaxy;

在所述p型外延层3上通过刻蚀形成接触槽;forming contact grooves on the p-type epitaxial layer 3 by etching;

通过电子束蒸发或磁控溅射方法淀积金属,并进行接触退火,形成阴极金属5;Deposit metal by electron beam evaporation or magnetron sputtering method, and perform contact annealing to form cathode metal 5;

通过电子束蒸发或磁控溅射方法淀积金属,光刻形成阳极金属4。The metal is deposited by electron beam evaporation or magnetron sputtering, and the anode metal 4 is formed by photolithography.

所述在所述p型外延层3上通过刻蚀形成接触槽进一步具体为:The formation of contact grooves by etching on the p-type epitaxial layer 3 is further specifically:

在p型外延层表面通过电子束蒸发的方法,蒸发形成厚度为0.3um的金属Ni作为刻蚀掩膜层材料,对该掩膜层材料进行光刻开孔,RIE刻蚀去掉所需开出接触槽之上的金属Ni掩膜层;On the surface of the p-type epitaxial layer, by means of electron beam evaporation, a metal Ni with a thickness of 0.3um is evaporated as the etching mask layer material, and the mask layer material is photolithographically opened, and RIE etching removes the required openings. A metal Ni mask layer above the contact groove;

准备与p型外延厚度相同的陪片,采用ICP干法刻蚀对配片以及p型外延层进行垂直刻蚀,刻蚀至距离p型外延层顶部50nm后停止;Prepare a companion sheet with the same thickness as the p-type epitaxial layer, and use ICP dry etching to vertically etch the companion sheet and the p-type epitaxial layer, and stop the etching until it is 50nm away from the top of the p-type epitaxial layer;

利用浓硫酸双氧水混合液,加热条件下去掉表面的金属;Use the concentrated sulfuric acid hydrogen peroxide mixture to remove the metal on the surface under heating conditions;

对陪片进行SEM观察,确定剩余p型外延层厚度,并结合Deal–Grove模型计算出氧化剩余5nm厚度p型外延层所需时间;Conduct SEM observation on the companion sheet to determine the thickness of the remaining p-type epitaxial layer, and calculate the time required to oxidize the remaining 5nm thick p-type epitaxial layer in combination with the Deal–Grove model;

对p型外延层依照计算所需时间进行氧化形成一氧化层,使用BOE溶液去掉氧化层,最终形成所述接触槽。The p-type epitaxial layer is oxidized according to the time required for calculation to form an oxide layer, and the oxide layer is removed using BOE solution to finally form the contact groove.

所述通过电子束蒸发或磁控溅射淀积阴极金属5,并进行接触退火进一步具体为:在n+衬底1的一面,利用电子束蒸发方法或磁控溅射淀方法淀积金属Ni,在氮气的保护下,进行接触退火,退火时间为2min,退火温度为975℃,可以根据用户需求控制淀积金属的厚度。Depositing the cathode metal 5 by electron beam evaporation or magnetron sputtering, and performing contact annealing is further specifically: depositing metal Ni on one side of the n+ substrate 1 by electron beam evaporation or magnetron sputtering deposition method, Under the protection of nitrogen, contact annealing is carried out, the annealing time is 2min, and the annealing temperature is 975°C. The thickness of the deposited metal can be controlled according to user requirements.

所述通过电子束蒸发或磁控溅射方法淀积金属,光刻形成阳极金属4进一步具体为:利用电子束蒸发方法或磁控溅射淀方法淀积200nm金属Ni或Ti,在氮气保护下进行接触退火,退火时间为2min,退火温度为500℃,可以根据用户需求控制淀积金属的厚度。Depositing metal by means of electron beam evaporation or magnetron sputtering, forming the anode metal 4 by photolithography is further specifically: depositing 200nm metal Ni or Ti by means of electron beam evaporation or magnetron sputtering, and depositing 200nm metal Ni or Ti under the protection of nitrogen. Conduct contact annealing, the annealing time is 2min, and the annealing temperature is 500°C, the thickness of the deposited metal can be controlled according to user requirements.

本实用新型实施例一Embodiment one of the utility model

本实用新型碳化硅二极管器件的制备方法,所述方法包括:The preparation method of the utility model silicon carbide diode device, described method comprises:

S1、在n+衬底1上通过外延生长n型漂移层2;S1, growing an n-type drift layer 2 on an n+ substrate 1 by epitaxy;

S2、在所述n型漂移层2上通过外延生长高掺杂的p型外延层3;S2, growing a highly doped p-type epitaxial layer 3 on the n-type drift layer 2 by epitaxy;

S3、在所述的p型外延层3上,通过刻蚀形成接触槽;S3, on the p-type epitaxial layer 3, forming a contact groove by etching;

S4、在器件背面,通过电子束蒸发或磁控溅射淀积阴极金属5,并进行接触退火;S4, on the back of the device, deposit the cathode metal 5 by electron beam evaporation or magnetron sputtering, and perform contact annealing;

S5、在器件正面,通过电子束蒸发或磁控溅射淀积阳极金属4,光刻形成场板图形。S5. On the front side of the device, an anode metal 4 is deposited by electron beam evaporation or magnetron sputtering, and a field plate pattern is formed by photolithography.

其中所示步骤S3,需要通过刻蚀方法形成接触槽,其底部距离n型漂移层2顶部5nm以下,本实用新型提供一种在现有工艺条件下可行的方法。In the step S3 shown in it, it is necessary to form a contact groove by an etching method, the bottom of which is less than 5nm from the top of the n-type drift layer 2, and the utility model provides a feasible method under the existing process conditions.

如图3至图7所示,首先,在晶片表面通过电子束蒸发的方法,蒸发形成厚度为0.3um的金属Ni作为刻蚀掩膜层材料,对该掩膜层材料进行光刻开孔,RIE刻蚀去掉接触槽之上的金属Ni掩膜层。之后准备相同外延结构的SiC陪片,采用ICP干法刻蚀对主片(主片即为本实用新型所制作的p型外延层)和陪片(即为与p型外延层结构以及厚度一样的SiC,用于工艺验证)进行垂直刻蚀,刻蚀至距离p型外延层3顶部约50nm后停止。接着利用浓硫酸双氧水混合液,加热条件下去掉表面的金属。接着,对刻蚀陪片进行SEM观察,确定剩余p型外延层3厚度,并结合Deal–Grove模型计算出氧化剩余5nmp型外延层3所需时间。最后,对主片依照计算条件进行氧化形成SiO2氧化层6,使用BOE溶液去掉SiO2氧化层6,最终形成所述接触槽。As shown in Figures 3 to 7, first, metal Ni with a thickness of 0.3um is evaporated on the surface of the wafer by electron beam evaporation as the etching mask layer material, and the mask layer material is photolithographically opened. RIE etching removes the metal Ni mask layer above the contact groove. Prepare the SiC accompanying sheet of same epitaxial structure afterwards, adopt ICP dry etching to main sheet (main sheet is the p-type epitaxial layer that the utility model makes) and accompanying sheet (being the same as p-type epitaxial layer structure and thickness) SiC used for process verification) to perform vertical etching, and the etching stops when the distance from the top of the p-type epitaxial layer 3 is about 50 nm. Then use concentrated sulfuric acid and hydrogen peroxide mixture to remove the metal on the surface under heating conditions. Next, SEM observation was carried out on the etching companion to determine the thickness of the remaining p-type epitaxial layer 3 , and the time required to oxidize the remaining 5 nmp-type epitaxial layer 3 was calculated in combination with the Deal-Grove model. Finally, the main sheet is oxidized according to the calculated conditions to form the SiO 2 oxide layer 6, and the SiO 2 oxide layer 6 is removed using a BOE solution to finally form the contact groove.

所述步骤S4,使用金属Ni作为阴极欧姆接触材料,过程包括:翻转晶元,在(1)n+衬底1的背面,利用电子束蒸发的方法沉积200nm金属Ni,在N2气体的保护下,进行接触退火2min,退火温度975℃。The step S4 uses metal Ni as the cathode ohmic contact material, and the process includes: flipping the wafer, and depositing 200nm metal Ni on the back of (1) n+ substrate 1 by electron beam evaporation, under the protection of N2 gas, Conduct contact annealing for 2 minutes at an annealing temperature of 975°C.

所述步骤S5,需要使用阳极金属4Ti/Ni填充接触槽,包括:在晶元的背面,匀胶并坚膜保护背面已形成的欧姆接触。之后翻转晶元,利用电子束蒸发的方法沉积金属Ti/Ni。匀胶、光刻、显影并坚膜后,刻蚀金属形成场板结构。之后在N2气体的保护下,进行肖特基接触退火2min,退火温度500℃。The step S5 needs to use the anode metal 4Ti/Ni to fill the contact groove, including: on the back of the wafer, spread the glue and harden the film to protect the formed ohmic contact on the back. Afterwards, the wafer is turned over, and the metal Ti/Ni is deposited by electron beam evaporation. After coating, photolithography, development and film hardening, metal is etched to form a field plate structure. Afterwards, under the protection of N2 gas, Schottky contact annealing was performed for 2 minutes, and the annealing temperature was 500°C.

虽然以上描述了本实用新型的具体实施方式,但是熟悉本技术领域的技术人员应当理解,我们所描述的具体的实施例只是说明性的,而不是用于对本实用新型的范围的限定,熟悉本领域的技术人员在依照本实用新型的精神所作的等效的修饰以及变化,都应当涵盖在本实用新型的权利要求所保护的范围内。Although the specific embodiments of the present utility model have been described above, those skilled in the art should understand that the specific embodiments we describe are only illustrative, rather than used to limit the scope of the present utility model. Equivalent modifications and changes made by those skilled in the art in accordance with the spirit of the present utility model shall fall within the protection scope of the claims of the present utility model.

Claims (6)

1. a kind of silicon carbide diode device, it is characterised in that:Its structure cell includes:Anode gold is arranged with this from top to bottom Category, p-type epitaxial layer, n-type drift layer, n+ substrates and cathodic metal, the p-type epitaxial layer top are equipped with contact groove, the sun Pole metal bottom is equipped with protrusion, and the contact groove is mutually matched with the protrusion.
2. a kind of silicon carbide diode device as described in claim 1, it is characterised in that:The doping of the n-type drift layer is dense Degree ranging from 2 × 1014cm-3To 1 × 1016cm-3, the thickness of the n-type drift layer is 5um to 200um.
3. a kind of silicon carbide diode device as described in claim 1, it is characterised in that:The doping of the p-type epitaxial layer is dense Degree is more than or equal to 1 × 1019cm-3
4. a kind of silicon carbide diode device as described in claim 1 or 3, it is characterised in that:The thickness of the p-type epitaxial layer Width for 0.2um to 1um, the contact groove is 4um to 16um, and the contact trench bottom is small to n-type drift layer distance from top In equal to 5nm.
5. a kind of silicon carbide diode device as described in claim 1, it is characterised in that:The anode metal is Ni or Ti, The cathodic metal is Ni.
6. a kind of silicon carbide diode device as described in claim 1, it is characterised in that:The width 14um of the anode metal To 46um.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108461549A (en) * 2018-02-12 2018-08-28 泰科天润半导体科技(北京)有限公司 A kind of silicon carbide diode device and preparation method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108461549A (en) * 2018-02-12 2018-08-28 泰科天润半导体科技(北京)有限公司 A kind of silicon carbide diode device and preparation method thereof
CN108461549B (en) * 2018-02-12 2025-01-14 泰科天润半导体科技(北京)有限公司 Silicon carbide diode device and preparation method thereof

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