CN108346688B

CN108346688B - SiC trench junction barrier Schottky diode with CSL transport layer and method of making the same

Info

Publication number: CN108346688B
Application number: CN201810075436.5A
Authority: CN
Inventors: 汤益丹; 刘新宇; 白云; 董升旭; 杨成樾
Original assignee: Institute of Microelectronics of CAS
Current assignee: Institute of Microelectronics of CAS
Priority date: 2018-01-25
Filing date: 2018-01-25
Publication date: 2021-03-02
Anticipated expiration: 2038-01-25
Also published as: CN108346688A

Abstract

The present disclosure provides a SiC trench junction barrier Schottky diode with a CSL transport layer and a fabrication method thereof, including a plurality of first CSL current transport layers and a plurality of second CSL current transport layers; a first There is a selective P ⁺⁺ -SiC region ring on the CSL current transport layer, a corresponding groove structure on the P ⁺⁺ -SiC region ring, and a Schottky contact electrode on the groove structure; the second CSL current transport layer The Schottky contact electrode is directly on this layer; the periphery of the Schottky contact electrode is provided with a plurality of P ⁺ -SiC guard rings and an N ⁺ field stop ring; the edge of the Schottky contact electrode is provided with a _SiO2 passivation layer. The present disclosure adopts the integrated technology of groove technology and P ⁺⁺ deep implantation to reduce the electric field on the chip surface, reduce the lowering effect of the Schottky barrier, suppress the leakage current, and optimize the CSL transmission layer structure to greatly increase the current conduction capability, The temperature dependence and sensitivity of the electrical characteristics of the device are reduced, and the high temperature and high current SiC power electronic device is obtained under the condition that the reverse breakdown characteristic is not affected, and the process is simple and repeatable.

Description

SiC trench junction barrier Schottky diode with CSL transport layer and manufacturing method thereof

Technical Field

The disclosure belongs to the technical field of semiconductor devices, relates to a SiC Trench junction barrier Schottky diode (Trench-JBS) with a CSL transport layer and a manufacturing method thereof, and particularly relates to a Schottky diode with a forward current channel and a P channel between Trench⁺⁺N-type ion implantation is carried out under implantation to realize N⁺SiC TJBS structure of CSL transport layer.

Background

The silicon carbide material has excellent physical and electrical characteristics, has the unique advantages of wide forbidden band width, high thermal conductivity, large saturation drift velocity, high critical breakdown electric field and the like, becomes an ideal semiconductor material for manufacturing high-power, high-frequency, high-temperature-resistant and anti-radiation devices, and has wide application prospect in military and civil fields. Power electronic devices made of SiC materials have become one of the hot devices and leading-edge research fields in the semiconductor field at present.

In the SiC diode, a trench junction barrier Schottky diode is based on a junction barrier Schottky structure (JBS), and the trench structure is utilized to further push a pn junction barrier to the inside of a device, so that the Schottky barrier lowering effect on the surface of the device under high reverse blocking voltage is fully reduced, and the limitation of reverse leakage current on the highest blocking voltage is eliminated. The method has great advantages in the field of high-speed and high-voltage-resistant SiC diodes. However, when the Trench structure is introduced, the length of the conductive channel is further increased compared with the JBS structure, so that the forward resistance is increased, and the forward current is reduced under the same forward voltage. Therefore, the conventional TJBS structure sacrifices the forward on-resistance while improving the reverse blocking capability.

BRIEF SUMMARY OF THE PRESENT DISCLOSURE

Technical problem to be solved

The disclosure provides a SiC trench junction barrier Schottky diode with a CSL transport layer and improved forward characteristics and a manufacturing method thereof aiming at the condition that the forward on-resistance of the traditional TJBS structure is large.

(II) technical scheme

The present disclosure provides a SiC trench junction barrier schottky diode, comprising: n is a radical of⁺⁺-a SiC substrate; n is a radical of^--an epitaxial layer of SiC formed on said N⁺⁺-a front side of a SiC substrate; said N is⁺An N-type ohmic contact is arranged on the back surface of the SiC substrate; further comprising: a CSL current transport layer formed on the N^--on the SiC epitaxial layer, comprising: the first CSL current transport layers and the second CSL current transport layers are arranged at intervals; selective P on the first CSL current transport layer⁺⁺-ring of SiC regions, P⁺⁺A groove structure corresponding to the SiC region ring is arranged on the SiC region ring, and a Schottky contact electrode is arranged on the groove structure; a Schottky contact electrode is directly arranged on the second CSL current transport layer; multiple P electrodes are arranged around the Schottky contact electrode⁺-SiC guard ring and one N⁺A field stop ring; SiO is arranged at the edge of the Schottky contact electrode₂A passivation layer; in SiO₂A field plate is arranged above the passivation layer.

In some embodiments of the present disclosure, the doping concentration of the CSL current transport layer is 8E16cm^-3-1E18cm^-3The implantation depth is more than 0.5um and less than N^--SiC epitaxial layer thickness; and/or a plurality of first CSL current transport layers, second CSL current transport layers and N⁺The field stop rings are implanted together.

In some embodiments of the present disclosure, the groove width of the groove structure is 1um to 8um, the groove distance is 1um to 10um, and the groove depth is 0.5um to 1 um.

In some embodiments of the disclosure, the P⁺⁺The doping concentration of the-SiC region ring is higher than P⁺-doping concentrations of the SiC region ring and the first CSL current transport layer; and/or the schottky contact electrode is formed of Mo, Al, or a lower barrier metal.

The invention provides a manufacturing method of a SiC groove junction barrier Schottky diode, which comprises the following steps: providing N⁺-SiC substrate at N⁺-SiC substrate front side growth N^-Epitaxial layer of SiC in N^--selectively etching a recess in the epitaxial layer of SiC; in N^-Manufacturing a CSL current transport layer and N on an-SiC epitaxial layer⁺A field stop ring; p is formed on the N-SiC epitaxial layer and injected below the groove⁺⁺Region and P⁺A field limiting ring region; forming a back ohmic contact on the back of the N + -SiC substrate; depositing SiO on the surface of N-SiC epitaxial layer₂And forming a Schottky window, forming a Schottky contact electrode and a field plate, and growing an encapsulation thickened metal.

In some embodiments of the present disclosure, said is at N⁺-SiC substrate front side growth N^--the SiC epitaxial layer comprises: at a doping concentration of 10¹⁸～10¹⁹cm^-3Horizontal N⁺-epitaxial N of the front side of the SiC substrate by means of a CVD process^--a SiC layer; said N is^-Doping level of-SiC epitaxial layer is 5X 10¹⁵cm^-3～2×10¹⁶cm^-3The thickness is 5 to 100 μm.

In some embodiments of the present disclosure, said is at N^--selectively etching a recess in the SiC epitaxial layer comprises: by using SiO₂、Si₃N₄Etching the mask material by photoetching and patterning, etching to obtain a selective groove window by dry method, and forming a selective groove structure by dry etching process using HBr and Cl as etching gas₂、SF₆、O₂One or a mixture thereof.

In some embodiments of the present disclosure, said is at N^-Manufacturing a CSL current transport layer and N on an-SiC epitaxial layer⁺The field stop ring includes: in N^-Manufacturing an insulating medium on the SiC epitaxial layer to be used as a barrier layer for N ion injection; injecting N ions at the temperature of 200-500 ℃; the energy of the N ions is any combination between 40kev and 550 kev; the total implantation dose of the N ion energy is 4 multiplied by 10¹²cm^-2～1×10¹⁴cm^-2To (c) to (d); performing high-temperature activation annealing after N ion implantation in an inert gas atmosphere, wherein the temperature range of the activation annealing is 1300-1700 ℃, and a CSL current transport layer and N are formed⁺A field stop ring.

In some embodiments of the present disclosure, at N^-P is formed by one-time implantation on the SiC epitaxial layer⁺⁺Region and P⁺A field limiting ring region comprising: adopting an insulating dielectric material to manufacture a selective ion implantation masking layer; injecting Al ions at 200-500 deg.c; the P is⁺⁺The region implanted ions are Al ions, the implantation energy is 50 to 450kev, and the total implanted dose is 1 x 10¹⁴cm^-2～1×10¹⁵cm^-2To (c) to (d); the P is⁺The field limiting ring region is implanted with Al ions at an implantation energy of 50-450 kev and a total implantation dose of 1 × 10¹⁴cm^-2～8×10¹⁴cm^-2To (c) to (d); performing high-temperature activation annealing in inert gas atmosphere to form P⁺⁺Region and P⁺A field limiting ring region.

In some embodiments of the disclosure, the N⁺-the SiC substrate backside forming a backside ohmic contact; the method comprises the following steps: in N⁺⁺Back-side growth of Ni metal on SiC substrates; performing rapid thermal annealing at 900-1000 deg.C in vacuum or inert gas atmosphere to form N⁺-ohmic contact of SiC.

(III) advantageous effects

According to the technical scheme, the method has the following beneficial effects:

(1) by adopting a JBS groove structure and a CSL transport layer structure, metal with low potential barrier can be flexibly selected as Schottky contact, and the increase of reverse leakage current is avoided while the forward conduction capability is greatly improved;

(2) multiple first and second CSL current transport layer structures and N are formed by one-time N-type ion implantation⁺The field stop ring reduces the complexity of the process and reduces the possibility of introducing adverse influence factors by two or more times of ion implantation processes;

(3) when the device works in the forward direction, the CSL transport layer structure below the Schottky metal can greatly improve the current conduction capability and reduce the temperature dependence and sensitivity of the electrical characteristics of the device; at the same time, the groove and P⁺⁺The CSL transport layer structure under the-SiC area ring is matched with high-concentration P⁺⁺Ring of SiC regions corresponding to N⁺-SiC region guard rings to effectively disperse P⁺⁺The electric field distribution at the edge of the-SiC area ring plays a good role in protection during reverse breakdown.

Drawings

Fig. 1 is a cross-sectional view of a SiC trench junction barrier schottky diode with a CSL transport layer according to the present disclosure;

fig. 2 to 9 are schematic diagrams of steps of a method of fabricating a SiC trench junction barrier schottky diode with a CSL transport layer according to the present disclosure; FIG. 2 (a) shows N⁺SiC lining, N is shown in (b) of FIG. 2⁺-SiC substrate front side growth N^--an epitaxial layer of SiC; FIG. 3 (a) shows N^-Deposition of SiO on epitaxial layer of-SiC₂Layer, shown in FIG. 3 (b) at N^--selectively etching a recess in the epitaxial layer of SiC; FIG. 4 (a) shows the removal of the CSL current transport layer and N by etching⁺SiO on the window of the field stop ring₂FIG. 4 (b) shows the formation of a CSL current transport layer and N⁺A field stop ring; FIG. 5 (a) shows a transition at N^-Redepositing SiO on the-SiC epitaxial layer₂Layer as a separationA sub-implantation mask, and (b) of FIG. 5 shows the formation of P⁺⁺A region-selective implantation window; FIG. 6 (a) shows a transition at N^-Redepositing SiO on the-SiC epitaxial layer₂The layer serves as an ion implantation mask, and the formation of P is shown in FIG. 6 (b)⁺Selectively injecting a window into the field limiting ring region;

fig. 10 is a flow chart of a method of fabricating the disclosed SiC trench junction barrier schottky diode with a CSL transport layer.

Detailed Description

The SiC Schottky diode with the CSL transport layer not only reduces the electric field on the surface of a chip by adopting a groove technology and a P + + deep injection comprehensive technology, reduces the reduction effect of a Schottky barrier, inhibits leakage current, greatly increases the current conduction capability by optimizing and matching a CSL transport layer structure on the basis, reduces the temperature dependence and sensitivity of the electrical characteristics of the device, obtains a high-temperature large-current SiC power electronic device under the condition that the reverse breakdown characteristic is not influenced, has simple and repeatable process, and can be applied to the fields of high-efficiency and energy-saving new energy vehicles, urban rail transit, photovoltaic, wind power, industrial motors and the like.

The technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the embodiments and the drawings in the embodiments. It is to be understood that the described embodiments are merely illustrative of some, and not restrictive, of the embodiments of the disclosure. All other embodiments, which can be derived by a person skilled in the art from the embodiments disclosed herein without making any creative effort, shall fall within the protection scope of the present disclosure.

The embodiment of the present disclosure provides a structure diagram of a SiC trench junction barrier schottky diode having a CSL transport layer, and as shown in fig. 1, the SiC trench junction barrier schottky diode includes: n is a radical of⁺-SiC substrate, N^--SiC epitaxial layer, N-type ohmic contact layer, CSL current transport layer, P⁺⁺-SiC region ring, P⁺-SiC guard ring, N⁺Field stop ring, Schottky contact electrode, SiO₂A passivation layer and a field plate.

N^-An epitaxial layer of-SiC formed on N⁺-a front side of a SiC substrate, aThe N-type ohmic contact layer is formed on N⁺-a SiC substrate back side.

A CSL current transport layer is formed on the N^--on the SiC epitaxial layer, two parts: the first CSL current transport layers and the second CSL current transport layers are arranged at intervals.

Selective P on the first CSL current transport layer⁺⁺-ring of SiC regions, P⁺⁺The SiC region ring is provided with a plurality of grooves with corresponding intervals, and Schottky contact electrodes are arranged on the groove structure. Directly on the second CSL current transport layer is a schottky contact electrode.

Multiple P electrodes are arranged around the Schottky contact electrode⁺-SiC guard ring and one N⁺A field stop ring.

The edge of the Schottky contact electrode is provided with SiO₂Passivation layer, SiO₂A passivation layer covering the P⁺-SiC guard ring and one N⁺A field stop ring. In SiO₂A field plate is arranged above the passivation layer.

According to the SiC trench junction barrier Schottky diode with the CSL transport layers, the two CSL current transport layers on the N-SiC epitaxial layer can effectively expand large current, a current conduction path is optimized, a large current crowding effect is prevented, and large current conduction capacity is improved; selective P on the first CSL current transport layer⁺⁺-ring of SiC regions, P⁺⁺On the-SiC region ring are grooves with several corresponding intervals as P for reducing the electric field at the Schottky interface⁺⁺-SiC plus recess composite protective structure; the CSL current transport layer and the groove structure are provided with Schottky contacts, Schottky contact metal is formed by low Schottky barrier metal, and the grooves are filled with the low Schottky barrier metal, so that the turn-on voltage is reduced, and the Schottky area is increased; the periphery of the Schottky contact is provided with a plurality of P⁺-a SiC guard ring as a termination protection structure for the diode device.

When the device works in the forward direction, the first CSL current transport layer and the second CSL current transport layer can greatly increase the current conduction capability and reduce the temperature dependence and sensitivity of the electrical characteristics of the device; device for cleaning the skinWhen the parts work in reverse, the groove structure and P⁺⁺The SiC area ring is combined, so that the surface barrier lowering effect of the device can be reduced; at the same time, the P⁺⁺A first CSL current transport layer (corresponding to N) is arranged below the-SiC region ring⁺-SiC region guard rings) to effectively disperse P⁺The electric field distribution at the edge of the-SiC area ring plays a good role in protection during reverse breakdown.

Another embodiment of the present disclosure provides a method for manufacturing a SiC trench junction barrier schottky diode having a CSL transport layer, as shown in fig. 10, the method includes the following steps:

providing N⁺-SiC substrate at N⁺-SiC substrate front side growth N^-Epitaxial layer of SiC in N^--selectively etching a recess in the epitaxial layer of SiC.

In N^-Manufacturing a CSL current transport layer and N on an-SiC epitaxial layer⁺Field stop ring

In N^-On the epitaxial layer of SiC, forming P⁺Field limiting ring region and P with groove⁺⁺And (4) a region.

N⁺The back side of the SiC substrate forms a back ohmic contact,

in N^-SiO deposited on the surface of the-SiC epitaxial layer₂And forming a Schottky window, forming a Schottky contact electrode and a field plate, and growing an encapsulation thickened metal.

Specifically, the manufacturing method includes:

step 1: providing N⁺A SiC substrate, as shown in (a) of FIG. 2, at N⁺-SiC substrate front side growth N^-An epitaxial layer of SiC as shown in (b) of FIG. 2.

At a doping concentration of 10¹⁸～10¹⁹cm^-3Horizontal N⁺-epitaxial N of the front side of the SiC substrate by means of a CVD process^--a layer of SiC, said N^-Doping level of-SiC epitaxial layer is 5X 10¹⁵cm^-3～2×10¹⁶cm^-3The thickness is 5 to 100 μm, and the doping level is preferably 1 × 10¹⁶cm^-3And the thickness is 11 um.

Step 2: in N^--SiC epitaxyThe layer is selectively etched to form a recess as shown in figure 3.

As shown in FIG. 3 (a), in N^-Deposition of SiO on epitaxial layer of-SiC₂And (3) a layer. Preferably, the SiO is treated by PECVD process₂The layers are deposited. Preferably, SiO₂The thickness of the layer is

Subsequently, as shown in FIG. 3 (b), in SiO₂Spin-coating photoresist on the layer, and etching SiO by photolithography and dry method₂Technique, is realized in N^-And selectively etching a groove on the SiC epitaxial layer, wherein the depth of the groove is 1 mu m. The groove width of the groove is 1um-8um, the groove distance is 1um-10um, and the groove depth is 0.5um-1 um. By means of SiO₂、Si₃N₄Etching the mask material by photoetching and patterning, dry etching to obtain a selective groove window, and forming a selective groove structure by dry etching process using HBr and Cl as etching gas₂One or any mixture of them, if necessary, SF may be added₆、O₂And the like.

And step 3: in N^-Manufacturing a CSL current transport layer and N on an-SiC epitaxial layer⁺Field stop loops as shown in fig. 4.

As shown in fig. 4 (a), in completion of N^-After grooves are selectively etched on the-SiC epitaxial layer, the CSL current transport layer and N are removed by corrosion by adopting a photoetching technology⁺SiO on the window of the field stop ring₂。

As shown in FIG. 4 (b), SiO remains₂As an ion implantation mask, N ion box type implantation with different energy and dosage combinations is performed in an environment with the temperature of 500 ℃ to form a CSL current transport layer and N⁺Field stop ring with doping concentration of 8E16cm^-3The implantation depth was 1 μm.

Specifically, N is first used^-Preparing insulating medium SiO on-SiC epitaxial layer₂As a barrier layer for N ion implantation.

Injecting N ions at 200-500 deg.C.

The N ion energyThe amount is any combination between 40kev and 550 kev; the total implantation dose of the energy is 4 x 10¹²cm^-2～1×10¹⁴cm^-2In the meantime.

Performing high-temperature activation annealing after N ion implantation in an inert gas atmosphere, wherein the temperature range of the activation annealing is 1300-1700 ℃, and N is formed⁺-a SiC CSL current transport layer and a field stop ring.

And 4, step 4: injecting and forming a P + + region and P below the groove on the N-SiC epitaxial layer⁺A field limiting ring region.

As shown in FIG. 5 (a), in N^-Redepositing SiO on the-SiC epitaxial layer₂The layer serves as an ion implantation mask. Preferably, the SiO is treated by PECVD process₂The layer is deposited to a thickness of

Subsequently, as shown in FIG. 5 (b), in SiO₂Spin-coating photoresist on the layer, and etching SiO by photolithography and dry method₂Technique of forming P⁺⁺Carrying out box-type implantation of Al ions with different energy and dosage combinations in an environment with the temperature of 500 ℃ and with the doping concentration of 2E19cm^-3The depth of implantation was 0.5 μm.

As shown in FIG. 6 (a), in N^-Redepositing SiO on the-SiC epitaxial layer₂The layer serves as an ion implantation mask. Preferably, the SiO is treated by PECVD process₂The layer is deposited to a thickness of

Subsequently, as shown in FIG. 6 (b), in SiO₂Spin-coating photoresist on the layer, and forming P by photoetching and dry etching SiO2 technology⁺Selectively implanting window in field limiting ring region, and performing box-type implantation of Al ions with different energy and dosage combinations in an environment at 500 deg.C to obtain a doping concentration of 8E18cm^-3The depth of implantation was 0.5 μm.

And finally, performing activation annealing after the ion implantation is completed, wherein the activation annealing is used for activating the ion implantation area in the steps 3, 4 and 5, the activation annealing temperature is 1700 ℃, and the activation annealing time is 30 min.

This step may also be N^-P is formed by one-time implantation on the SiC epitaxial layer⁺⁺Region and P⁺A field limiting ring region comprising:

the selective ion implantation masking layer is made of an insulating dielectric material, which may be SiO₂One or more of polysilicon and amorphous silicon;

injecting Al ions at 200-500 deg.c;

the P is⁺⁺Injecting ions into the SiC region ring as Al ions, wherein the injection energy is 50 to 450 kev; the total implant dose of the implant is 1 × 10¹⁴cm^-2～1×10¹⁵em^-2In the meantime.

The P is⁺Injecting ions into the SiC protective ring to be Al ions, wherein the injection energy is 50 to 450 kev; the total implant dose of the implant is 1 × 10¹⁴cm^-2～8×10¹⁴cm^-2In the meantime.

Carrying out high-temperature activation annealing after Al ion implantation in an inert gas atmosphere, wherein the temperature range of the activation annealing is 1600-1850 ℃, and P is formed⁺⁺A SiC region ring and a plurality of P + -SiC guard rings.

And 5: n is a radical of⁺The back side of the-SiC substrate forms a back ohmic contact, as shown in fig. 7.

By sputtering technique on N⁺Growing Ni metal on the back of the-SiC substrate to a thickness

Performing rapid thermal annealing at 900-1000 deg.C in vacuum or inert gas atmosphere to form N⁺-ohmic contact of SiC. Preferably, a rapid thermal anneal is performed at 950 ℃ for 5min in a nitrogen atmosphere to form ohmic contacts.

Step 6: in N^-SiO deposited on the surface of the-SiC epitaxial layer₂A schottky window is formed as shown in fig. 8.

By thermal oxidation process on SiO₂Overgrowth of

SiO2, and depositing the sample surface with the thickness of

SiO of (2)₂. Etching SiO by photolithography₂And opening holes to leave Schottky windows.

And 7: a schottky contact electrode and field plate are formed and an encapsulating thickened metal is grown as shown in fig. 9.

Growth of Schottky metal Ti to a thickness

And performing rapid thermal annealing for 5min at 500 ℃ in a nitrogen atmosphere by using a rapid thermal annealing process to form the Schottky contact electrode and the field plate. Finally, 4 μm packaging thickened metal Al is grown by adopting a metal evaporation process.

The Schottky metal and the packaging thickening metal can also be Al metal, Schottky metal 2000A, and the packaging thickening is 4 mu m.

In the manufacturing method of the embodiment of the disclosure, the CSL current transport layer is formed not by epitaxy, but by N-type ion implantation, including N-ion and P-ion implantation, from the schottky electrode, the trench, and the P⁺⁺The ring of SiC regions is downward in a Gaussian implantation profile with a maximum concentration not exceeding 20 times the substrate concentration, preferably with a doping concentration of 8E16cm^-3-1E18cm^-3To (c) to (d); the injection depth is more than 0.5um and less than the thickness of the N-SiC epitaxial layer.

Said N is⁺The field stop ring and the CSL current transport layer are injected together, so that additional processes are not needed, the process is simple, and the process can be repeated. The P is⁺⁺The ring of-SiC regions not being of P⁺-SiC guard rings implanted together with a doping concentration higher than P⁺SiC guard rings, the doping concentration of which must also be higher than P⁺⁺First CSL current transport under and corresponding to the-SiC region ringThe doping concentration of the layer.

The schottky contact is formed by a low-barrier schottky metal low-temperature annealing process, the metal of the schottky contact can be formed by Mo, Al or lower barrier metal, and the turn-on voltage of the schottky contact is about 0.8V or below 0.8V. The low-temperature annealing process can enable the contact between metal and SiC to be between Schottky contact and ohmic contact and is biased to Schottky-like contact of the Schottky contact, so that the forward conduction capability can be greatly improved, the surface electric field of the SiC can be greatly reduced due to the existence of the groove, the reverse cut-off capability of the device can be guaranteed, the temperature range of the low-temperature annealing process is 400-900 ℃, and the time is 2-30 min.

Up to this point, the present embodiment has been described in detail with reference to the accompanying drawings. From the above description, those skilled in the art should clearly recognize the present disclosure.

It is to be noted that, in the attached drawings or in the description, the implementation modes not shown or described are all the modes known by the ordinary skilled person in the field of technology, and are not described in detail. In addition, the above definitions of the various elements are not limited to the specific structures, shapes or modes mentioned in the embodiments, and those skilled in the art may easily modify or replace them, for example:

(1) directional phrases used in the embodiments, such as "upper", "lower", "front", "rear", "left", "right", etc., refer only to the orientation of the drawings and are not intended to limit the scope of the present disclosure;

(2) the embodiments described above may be mixed and matched with each other or with other embodiments based on design and reliability considerations, i.e. technical features in different embodiments may be freely combined to form further embodiments.

The above-mentioned embodiments are intended to illustrate the objects, aspects and advantages of the present disclosure in further detail, and it should be understood that the above-mentioned embodiments are only illustrative of the present disclosure and are not intended to limit the present disclosure, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present disclosure should be included in the scope of the present disclosure.

Claims

1. A SiC trench junction barrier schottky diode having a CSL transport layer structure, comprising:

N⁺⁺-a SiC substrate;

N^--an epitaxial layer of SiC formed on said N⁺⁺-a front side of a SiC substrate;

said N is⁺⁺An N-type ohmic contact is arranged on the back surface of the SiC substrate;

the method is characterized in that:

further comprising: a CSL current transport layer formed on the N^--on the SiC epitaxial layer, comprising: the first CSL current transport layers and the second CSL current transport layers are arranged at intervals;

selective P on the first CSL current transport layer⁺⁺-ring of SiC regions, P⁺⁺A groove structure corresponding to the SiC region ring is arranged on the SiC region ring, and a Schottky contact electrode is arranged on the groove structure; a Schottky contact electrode is directly arranged on the second CSL current transport layer;

multiple P electrodes are arranged around the Schottky contact electrode⁺-SiC guard ring and one N⁺A field stop ring;

the doping concentration of the CSL current transport layer is 8E16cm^-3-1E18cm^-3The implantation depth is more than 0.5um and less than N^--SiC epitaxial layer thickness; and/or the presence of a gas in the gas,

a plurality of first CSL current transport layers, a plurality of second CSL current transport layers and N⁺The field stop rings are injected together;

SiO is arranged at the edge of the Schottky contact electrode₂A passivation layer;

in SiO₂A field plate is arranged above the passivation layer.

2. The SiC trench junction barrier schottky diode of claim 1 wherein:

groove structure's groove width is between 1um-8um, and the groove interval is between 1um-10um, and the groove depth is between 0.5um-1 um.

3. The SiC trench junction barrier schottky diode of claim 1 wherein:

the P is⁺⁺The doping concentration of the-SiC region ring is higher than P⁺-doping concentrations of the SiC guard ring and the first CSL current transport layer; and/or the presence of a gas in the gas,

the schottky contact electrode is formed of Mo, Al, or a lower barrier metal.

4. A method for manufacturing a SiC trench junction barrier Schottky diode is characterized by comprising the following steps:

providing N⁺⁺-SiC substrate at N⁺⁺-SiC substrate front side growth N^-Epitaxial layer of SiC in N^--selectively etching a recess in the epitaxial layer of SiC;

in N^-Manufacturing a CSL current transport layer and N on an-SiC epitaxial layer⁺A field stop ring;

in N^-P is formed by implantation on the epitaxial layer of SiC and under the groove⁺⁺Region and P⁺A field limiting ring region;

N⁺⁺-the SiC substrate backside forming a backside ohmic contact;

5. The method of claim 4, wherein said at N is⁺⁺-SiC substrate front side growth N^--the SiC epitaxial layer comprises:

at a doping concentration of 10¹⁸～10¹⁹cm^-3Horizontal N⁺⁺Front side of a-SiC substrateEpitaxy of N by CVD process^--a SiC layer; said N is^-Doping level of-SiC epitaxial layer is 5X 10¹⁵cm^-3～2×10¹⁶cm^-3The thickness is 5 to 100 μm.

6. The method of claim 4, wherein said at N is^--selectively etching a recess in the SiC epitaxial layer comprises:

by means of SiO₂、Si₃N₄Etching the mask material by photoetching and patterning, etching to obtain a selective groove window by dry method, and forming a selective groove structure by dry etching process using HBr and Cl as etching gas₂、SF₆、O₂One or a mixture thereof.

7. The method of claim 4, wherein said at N is^-Manufacturing a CSL current transport layer and N on an-SiC epitaxial layer⁺The field stop ring includes:

in N^-Manufacturing an insulating medium on the SiC epitaxial layer to be used as a barrier layer for N ion injection;

injecting N ions at the temperature of 200-500 ℃;

the energy of the N ions is any combination between 40kev and 550 kev; the total implantation dose of the N ion energy is 4 multiplied by 10¹²cm^-2～1×10¹⁴cm^-2To (c) to (d);

performing high-temperature activation annealing after N ion implantation in an inert gas atmosphere, wherein the temperature range of the activation annealing is 1300-1700 ℃, and a CSL current transport layer and N are formed⁺A field stop ring.

8. The method of claim 4, wherein N is^-P is formed by one-time implantation on the SiC epitaxial layer⁺⁺Region and P⁺A field limiting ring region comprising:

adopting an insulating dielectric material to manufacture a selective ion implantation masking layer;

injecting Al ions at 200-500 deg.c;

the P is⁺⁺The region implanted ions are Al ions, the implantation energy is 50 to 450kev, and the total implanted dose is 1 x 10¹⁴cm^-2～1×10¹⁵cm^-2To (c) to (d);

the P is⁺The field limiting ring region is implanted with Al ions at an implantation energy of 50-450 kev and a total implantation dose of 1 × 10¹⁴cm^-2～8×10¹⁴cm^-2To (c) to (d);

performing high-temperature activation annealing in inert gas atmosphere to form P⁺⁺Region and P⁺A field limiting ring region.

9. The method of claim 4, wherein N is⁺⁺-the SiC substrate backside forming a backside ohmic contact; the method comprises the following steps:

in N⁺⁺Back-side growth of Ni metal on SiC substrates;

performing rapid thermal annealing at 900-1000 deg.C in vacuum or inert gas atmosphere to form N⁺⁺-ohmic contact of SiC.