CN109461768A - A kind of SiC junction barrel Schottky diode and its manufacturing method - Google Patents

Abstract

The invention relates to a SiC junction barrier Schottky diode and a manufacturing method thereof, wherein the SiC junction barrier Schottky diode comprises: a first conductivity type SiC substrate layer, a low-doped first conductivity type epitaxial layer, a highly doped first conductivity type epitaxial layer, a plurality of second conductivity type doped regions, the depth of the second conductivity type doped regions is greater than the thickness of the highly doped first conductivity type epitaxial layer, the first electrode and the second electrode. In the embodiment of the present invention, the potential barrier width is reduced by adjusting the surface doping concentration, so that the potential barrier of the diode is reduced, and the effective potential barrier height of the metal-semiconductor contact is changed by different doping concentrations, thereby reducing the potential barrier width and making the free path Smaller electrons can also penetrate the potential barrier, and the forward tunneling current increases, which is equivalent to reducing the on-resistance, so the diode can be turned on with a smaller voltage.

Description

A SiC junction barrier Schottky diode and its manufacturing method

technical field

The invention belongs to the technical field of manufacturing methods of power devices, in particular to a SiC junction barrier Schottky diode and a manufacturing method thereof.

Background technique

Silicon carbide metal oxide semiconductor field effect transistor (MOSFET) is a widely used silicon carbide power device. Therein, the control signal is provided to the gate electrode, which is separated from the semiconductor surface by an intervening insulator, such as silicon dioxide. Current conduction occurs through transport of majority carriers without the need for minority carrier injection during bipolar transistor operation. Silicon carbide MOSFETs can provide a very large safe operating area, and multiple cell structures can be used in parallel.

For an ideal Schottky barrier, the barrier height is determined by the metal-metal-semiconductor interface properties, independent of doping. Often a Schottky barrier is formed on a given semiconductor, such as n-type or p-type SiC, with only a limited number of barrier heights to choose from. Due to the limitation of the height of the potential barrier, the electron penetration rate is low, which is equivalent to increasing the on-resistance, making the on-voltage of the diode higher.

Therefore, how to reduce the turn-on voltage of the diode is a hot research problem for those skilled in the art.

SUMMARY OF THE INVENTION

In order to solve the above problems existing in the prior art, the present invention provides a SiC junction barrier Schottky diode and a manufacturing method thereof. The specific implementation method is as follows:

An embodiment of the present invention provides a SiC junction barrier Schottky diode, including:

a first conductivity type SiC substrate layer, the first conductivity type SiC substrate layer including opposing first and second surfaces; wherein,

A low-doped first conductivity type epitaxial layer located on the first surface of the first conductivity type SiC substrate layer, wherein the low-doped first conductivity type epitaxial layer has a doping concentration smaller than that of the first conductivity type Doping concentration of SiC substrate layer;

a highly doped first conductivity type epitaxial layer located on the low doped first conductivity type epitaxial layer;

A plurality of doped regions of the second conductivity type extend from the surface of the highly doped first conductivity type epitaxial layer away from the first conductivity type SiC substrate layer into the highly doped first conductivity type epitaxial layer, and the the depth of the second conductive type doped region is greater than the thickness of the highly doped first conductive type epitaxial layer;

a first electrode, disposed on the upper surface of the second conductive type doped region and the highly doped first conductive type epitaxial layer;

The second electrode is disposed on the second surface of the first conductive type SiC substrate layer.

In a specific embodiment, it includes: the first conductivity type is N-type, and the second conductivity type is P-type.

In a specific embodiment, it includes: the first conductivity type is P-type, and the second conductivity type is N-type.

In a specific embodiment, the second conductive type doped region extends to the low-doped first conductive type epitaxial layer by 5-30 μm.

In a specific embodiment, the doped region of the second conductivity type is a ring-shaped or strip-shaped structure.

Another embodiment of the present invention provides a method for manufacturing a SiC junction barrier Schottky diode, including:

Step 1: providing a SiC substrate of the first conductivity type;

Step 2: generating a low-doped epitaxial layer of the first conductivity type on the upper surface of the SiC substrate of the first conductivity type;

Step 3: generating a highly doped epitaxial layer of the first conductivity type on the low-doped epitaxial layer of the first conductivity type;

Step 4: Implant a plurality of P-type highly doped regions from the side of the first conductivity type highly doped epitaxial layer away from the first conductivity type SiC substrate, the depth of the P-type highly doped regions greater than the thickness of the highly doped epitaxial layer of the first conductivity type;

Step 5: depositing a carbon film protective layer on the upper surface of the second conductivity type doped region and the highly doped first conductivity type epitaxial layer;

Step 6: Annealing;

Step 7: removing the carbon film protective layer, and depositing a first electrode on the upper surface of the second conductivity type doped region and the highly doped first conductivity type epitaxial layer;

A second electrode is deposited on the lower surface of the SiC substrate of the first conductivity type.

In a specific embodiment, the doping concentration of the low-doped epitaxial layer of the first conductivity type is in the order of 10 ¹⁵ atoms/cm ³ ;

The doping concentration of the highly doped epitaxial layer of the first conductivity type is in the order of 10 ¹⁶ atoms/cm ³ ;

The implantation concentration of the P-type highly doped region is in the order of 10 ¹⁸ atoms/cm ³ .

Another embodiment of the present invention provides a method for manufacturing a SiC junction barrier Schottky diode, including:

Step 1: generating a low-doped epitaxial layer of the first conductivity type on the SiC substrate of the first conductivity type;

Step 2: performing ion implantation into the low-doped epitaxial layer of the first conductivity type to form a first doped layer, and the doping concentration of the first doped layer is greater than that of the low-doped epitaxial layer of the first conductivity type the doping concentration of the layer;

Step 3: injecting p-type high doping into the first doping layer, the depth of the p-type high doping is greater than the thickness of the first doping layer;

Step 4: depositing a carbon film protective layer on the upper surface of the second conductivity type doped region and the highly doped first conductivity type epitaxial layer;

Step 5: Annealing;

Step 6: removing the carbon film protective layer, and depositing a first electrode on the upper surface of the second conductivity type doped region and the highly doped first conductivity type epitaxial layer;

A second electrode is deposited on the lower surface of the SiC substrate of the first conductivity type.

In a specific embodiment, the doping concentration of the low-doped epitaxial layer of the first conductivity type is in the order of 10 ¹⁵ atoms/cm ³ ;

The implantation concentration of the doping concentration of the first doping layer is in the order of 10 ¹⁶ atoms/cm ³ ;

The implantation concentration of the p-type high doping is in the order of 10 ¹⁸ atoms/cm ³ .

Compared with the prior art, the beneficial effects of the present invention:

The invention adopts a SiC junction barrier Schottky diode with a highly doped thin layer on the surface, and its Schottky potential barrier is lowered, the forward turn-on voltage and the specific on-resistance are lowered, and the reverse leakage current is not greatly affected. , and by adding surface shallow ion implantation or thin epitaxy, precise control of concentration or dose can accurately change the effective barrier height between metal and semiconductor.

Description of drawings

1 is a schematic structural diagram of a SiC junction barrier Schottky diode provided by the present invention;

2 is a flowchart of a method for manufacturing a SiC junction barrier Schottky diode provided by the present invention;

FIG. 3 is a flowchart of another manufacturing method of the SiC junction barrier Schottky diode provided by the present invention.

Detailed ways

The present invention will be described in further detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

Example 1

Referring to the drawings, FIG. 1 is a schematic structural diagram of a SiC junction barrier Schottky diode provided by the present invention; FIG. 2 is a flowchart of a manufacturing method of a SiC junction barrier Schottky diode provided by the present invention; A flowchart of another manufacturing method of the SiC junction barrier Schottky diode provided by the invention.

A Schottky barrier is usually formed on a given semiconductor (such as n-type or p-type SiC), and there are only a limited number of barrier heights to choose from. Affected by the barrier height, the turn-on voltage of SiC diodes is large. , in order to solve this technical problem, the present invention proposes an idea of introducing a thin layer that can control the amount of impurities on the semiconductor surface, so that the effective barrier height of the metal-semiconductor contact can be changed, thereby reducing the conduction of silicon carbide diodes. The turn-on voltage can meet the reliability of the device operation, and at the same time, the effective barrier height between the metal and the semiconductor can be adjusted through a certain control.

Specifically, the structure of the SiC junction barrier Schottky diode provided by the present invention is shown in FIG. 2 , including a first conductivity type SiC substrate layer, a low-doped first conductivity type epitaxial layer, and a highly doped first conductivity type epitaxial layer. , a plurality of doped regions of the second conductivity type, a first electrode and a second electrode. In this embodiment, the first conductivity type is N-type and the second conductivity type is P-type as an example:

The N-type SiC substrate layer includes a first surface and a second surface. The first surface is provided with a low-doped N-type epitaxial layer. The doping concentration of the low-doped N-type epitaxial layer is in the order of 10 ¹⁵ atoms/cm ³ . The doping concentration of the doped N-type epitaxial layer is lower than the doping concentration of the N-type SiC substrate layer; further, a highly doped N-type epitaxial layer is arranged on the upper surface of the low-doped N-type epitaxial layer, and the highly doped N-type epitaxial layer is The doping concentration of the layer is of the order of 10 ¹⁶ atoms/cm ³ , the highly doped N-type epitaxial layer is provided with a plurality of P-type doping regions, the implantation concentration is of the order of 10 ¹⁸ atoms/cm ³ , and a plurality of P-type doping regions are arranged. The regions are arranged at intervals, and a highly doped N-type epitaxial layer is formed between two adjacent P-type doped regions. Further, the P-type doped region extends from the surface of the highly doped N-type epitaxial layer away from the N-type SiC substrate layer. The highly doped N-type epitaxial layer, and the thickness of the P-type doped region is smaller than the electron free path. Specifically, the thickness of the P-type doped region is larger than that of the highly doped N-type epitaxial layer, and penetrates deep into the low-doped N-type epitaxial layer. The P-type doped region extends to 5 μm of the low-doped N-type epitaxial layer.

It should be noted that the P-type doping region is a ring structure, and a plurality of P-type doping regions form a concentric ring structure.

Further, chemical vapor deposition is used to form a Schottky electrode on the upper surface of the barrier region composed of the P-type doped region and the highly doped N-type epitaxial layer, and an ohmic electrode is deposited on the second surface of the N-type SiC substrate layer.

In the embodiment of the present invention, by setting a low-doped N-type epitaxial layer and a highly-doped N-type epitaxial layer with different doping concentrations, and implanting the P-type doping region, the potential barrier width decreases due to the increase of the surface doping concentration, so that the The barrier of the diode is lowered, and the effective barrier height of the metal-semiconductor contact is changed by different doping concentrations, thereby reducing the barrier width, so that electrons with smaller free paths can also penetrate the barrier, and the forward tunneling current increases , which is equivalent to reducing the on-resistance, so the diode can be turned on with a smaller voltage. By reducing the potential barrier and increasing the tunneling effect, the solution effectively reduces the turn-on voltage and reduces the on-resistance.

Embodiment 2

On the basis of the above embodiment, this embodiment further describes the internal structure of the SiC junction barrier Schottky diode:

Take the first conductivity type as P-type and the second conductivity type as N-type as an example:

The P-type SiC substrate layer includes a first surface and a second surface. The first surface is provided with a low-doped P-type epitaxial layer. The doping concentration of the low-doped P-type epitaxial layer is in the order of 10 ¹⁵ atoms/cm ³ . The doping concentration of the doped P-type epitaxial layer is lower than the doping concentration of the P-type SiC substrate layer; further, a highly doped P-type epitaxial layer is arranged on the upper surface of the low-doped P-type epitaxial layer, and the highly doped P-type epitaxial layer is The doping concentration of the layer is of the order of 10 ¹⁶ atoms/cm ³ , the highly doped P-type epitaxial layer is provided with a plurality of N-type doping regions, the implantation concentration is of the order of 10 ¹⁸ atoms/cm ³ , and a plurality of N-type doping regions are arranged. The regions are arranged at intervals, and a highly doped P-type epitaxial layer is formed between two adjacent N-type doped regions. Further, the N-type doped region extends from the surface of the highly doped P-type epitaxial layer away from the P-type SiC substrate layer. The thickness of the highly doped P-type epitaxial layer, and the thickness of the N-type doped region is smaller than the electron free path. Specifically, the thickness of the N-type doped region is larger than that of the highly doped P-type epitaxial layer, and penetrates deep into the low-doped P-type epitaxial layer. The N-type doped region extends to the low-doped P-type epitaxial layer by 30 μm.

It should be noted that the N-type doping region is a strip-like structure, and a plurality of N-type doping regions are arranged in parallel on the highly doped P-type epitaxial layer.

Embodiment 3

On the basis of the above embodiments, the embodiments of the present invention provide a method for manufacturing a SiC junction barrier Schottky diode, specifically:

Step 1: providing a SiC substrate of the first conductivity type;

Step 2: generating a low-doped epitaxial layer of the first conductivity type on the upper surface of the SiC substrate of the first conductivity type;

Step 3: generating a highly doped epitaxial layer of the first conductivity type on the low-doped epitaxial layer of the first conductivity type;

Step 4: Implant a plurality of P-type highly doped regions from the side of the first conductivity type highly doped epitaxial layer away from the first conductivity type SiC substrate, the depth of the P-type highly doped regions greater than the thickness of the highly doped epitaxial layer of the first conductivity type;

Step 5: depositing a carbon film protective layer on the upper surface of the second conductivity type doped region and the highly doped first conductivity type epitaxial layer;

Step 6: Annealing;

Step 7: removing the carbon film protective layer, and depositing a first electrode on the upper surface of the second conductivity type doped region and the highly doped first conductivity type epitaxial layer;

A second electrode is deposited on the lower surface of the SiC substrate of the first conductivity type.

Specifically, the substrate is subjected to conventional doping techniques to provide N ⁺ doping for the substrate, and a slight N doping is epitaxially coated onto the substrate. A low-doped epitaxial layer of the same conductivity type as the substrate was grown in situ on the SiC substrate, and its doping concentration was in the order of 10 ¹⁵ atoms/cm ³ ; then a highly doped epitaxial layer was grown on the first epitaxial layer. Type epitaxy, the doping concentration is on the order of 10 ¹⁶ atoms/cm ³ , and the injection depth is less than the free path of electrons. Then, the P-type highly doped layer is ion-implanted on the front side, and the implantation concentration is in the order of 10 ¹⁸ atoms/cm ³ , and a carbon film is deposited to protect the upper surface of the P-type highly doped region and the first conductive type highly doped epitaxial layer. layer to prevent the sublimation and precipitation of Si during annealing. Due to the low activation rate of SiC, high temperature is used to ionize unactivated and ionized impurities. The specific annealing process may adopt the existing annealing technology, which will not be repeated here. After the annealing is completed, the basic device structure is obtained, and electrodes are fabricated on the front and back to realize the rectification function and interconnection.

Embodiment 4

On the basis of the above embodiments, the embodiments of the present invention provide another method for manufacturing a SiC junction barrier Schottky diode, specifically:

Step 1: generating a low-doped epitaxial layer of the first conductivity type on the SiC substrate of the first conductivity type;

Step 2: performing ion implantation into the low-doped epitaxial layer of the first conductivity type to form a first doped layer, and the doping concentration of the first doped layer is greater than that of the low-doped epitaxial layer of the first conductivity type the doping concentration of the layer;

Step 3: injecting p-type high doping into the first doping layer, the depth of the p-type high doping is greater than the thickness of the first doping layer;

Step 4: depositing a carbon film protective layer on the upper surface of the second conductivity type doped region and the highly doped first conductivity type epitaxial layer;

Step 5: Annealing;

Step 6: removing the carbon film protective layer, and depositing a first electrode on the upper surface of the second conductivity type doped region and the highly doped first conductivity type epitaxial layer;

A second electrode is deposited on the lower surface of the SiC substrate of the first conductivity type.

Specifically, the substrate is subjected to conventional doping techniques to provide N ⁺ doping for the substrate, and a slight N-type doping is epitaxially coated onto the substrate. A shallow N-type doped layer is formed by one ion implantation, the implantation concentration is in the order of 10 ¹⁶ atoms/cm ³ , and the implantation depth is smaller than the free path of electrons. Then, the P-type highly doped layer is ion-implanted on the front side, and the implantation concentration is in the order of 10 ¹⁸ atoms/cm ³ . A carbon film protective layer is deposited on the upper surface of the P-type highly doped region and the N-type highly doped epitaxial layer to prevent the sublimation and precipitation of Si during annealing. Due to the low activation rate of SiC, high temperature is used to ionize unactivated and ionized impurities. The specific annealing process may adopt the existing annealing technology, which will not be repeated here. After the annealing is completed, the basic device structure is obtained, and electrodes are fabricated on the front and back to realize the rectification function and interconnection.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, but not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that it can still be The technical solutions described in the foregoing embodiments are modified, or some technical features thereof are equivalently replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims (9)

1. a SiC junction barrier Schottky diode, is characterized in that, comprises: a first conductivity type SiC substrate layer, the first conductivity type SiC substrate layer including opposing first and second surfaces; wherein, A low-doped first conductivity type epitaxial layer located on the first surface of the first conductivity type SiC substrate layer, wherein the low-doped first conductivity type epitaxial layer has a doping concentration smaller than that of the first conductivity type Doping concentration of SiC substrate layer; a highly doped first conductivity type epitaxial layer located on the low doped first conductivity type epitaxial layer; A plurality of doped regions of the second conductivity type extend from the surface of the highly doped first conductivity type epitaxial layer away from the first conductivity type SiC substrate layer into the highly doped first conductivity type epitaxial layer, and the the depth of the second conductive type doped region is greater than the thickness of the highly doped first conductive type epitaxial layer; a first electrode, disposed on the upper surface of the second conductive type doped region and the highly doped first conductive type epitaxial layer; The second electrode is disposed on the second surface of the first conductive type SiC substrate layer. 2 . The SiC junction barrier Schottky diode according to claim 1 , comprising: the first conductivity type is N-type, and the second conductivity type is P-type. 3 . 3 . The SiC junction barrier Schottky diode according to claim 1 , wherein: the first conductivity type is P-type, and the second conductivity type is N-type. 4 . 4 . The SiC junction barrier Schottky diode according to claim 1 , wherein the doped region of the second conductivity type extends to the low-doped first conductivity type epitaxial layer by 5-30 μm. 5 . 5 . The SiC junction barrier Schottky diode according to claim 1 , wherein the doped region of the second conductivity type is a ring-shaped or strip-shaped structure. 6 . 6. A method for manufacturing a SiC junction barrier Schottky diode, comprising: Step 1: providing a SiC substrate of the first conductivity type; Step 2: generating a low-doped epitaxial layer of the first conductivity type on the upper surface of the SiC substrate of the first conductivity type; Step 3: generating a highly doped epitaxial layer of the first conductivity type on the low-doped epitaxial layer of the first conductivity type; Step 4: Implant a plurality of P-type highly doped regions from the side of the first conductivity type highly doped epitaxial layer away from the first conductivity type SiC substrate, the depth of the P-type highly doped regions greater than the thickness of the highly doped epitaxial layer of the first conductivity type; Step 5: depositing a carbon film protective layer on the upper surface of the second conductivity type doped region and the highly doped first conductivity type epitaxial layer; Step 6: Annealing; Step 7: removing the carbon film protective layer, and depositing a first electrode on the upper surface of the second conductivity type doped region and the highly doped first conductivity type epitaxial layer; A second electrode is deposited on the lower surface of the SiC substrate of the first conductivity type. 7. The method for manufacturing a SiC junction barrier Schottky diode according to claim 6, wherein, The doping concentration of the low-doped epitaxial layer of the first conductivity type is in the order of 10 ¹⁵ atoms/cm ³ ; The doping concentration of the highly doped epitaxial layer of the first conductivity type is in the order of 10 ¹⁶ atoms/cm ³ ; The implantation concentration of the P-type highly doped region is in the order of 10 ¹⁸ atoms/cm ³ . 8. A method for manufacturing a SiC junction barrier Schottky diode, comprising: Step 1: generating a low-doped epitaxial layer of the first conductivity type on the SiC substrate of the first conductivity type; Step 2: performing ion implantation into the low-doped epitaxial layer of the first conductivity type to form a first doped layer, the doping concentration of the first doped layer is greater than that of the low-doped epitaxial layer of the first conductivity type the doping concentration of the layer; Step 3: injecting p-type high doping into the first doping layer, the depth of the p-type high doping is greater than the thickness of the first doping layer; Step 4: depositing a carbon film protective layer on the upper surface of the second conductivity type doped region and the highly doped first conductivity type epitaxial layer; Step 5: Annealing; Step 6: removing the carbon film protective layer, and depositing a first electrode on the upper surface of the second conductivity type doped region and the highly doped first conductivity type epitaxial layer; A second electrode is deposited on the lower surface of the SiC substrate of the first conductivity type. 9. The method for manufacturing a SiC junction barrier Schottky diode according to claim 8, wherein, The doping concentration of the low-doped epitaxial layer of the first conductivity type is in the order of 10 ¹⁵ atoms/cm ³ ; The implantation concentration of the doping concentration of the first doping layer is in the order of 10 ¹⁶ atoms/cm ³ ; The implantation concentration of the p-type high doping is in the order of 10 ¹⁸ atoms/cm ³ .