CN206877670U - Source electrode drive circuit and display device - Google Patents
Source electrode drive circuit and display device Download PDFInfo
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- CN206877670U CN206877670U CN201720752000.6U CN201720752000U CN206877670U CN 206877670 U CN206877670 U CN 206877670U CN 201720752000 U CN201720752000 U CN 201720752000U CN 206877670 U CN206877670 U CN 206877670U
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- transistor
- source electrode
- drive circuit
- electrode drive
- signal
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Abstract
The utility model discloses a kind of source electrode drive circuit and display device, the source electrode drive circuit includes：D/A converter module, for data-signal to be converted into analog voltage；Amplification module, for being amplified under the control of switching signal to the analog voltage；And output module, the output module is connected between the amplification module and output end, for providing source drive signal for pixel cell, wherein, the output module includes multiple control units in parallel, and described control unit sequentially turns on according to the descending order of conducting resistance.Relative to prior art, the source electrode drive circuit of the utility model embodiment can effectively reduce the overshoot effect of circuit, reduce the noise of circuit.
Description
Technical field
Technical field of liquid crystal display is the utility model is related to, more particularly to a kind of source electrode drive circuit and display device.
Background technology
In recent years, with the continuous progress of Display Technique, liquid crystal display has become the most common display dress of in the market
Put.For in general liquid crystal display, liquid crystal display drive circuit includes source electrode drive circuit and gate driving circuit.
Fig. 1 shows the structural representation of source electrode drive circuit in display device in the prior art.More numbers are only shown in figure
According to passage D1-Dn source electrode drive circuit, n is non-zero natural number.The source electrode drive circuit includes shift register 110, correspondingly
In the latch 120 in each data channel, digital analog converter 130, output buffer 140 and output module 150, wherein,
Output buffer 140 includes being controlled by switching signal open operational amplifier (not shown), output module 150 include by
Control the transistor T1 in output control signal outen.Specifically, the latch with multiple data channel respectively of shift register 110
Device 120 electrically connects, and shift register 110 gates the latch 120 of a data channel successively, and by data signal transmission to phase
On the data wire answered.By taking the first data channel as an example, the latch 120 of the first data channel, digital analog converter 130, output are slow
Rush device 140 and output module 150 is sequentially connected with.In the prior art, in order to reduce the power consumption of source electrode drive circuit, in its output
When signal level reaches expectation level value, computing can be closed by high level saltus step is low level by controlling switch signal open
Amplifier.
Fig. 2 shows the timing diagram of the source electrode drive circuit shown in Fig. 1.At the t1 moment, switching signal open and output are controlled
Signal outen processed is high level by low transition, and operational amplifier is opened, transistor T1 conductings, the operational amplifier and crystalline substance
Data channel conducting where body pipe T1, but due to when operational amplifier reopens, overshoot effect can be caused in output loading,
As shown in Fig. 2 in a period of time since the t1 moment, the source drive signal out of source electrode drive circuit output produces larger
Overshoot voltage, select on a timeline at a distance of 2.876 μ s two point A, B, the voltage difference of A, B point-to-point transmission is 793.1mV, it is known that
When source drive signal out voltage is 4.8V, caused overshoot voltage is 793.1mV, and this is due to moment discharge and recharge electricity
Caused by the mismatch of stream, it can deteriorate the noiseproof feature of source electrode drive circuit.
Utility model content
The purpose of this utility model is to provide a kind of low overshoot effect, the source electrode drive circuit and display dress of low-power consumption
Put.
According to one side of the present utility model, there is provided a kind of source electrode drive circuit, including：D/A converter module, for inciting somebody to action
Data-signal is converted to analog voltage；Amplification module, for being amplified under the control of switching signal to the analog voltage；
And output module, the output module are connected between the amplification module and output end, for providing source for pixel cell
Pole drive signal, wherein, the output module includes multiple control units in parallel, described control unit according to conducting resistance by
Small order is arrived greatly to sequentially turn on.
Preferably, the output module includes the first control unit and the second control unit, the first control unit bag
Include the first transistor, second control unit includes second transistor, the first path terminal of the first transistor and described
First path terminal of second transistor is connected to the amplification module, the alternate path end of the first transistor and described second
The alternate path end of transistor is connected to the output end.
Preferably, the conducting resistance of the first transistor is more than the conducting resistance of the second transistor.
Preferably, first control unit also includes first resistor, and second control unit also includes second resistance,
The first resistor is connected between the amplification module and the first path terminal of the first transistor, and the second resistance connects
It is connected between the amplification module and the alternate path end of the second transistor.
Preferably, the conducting resistance of the first transistor and the second transistor is equal, the resistance of the first resistor
Resistance of the value more than the second resistance.
Preferably, the amplification module includes operational amplifier, and the first input end of the operational amplifier is connected to institute
D/A converter module is stated, the second input of the operational amplifier is connected to the output end of the operational amplifier, the fortune
The output end for calculating amplifier is connected to the output module, and the power end of the operational amplifier receives the switching signal, institute
State the earth terminal ground connection of operational amplifier.
Preferably, in addition to latch, latch are used to latch the data-signal, and when latch signal is effective by institute
State data-signal and be supplied to the D/A converter module.
Preferably, each described control unit simultaneously closes off.
According to second aspect of the present utility model, there is provided a kind of display device, it includes any source electrode as previously described
Drive circuit.
The beneficial effects of the utility model are：
Relative to prior art, source electrode can effectively be reduced according to source electrode drive circuit of the present utility model and display device and driven
The overshoot voltage of dynamic signal, the overshoot effect of circuit is reduced, optimize the noiseproof feature of circuit on the basis of circuit power consumption is reduced.
Brief description of the drawings
Fig. 1 shows the structural representation of source electrode drive circuit in display device in the prior art.
Fig. 2 shows the timing diagram of the source electrode drive circuit shown in Fig. 1.
Fig. 3 shows the structural representation for the source electrode drive circuit that the utility model first embodiment provides.
Fig. 4 a show the structure of the output module used in the source electrode drive circuit according to the utility model first embodiment
Schematic diagram.
Fig. 4 b show the structure of the output module used in the source electrode drive circuit according to the utility model second embodiment
Schematic diagram.
The output module used in the source electrode drive circuit that Fig. 4 c show to be provided according to the utility model 3rd embodiment
Structural representation.
Fig. 5 shows the timing diagram for the source electrode drive circuit that the utility model first embodiment provides.
Fig. 6 shows the structural representation for the display device that the utility model fourth embodiment provides.
Embodiment
Following discloses provide many different embodiments or example to implement the different characteristic of the application.Describe below
Part or the specific embodiment of arrangement are to simplify the utility model.Certainly, these are only that example is not intended to limit this
Utility model.
In addition, in the specification and in the claims, term " first ", " second " etc. are used to carry out between analogous element
Distinguish, and if the order of time sequencing, spatial order, hierarchal order or any other mode may not be described, should be appreciated that
These terms used are interchangeable under appropriate environment, and embodiment of the present utility model described herein can be with herein
Other beyond describing or showing sequentially operate.
Fig. 3 shows the structural representation of source electrode drive circuit in the display device of the utility model embodiment.
As shown in figure 3, illustrate only the source electrode drive circuit of a data passage in figure, the source electrode drive circuit 200 wraps
Include latch 210, D/A converter module 220, amplification module 230 and output module 240.
Latch 210 is for receiving, memory data signal data, and carries data-signal data when latch signal is effective
Supply D/A converter module 220.
D/A converter module 220 is connected with latch 210, for receiving the data-signal data of the offer of latch 210, and
Data-signal data is converted into analog voltage V1.
Amplification module 230 is for example connected to number including operational amplifier OPA, operational amplifier OPA first input end
Mould modular converter 220, for receiving analog voltage V1, operational amplifier OPA the second input is connected to operational amplifier OPA
Output end, operational amplifier OPA output end is connected to output module 240, and operational amplifier OPA power end receives switch
Signal open, operational amplifier OPA earth terminal ground connection.When switching signal open is high level, operational amplifier OPA is opened
Open, for being amplified to the analog voltage V1 received, and the analog voltage V2 after obtained amplification is carried by output end
Supply output module 240；When switching signal open is low level, operational amplifier OPA is closed.When switching signal open is by low
When level is changed into high level, in the moment that operational amplifier OPA is opened, operational amplifier OPA outputs charging and discharging currents are not
Matching, therefore analog voltage V2 will change in the presence of a magnitude of voltage and be gradually brought to the process of stable voltage.
Output module 240 is connected between the output end of amplification module 230 and source electrode drive circuit 200, is put for receiving
Analog voltage V2 after big, and produce source electrode drive signal out.
Fig. 4 a show the structure of the output module used in the source electrode drive circuit according to the utility model first embodiment
Schematic diagram.
As shown in fig. 4 a, output module 240 includes in parallel the first control unit 241 and the second control unit 242, and first
Control unit 241 includes the first transistor T1, and the second control unit 242 includes second transistor T2, the first transistor T1 and
Two-transistor T2 control terminal receives the first output control signal outen1 and the second output control signal outen2 respectively, and first
Transistor T1 the first path terminal and second transistor T2 the first path terminal are connected to first node Q1, the first transistor T1's
Alternate path end and second transistor T2 alternate path end are connected to section point Q2, and first node Q1 is connected to amplification mould
Block, for receiving amplified analog voltage V2, the section point Q2 is connected to the output end of source electrode drive circuit, is used for
Source drive signal out is provided for pixel cell.Wherein, the first transistor T1 conducting resistance leading more than second transistor T2
Be powered resistance, therefore the first transistor T1 conducting electric current is smaller so that source drive signal out voltage changing rate is relatively slow；
And when output module 240 works, the first output control signal outen1 is prior to the second output control signal outen2 by low electricity
It is flat to be changed into high level, therefore when operational amplifier OPA is reopened, the first transistor T1 first conducting, now source drive
Signal out voltage changing rate is relatively slow, and subsequent second transistor T2 and the first transistor T1 is simultaneously turned on so that source drive
Signal out can follow the analog voltage V2 that operational amplifier OPA is exported to reach stationary value.First output control signal
The interval time of outen1 and the second output control signal outen2 level jumping moment is, for example, 1-5 μ s, but the disclosure
Embodiment not limited to this, in other alternate embodiment, the interval time of the two level jumping moment can be according to specific implementation
Situation is adjusted.
Fig. 4 b show the structure of the output module used in the source electrode drive circuit according to the utility model second embodiment
Schematic diagram.
As shown in Figure 4 b, output module 340 includes the first control unit 341, second control single 342 and the 3rd in parallel
Control unit 343, the first control unit 341 include the first transistor T1, and the second control unit 342 includes second transistor T2,
3rd control unit 343 includes third transistor 343, the first transistor T1, second transistor T2 and third transistor T3's
Control terminal receives the first output control signal outen1, the second output control signal outen2 and the 3rd output control letter respectively
Number outen3, the first transistor T1 the first path terminal, second transistor T2 the first path terminal and third transistor T3
First path terminal is connected to first node Q1, the first transistor T1 alternate path end, second transistor T2 alternate path end
And third transistor T3 alternate path end is connected to section point Q2, first node Q1 is connected to amplification module, for connecing
Receive amplified analog voltage V2, the section point Q2 and be connected to the output end of source electrode drive circuit, for for pixel list
Member provides source drive signal out.Wherein, the first transistor T1 conducting resistance is more than second transistor T2 conducting resistance,
Second transistor T2 conducting resistance is more than third transistor T3 conducting resistance, and when output module 340 works, first is defeated
Go out control signal outen1 and high level is changed into from low level prior to the second output control signal outen2, the two level jumping moment
Interval time be, for example, 1-5 μ s, the second output control signal outen2 is prior to the 3rd output control signal outen3 by low electricity
Flat to be changed into high level, the interval time of the two level jumping moment is, for example, 1-5 μ s, but embodiment of the present disclosure not limited to this,
In other alternate embodiment, the interval time of level jumping moment can be adjusted according to specific implementation situation.
The output module used in the source electrode drive circuit that Fig. 4 c show to be provided according to the utility model 3rd embodiment
Structural representation.
As illustrated in fig. 4 c, output module 440 includes in parallel the first control unit 441 and the second control unit 441, and first
Control unit 441 includes the first transistor T1, and the second control unit 442 includes second transistor T2, the first transistor T1 and
Two-transistor T2 control terminal receives the first output control signal outen1 and the second output control signal outen2 respectively, and first
Transistor T1 the first path terminal and second transistor T2 the first path terminal are respectively via first resistor R1 and second resistance R2
First node Q1 is connected to, the first transistor T1 alternate path end is connected to second with second transistor T2 alternate path end
Node Q2, first node Q1 are connected to amplification module, for receiving amplified analog voltage V2, the section point Q2 companies
The output end of source electrode drive circuit is connected to, for providing source drive signal out for pixel cell.Wherein, the first transistor T1
Conducting resistance be equal to second transistor T2 conducting resistance, first resistor R1 resistance is more than second resistance R2 resistance, and
When output module 440 works, the first output control signal outen1 is prior to the second output control signal outen2 by low level
It is changed into high level, the interval time of the two level jumping moment is, for example, 1-5 μ s, but embodiment of the present disclosure not limited to this,
In other alternate embodiment, the interval time of the two level jumping moment can be adjusted according to specific implementation situation.
Fig. 5 shows the timing diagram of the source electrode drive circuit shown in Fig. 3.
As shown in Fig. 3, Fig. 4 a and Fig. 5, at the t1 moment, switching signal open is high level by low transition, and first is defeated
It is high level to go out control signal outen1 by low transition, and the second output control signal is low level, and operational amplifier OPA is opened
Open, the first transistor T1 conductings, because the first transistor T1 resistance is big and driving force is weaker, thus can reduce because computing is put
Big device OPA reopens overshoots effect in output loading caused by meeting.
At the t1 moment to t2 moment, switching signal open and the first output control signal outen1 are high level, and second is defeated
It is low level to go out control signal outen2, and source drive signal out voltage gradually reduces with the time.
At the t2 moment, switching signal open and the first output control signal outen1 are high level, and the second output control is believed
Number outen2 is high level by low transition, and operational amplifier OPA is kept it turned on, the first transistor T1 and second transistor T2
It is both turned on, second transistor T2 resistance is smaller, and now the first transistor T1 and second transistor T2 is simultaneously for being pixel cell
Source drive signal out is provided.For source drive signal out, point A corresponding with the t2 moment is selected, and with point A in the time
The voltage difference of point B, A, B point-to-point transmission on axle at a distance of 2.906 μ s is 316.8mV, it is known that is in source drive signal out voltage
During 4.8V, caused overshoot voltage is 316.8mV.
At the t2 moment to t3 moment, switching signal open, the first output control signal outen1 and the second output control
Signal outen2 keeps high level, and operational amplifier OPA is kept it turned on, and the first transistor T1 and second transistor T2 continue to lead
Logical, source drive signal out voltage gradually increases and keeps stable.
At the t3 moment, switching signal open, the first output control signal outen1 and the second output control signal
Outen2 becomes by high level turns to low level, and operational amplifier OPA, the first transistor T1 and second transistor T2 are closed simultaneously
It is disconnected, complete this output procedure.
When the voltage of source drive signal is 4.8V, relative to prior art, the source electrode of the utility model embodiment offer
Overshoot voltage caused by drive circuit reduces about 60%, preferably improves overshoot effect, while circuit power consumption is reduced
Reduce influence of the noise to other circuit modules, and it is simple in construction, it is easy to accomplish.
Fig. 6 shows the structural representation of the display device of the utility model embodiment.
As shown in fig. 6, the display device 500 of the utility model embodiment includes display panel 510, gate driving circuit
520th, source electrode drive circuit 530 and sequential control circuit 540, wherein, source electrode drive circuit 530 refers to the utility model
One into 3rd embodiment any provided source electrode drive circuit.
Display panel 510 is including lining up the m × k pixel cell 511 of m × k arrays, k bars transmit raster data model letter respectively
Number G [1] to G [k] scan line and m bars transmit data-signal D [1] to D [m] data wire respectively, and m and k are respectively non-zero
Natural number.Pixel electrode and the transistor for the on or off pixel electrode are included in each pixel cell 211, it is described
Transistor is, for example, thin film transistor (TFT).In display panel 510, positioned at same a line, (" OK " is for example shown in corresponding diagram
Horizontal direction) pixel cell in each transistor grid be connected and to display panel fringe region draw one scanning
Line, k rows pixel cell export gate drive signal G [1] to G [k] by corresponding scan line respectively；It is (described positioned at same row
The longitudinal direction of " row " for example shown in corresponding diagram) pixel cell in the source electrode of each transistor be connected and draw a data
Line, m row pixel cell pass through corresponding data wire outputting data signals D [1] to D [m] respectively；In each pixel cell, transistor
Drain electrode be connected with pixel electrode.
Include multiple drive element of the grid GIA [1] with the integrated gate driving circuit 520 with same substrate of display panel
To GIA [k], drive element of the grid GIA [1] to GIA [k] is respectively by k bars scan line to each row pixel in display panel 1100
Unit apply gate drive signal G [1] to G [k], so as to line by line trigger display panel 510 in each row pixel cell, make by
The transistor in all pixels unit in the pixel cell row of triggering simultaneously turns on, and is led to receiving by source electrode drive circuit 530
The data-signal D [1] to D [m] of data wire offer is provided.
Sequential control circuit 540 is used to provide multiple clock signals to source electrode drive circuit 530 and gate driving circuit 520
And (enabling signal is for example including prime enabling signal and rear class for the control signal such as enabling signal (Start Vertical, STV)
Enabling signal), wherein, enabling signal is, for example, the open signal of a frame.
Above-described embodiment is citing of the present utility model, although disclosing embodiment of the present utility model for the purpose of illustration
And accompanying drawing, but it will be appreciated by those skilled in the art that：The spirit of the utility model and appended claim is not being departed from
In scope, it is various replace, to change and modifications all be possible.Therefore, the utility model should not be limited to embodiment and accompanying drawing
Disclosure of that.
Claims (9)
- A kind of 1. source electrode drive circuit, it is characterised in that including：D/A converter module, for data-signal to be converted into analog voltage；Amplification module, for being amplified under the control of switching signal to the analog voltage；AndOutput module, the output module are connected between the amplification module and output end, for providing source for pixel cell Pole drive signal,Wherein, the output module includes multiple control units in parallel, and described control unit is descending according to conducting resistance Order sequentially turn on.
- 2. source electrode drive circuit according to claim 1, it is characterised in that the output module includes the first control unit With the second control unit, first control unit includes the first transistor, and second control unit includes second transistor, First path terminal of the first transistor and the first path terminal of the second transistor are connected to the amplification module, described The alternate path end of the first transistor is connected to the output end with the alternate path end of the second transistor.
- 3. source electrode drive circuit according to claim 2, it is characterised in that the conducting resistance of the first transistor is more than The conducting resistance of the second transistor.
- 4. source electrode drive circuit according to claim 2, it is characterised in that first control unit also includes the first electricity Resistance, second control unit also include second resistance, and the first resistor is connected to the amplification module and first crystalline substance Between first path terminal of body pipe, the second resistance is connected to the alternate path of the amplification module and the second transistor Between end.
- 5. source electrode drive circuit according to claim 4, it is characterised in that the first transistor and second crystal The conducting resistance of pipe is equal, and the resistance of the first resistor is more than the resistance of the second resistance.
- 6. source electrode drive circuit according to claim 1, it is characterised in that the amplification module includes operational amplifier, The first input end of the operational amplifier is connected to the D/A converter module, and the second input of the operational amplifier connects The output end of the operational amplifier is connected to, the output end of the operational amplifier is connected to the output module, the computing The power end of amplifier receives the switching signal, the earth terminal ground connection of the operational amplifier.
- 7. source electrode drive circuit according to claim 1, it is characterised in that also including latch, latch is used to latch The data-signal, and the data-signal is supplied to the D/A converter module when latch signal is effective.
- 8. source electrode drive circuit according to claim 1, it is characterised in that each described control unit simultaneously closes off.
- 9. a kind of display device, it is characterised in that it includes the source electrode drive circuit as described in any one of claim 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720752000.6U CN206877670U (en) | 2017-06-26 | 2017-06-26 | Source electrode drive circuit and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720752000.6U CN206877670U (en) | 2017-06-26 | 2017-06-26 | Source electrode drive circuit and display device |
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| Publication Number | Publication Date |
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| CN206877670U true CN206877670U (en) | 2018-01-12 |
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| CN201720752000.6U Withdrawn - After Issue CN206877670U (en) | 2017-06-26 | 2017-06-26 | Source electrode drive circuit and display device |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107274847A (en) * | 2017-06-26 | 2017-10-20 | 北京集创北方科技股份有限公司 | Display device, source electrode drive circuit and its control method |
| CN110097858A (en) * | 2018-01-30 | 2019-08-06 | 瑞鼎科技股份有限公司 | Source electrode driver |
| CN113676143A (en) * | 2021-08-17 | 2021-11-19 | 晟合微电子(肇庆)有限公司 | Channel amplifying circuit, display driving chip and driving method |
| CN115101019A (en) * | 2022-06-09 | 2022-09-23 | 重庆惠科金渝光电科技有限公司 | Source electrode driving circuit, method and display panel |
-
2017
- 2017-06-26 CN CN201720752000.6U patent/CN206877670U/en not_active Withdrawn - After Issue
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107274847A (en) * | 2017-06-26 | 2017-10-20 | 北京集创北方科技股份有限公司 | Display device, source electrode drive circuit and its control method |
| CN107274847B (en) * | 2017-06-26 | 2023-10-24 | 北京集创北方科技股份有限公司 | Display device, source electrode driving circuit and control method thereof |
| CN110097858A (en) * | 2018-01-30 | 2019-08-06 | 瑞鼎科技股份有限公司 | Source electrode driver |
| CN110097858B (en) * | 2018-01-30 | 2021-06-08 | 瑞鼎科技股份有限公司 | Source driver |
| CN113676143A (en) * | 2021-08-17 | 2021-11-19 | 晟合微电子(肇庆)有限公司 | Channel amplifying circuit, display driving chip and driving method |
| CN115101019A (en) * | 2022-06-09 | 2022-09-23 | 重庆惠科金渝光电科技有限公司 | Source electrode driving circuit, method and display panel |
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