CN110097858A - Source electrode driver - Google Patents

Abstract

The invention discloses a source driver. The source driver includes a first operational amplifier, a boost circuit and a first switching unit. The first operational amplifier is controlled by the control signal, and the highest potential of the control signal is the operating voltage. The boost circuit is used to boost the working voltage to a boost voltage and generate a switching switch control signal accordingly, where the highest potential of the switching switch control signal is the boost voltage, and the boost voltage is higher than the working voltage. The first switching unit is coupled to the first operational amplifier. When the first switching unit is controlled to be turned on by the switching control signal, it has an on-resistance. If the first switching unit has an original on-resistance when it is turned on under the control of the control signal, the on-resistance is smaller than the original on-resistance.

Description

source driver

technical field

The present invention relates to a display device, in particular to a source driver applied to a display device.

Background technique

Generally speaking, as the size of the liquid crystal display panel becomes larger and larger, the output load of the driving IC of the display device becomes heavier, which leads to the problem of overheating of the driving IC of the display device.

Specifically, in a traditional source driver, the highest potential of the control signal of the switching switch coupled to the output terminal of the operational amplifier of each channel is usually the same as the operating voltage of the operational amplifier, resulting in The equivalent impedance of the switching switch (that is, the on-resistance On-resistance) cannot be effectively reduced, so that the slew rate of the operational amplifier is not good. When the output current generated by the operational amplifier charging or discharging the load flows through a large on-resistance, it will generate a large power loss and cause the temperature of the driving IC to be too high, which needs to be overcome urgently.

Contents of the invention

In view of this, the present invention proposes a source driver to effectively solve the above-mentioned problems encountered in the prior art.

A specific embodiment according to the present invention is a source driver. In this embodiment, the source driver includes a first operational amplifier, a boost circuit and a first switch unit. The first operational amplifier is controlled by the control signal, and the highest potential of the control signal is the working voltage. The boost circuit is used for boosting the operating voltage to a boosted voltage and generating a switching switch control signal accordingly, wherein the highest potential of the switching switch control signal is the boosted voltage, and the boosted voltage is higher than the working voltage. The first switch unit is coupled to the first operational amplifier. When the first swap switch unit is controlled by the swap switch control signal to conduct, it has an on-resistance. Wherein, if the first exchange switch unit has an original on-resistance when it is turned on under the control of the control signal, the on-resistance is smaller than the original on-resistance.

In one embodiment, when the output current output by the first operational amplifier flows through the first switching unit with on-resistance, power consumption is generated, and the power consumption is smaller than that of the output current flowing through the first switch unit with original on-resistance. - The raw power consumed when exchanging switching units.

In one embodiment, the temperature rise caused by the power consumption is lower than the original temperature rise caused by the original power consumption.

In one embodiment, the source driver further includes a second operational amplifier and a second switch unit. The second operational amplifier is controlled by the operating voltage. The second switch unit is coupled to the second operational amplifier, and has an on-resistance when the second switch unit is turned on by the switch control signal, and the on-resistance is smaller than the original on-resistance.

In one embodiment, when the output current output by the second operational amplifier flows through the second exchange switch unit with on-resistance, power consumption will be generated, and the power consumption is smaller than that when the output current flows through the second switch unit with original on-resistance. The raw power consumed when exchanging switching units.

In one embodiment, the temperature rise caused by the power consumption is lower than the original temperature rise caused by the original power consumption.

In one embodiment, the source driver further includes a sequence control circuit (Sequence control circuit), coupled between the boost circuit and the first switch unit and controlled by the boost voltage.

In one embodiment, the boost circuit is a charge pump circuit.

In one embodiment, the charge pump circuit includes a first switch, a second switch, a third switch, a fourth switch and a capacitor. The first switch and the second switch are connected in series between the working voltage and the ground voltage, the third switch and the fourth switch are connected in series between the working voltage and the voltage difference between the working voltage and the boosted voltage minus the working voltage, and one end of the capacitor is coupled to Between the first switch and the second switch and the other end of the capacitor is coupled between the third switch and the fourth switch, the first switch and the fourth switch are controlled by the first clock signal and the second switch and the third switch Controlled by the second clock signal, the first clock signal and the second clock signal are opposite to each other.

In one embodiment, the boost circuit is a bootstrap circuit.

In one embodiment, the bootstrap circuit includes a first switch, a second switch, a first resistor, a second resistor, a diode and a capacitor. The first switch and the first resistor are connected in series between the operating voltage and the ground voltage, and the second resistor and the second switch are connected in series between the boost voltage minus the operating voltage and the ground voltage, and one end of the capacitor is coupled to Between the first switch and the first resistor and the other end of the capacitor is coupled to the voltage difference between the boosted voltage minus the operating voltage, the diode is coupled between the operating voltage and the boosted voltage, and the first switch is also coupled to the second Between the resistor and the second switch, the second switch is controlled by a clock signal.

Compared with the prior art, the source driver according to the present invention uses a boost circuit to increase the highest potential of the switching switch control signal in the source driver from the original operating voltage to a boosted voltage, causing the switching switch to be turned on. The resistance becomes smaller accordingly. In addition to reducing the power consumption of the switching switch when the output current flows through to effectively reduce the temperature of the source driver, it can also increase the slew rate of the operational amplifier of each channel, so it can effectively overcome the existing problems encountered by technology.

The advantages and spirit of the present invention can be further understood through the following detailed description of the invention and the accompanying drawings.

Description of drawings

FIG. 1 is a schematic diagram of a source driver in a preferred embodiment of the present invention.

FIG. 2 is an embodiment in which the boost circuit is a charge pump circuit.

FIG. 3 is an embodiment in which the boost circuit is a bootstrap circuit.

FIG. 4 is a graph showing switch control signals having different maximum potentials resulting in different on-resistances of the switch.

FIG. 5A is a comparison diagram of the switching switch control signal before and after boosting treatment; FIG. 5B is a comparison diagram of the influence of the waveform of the output signal by the switching switch control signal before and after the boosting treatment.

FIG. 6 is a comparative diagram of the influence of the switching switch control signal on the on-resistance of the switching switch before and after boosting.

Description of main component symbols:

SD: source driver

PDAC: The First Digital-to-Analog Converter

NDAC: Second Digital to Analog Converter

MUX: multiplexer

OP1: first operational amplifier

OP2: Second operational amplifier

SU1: first exchange switch unit

SU2: Second exchange switch unit

BVC: boost circuit

SC: timing control circuit

OUT1: the first output terminal

OUT2: the second output terminal

+: positive input

-: Negative input terminal

AVDD: working voltage

STB: switch switch control signal

VBST: boost voltage

IOUT: output current

SW1～SW4: first switch～fourth switch

C1: capacitance

GND: ground voltage

VBST-AVDD: The voltage difference of the boost voltage minus the operating voltage

CLK1 ~ CLK2: first clock signal ~ second clock signal

CLK: clock signal

M1 ~ M2: first transistor switch ~ second transistor switch

R1～R2: the first resistance to the second resistance

D: diode

RON: on-resistance

VG1～VG3: the highest potential

VDS1: drain-source voltage

VMIN: the lowest potential

RON1～RON3: ON resistance

STB1～STB3: exchange switch control signal

ON: open state

OFF: Closed state

STB0: Raw switching switch control signal

SOUT: output signal

SOUT0: Raw output signal

T0～T8: time

RON0: Raw on-resistance

Detailed ways

A specific embodiment according to the present invention is a source driver. In this embodiment, the source driver is arranged in the display device to drive the liquid crystal display panel.

Please refer to FIG. 1 , which is a schematic diagram of a source driver in this embodiment. As shown in Figure 1, the source driver SD includes a first digital-to-analog converter PDAC, a second digital-to-analog converter NDAC, a multiplexer MUX, a first operational amplifier OP1, a second operational amplifier OP2, and a first switch unit SU1 , the second switch unit SU2, the boost circuit BVC, the timing control circuit SC, the first output terminal OUT1 and the second output terminal OUT2.

The output terminals of the first digital-to-analog converter PDAC and the second digital-to-analog converter NDAC are respectively coupled to the two input terminals of the multiplexer MUX; the two output terminals of the multiplexer MUX are respectively coupled to the first operational amplifier OP1 and the second The positive input terminal + of the operational amplifier OP2; the negative input terminals of the first operational amplifier OP1 and the second operational amplifier OP2 - are respectively coupled to their own output terminals; the output terminals of the first operational amplifier OP1 and the second operational amplifier OP2 are respectively coupled to the first switching unit SU1 and the second switching unit SU2; the boost circuit BVC is coupled to the timing control circuit SC; the timing control circuit SC is respectively coupled to the first switching unit SU1 and the second switching unit SU2 The first output terminal OUT1 is respectively coupled to the first exchange switch unit SU1 and the second exchange switch unit SU2; the second output terminal OUT2 is respectively coupled to the first exchange switch unit SU1 and the second exchange switch unit SU2.

Both the first operational amplifier OP1 and the second operational amplifier OP2 are controlled by the working voltage AVDD. Output terminals of the first operational amplifier OP1 and the second operational amplifier OP2 output an output current IOUT to the first switch unit SU1 and the second switch unit SU2 respectively.

When the boost circuit BVC receives the operating voltage AVDD, the boost circuit BVC will boost the operating voltage AVDD to form a boost voltage VBST, and then generate a switch control signal STB according to the boost voltage VBST to the first switch unit SU1 and the second switch unit SU2.

It should be noted that the highest potential of the switch control signal STB is the boosted voltage VBST, and the boosted voltage VBST is higher than the working voltage AVDD. In fact, the boosted voltage VBST can have a proportional relationship with the working voltage AVDD and can be adjusted according to actual needs. For example, the boosted voltage VBST is 1.5 times the working voltage AVDD or 2 times the working voltage AVDD, but this is not a limitation. limit.

In addition, a timing control circuit SC may be coupled between the boost circuit BVC and the first switching unit SU1 and the second switching unit SU2 . The timing control circuit SC is controlled by the boost voltage VBST, and is used for controlling the timing of transmitting the switch control signal STB to the first switch unit SU1 and the second switch unit SU2.

In this embodiment, the first switch unit SU1 includes a first switch M1 and a second switch M2. Wherein, the first switch M1 is coupled between the output terminal of the first operational amplifier OP1 and the first output terminal OUT1, and its gate is controlled by the switch control signal STB; the second switch M2 is coupled to the first The output terminal of the operational amplifier OP1 is connected to the second output terminal OUT2, and its gate is controlled by the switch control signal STB.

It should be noted that, assuming that the first exchange switch M1 and the second exchange switch M2 in the first exchange switch unit SU1 of the present invention are controlled by the exchange switch control signal STB whose highest potential is the boost voltage VBST, they have conduction when they are turned on. The on-resistance RON, and the first exchange switch M1 and the second exchange switch M2 in the first exchange switch unit SU1 in the prior art are controlled by the control signal whose highest potential is the working voltage AVDD and have the original on-resistance when they are turned on RON0 , since the boosted voltage VBST is higher than the working voltage AVDD, the on-resistance RON of the exchange switch of the present invention is smaller than the original on-resistance RON0 of the exchange switch in the prior art.

Assuming that the output current IOUT output by the output terminal of the first operational amplifier OP1 of the present invention flows through the first exchange switch unit SU1 having a conduction resistance RON, power consumption P will be generated, while the output current IOUT in the prior art flows through The original power consumption P0 will be generated when the switching unit SU1 with the original on-resistance RON0 is first exchanged. The power consumption P of the exchange switch of the present invention will be equal to the square of the output current IOUT multiplied by the on-resistance RON, while the original power consumption P0 of the exchange switch in the prior art will be equal to the square of the output current IOUT multiplied by the original on-resistance RON0 . Since the on-resistance RON is smaller than the original on-resistance RON0, the power consumption P of the exchange switch of the present invention will be smaller than the original power consumption P0 of the exchange switch in the prior art, and thus the power consumption P of the exchange switch of the present invention is caused by The temperature rise T0 will be lower than the original temperature rise T0 caused by the original power consumption P0 of the exchange switch in the prior art.

Similarly, the second switch unit SU2 includes a third switch M3 and a fourth switch M4. Wherein, the third switching switch M3 is coupled between the output terminal of the second operational amplifier OP2 and the first output terminal OUT1, and its gate is controlled by the switching switch control signal STB; the fourth switching switch M4 is coupled to The output terminal of the second operational amplifier OP2 is connected to the second output terminal OUT2, and its gate is controlled by the switch control signal STB.

Assuming that the third switch M3 and the fourth switch M4 in the second switch unit SU2 of the present invention are controlled by the switch control signal STB whose highest potential is the boost voltage VBST and have a conduction resistance RON when they are turned on, and The third exchange switch M3 and the fourth exchange switch M4 in the second exchange switch unit SU2 in the prior art are controlled by the control signal whose highest potential is the working voltage AVDD and have an original on-resistance RON0 when turned on. The voltage VBST is higher than the working voltage AVDD, so that the on-resistance RON of the switching switch of the present invention is smaller than the original on-resistance RON0 of the switching switch in the prior art.

Assuming that the output current IOUT output by the output terminal of the second operational amplifier OP2 of the present invention flows through the third switching switch M3 and the fourth switching switch M4 in the second switching switch unit SU2 having an on-resistance RON, power consumption will be generated P, while the output current IOUT in the prior art flows through the exchange switch with the original on-resistance RON0, the original power consumption P0 will be generated. Since the on-resistance RON is smaller than the original on-resistance RON0, the consumption of the exchange switch of the present invention is The power P will be less than the original power consumption P0 of the exchange switch in the prior art, and the temperature rise T caused by the power consumption P of the exchange switch of the present invention will be lower than that caused by the original power consumption P0 of the exchange switch in the prior art. The original temperature rise caused by T0.

In practical applications, the boost circuit BVC may be a charge pump circuit or a bootstrap circuit, but not limited thereto.

Please refer to FIG. 2 . FIG. 2 is an embodiment in which the boost circuit BVC is a charge pump circuit.

As shown in FIG. 2 , the boost circuit (charge pump circuit) BVC may include a first switch SW1 , a second switch SW2 , a third switch SW3 , a fourth switch SW4 and a capacitor C1 . The first switch SW1 and the second switch SW2 are connected in series between the working voltage AVDD and the ground voltage GND, and the third switch SW3 and the fourth switch SW4 are connected in series between the working voltage AVDD and (the boosted voltage VBST minus the voltage of the working voltage AVDD difference). One end of the capacitor C1 is coupled between the first switch SW1 and the second switch SW2 and the other end of the capacitor C1 is coupled between the third switch SW3 and the fourth switch SW4 .

It should be noted that the first switch SW1 and the fourth switch SW4 are controlled by the first clock signal CLK1 , and the second switch SW2 and the third switch SW3 are controlled by the second clock signal CLK2 . Wherein, the first clock signal CLK1 and the second clock signal CLK2 are opposite to each other. That is to say, when the first switch SW1 and the fourth switch SW4 are turned on by the first clock signal CLK1, the second switch SW2 and the third switch SW3 are turned off by the second clock signal CLK2; When the first switch SW1 and the fourth switch SW4 are turned off by the first clock signal CLK1 , the second switch SW2 and the third switch SW3 are turned on by the second clock signal CLK2 .

Please refer to FIG. 3 . FIG. 3 is an embodiment in which the boost circuit BVC is a bootstrap circuit.

As shown in FIG. 3 , the boost circuit (bootstrap circuit) BVC may include a first transistor switch M1 , a second transistor switch M2 , a first resistor R1 , a second resistor R2 , a diode D and a capacitor C1 . The first switch SU1 and the first resistor R1 are connected in series between the working voltage AVDD and the ground voltage GND, and the second resistor R2 and the second switch SU2 are connected in series between (the voltage difference between the boosted voltage VBST minus the working voltage AVDD) and the ground. Between the voltage GND, one end of the capacitor C1 is coupled between the first switch SU1 and the first resistor R1 and the other end of the capacitor C1 is coupled to (the voltage difference of the boosted voltage VBST minus the operating voltage AVDD), the first switch SU1 is also coupled between the second resistor R2 and the second switch SU2, and the second switch SU2 is controlled by the clock signal CLK.

Please refer to FIG. 4 . FIG. 4 is a graph showing switch control signals STB1 ˜ STB3 having different maximum potentials VG1 ˜ VG3 causing the switch switches to have different on-resistances RON1 ˜ RON3 . It can be seen from Figure 4 that for the same drain-source voltage VDS1 of the switch, when the highest potential of the control signal of the switch is boosted from the lower VG1 to the higher VG3, the switch is controlled by the switch. The on-resistance of the switching switch of the switch control signal is correspondingly reduced from the original high RON1 to the low RON3.

Please refer to FIG. 5A and FIG. 5B. FIG. 5A is a comparison diagram of the switch control signal before and after boosting; FIG. 5B is a comparison diagram of the output signal waveform affected by the switch control signal before and after boosting.

As shown in FIG. 5A and FIG. 5B, the highest potential of the switch control signal STB0 without boost processing is the working voltage AVDD, and the highest potential of the switch control signal STB after boost processing is the boosted voltage VBST, and The boost voltage VBST is significantly higher than the operating voltage AVDD.

At time T0, it can be seen from FIG. 5A that the switch control signal STB0 without boost processing will rise from the lowest potential VMIN to the working voltage AVDD, and the switch control signal STB after boost processing will rise from the lowest potential VMIN. to the boost voltage VBST, that is, both of them are switched from OFF state to ON state. It can be seen from Fig. 5B that the waveform of the output signal SOUT affected by the boosted switching switch control signal STB will rise faster and reach the ideal value at time T1, while the output signal SOUT affected by the boosted switching switch control signal STB0 will rise faster and reach the ideal value at time T1. The waveform of the output signal SOUT0 rises slowly and reaches the ideal value at time T2.

During the period from time T0 to T3 , both the non-increased switch control signal STB0 and the boosted switch control signal STB are maintained in an ON state.

At time T3, it can be seen from FIG. 5A that the switch control signal STB0 without boost processing will drop from the operating voltage AVDD to the lowest potential VMIN and maintain it until time T4, while the switch control signal STB after boost processing will be The boost voltage VBST drops to the lowest potential VMIN and maintains until time T4, that is, both of them are switched from ON state to OFF state at time T3 and remain OFF state until time T4. It can be seen from FIG. 5B that during the period from time T3 to T4, the waveforms of the original output signal SOUT0 affected by the non-increased switch control signal STB0 and the output signal SOUT affected by the boosted switch control signal STB are maintained at their ideal values.

At time T4, it can be seen from FIG. 5A that the switch control signal STB0 without boost processing will rise from the lowest potential VMIN to the working voltage AVDD, and the switch control signal STB after boost processing will rise from the lowest potential VMIN. to the boost voltage VBST, that is, both of them are switched from OFF state to ON state. It can be seen from Fig. 5B that the waveform of the output signal SOUT affected by the boosted switching switch control signal STB will drop quickly and reach the ideal value at time T5, while the waveform of the output signal SOUT affected by the non-boosted switching switch control signal STB0 The waveform of the original output signal SOUT0 decreases slowly and reaches the ideal value at time T6.

During the period from time T4 to T7 , both the non-increased switch control signal STB0 and the boosted switch control signal STB are maintained in an ON state.

At time T7, it can be seen from FIG. 5A that the switch control signal STB0 without boost processing will drop from the operating voltage AVDD to the lowest potential VMIN and maintain it until time T4, while the switch control signal STB after boost processing will be The boost voltage VBST drops to the lowest potential VMIN and maintains until time T4, that is, both of them are switched from ON state to OFF state at time T7 and remain OFF state until time T8. It can be seen from FIG. 5B that during the period from time T7 to T8, the original output signal SOUT0 affected by the unintensified switch control signal STB0 and the output signal SOUT affected by the boosted switch control signal STB are Waveforms are maintained at the ideal value unchanged. As for the rest, it can be deduced according to the foregoing and will not be repeated here.

Please refer to FIG. 6 . FIG. 6 is a comparative diagram of the influence of the switching switch control signal on the on-resistance of the switching switch before and after boosting. As shown in Figure 6, it is assumed that the switch is controlled by the boosted switch control signal STB and has an on-resistance RON when it is turned on, and the switch is controlled by the switch control signal that has not been boosted. When STB0 is turned on, it will have the original on-resistance RON0, because the highest potential (boosted voltage VBST) of the switching switch control signal STB after boosting processing is higher than the highest potential of the switching switching control signal STB0 without boosting processing (operating voltage AVDD), so comparing the on-resistance RON curve in Fig. 6 with the original on-resistance RON0 curve, it is clear that: The on-resistance RON of the switch is smaller than the original on-resistance RON0 of the switch controlled by the unpressurized switch control signal STB0 when the switch is turned on, so the effect of reducing the on-resistance of the switch when the switch is turned on can be achieved.

In addition, since the conduction resistance RON of the switch controlled by the boosted switch control signal STB0 is smaller than that of the switch controlled by the non-pressurized switch control signal STB0 The original on-resistance RON0 also makes the output current flow through the switch controlled by the boosted switch control signal STB consume less power than the output current flowing through the switch controlled by the non-boosted switch The control signal STB0 switches the power consumption when the switch is turned on, thereby effectively reducing the temperature of the source driver. For example, according to the experimental data, it can be found that the temperature of the source driver after boosting treatment can drop by about 3-4 degrees Celsius compared with the temperature of the source driver without boosting treatment, so it can effectively avoid The performance of the source driver is affected by the high temperature.

Based on the above-mentioned embodiments, it can be seen that compared with the prior art, the source driver according to the present invention uses a boost circuit to increase the highest potential of the switching switch control signal in the source driver from the original operating voltage to a boosted voltage. As a result, the on-resistance of the switching switch becomes smaller. In addition to reducing the power consumption of the switching switch when the output current flows through to effectively reduce the temperature of the source driver, it can also increase the slew rate of the operational amplifier of each channel. Therefore, the problems encountered in the prior art can be effectively overcome.

From the above detailed description of the preferred embodiments, it is hoped that the characteristics and spirit of the present invention can be described more clearly, rather than the scope of the present invention is limited by the preferred embodiments disclosed above. On the contrary, the intention is to cover various changes and equivalent arrangements within the scope of the claimed patent scope of the present invention.

Claims (11)

1. a kind of source electrode driver, which is characterized in that the source electrode driver includes:

One first operational amplifier is controlled by a control signal, and the maximum potential of the control signal is an operating voltage；

One booster circuit controls signal to be a boost voltage for operating voltage boosting and generate an alteration switch accordingly, Wherein the maximum potential of alteration switch control signal is the boost voltage, and the boost voltage is higher than the operating voltage；And

One first alteration switch unit couples first operational amplifier, when the first alteration switch unit is controlled by the exchange Switch control signal and there is when being connected a conducting resistance；

It wherein, should if having an original conducting resistance when the first alteration switch unit is controlled by the control signal and is connected Conducting resistance is less than the original conducting resistance.

2. source electrode driver as described in claim 1, which is characterized in that when the output that first operational amplifier is exported Electric current can generate a consumption power when flowing through the first alteration switch unit with the conducting resistance, and the consumption power is less than The output electric current flows through generated original consumption power when the first alteration switch unit with the original conducting resistance.

3. source electrode driver as claimed in claim 2, which is characterized in that a temperature rise caused by the consumption power is low An original temperature ascending amount caused by the original consumption power.

4. source electrode driver as described in claim 1, which is characterized in that the source electrode driver further includes:

One second operational amplifier is controlled by the operating voltage；And

One second alteration switch unit, couples the second operational amplifier, when the second alteration switch unit is controlled by the exchange Switch control signal and there is when being connected the conducting resistance, and the conducting resistance is less than the original conducting resistance.

5. source electrode driver as claimed in claim 4, which is characterized in that when the output that the second operational amplifier is exported Electric current can generate a consumption power when flowing through the second alteration switch unit with the conducting resistance, and the consumption power is less than The output electric current flows through generated original consumption power when the second alteration switch unit with the original conducting resistance.

6. source electrode driver as claimed in claim 5, which is characterized in that a temperature rise caused by the consumption power is low An original temperature ascending amount caused by the original consumption power.

7. source electrode driver as described in claim 1, which is characterized in that the source electrode driver further includes:

One sequential control circuit is coupled between the booster circuit and the first alteration switch unit, is controlled by the boost voltage.

8. source electrode driver as described in claim 1, which is characterized in that the booster circuit is a charge pump circuit.

9. source electrode driver as claimed in claim 8, which is characterized in that the charge pump circuit includes a first switch, one the Two switches, third switch, one the 4th switch and a capacitor, the first switch and the second switch be serially connected with the operating voltage with Between one ground voltage and third switch is serially connected with the operating voltage with the 4th switch and the boost voltage subtracts the work Between the voltage difference of voltage, one end of the capacitor is coupled between the first switch and the second switch and the other end of the capacitor Be coupled to the third switch the 4th switch between, the first switch with the 4th switch be controlled by one first clock signal and The second switch and third switch are controlled by one second clock signal, and first clock signal and second clock signal are each other Reverse phase.

10. source electrode driver as described in claim 1, which is characterized in that the booster circuit is a bootstrap mode circuit.

11. source electrode driver as claimed in claim 10, which is characterized in that the bootstrap mode circuit includes a first switch, one Second switch, a first resistor, a second resistance, a diode and a capacitor, the first switch are serially connected with the first resistor Between the operating voltage and a ground voltage and the second resistance and the second switch are serially connected with the boost voltage and subtract the work Between the voltage difference of voltage and the ground voltage, one end of the capacitor is coupled between the first switch and the first resistor and should The other end of capacitor is coupled to the voltage difference that the boost voltage subtracts the operating voltage, the diode be coupled to the operating voltage with Between the boost voltage, which is also coupled between the second resistance and the second switch, which is controlled by One clock signal.