CN206432258U - Encapsulation device for power switch - Google Patents
Encapsulation device for power switch Download PDFInfo
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- CN206432258U CN206432258U CN201720101425.0U CN201720101425U CN206432258U CN 206432258 U CN206432258 U CN 206432258U CN 201720101425 U CN201720101425 U CN 201720101425U CN 206432258 U CN206432258 U CN 206432258U
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Abstract
Description
技术领域technical field
本实用新型与芯片封装有关,特别是关于一种采用覆晶(Flip-chip)封装技术进行芯片封装的电力开关的封装装置。The utility model relates to chip packaging, in particular to a packaging device for a power switch that adopts flip-chip (Flip-chip) packaging technology for chip packaging.
背景技术Background technique
请参照图1,图1图示传统的电力开关的封装装置的示意图。如图1所示,于传统的电力开关的封装装置1中,芯片12设置于导线架10上,位于芯片12下表面的汲极D直接与导线架10接触,位于芯片12上表面的源极S及闸极G则分别通过金属片14或打线的方式与导线架10相连。Please refer to FIG. 1 . FIG. 1 is a schematic diagram of a conventional power switch packaging device. As shown in FIG. 1 , in a conventional power switch packaging device 1 , a chip 12 is arranged on a lead frame 10 , the drain D positioned on the lower surface of the chip 12 directly contacts the lead frame 10 , and the source D positioned on the upper surface of the chip 12 The S and the gate G are respectively connected to the lead frame 10 through the metal sheet 14 or by wire bonding.
然而,在实际应用中,此种封装结构的散热效果明显不佳,并且由于面积较大的汲极D直接与导线架10接触,导致导线架10的面积难以缩减。此外,无论源极S及闸极G皆通过金属片14或打线的方式与导线架10相连,均会有焊接所造成的额外阻抗,亦使其导电性变差。However, in practical applications, the heat dissipation effect of this packaging structure is obviously not good, and since the drain D with a larger area is in direct contact with the lead frame 10 , it is difficult to reduce the area of the lead frame 10 . In addition, no matter whether the source S and the gate G are connected to the lead frame 10 through the metal sheet 14 or bonding, there will be additional impedance caused by welding, which will also make the conductivity worse.
实用新型内容Utility model content
有鉴于此,本实用新型提供一种电力开关的封装装置,以解决现有技术所述及的问题。In view of this, the utility model provides a packaging device for a power switch to solve the problems mentioned in the prior art.
本实用新型的一较佳具体实施例为一种电力开关的封装装置。于此实施例中,电力开关的封装装置包括基板、金属片、芯片及封装体。金属片具有接触部、连接部及接脚部,连接部连接接触部与接脚部,且接触部的延伸方向不同于连接部的延伸方向。芯片具有第一电极与第二电极,且芯片设置于基板与金属片之间,第一电极与第二电极分别位于芯片的彼此相对的第一表面与第二表面。封装体覆盖部分基板、芯片及至少部分金属片。芯片的第二电极耦接基板,且芯片的第一电极耦接接触部的表面。A preferred embodiment of the utility model is a packaging device for a power switch. In this embodiment, the packaging device of the power switch includes a substrate, a metal sheet, a chip and a packaging body. The metal sheet has a contact portion, a connection portion and a leg portion, the connection portion connects the contact portion and the leg portion, and the extension direction of the contact portion is different from that of the connection portion. The chip has a first electrode and a second electrode, and the chip is arranged between the substrate and the metal sheet, and the first electrode and the second electrode are respectively located on the first surface and the second surface of the chip opposite to each other. The packaging body covers part of the substrate, chip and at least part of the metal sheet. The second electrode of the chip is coupled to the substrate, and the first electrode of the chip is coupled to the surface of the contact portion.
于一实施例中,接脚部具有第一侧边,第一侧边的部分暴露于封装体。In one embodiment, the pin portion has a first side, and a portion of the first side is exposed to the package body.
于一实施例中,接触部具有顶面,顶面至少部份暴露于封装体。In one embodiment, the contact portion has a top surface, and the top surface is at least partially exposed to the package.
于一实施例中,金属片的接触部、连接部与接脚部依序相连而呈现Z字形。In one embodiment, the contact portion, the connection portion and the pin portion of the metal sheet are sequentially connected to present a zigzag shape.
于一实施例中,接触部具有多个凸点。In one embodiment, the contact portion has a plurality of bumps.
于一实施例中,连接部为阶梯状。In one embodiment, the connecting portion is stepped.
于一实施例中,第二表面还包括第三电极。In one embodiment, the second surface further includes a third electrode.
于一实施例中,金属片与基板电性隔离。In one embodiment, the metal sheet is electrically isolated from the substrate.
于一实施例中,基板包括多个接脚,金属片与部分上述多个接脚电性接触。In one embodiment, the substrate includes a plurality of pins, and the metal sheet is in electrical contact with some of the plurality of pins.
于一实施例中,芯片为单一金氧半场效晶体管(MOSFET)元件的单一晶粒。In one embodiment, the chip is a single die of a single metal oxide half field effect transistor (MOSFET) device.
于一实施例中,芯片为多个共汲极的金氧半场效晶体管元件的单一晶粒。In one embodiment, the chip is a single die of multiple common-drain MOSFETs.
于一实施例中,第二表面还设置有第三电极、第四电极及第五电极,第三电极、第四电极及第五电极与基板电性连接。In one embodiment, the second surface is further provided with a third electrode, a fourth electrode and a fifth electrode, and the third electrode, the fourth electrode and the fifth electrode are electrically connected to the substrate.
相较于现有技术,根据本实用新型的电力开关的封装装置是直接以露出于封装体表面的金属片的接脚部作为汲极的接脚,故可有效减少传统的电力开关装置中将金属片焊接于导线架上所造成的额外阻抗,以增进其导电性。Compared with the prior art, the packaging device of the power switch according to the utility model directly uses the pins of the metal sheet exposed on the surface of the package as the pins of the drain, so it can effectively reduce the number of drain pins in the traditional power switch device. The additional impedance caused by the metal sheet soldered to the lead frame improves its conductivity.
此外,由于本实用新型的电力开关的封装装置是采用覆晶(Flip-chip)封装技术对芯片进行封装,使得面积较大的汲极位于芯片的顶面且面积较小的源极位于芯片的底面,不仅可缩减所需导线架的面积以节省成本之外,还可外加散热器(Heat sink)来协助汲极的散热,而源极则可通过位于其下方的电路板的通孔(Via)来协助散热。In addition, since the packaging device of the power switch of the present invention uses flip-chip (Flip-chip) packaging technology to package the chip, the drain with a larger area is located on the top surface of the chip and the source with a smaller area is located at the top of the chip. The bottom surface can not only reduce the area of the required lead frame to save costs, but also add a heat sink (Heat sink) to assist the heat dissipation of the drain, and the source can pass through the through hole (Via ) to help dissipate heat.
关于本实用新型的优点与精神可以通过以下的实用新型详述及附图得到进一步的了解。The advantages and spirit of the present utility model can be further understood through the following detailed description of the utility model and accompanying drawings.
附图说明Description of drawings
图1为传统的电力开关的封装装置的示意图。FIG. 1 is a schematic diagram of a conventional power switch packaging device.
图2A、图2B、图3A、图3B、图4、图5A及图5B分别图示根据本实用新型的不同具体实施例的电力开关的封装装置的示意图。2A , 2B , 3A , 3B , 4 , 5A and 5B are schematic diagrams of packaging devices for power switches according to different embodiments of the present invention.
主要元件符号说明:Description of main component symbols:
1、2A、2B、3A、3B、4、5A:电力开关的封装装置1, 2A, 2B, 3A, 3B, 4, 5A: Packaging devices for power switches
10:导线架10: lead frame
20:基板20: Substrate
12、22:芯片12, 22: chip
14、24:金属片14, 24: metal sheet
16、26:封装体16, 26: Encapsulation
240:接触部240: contact part
242、242’:连接部242, 242': connecting part
244:接脚部244: Connecting feet
20a、20b:接脚20a, 20b: pins
22a:第一表面22a: first surface
22b:第二表面22b: second surface
D:第一电极(汲极)D: the first electrode (drain)
S、S1:第二电极(源极)S, S1: second electrode (source)
G、G1:第三电极(闸极)G, G1: The third electrode (gate)
G2:第四电极(闸极)G2: The fourth electrode (gate)
S2:第五电极(源极)S2: fifth electrode (source)
PCB:电路板PCB: circuit board
W:凸点W: bump
具体实施方式detailed description
现在将详细参考本实用新型的示范性实施例,并在附图中说明所述示范性实施例的实例。在图式及实施方式中所使用相同或类似标号的元件/构件是用来代表相同或类似部分。Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Elements/members with the same or similar numbers used in the drawings and embodiments are used to represent the same or similar parts.
根据本实用新型的一较佳具体实施例为一种电力开关的封装装置。于此实施例中,电力开关的封装装置采用覆晶(Flip-chip)封装技术进行芯片封装。请参照图2A,图2A图示此实施例中的电力开关的封装装置的示意图。A preferred embodiment of the present invention is a packaging device for a power switch. In this embodiment, the packaging device of the power switch adopts flip-chip (Flip-chip) packaging technology for chip packaging. Please refer to FIG. 2A . FIG. 2A is a schematic diagram of the packaging device of the power switch in this embodiment.
如图2A所示,形成于电路板PCB上的电力开关的封装装置2A包括基板20、芯片22、金属片24及封装体26。基板20设置于电路板PCB上;芯片22具有第一电极D、第二电极S及第三电极G,且芯片22设置于基板20与金属片24之间;金属片24具有接触部240、连接部242及接脚部244。连接部242连接接触部240与接脚部244,且接触部240的延伸方向不同于连接部242的延伸方向。第一电极D位于芯片22的第一表面22a且第二电极S与第三电极G位于芯片22的第二表面22b。芯片22的第一表面22a与第二表面22b彼此相对。封装体26覆盖部分电路板PCB、部分基板20、芯片22及至少部分金属片24。As shown in FIG. 2A , a power switch packaging device 2A formed on a circuit board PCB includes a substrate 20 , a chip 22 , a metal sheet 24 and a packaging body 26 . The substrate 20 is arranged on the circuit board PCB; the chip 22 has a first electrode D, a second electrode S and a third electrode G, and the chip 22 is arranged between the substrate 20 and the metal sheet 24; the metal sheet 24 has a contact portion 240, a connection part 242 and pin part 244. The connection portion 242 connects the contact portion 240 and the pin portion 244 , and the extension direction of the contact portion 240 is different from the extension direction of the connection portion 242 . The first electrode D is located on the first surface 22 a of the chip 22 and the second electrode S and the third electrode G are located on the second surface 22 b of the chip 22 . The first surface 22a and the second surface 22b of the chip 22 are opposite to each other. The package body 26 covers part of the circuit board PCB, part of the substrate 20 , the chip 22 and at least part of the metal sheet 24 .
于此实施例中,基板20可为导线架(Lead frame);芯片22的第一电极D、第二电极S及第三电极G可分别为汲极(Drain electrode)、源极(Source electrode)及闸极(Gateelectrode),并且第一电极D的面积大于第二电极S及第三电极G的面积;芯片22的第一表面22a与第二表面22b分别为芯片22的顶面与底面;电路板PCB可以是一印刷电路板;金属片24可由具有良好导电性的金属材料构成;金属片24的接触部240、连接部242及接脚部244依序相连而呈现Z字形;封装体26可由封装胶等绝缘材料构成,但均不以此为限。In this embodiment, the substrate 20 can be a lead frame; the first electrode D, the second electrode S, and the third electrode G of the chip 22 can be respectively a drain electrode (Drain electrode), a source electrode (Source electrode) And the gate (Gateelectrode), and the area of the first electrode D is greater than the area of the second electrode S and the third electrode G; the first surface 22a and the second surface 22b of the chip 22 are respectively the top surface and the bottom surface of the chip 22; circuit The board PCB can be a printed circuit board; the metal sheet 24 can be made of a metal material with good conductivity; the contact portion 240, the connecting portion 242 and the pin portion 244 of the metal sheet 24 are connected in sequence to present a zigzag; the package body 26 can be formed by Insulating materials such as packaging glue, but not limited thereto.
位于芯片22的第二表面(底面)22b的第二电极S及第三电极G耦接基板20,并以基板20作为第二电极S及第三电极G的接脚。于实际应用中,第二电极S及第三电极G可通过基板20及电路板PCB的通孔(Via)来协助散热(未图示)。The second electrode S and the third electrode G located on the second surface (bottom surface) 22 b of the chip 22 are coupled to the substrate 20 , and the substrate 20 is used as pins of the second electrode S and the third electrode G. In practical applications, the second electrode S and the third electrode G can pass through the through holes (Via) of the substrate 20 and the circuit board PCB to assist heat dissipation (not shown).
位于芯片22的第一表面(顶面)22a的第一电极D耦接金属片24的接触部240的表面。金属片24的连接部242的两端分别与接触部240及接脚部244相连。金属片24的连接部242位于芯片22与基板20的一侧,并且连接部242与芯片22及基板20之间均彼此间隔而不相连。也就是说,金属片24与基板20电性隔离而不会焊接在一起。The first electrode D located on the first surface (top surface) 22 a of the chip 22 is coupled to the surface of the contact portion 240 of the metal sheet 24 . Two ends of the connection portion 242 of the metal sheet 24 are respectively connected to the contact portion 240 and the leg portion 244 . The connection portion 242 of the metal sheet 24 is located on one side of the chip 22 and the substrate 20 , and the connection portion 242 , the chip 22 and the substrate 20 are spaced apart from each other and not connected. That is to say, the metal sheet 24 is electrically isolated from the substrate 20 and will not be welded together.
金属片24的连接部242的延伸方向不同于金属片24的接触部240的延伸方向。于此实施例中,金属片24的接触部240是沿水平方向延伸,而金属片24的连接部242则是沿垂直方向延伸。然而,金属片24的接触部240与连接部242之间的夹角可视实际需求而调整,连接部242的形状也可以是直线、曲线或阶梯状,并不以此为限。The extending direction of the connection portion 242 of the metal sheet 24 is different from the extending direction of the contact portion 240 of the metal sheet 24 . In this embodiment, the contact portion 240 of the metal sheet 24 extends along the horizontal direction, while the connecting portion 242 of the metal sheet 24 extends along the vertical direction. However, the angle between the contact portion 240 and the connection portion 242 of the metal sheet 24 can be adjusted according to actual requirements, and the shape of the connection portion 242 can also be a straight line, a curve or a step shape, and is not limited thereto.
封装体26用以覆盖于金属片24之上并填满金属片24与电路板PCB及芯片22之间的空间,以使金属片24与电路板PCB彼此电性隔离。需说明的是,对于金属片24的接脚部244而言,虽然封装体26覆盖于金属片24的接脚部244上方,不过接脚部244的底部及侧边会暴露于封装体26。由于金属片24的接触部240耦接第一电极D,因此,暴露于封装体26的金属片24的接脚部244即可作为第一电极D的接脚。The package body 26 is used to cover the metal sheet 24 and fill the space between the metal sheet 24 , the circuit board PCB and the chip 22 , so that the metal sheet 24 and the circuit board PCB are electrically isolated from each other. It should be noted that, for the pin portion 244 of the metal sheet 24 , although the package body 26 covers the pin portion 244 of the metal sheet 24 , the bottom and sides of the pin portion 244 are exposed to the package body 26 . Since the contact portion 240 of the metal sheet 24 is coupled to the first electrode D, the pin portion 244 of the metal sheet 24 exposed to the package body 26 can serve as a pin of the first electrode D. Referring to FIG.
由于此实施例是以与第一电极D耦接的金属片24直接作为第一电极D的接脚,不需将金属片24焊接于基板20上,故可减少由于焊接所造成的额外阻抗,以增进其导电性。Because this embodiment uses the metal sheet 24 coupled with the first electrode D as the pin of the first electrode D directly, it is not necessary to weld the metal sheet 24 on the substrate 20, so the additional impedance caused by welding can be reduced. to enhance its conductivity.
此外,于电力开关的封装装置2A中,由于面积较大的第一电极(汲极)D位于芯片22的顶面且面积较小的第二电极(源极)S及第三电极(闸极)G位于芯片22的底面,不仅可缩减所需基板20的面积以节省成本之外,还可外加散热器来协助面积较大的第一电极(汲极)D的散热,而面积较小的第二电极(源极)S及第三电极(闸极)G则可通过位于其下方的基板20与电路板PCB的通孔来协助散热。In addition, in the packaging device 2A of the power switch, since the first electrode (drain) D with a larger area is located on the top surface of the chip 22 and the second electrode (source) S and third electrode (gate) with smaller areas ) G is located on the bottom surface of the chip 22, not only can reduce the area of the required substrate 20 to save cost, but also add a radiator to assist the heat dissipation of the first electrode (drain) D with a larger area, while the smaller area The second electrode (source) S and the third electrode (gate) G can assist heat dissipation through the through holes of the substrate 20 and the circuit board PCB located below them.
请参照图2B,于另一实施例的电力开关的封装装置2B中,金属片24的接触部240的顶面至少部份暴露于封装体26,使得接触部240能外接散热器来协助面积较大的第一电极(汲极)D的散热。Please refer to FIG. 2B , in another embodiment of the power switch packaging device 2B, the top surface of the contact portion 240 of the metal sheet 24 is at least partially exposed to the package body 26, so that the contact portion 240 can be externally connected to a heat sink to help reduce the area. Heat dissipation of the large first electrode (drain) D.
请参照图3A,于另一实施例的电力开关的封装装置3A中,金属片24的接触部240的下表面与芯片22的第一电极(汲极)D接触的区域可形成有多个凸点W,以增进彼此间的连接强度。Please refer to FIG. 3A , in another embodiment of a power switch packaging device 3A, a plurality of protrusions may be formed in the area where the lower surface of the contact portion 240 of the metal sheet 24 is in contact with the first electrode (drain) D of the chip 22 . Point W to increase the connection strength between each other.
请参照图3B,于另一实施例的电力开关的封装装置3B中,金属片24的连接部242’为阶梯状,但不以此为限。Please refer to FIG. 3B , in another embodiment of a power switch packaging device 3B, the connecting portion 242' of the metal sheet 24 is stepped, but not limited thereto.
需说明的是,前述实施例中的芯片22均为单一金氧半场效晶体管(MOSFET)的单一晶粒,但实际上芯片22亦可为包括多个金氧半场效晶体管元件的单一晶粒。举例而言,如图4所示,于电力开关的封装装置4中,位于芯片22的第一表面(顶面)22a的第一电极D为第一金氧半场效晶体管元件与第二金氧半场效晶体管元件共用的汲极(Common drain),至于第一金氧半场效晶体管元件的第二电极(源极)S1及第三电极(闸极)G1与第二金氧半场效晶体管元件的第四电极(闸极)G2及第五电极(源极)S2分别位于芯片22的第二表面(底面)22b。It should be noted that the chip 22 in the foregoing embodiments is a single crystal grain of a single metal oxide half field effect transistor (MOSFET), but actually the chip 22 can also be a single crystal grain comprising a plurality of metal oxide half field effect transistor elements. grain. For example, as shown in FIG. 4, in the packaging device 4 of the power switch, the first electrode D located on the first surface (top surface) 22a of the chip 22 is a first metal oxide half field effect transistor element and a second gold electrode. The drain (Common drain) shared by the oxygen half field effect transistor element, as for the second electrode (source) S1 and the third electrode (gate) G1 of the first metal oxide half field effect transistor element and the second metal oxide half field effect transistor element The fourth electrode (gate) G2 and the fifth electrode (source) S2 of the effective transistor element are respectively located on the second surface (bottom surface) 22b of the chip 22 .
于另一实施例中,如图5A所示,金属片24的接脚部244亦可位于封装体26内并与位于其下方的基板20电性接触。此外,如图5B所示,基板20可包括多个接脚20a~20b,并且金属片24可与部分的上述多个接脚20a~20b电性接触。In another embodiment, as shown in FIG. 5A , the pin portion 244 of the metal sheet 24 may also be located in the package body 26 and be in electrical contact with the substrate 20 located thereunder. In addition, as shown in FIG. 5B , the substrate 20 may include a plurality of pins 20 a - 20 b , and the metal sheet 24 may be in electrical contact with part of the plurality of pins 20 a - 20 b.
通过以上较佳具体实施例的详述,是希望能更加清楚描述本实用新型的特征与精神,而并非以上述所公开的较佳具体实施例来对本实用新型的范畴加以限制。相反地,其目的是希望能涵盖各种改变及具相等性的安排于本实用新型所欲申请的专利范围的范畴内。Through the detailed description of the preferred specific embodiments above, it is hoped that the features and spirit of the present utility model can be described more clearly, and the scope of the present utility model is not limited by the preferred specific embodiments disclosed above. On the contrary, the purpose is to cover various changes and arrangements with equivalents within the scope of the patent scope of the utility model.
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Effective date of registration: 20190819 Address after: Taiwan Hsinchu County China jhubei City, Taiwan 5 yuan a Street No. 9 Building 1 Patentee after: Upi Semiconductor Corp. Address before: 6, No. 5, Taiyuan street, No. 5, Taiyuan street, bamboo North City, county Patentee before: UBIQ Semiconductor Corp. |