CN204790963U - High -speed mass -memory unit based on TF card array - Google Patents

Abstract

The utility model proposes a high-speed and large-capacity storage device based on a TF card array, including an FPGA for realizing storage array control and interface, and a DDR external memory connected to the FPGA for data caching, and a device for storing data information. Data storage TF card array, management information storage TF card array for storing management information. The utility model innovatively adopts the TF card array as the storage medium, relies on the parallel read-write control of the array to realize a high data throughput rate, and relies on a convenient detachable structure to realize excellent maintainability. The utility model not only effectively inherits the NAND? The advantages of Flash memory chips such as small delay, low power consumption, low weight, high data throughput rate, and good shock resistance have shielded NAND? The complex management system of the Flash memory chip also effectively overcomes the control complexity and high replacement cost of SATA solid-state hard drives used in module-level high-speed storage products, and has extremely high technical and economic benefits.

Description

High-speed mass storage device based on TF card array

technical field

The utility model relates to the field of high-speed and large-capacity storage devices, in particular to high-speed and large-capacity storage devices based on TF card arrays.

Background technique

At present, there are three types of high-speed and large-capacity storage technology solutions: high-speed and large-capacity storage solutions based on SATA magnetic media hard disk arrays, high-speed and large-capacity storage solutions based on SATA solid-state drives or solid-state hard disk arrays, and high-speed and large-capacity storage solutions based on NAND Flash memory chips. Among them, solutions based on magnetic hard disks or solid state drives are mostly used for system-level solutions on computer or server platforms, and solutions based on FLASH are mostly used for module-level solutions for independent storage. In recent years, due to the emergence of FPGA SATA controller IP cores, there are also module-level solutions based on SATA solid-state drives.

Disadvantages of high-speed and large-capacity storage solutions based on SATA magnetic media hard disk arrays: As traditional storage media, magnetic media hard disks have always been the mainstream choice for large-scale storage systems due to their low cost and high maturity. However, due to the limitations of its mechanical structure and physical characteristics, magnetic media hard disks have poor shock resistance, slow single-disk transmission speed, and complicated management. High power consumption and bulky size make it difficult to provide module-level high-speed storage products.

Defects of high-speed and large-capacity storage solutions based on NAND Flash memory chips: NAND Flash memory chips have been widely used in the field of data storage in recent years due to their advantages such as low delay, low power consumption, high data throughput, light weight, and good shock resistance. However, due to the inherent problem of bad blocks in NAND Flash memory chips, which are difficult to solve in the manufacturing process, storage systems that directly use NAND Flash memory chip arrays as storage media need to directly implement control logic such as bad block management and ECC verification, resulting in The system control complexity is very high. In addition, NAND Flash has a certain read and write life cycle. With the spread of bad blocks, it is easy to cause damage to the entire memory chip. Therefore, the maintenance of high-speed and large-capacity storage based on NAND Flash memory chips is relatively difficult.

Defects of high-speed and large-capacity storage solutions based on SATA solid-state drives or solid-state drive arrays: the core storage medium of SATA solid-state drives is still NAND Flash memory chips, but the corresponding management logic is packaged outside the NAND Flash memory chip array, and the interface is unified to the standard SATA interface, so the market share in the large-capacity storage system of the computer or server platform is increasing. However, due to the complexity of SATA control logic, when used in module-level high-speed storage products, the complexity of its control system makes its system design and implementation very difficult. In addition, due to its high integration, once the NAND Flash memory chip is damaged, the replacement cost is relatively high.

Utility model content

The utility model proposes a high-speed and large-capacity storage device based on a TF card array, which can solve the problems of high design difficulty, high maintenance cost and difficult maintenance and replacement of module-level high-speed storage products.

The technical scheme of the utility model is realized in that a kind of high-speed large-capacity storage device based on the TF card array includes an FPGA for realizing storage array control and an interface, and a DDR external memory for data buffering connected with the FPGA, A data storage TF card array for storing data information, a management information storage TF card array for storing management information; the data storage TF card array can be used in RAID0 maximum capacity configuration mode, or can be stored redundantly in RAID1 In the high-reliability mode, the FPGA is an integrated module, and the outside of the module is provided with two interfaces.

Preferably, the external interface of the module mainly includes four 3.125GbpsGTX interfaces for sending and receiving high-speed data, and two-way SPI bus interface for sending and receiving control commands and status information.

Preferably, the module further includes a management information storage TF card array that can be used to save corresponding management information of data stored in the data storage TF card array.

Compared with the prior art, the utility model has the advantages that: the utility model innovatively adopts the TF card array as the storage medium, relies on the parallel read and write control of the array to achieve high data throughput rate, and relies on the convenient detachable structure Excellent maintainability is achieved. The utility model not only effectively inherits the advantages of small delay, low power consumption, low weight, high data throughput rate and good shock resistance of the NAND Flash storage chip, but also shields the complex management system of the NAND Flash storage chip, and effectively overcomes the SATA solid-state hard disk It is used for the problems of control complexity and high replacement cost of module-level high-speed storage products, and has extremely high technical and economic benefits.

Description of drawings

Fig. 1 is a block diagram of the hardware composition of the high-speed data storage module based on the TF card array of the present utility model;

Fig. 2 is a block diagram of storage array control and interface FPGA logic composition of the utility model.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. example. Based on the embodiments of the present utility model, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of the present utility model.

Embodiment: referring to Fig. 1 and Fig. 2, a kind of high-speed large-capacity storage device based on TF card array, the main components of hardware include the FPGA for realizing storage array control and interface, the DDR external memory for data caching, and the Data storage TF card array for storing data information, management information storage TF card array for storing management information. Among them, the data storage TF card array can be used not only in RAID0 maximum capacity configuration mode, but also in high reliability mode of RAID1 redundant storage. The external interface of the module mainly includes four 3.125GbpsGTX interfaces for sending and receiving high-speed data, and two-way SPI bus interface for sending and receiving control commands and status information.

When the new product is initialized, the upper system sends the array mode configuration command through the SPI bus, configures the data storage TF card array into a large-capacity RAID0 mode or a high-reliability RAID1 redundant mode, and completes the data storage TF card array and management information storage TF card array formatting work.

When data is stored, the upper system sends the storage start and end position command and the start storage command through the SPI bus, the storage array control and interface FPGA receives the control command and completes the decoding, and then receives the data transmitted by the GTX bus and caches it in the DDR external memory , the cached data is stored in the DDR cache data to the TF card through the DMA controller of the data storage TF card array controller. In RAID1 mode, the same data will be copied and stored in different data storage areas.

When using the DMA controller to exchange cached data and TF cards, the module adopts the service response of "prepare first, arrive first, serve first" and a multi-set ping-pong buffer mechanism to dynamically allocate memory address space, thereby minimizing the number of single-chip The TF card waits for a delay to ensure the real-time reliability of data transmission. When the data is read, the upper system sends the start and end position instruction of the data reading and the start reading instruction through the SPI bus. Storage array control and interface FPGA receives the control command and completes the decoding, reads the data of each TF card in the data storage TF card array to the corresponding buffer through the DMA controller of the data storage TF card array controller and completes the data block Numbering and sorting work, and finally the numbered data blocks are returned to the upper system through the GTX interface.

In order to effectively organize high-speed stored data, the module also provides a management information storage TF card array, which can be used to save the corresponding management information and other auxiliary information (such as data storage time information, geographical location) of the data stored in the data storage TF card array Information, surrounding environment information, etc.), thereby helping the efficient realization of the module storage data file management system and the hard backup system of the data-related information management database. When storing and reading management information and auxiliary information, the module uses logic similar to data storage and reading to implement.

Fig. 2 is a block diagram of storage array control and interface FPGA logic composition of the utility model.

The utility model innovatively designs and realizes the high-speed data storage structure based on the TF card array; innovatively designs and realizes the parallel storage and reading management technology of the TF card array, adopts the mechanism of "prepare first, arrive first, serve first", and the data The throughput rate exceeds 1G bytes/s; innovatively realizes the TF card array management technology that can be deleted and configured, and adopts the "dynamic memory allocation DMA management mechanism", which can be used in RAID0 maximum capacity configuration mode or RAID1 redundant storage The high-reliability mode is used, and the number of TF cards composed of the array can be configured on demand in 1 to 32 pieces according to the throughput requirements. The utility model has the advantages of small storage delay, high data throughput rate, low power consumption, light weight, good shock resistance, and convenient maintenance and replacement.

The English full name and Chinese definition of the abbreviations appearing in the utility model:

TF - Trans-flashCard, flash memory card

IP——IntellectualPropertycore, a hardware description language program with specific circuit functions

ECC - ErrorCorrectingCode, error checking and correction

DDR - DoubleDataRate, double rate synchronous dynamic random access memory

SPI - SerialPeripheralInterface, Serial Peripheral Interface

DMA - DirectMemoryAccess, direct memory access

SATA - SerialAdvancedTechnologyAttachment, serial advanced technology connection

RAID——RedundantArrayofIndependentDisks, redundant array of independent disks

FPGA——FieldProgrammableGateArray, Field Programmable Logic Gate Array

RAID0——RedundantArrayofIndependentDisks0, level 0 disk array, original array

RAID1——RedundantArrayofIndependentDisks1, level 1 disk array, mirror array

The above descriptions are only preferred embodiments of the present utility model, and are not intended to limit the present utility model. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present utility model shall be included in the Within the protection scope of the present utility model.

Claims (3)

1. A high-speed large-capacity storage device based on a TF card array, characterized in that: comprising an FPGA for realizing storage array control and interface, and a DDR external memory for data buffering connected with the FPGA, for storing data information A data storage TF card array, a management information storage TF card array for storing management information; the data storage TF card array can be used in RAID0 maximum capacity configuration mode, or can be used in RAID1 redundant storage high reliability mode, The FPGA is an integrated module, and the outside of the module is provided with two interfaces. 2. The high-speed mass storage device based on TF card array according to claim 1, characterized in that: the external interface of the module mainly includes 4 3.125GbpsGTX interfaces for sending and receiving high-speed data, for sending and receiving control commands and Two parts of the bidirectional SPI bus interface for status information. 3. The high-speed mass storage device based on TF card array according to claim 1 or 2, characterized in that: said module also includes a management system that can be used to preserve the corresponding management information of stored data in the data storage TF card array Information storage TF card array.