CN202948921U - Non-insulated type power module - Google Patents
Non-insulated type power module Download PDFInfo
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- CN202948921U CN202948921U CN2012200752071U CN201220075207U CN202948921U CN 202948921 U CN202948921 U CN 202948921U CN 2012200752071 U CN2012200752071 U CN 2012200752071U CN 201220075207 U CN201220075207 U CN 201220075207U CN 202948921 U CN202948921 U CN 202948921U
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- power model
- type power
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- copper base
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 42
- 239000010949 copper Substances 0.000 claims abstract description 42
- 229910052802 copper Inorganic materials 0.000 claims abstract description 42
- 239000003822 epoxy resin Substances 0.000 claims description 12
- 229920000647 polyepoxide Polymers 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 239000004411 aluminium Substances 0.000 claims description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 7
- 238000007789 sealing Methods 0.000 claims description 6
- 238000010276 construction Methods 0.000 claims description 5
- 238000000465 moulding Methods 0.000 claims description 4
- 239000000758 substrate Substances 0.000 abstract description 16
- 238000012536 packaging technology Methods 0.000 abstract description 4
- 230000035882 stress Effects 0.000 abstract description 2
- 230000008646 thermal stress Effects 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 7
- 238000005452 bending Methods 0.000 description 6
- 238000005538 encapsulation Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000003466 welding Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 239000000565 sealant Substances 0.000 description 2
- 239000000084 colloidal system Substances 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/37099—Material
- H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/37117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/37124—Aluminium [Al] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Provided by the utility model is a non-insulated type power module that comprises a copper substrate, power module chips arranged at designated positions of the copper substrate, gate pole electrodes led out from the power module chips, and a housing for covering the copper substrate, the gate pole electrodes and the power module chips. Specifically, the gate pole electrodes are led out from the housing; the power module chips are directly welded on the copper substrate; and the electrodes are welded on the power module chips. According to the utility model, the provided non-insulated type power module has advantages of simple structure, simple packaging technology, and easy realization; and the mechanical stress and the thermal stress of the module can be effectively reduced, thereby improving the reliability of the non-insulated type power module.
Description
Technical field
The utility model relates to semiconductor, relates in particular to nonisulated type power model and encapsulation technology thereof.
Background technology
Power model, structure or uninsulated structure according between its chip and substrate being electric insulation are divided into the insulated type power model, and nonisulated type power model.
Usually its substrate is as public electrode for power model, and it has the characteristics such as forward voltage drop is low, surge current is large, is mainly used in all kinds of bonding machines and Switching Power Supply.
But, be usually operated under high voltage, large current condition just because of power model, therefore, the heat radiation of power model is exactly a problem usually must considering.
The utility model content
One of the purpose of this utility model is to provide a kind of nonisulated type power model.This nonisulated type power model can reduce the thermal resistance of module, thereby improves the reliability of power model.
Another purpose of the present utility model is to simplify the structure of nonisulated type power model, thereby reduces manufacturing cost.
The nonisulated type power model 200 that provides according to the utility model comprises: copper base 210; Be positioned at the power model chip 220 of copper base 210 specified location; The gate electrode 230 of drawing from power model chip 220; And shell 280, be used for cover cap copper base 210, gate electrode 230 and power model chip 220; Wherein, power model chip 220 directly is welded on copper base 210, and electrode 230 is welded on power model chip 220.
The nonisulated type power model 200 that provides according to the utility model, wherein, power model chip 220, gate electrode 230, copper base 210 and shell 280 adopt 270 sealings of silicon gel, adopt epoxy resin 290 cure package on silicon gel 270, to form hermetically-sealed construction.
according to nonisulated type power model 200 of the present utility model, gate electrode 230 is preferably by the moulding of bending.
according to nonisulated type power model 200 of the present utility model, between chip 220 and chip 220 in nonisulated type power model 200, preferably adopt aluminium wire to be bonded in.
according to nonisulated type power model 200 of the present utility model, the thickness of copper base is preferably 3 millimeters.
Description of drawings
The processing step that insulated type power model of the prior art shown in Fig. 1 adopts when encapsulation;
Shown in Fig. 2 is the internal structure schematic diagram of insulated type power model in prior art;
Shown in Fig. 3 is the processing step that nonisulated type power model of the present utility model adopts when encapsulation; And
Shown in Fig. 4 is the internal structure schematic diagram that adopts the formed nonisulated type power model of packaging technology of the present utility model.
Embodiment
Nonisulated type power model and the packaging technology thereof of the utility model embodiment are described with reference to the accompanying drawings.
Those skilled in the art can understand, and the term that adopts in the utility model " power model " is a kind of general reference, and it can be thyristor, diode (led) module, IGBT module or MOSFET module etc.But for convenience, in the description of specification, only represent thyristor, diode (led) module, IGBT module or MOSFET module etc. with " power model ".
Power model is owing to being usually operated under large electric current, and the thermal resistance of itself can be subjected to the impact of several factors.For example, the radiating condition of module, power, the thickness of weld layer and the thermal coefficient of expansion of weld layer etc. when device is worked all can affect the thermal resistance of device.
The thermal resistance of power model is provided by following formula:
R=Δ T/P formula (1)
Wherein, R is thermal resistance;
Δ T is the temperature difference of device two ends formation;
P is device due to adding electric current and the caused power of voltage.
Can find out from formula (1), the temperature difference of device two ends formation is less, and thermal resistance is less.Therefore, manage to reduce the thickness of weld layer, can reduce the temperature difference at device two ends, thereby greatly reduce the thermal resistance of power device.
Shown in Fig. 1 is the insulated type power module package technique of prior art, and shown in Fig. 2 is the internal structure schematic diagram that adopts the insulated type power model of the made prior art of technique shown in Figure 1.
As shown in Figure 2, the insulated type power model 100 of prior art comprises copper base 110, and it is arranged at the bottom of power model 100.Be provided with Direct Bonding copper Direct Bonding Copper on copper base 110, DBC substrate 120.One or more chips 140 are mounted on the precalculated position of DBC substrate 120, form insulated type power model 100 after encapsulation.
Chip 140 by aluminium wire connecting bridge 150 in the inside modules connection that goes between.Bending electrode 130 is formed by the bending copper sheet.One end of copper sheet is contacted with on the lip-deep chip of DBC substrate 120 bendingly, and its other end is bent to form bending electrode 130 at the upper surface of power model.
In addition, power model 100 also comprises the shell 180 of coated copper substrate 110 grades.The inside of shell 180 is filled with silicon gel 170, and power model 100 also comprises cover plate of outer casing 190.
The power model that Fig. 1 illustrates prior art shown in Figure 2 needs to form by following processing step at least:
Chip 140 is installed to the specified location of DBC substrate 120;
DBC substrate 120 is soldered on the precalculated position of copper base 110;
By the aluminium wire bonding, a chip and another chip are coupled together;
Add shell 180 for copper base 110 grades;
Give the power model encapsulating, the sealing that have added shell 180;
Add cover plate of outer casing 190, and further sealed package;
To bend electrode 130 moulding of bending on cover plate of outer casing.
Can find out from Fig. 1 and Fig. 2, the insulated type power model of prior art is in when work, owing to first chip 140 being welded on DBC substrate 120, and then DBC substrate 120 is welded on copper base 110, thereby its thermal resistance is larger, and heat dissipation problem is difficult to solve.
In addition, in above-mentioned processing step, when sealant pouring and sealing, need to add cover plate of outer casing 190, thereby complex structure, cost are higher.
In order to address this problem, adopt in the utility model chip and copper base are directly welded, replace original with chips welding at the processing step that then again DBC is welded on DBC on copper base, and adopt epoxy resin to carry out plastic packaging to power model, replace original process for filling colloid into.
Packaging technology of the present utility model as shown in Figure 3.
As shown in Figure 3, nonisulated type power module package technique of the present utility model comprises the steps:
Step (1), i.e. components and parts positioning step: the specified location that power model chip 220 is installed to copper base 210;
Step (2), i.e. the first welding step: power model chip 220 and copper base 210 are welded together;
Step (3) namely seals step: copper base 210 and a shell 280 that will be welded with power model chip 220 are installed together, and adopt fluid sealant 270 to seal;
Step (4), i.e. curing schedule: adopt epoxy resin 290, encapsulation copper base 210 also makes epoxy resin cure.
In above-mentioned technique of the present utility model, power model chip 220 and copper base 210 are welded together under vacuum state carry out.
Complete power model chip 220 and copper base 210 are welded together after, can also comprise second welding step: on described power model chip 220, gate electrode 230 is welded on power model chip 220, and makes gate electrode 230 out exposed from epoxy resin 290.
In addition, above-mentioned complete curing schedule after, can also comprise an outward appearance treatment step, that is, with the moulding of bending of the bare electrode on shell 280.
By processing step as shown in Figure 3, just can form nonisulated type power model of the present utility model.
Adopt the internal structure schematic diagram of the formed nonisulated type power model of the present utility model of nonisulated type power module package technique of the present utility model shown in Fig. 4.
Fig. 4 and Fig. 2 can be found out after relatively, the difference of the internal structure of the insulated type power model of the internal structure of nonisulated type power model of the present utility model and prior art shown in Figure 2 is, in insulated type power model of the prior art with the DBC substrate, and in of the present utility model nonisulated type power model shown in Figure 4, be without the DBC substrate, namely chip is directly to be welded on copper base.
As shown in Figure 4, nonisulated type power model of the present utility model comprises:
Be positioned at the power model chip 220 of copper base 210 specified location; And
The gate electrode 230 of drawing from the power model chip,
Shell 280 is used for cover cap and lives copper base, gate electrode and power model chip, and gate electrode 230 is drawn from shell;
Wherein, power model chip 220 and gate electrode 230 are directly to be welded on copper base 210, and
Wherein, gate electrode 230 1 ends that first are coupled mutually with silicon gel 270 sealing power model chips 220, copper base 210 and with power model chip 220 are to form a hermetically-sealed construction, then use the epoxy resin 290 whole hermetically-sealed constructions of cure package on silicon gel 270, thereby form nonisulated type power model 200.Therefore epoxy resin 290 is placed on silicon gel 270, forms to solidify seal modules, and itself and shell 280 be the internal structure of the nonisulated type power models 200 of protection jointly.
In addition, in the internal structure of the insulated type power model 100 of prior art shown in Figure 2, be to adopt aluminium wire 150 to be bonded together between power model chip 140 and another power model chip 140.Compare with Fig. 2, in the internal structure of of the present utility model nonisulated type power model 200 shown in Figure 4, the modular structure of this employing aluminium wire bonding is not shown.
But those skilled in the art are appreciated that in concrete circuit structure, also can adopt aluminium wire that a certain chip and another chip are got up by the circuit requirement bonding in nonisulated type power model 200 of the present utility model.
Can find out from above-mentioned processing step of the present utility model, because the special construction (being nonisulated type) of nonisulated type power model makes its pressure drop very low, and weld layer thickness is main thin more a lot of than insulated type module because do not use DBC, so more be conducive to the heat radiation of module, thereby make its thermal resistance greatly reduce.In a preferred embodiment, thickness that can also attenuate copper base 210 is with further reduction thermal resistance, for example, the thickness of copper base 210 is arranged on 3 millimeter.
In addition, adopt epoxy resin 290 to replace cover plate of outer casing 190 shown in Figure 2, simple in structure, and technique is simple, be easy to realize, and use the epoxide-resin glue sealing can effectively reduce mechanical stress and the thermal stress of module, thus the reliability in the time of improving nonisulated type power model work.
Above, describe specific embodiment of the utility model with reference to the accompanying drawings.But those skilled in the art can understand, in the situation that do not depart from principle of the present utility model and spirit, can also make some modifications and changes to above-described embodiment of the present utility model.The description of embodiment is only in order to make those skilled in the art can understand, implement the utility model, the utility model should not to be interpreted as only to only limit to described embodiment.Protection range of the present utility model is limited by claims.
Claims (7)
1. a nonisulated type power model (200), it comprises:
Copper base (210);
Be positioned at the power model chip (220) of described copper base (210) specified location;
The gate electrode (230) of drawing from described power model chip (220); And
Shell (280) is used for the described copper base of cover cap (210), gate electrode (230) and described power model chip (220);
Wherein, described power model chip (220) directly is welded on described copper base (210), and described gate electrode (230) is welded on described power model chip (220).
2. nonisulated type power model as claimed in claim 1 (200), is characterized in that,
Wherein, described power model chip (220), described gate electrode (230), described copper base (210) and described shell (280) adopt silicon gel (270) sealing, in upper epoxy resin (290) cure package that adopts of described silicon gel (270), to form hermetically-sealed construction.
3. nonisulated type power model as claimed in claim 2 (200), is characterized in that, described gate electrode (230) is drawn from described epoxy resin (290).
4. nonisulated type power model as claimed in claim 3 (200), is characterized in that, described gate electrode (230) is by the moulding of being bended.
5. nonisulated type power model as described in arbitrary claim in claim 1 to 4 (200), it is characterized in that, between chip (220) and chip (220) in described nonisulated type power model (200), adopt the aluminium wire bonding to get up.
6. nonisulated type power model as claimed in claim 1 (200), is characterized in that, the thickness of described copper base is 3 millimeters.
7. nonisulated type power model as claimed in claim 1, is characterized in that, described power model is thyristor module, diode (led) module, IGBT module or MOSFET module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012200752071U CN202948921U (en) | 2012-02-22 | 2012-02-22 | Non-insulated type power module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012200752071U CN202948921U (en) | 2012-02-22 | 2012-02-22 | Non-insulated type power module |
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| Publication Number | Publication Date |
|---|---|
| CN202948921U true CN202948921U (en) | 2013-05-22 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2012200752071U Expired - Lifetime CN202948921U (en) | 2012-02-22 | 2012-02-22 | Non-insulated type power module |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103295920A (en) * | 2012-02-22 | 2013-09-11 | 江苏宏微科技有限公司 | Noninsulated type power module and packaging process thereof |
| CN106783773A (en) * | 2016-12-13 | 2017-05-31 | 中航（重庆）微电子有限公司 | A kind of Non-insulation bi-tower type diode module |
-
2012
- 2012-02-22 CN CN2012200752071U patent/CN202948921U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103295920A (en) * | 2012-02-22 | 2013-09-11 | 江苏宏微科技有限公司 | Noninsulated type power module and packaging process thereof |
| CN103295920B (en) * | 2012-02-22 | 2016-04-27 | 江苏宏微科技有限公司 | Nonisulated type power model and packaging technology thereof |
| CN106783773A (en) * | 2016-12-13 | 2017-05-31 | 中航（重庆）微电子有限公司 | A kind of Non-insulation bi-tower type diode module |
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Address after: 213022 No. 18 middle Huashan Road, Xinbei District, Jiangsu, Changzhou Patentee after: MACMIC SCIENCE & TECHNOLOGY Co.,Ltd. Address before: 213022 No. 18 middle Huashan Road, Xinbei District, Jiangsu, Changzhou Patentee before: MACMIC SCIENCE & TECHNOLOGY Co.,Ltd. |
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Granted publication date: 20130522 |