CN202720576U - Interface device for switching low-order input/output port to peripheral component interconnect (PCI) interface port - Google Patents
Interface device for switching low-order input/output port to peripheral component interconnect (PCI) interface port Download PDFInfo
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Abstract
The utility model discloses an interface device for switching a low-order input/output port to a peripheral component interconnect (PCI) interface port. The device comprises an addressing circuit, a PCI controller connected to the addressing circuit and a device controller connected to the PCI controller, wherein the addressing circuit sets an interface address of the low-order input/output port; and the PCI controller adds a piece of data to the interface address, and transmits the data to the PCI interface port through a PCI transceiver program. Therefore, the interface address of the low-order input/output port can be used for transmitting the data.
Description
Technical field
The utility model is a kind of computer interface unit, and espespecially a kind of low order input/output port turns the interface arrangement of PCI interface port.
Background technology
In traditional microcomputer system, be to see through input equipment and output device and user to link up; Wherein above-mentioned input equipment relatively common are mouse or keyboard; Then be that screen display, loudspeaker or printer are arranged aspect output device; But, that input equipment or output device at least all can see through a computer interface and contact with above-mentioned microcomputer system, these interfaces be referred to as " port " (Port) ﹔ generally in microcomputer system, obtain the data of this input equipment or give this output device with data through this port; For general input equipment and output device commonly used, have the interface IP address of corresponding this port in early stage 80X86 microcomputer system all defines also again, please refer to shown in the following table:
| 000～01F | No. 1 dma controller (8237) | 200～207 | GAME I/O |
| 020～03F | No. 1 interruptable controller (8259A) | 278～27F | LPT2 |
| 022～012 | CHIPSET Control Registers.I/O port. | 2B0～2DF | GRAPHlCS Adapter Controller |
| 040～05F | Timer (8254) | 2F8～2FF | COM2 |
| 060～06F | Keyboard Control IC (8742) | 300～31F | Prototype card (Proto Type Card) |
| 070～07F | RealTime Colck and NMI interrupt | 360～36F | PC network |
| 080～09F | The page buffer (74LS612) that DMA is used | 378～37F | LPT1 |
| 0A0～0BF | No. 2 interruptable controllers (8259A) | 380～38F | SDLC communication/Binary Synchronous Communication (No. 2) |
| 0C0～0DF | No. 2 dma controllers (8237) | 3A0～3AF | SDLC communication/Binary Synchronous Communication (No. 1) |
| 0F0 | BUSY signal in order to Clear mathematics co-treatment device | 3B0～3BF | Black and white screen and printer adapter |
| 0F1 | In order to Reset mathematics co-treatment device | 3C0～3CF | The EGA card |
| 0F8～0FF | Mathematics co-treatment device | 3D0～3DF | Color drawing screen adapter (CGA) |
| 1F0～1F8 | Hard disk | 3F0～3F7 | Floppy drive control adapter |
| 3F8～3FF | COM1 |
The corresponding table of the interface IP address of 80X 86
As seen from the above table, above-mentioned microcomputer system has the low order input/output port (Legacy I/O Port) that 27 groups of interface IP addresses substantially commonly used adopt for various distinct devices at least and uses, and interface IP addresses such as 0x278～0x27F, 0x378～0x37F and 0x3BC～0x3BF is to provide the printer or the miscellaneous equipment that adopt port arranged side by side (Parallel Port) to use; Therefore microcomputer system still keeps these interface IP addresses to provide these ports to use at present, makes microcomputer system can see through those ports traditional industry equipment corresponding with it and connects each other.
Along with making rapid progress of present science and technology, various microcomputer systems all adopt comparatively new-type interface port, for example at present comparatively new-type PCI or the interface port of PCIe; So in case upgrade or when changing above-mentioned microcomputer system, the former low order input/output port that arranges namely can't contact use with present microcomputer system such as the commercial unit of port arranged side by side, serial port etc.Although the existing a kind of PCI port in market turns the PCI adapter of low order input/output port at present, but because PCI or PCIe interface port are the plug and play framework, resource or the interface IP address of its input/output port are redistributed by microcomputer system, and at present microcomputer system all to set not be that interface IP address with the low order input/output port distributes and gives this PCI Shi Pei Ka ﹔ therefore, the employed interface IP address of PCI adapter that above-mentioned PCI port turns the low order input/output port is the interface IP address of non-aforementioned low order input/output port, and then cause the interface IP address of those low order input/output port to be used, therefore be necessary further to improve for this situation.
Summary of the invention
Because above-mentioned PCI port turns the interface IP address that the PCI adapter of low order input/output port can't use the low order input/output port; Therefore the utility model fundamental purpose provides the interface arrangement that a kind of low order input/output port turns the PCI interface port.
Employed in order to achieve the above object technical way is to make the low order input/output port turn the interface arrangement of PCI interface port, and it includes an addressing circuit, a pci controller and a device controller, wherein:
Above-mentioned addressing circuit is set with the interface IP address of at least one group of low order input/output port.
Above-mentioned pci controller is connected to this addressing circuit and a PCI interface port, and reads wherein the interface IP address of the low order input/output port that one group of this addressing circuit sets; Wherein this pci controller is with the PCI transmitting/receiving program one data to be added this interface IP address to be sent to this PCI interface port, and this PCI interface port receives the data that are labeled with above-mentioned interface IP address certainly.
Above-mentioned device controller is connected to this pci controller and an equipment interface port; Above-mentioned data are converted to device data that should the equipment interface port, and the said equipment data are sent to this equipment interface port; Receive this device data and be converted to these data from this equipment interface port again and be sent to this pci controller.
Because pci controller of the present utility model is to see through to read the wherein interface IP address of one group of low order input/output port that this addressing circuit sets, and this interface IP address is added in the data sending and receiving to this PCI interface port; Therefore, so that aforesaid microcomputer system can see through the interface IP address of low order input/output port traditional industry equipment is carried out access.
Description of drawings
Fig. 1 is the circuit theory diagrams that the utility model low order input/output port turns the interface arrangement of PCI interface port.
Fig. 2 is that interface arrangement data writing of the present utility model is to the sequential chart of microcomputer system.
Fig. 3 is that interface arrangement of the present utility model is from the sequential chart of microcomputer system reading out data.
Fig. 4 is that interface arrangement of the present utility model is applied to the structural representation on the adapter.
The primary clustering symbol description:
10 addressing circuits; 11 address selection switchs;
The 20PCI controller; The 21PCI interface port;
30 device controllers; 31 equipment interface ports;
40PCI device identification device.
Embodiment
For the benefit of to the understanding of the structure of interface arrangement of the present utility model, describe below in conjunction with drawings and Examples.
Please refer to shown in Figure 1ly, turn the interface arrangement of PCI interface port for the utility model low order input/output port, it includes an addressing circuit 10, a pci controller 20 and a device controller 30, wherein:
Above-mentioned addressing circuit 10 is set with the interface IP address of at least one group of low order input/output port; In the present embodiment, these addressing circuit 10 built-in plural groups interface IP addresses, and be connected to an address selection switch 11, set a wherein group interface address of this addressing circuit by this address selection switch 11; Wherein its scope of the interface IP address of above-mentioned low order input/output port is selected from 0x000～0x7FF address realm; In the present embodiment, the interface IP address that above-mentioned addressing circuit 10 sets is 0x378 again;
Above-mentioned pci controller 20 is connected to this addressing circuit 10 and a PCI interface port 21, and reads wherein the interface IP address of the low order input/output port that one group of this addressing circuit 10 sets; Wherein this pci controller 20 is with the PCI transmitting/receiving program one data to be added this interface IP address to be sent to this PCI interface port 21, and this PCI interface port 21 receives the data that are labeled with above-mentioned interface IP address certainly; In the present embodiment, this PCI interface port 21 includes a pci data bus and a PCI control bus, and this pci controller 20 is when carrying out this PCI transmitting/receiving program, control this PCI control bus, these data and this interface IP address are sent to this pci data bus, and this pci data bus receives the data that are labeled with interface IP address certainly; And
Above-mentioned device controller 30 is connected to this pci controller 20 and an equipment interface port 31; Above-mentioned data are converted to device data that should equipment interface port 31, and the said equipment data are sent to this equipment interface port 31; Again from these equipment interface port 31 receiving equipment data and be converted to above-mentioned data and be sent to this pci controller 20; In the present embodiment, the said equipment interface port 31 is that the interface IP address (0x378) that corresponding aforementioned this addressing circuit sets is to be port (LPT1) arranged side by side.
Please refer to Fig. 2 and shown in Figure 3, when this pci controller wish is read and write with the PCI read-write program microcomputer system through the interface IP address (0x378) of low order port arranged side by side (LPT1), make this PCI control bus (Frame, C/BE, IRDY, Devsel and TRDY) produce corresponding control signal, and through this pci data bus (AD) its interface IP address (0x378) is sent to this microcomputer system; Then wait until when this micro computer responds this pci controller 20 through its PCI control bus, this pci controller 20 just sees through this pci data bus and this microcomputer system and carries out data transfer.
Moreover, because PCI interface port 21 is in the use of microcomputer system at present, should be inserted in this PCI interface port 21 for computer system sees through first scanning and the equipment that has been confirmed whether, and just see through aforesaid control bus and data bus the equipment that inserts PCI interface port 21 is read and write; Therefore, if only separately the utility model is inserted PCI interface port 21 in the microcomputer system, and when not using with any equipment simultaneously; This microcomputer system can because of the utility model there is no send any one the device sequence number offer the distribution that this microcomputer system carries out resource and interface IP address; Satisfy, the supply of stop frequency signal (Clock) immediately, and then various read-write motion all can't be carried out.
Make the low order input/output port turn the interface arrangement of PCI interface port for this reason, further include a PCI device identification device 40; Wherein this PCI device identification device 40 is electrically connected to this pci controller 20, and export one the device sequence number give this pci controller 20; Wherein this pci controller 20 is to export received device sequence number to this PCI interface port 21; In the present embodiment, this PCI device identification device 40 is that a PCI turns the ISA bridge.
Because this pci controller 20 can will install sequence number by this PCI device identification device 40 and export PCI interface port 21 to; Therefore, aforesaid microcomputer system can be learnt by this has equipment to be inserted on this PCI interface port 21 really.
Please refer to shown in Figure 4ly, for the utility model specifically is applied to exemplary on the adapter, wherein above-mentioned address selection switch 11 is together to be integrated on the same adapter for thumb-acting switch and with the utility model; If the user need to be switched when using different low order I/O port address, (LPT1, LPT2 or Print Port) ﹔ then can be by switching this address selection switch 11, and then the interface IP address of the different input/output port of corresponding output such as port arranged side by side; Thus, the person of being easy to use according to present equipment interface port adjust the Jie Kou Di Zhi ﹔ corresponding with it moreover, this addressing circuit 10 is except selecting output wherein the interface IP address of one group of low order input/output port according to this address selection switch 11, have an address setting program in also can be directly, for setting this at least one group interface address; In the present embodiment, address above mentioned selector switch 11 disposes an assigned switch for above-mentioned address setting program; When this assigned switch is opened, this addressing circuit 10 be see through its Jie Kou Di Zhi ﹔ of this address setting procedure Selection again when this assigned switch is closed this addressing circuit 10 be through this address selection switch 11, select its interface IP address.
To sum up, pci controller 20 of the present utility model be the interface IP address that directly provides by this addressing circuit 10 with these data sending and receiving to this PCI interface port 21; Therefore, so that be inserted with the interface IP address that microcomputer system of the present utility model directly uses the low order input/output port, make the pci interface device can effectively utilize the interface IP address of low order input/output port.
Claims (9)
1. a low order input/output port turns the interface arrangement of PCI interface port, and it includes an addressing circuit, a pci controller and a device controller, wherein:
Above-mentioned addressing circuit is set with the interface IP address of at least one group of low order input/output port;
Above-mentioned pci controller is connected to this addressing circuit and a PCI interface port, and reads wherein the interface IP address of the low order input/output port that one group of this addressing circuit sets; Wherein this pci controller is with the PCI transmitting/receiving program one data to be added this interface IP address to be sent to this PCI interface port, and this PCI interface port receives the data that are labeled with above-mentioned interface IP address certainly;
Above-mentioned device controller is connected to this pci controller and an equipment interface port; Above-mentioned data are converted to device data that should the equipment interface port, and the said equipment data are sent to this equipment interface port; Receive this device data and be converted to these data from this equipment interface port again and be sent to this pci controller.
2. low order input/output port according to claim 1 turns the interface arrangement of PCI interface port, this addressing circuit is built-in plural groups interface IP address, and be connected to an address selection switch, set a wherein group interface address of this addressing circuit by this address selection switch.
3. low order input/output port according to claim 2 turns the interface arrangement of PCI interface port, and this address selection switch is thumb-acting switch.
According to claim 1 in 5 each described low order input/output port turn the interface arrangement of PCI interface port, wherein the interface IP address of above-mentioned low order input/output port is selected from 0x000～0x7FF address realm.
According to claim 1 in 5 each described low order input/output port turn the interface arrangement of PCI interface port, further include:
One PCI device identification device is electrically connected to this pci controller, and export one the device sequence number give this pci controller; Wherein this pci controller is to export received device sequence number to this PCI interface port.
6. low order input/output port according to claim 6 turns the interface arrangement of PCI interface port, further includes a PCI device identification device, is electrically connected to this pci controller, and export one the device sequence number give this pci controller; Wherein this pci controller is to export received device sequence number to this PCI interface port.
7. low order input/output port according to claim 8 turns the interface arrangement of PCI interface port, and this PCI device identification device is to turn the ISA bridge for a PCI.
According to claim 1 in 5 each described low order input/output port turn the interface arrangement of PCI interface port, this PCI interface port includes a pci data bus and a PCI control bus, and this pci controller is when carrying out this PCI transmitting/receiving program, control this PCI control bus, these data and this interface IP address are sent to this pci data bus, and this pci data bus receives the data that are labeled with interface IP address certainly.
9. low order input/output port as claimed in claim 8 turns the interface arrangement of PCI interface port, this PCI interface port includes a pci data bus and a PCI control bus, and this pci controller is when carrying out this PCI transmitting/receiving program, control this PCI control bus, these data and this interface IP address are sent to this pci data bus, and this pci data bus receives the data that are labeled with interface IP address certainly.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220217858 CN202720576U (en) | 2012-05-16 | 2012-05-16 | Interface device for switching low-order input/output port to peripheral component interconnect (PCI) interface port |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220217858 CN202720576U (en) | 2012-05-16 | 2012-05-16 | Interface device for switching low-order input/output port to peripheral component interconnect (PCI) interface port |
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| CN202720576U true CN202720576U (en) | 2013-02-06 |
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| CN 201220217858 Expired - Fee Related CN202720576U (en) | 2012-05-16 | 2012-05-16 | Interface device for switching low-order input/output port to peripheral component interconnect (PCI) interface port |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102708083A (en) * | 2012-05-16 | 2012-10-03 | 昆山三泰新电子科技有限公司 | Peripheral component interconnect (PCI) interface device capable of distributing interface address of low order input and output interface |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102708083A (en) * | 2012-05-16 | 2012-10-03 | 昆山三泰新电子科技有限公司 | Peripheral component interconnect (PCI) interface device capable of distributing interface address of low order input and output interface |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130206 Termination date: 20150516 |
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| EXPY | Termination of patent right or utility model |