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CN202127013U - Semiconductor lead frame of whole substrate surface - Google Patents

Semiconductor lead frame of whole substrate surface Download PDF

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Publication number
CN202127013U
CN202127013U CN2011202113307U CN201120211330U CN202127013U CN 202127013 U CN202127013 U CN 202127013U CN 2011202113307 U CN2011202113307 U CN 2011202113307U CN 201120211330 U CN201120211330 U CN 201120211330U CN 202127013 U CN202127013 U CN 202127013U
Authority
CN
China
Prior art keywords
lead frame
semiconductor lead
whole matrix
frame body
terminal pin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2011202113307U
Other languages
Chinese (zh)
Inventor
沈健
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN2011202113307U priority Critical patent/CN202127013U/en
Application granted granted Critical
Publication of CN202127013U publication Critical patent/CN202127013U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model discloses a semiconductor lead frame of whole substrate surface, which comprises a frame body (1). The frame body (1) consists of a plurality of single pieces, a whole substrate (2) is disposed at the upper portion of each single piece, and a terminal pin combination (3) is disposed at the lower portion of each single piece. A locating hole (4) is arranged respectively between the terminal pin combinations of the single pieces, and the single pieces are connected to form the frame body (1) through connecting ribs (5). The semiconductor lead frame of the whole substrate surface is wide in range of application and meets packaging requirements of large devices.

Description

A kind of semiconductor lead frame of whole matrix surface
Technical field
The utility model provides a kind of semiconductor lead frame of whole matrix surface.
Background technology
Along with the development of electron trade, the chip of semiconductor device is increasing.This just requires the corresponding increasing of basal plane of lead frame, yet the basal plane of current chip is the demand of the large-scale semiconductor chip that can't satisfy.
Summary of the invention
The utility model provides a kind of semiconductor lead frame of whole matrix surface, and it is applied widely, satisfies the encapsulation requirement of large-scale device.
The utility model has adopted following technical scheme: a kind of semiconductor lead frame of whole matrix surface; It comprises frame body; Described frame body is made up of some monolithics, and the top of each monolithic is set to whole matrix, and the bottom is the terminal pin combination; Between the terminal pin combination of each monolithic, be provided with location hole, each monolithic is interconnected to form frame body through dowel.
Described monolithic is the KFC copper strips.Described frame body is made up of 10 monolithics, and the lengths of frame of 10 monolithic compositions is 170mm, and width is 35.8mm.Described whole matrix surface is of a size of 13mm * 13mm, and flatness is 0.05mm, and thickness all is 2mm.The thickness of described terminal pin combination is 0.6mm, and tolerance be ± 0.01mm, and terminal pin makes up and comprises three pins, and the thickness of three outside bendings of pin is 2.5mm.
The utlity model has following beneficial effect: the utility model is provided with whole matrix, like this can enlarging application range, can satisfy the encapsulation requirement of large-scale device.
Description of drawings
Fig. 1 is the structural representation of the utility model
Embodiment
In Fig. 1, the utility model provides a kind of semiconductor lead frame of whole matrix surface, and it comprises frame body 1, and frame body 1 is made up of 10 monolithics; Monolithic is shaped through punching press, surface treatment and cut-out successively by the KFC copper strips and processes, and the lengths of frame of 10 monolithic compositions is 170mm, and tolerance is ± 0.15mm that width is 35.8mm; The top of each monolithic is set to whole matrix 2, and whole matrix 2 surfaces are of a size of 13mm * 13mm, and flatness is 0.05mm; Thickness all is 2mm, and tolerance is ± 0.015mm that the bottom is terminal pin combination 3; The thickness of terminal pin combination 3 is 0.6mm, and tolerance is ± 0.01mm that terminal pin combination 3 comprises three pins; The thickness of three outside bendings of pin is 2.5mm, between the terminal pin combination of each monolithic, is provided with location hole 4, and each monolithic is interconnected to form frame body 1 through dowel 5.

Claims (5)

1. the semiconductor lead frame of a whole matrix surface; It comprises frame body (1); It is characterized in that described frame body (1) is made up of some monolithics, the top of each monolithic is set to whole matrix (2), and the bottom is terminal pin combination (3); Between the terminal pin combination of each monolithic, be provided with location hole (4), each monolithic is interconnected to form frame body (1) through dowel (5).
2. the semiconductor lead frame of whole matrix surface according to claim 1 is characterized in that described monolithic is the KFC copper strips.
3. the semiconductor lead frame of whole matrix surface according to claim 1 is characterized in that described frame body (1) is made up of 10 monolithics, and the lengths of frame that 10 monolithics are formed is 170mm, and width is 35.8mm.
4. the semiconductor lead frame of whole matrix surface according to claim 1 is characterized in that described whole matrix (2) surface is of a size of 13mm * 13mm, and flatness is 0.05mm, and thickness all is 2mm.
5. the semiconductor lead frame of whole matrix surface according to claim 1; The thickness that it is characterized in that described terminal pin combination (3) is 0.6mm; Tolerance is ± 0.01mm, and terminal pin combination (3) comprises three pins, and the thickness of three outside bendings of pin is 2.5mm.
CN2011202113307U 2011-06-16 2011-06-16 Semiconductor lead frame of whole substrate surface Expired - Fee Related CN202127013U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011202113307U CN202127013U (en) 2011-06-16 2011-06-16 Semiconductor lead frame of whole substrate surface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2011202113307U CN202127013U (en) 2011-06-16 2011-06-16 Semiconductor lead frame of whole substrate surface

Publications (1)

Publication Number Publication Date
CN202127013U true CN202127013U (en) 2012-01-25

Family

ID=45490077

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011202113307U Expired - Fee Related CN202127013U (en) 2011-06-16 2011-06-16 Semiconductor lead frame of whole substrate surface

Country Status (1)

Country Link
CN (1) CN202127013U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102332444A (en) * 2011-06-16 2012-01-25 沈健 Semiconductor lead frame of whole matrix surface
CN103531569A (en) * 2013-10-28 2014-01-22 沈健 Plastic package lead frame with super-high power

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102332444A (en) * 2011-06-16 2012-01-25 沈健 Semiconductor lead frame of whole matrix surface
CN103531569A (en) * 2013-10-28 2014-01-22 沈健 Plastic package lead frame with super-high power

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
EE01 Entry into force of recordation of patent licensing contract

Assignee: Taizhou Dongtian Electronics Co., Ltd.

Assignor: Shen Jian

Contract record no.: 2012320000223

Denomination of utility model: Semiconductor lead frame of whole matrix surface

Granted publication date: 20120125

License type: Exclusive License

Record date: 20120314

CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120125

Termination date: 20140616

EXPY Termination of patent right or utility model