CN201893335U - Dual-chip integrated circuit lead frame - Google Patents
Dual-chip integrated circuit lead frame Download PDFInfo
- Publication number
- CN201893335U CN201893335U CN201020678940.3U CN201020678940U CN201893335U CN 201893335 U CN201893335 U CN 201893335U CN 201020678940 U CN201020678940 U CN 201020678940U CN 201893335 U CN201893335 U CN 201893335U
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- CN
- China
- Prior art keywords
- lead frame
- base island
- pins
- integrated circuit
- chip integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Lead Frames For Integrated Circuits (AREA)
Abstract
本实用新型涉及一种双芯片集成电路引线框,包括基岛、小基岛及引脚,所述引脚中的7脚、8脚和基岛相连,所述基岛上设至少一个锁位孔。所述锁位孔的孔径为0.7-0.72mm。本实用新型在实际生产过程中,由于在基岛上增加的锁位孔,可以增加塑封料和引线框的结合力,减少产品分层或开裂。
The utility model relates to a double-chip integrated circuit lead frame, which comprises a base island, a small base island and pins, the pins 7 and 8 of the pins are connected to the base island, and at least one locking position is set on the base island hole. The hole diameter of the locking hole is 0.7-0.72mm. In the actual production process of the utility model, due to the added locking holes on the base island, the bonding force between the plastic sealing material and the lead frame can be increased, and product delamination or cracking can be reduced.
Description
技术领域technical field
本实用新型涉及一种引线框,具体涉及一种双芯片集成电路引线框。The utility model relates to a lead frame, in particular to a double-chip integrated circuit lead frame.
背景技术Background technique
多芯片封装是目前市场上非常热门话题。在一个集成电路的腔体内放入一个以上的芯片,可以大大节省应用空间,方便整机的设计应用。有些器件,由于采用的工艺不同,在芯片制造过程中无法在一个芯片中实现,或无法集成在一个芯片内。双芯片封装就是解决两个不同制造工艺的芯片放在同一个电路中的方法。在目前的市场上的DIP8双芯片引线框有多款,其中一款使用量很大的引线框设计时,7脚、8脚和基岛连在一起,如图1所示。该引线框作业产品因7脚、8脚和基岛连在一起,面积很大,塑封在塑封体内框架在切筋成型过程中受力时,产品容易产生分层,甚至开裂。Multi-chip packaging is a very hot topic in the market today. Putting more than one chip in the cavity of an integrated circuit can greatly save the application space and facilitate the design and application of the whole machine. Some devices, due to the different processes used, cannot be implemented in one chip or integrated in one chip during the chip manufacturing process. Dual-chip packaging is a method to solve the problem of putting two chips of different manufacturing processes in the same circuit. There are many types of DIP8 dual-chip lead frames on the market, and one of the lead frames used a lot is designed with 7 pins, 8 pins and the base island connected together, as shown in Figure 1. The lead frame operation product has a large area because the 7-pin, 8-pin and the base island are connected together. When the frame in the plastic package is stressed during the cutting and forming process, the product is prone to delamination or even cracking.
发明内容Contents of the invention
针对上述现有技术中存在的问题,本实用新型的目的在于提供一种双芯片集成电路引线框,该引线框在切筋成型过程中不会产生分层或开裂。Aiming at the above-mentioned problems in the prior art, the purpose of the present invention is to provide a lead frame for a two-chip integrated circuit, which will not be delaminated or cracked during the process of trimming and forming.
本实用新型为实现其目的所采取的技术方案:一种双芯片集成电路引线框,包括基岛、小基岛及引脚,所述引脚中的7脚、8脚和基岛相连,所述基岛上设至少一个锁位孔。所述锁位孔的孔径为0.7-0.72mm。The technical scheme adopted by the utility model for realizing its object: a kind of double-chip integrated circuit lead frame, comprises base island, small base island and pins, and 7 pins and 8 pins in the pins are connected with the base island, so At least one locking hole is set on the base island. The hole diameter of the locking hole is 0.7-0.72mm.
本实用新型的有益效果:在实际生产过程中,由于在基岛上增加的锁位孔,可以增加塑封料和引线框的结合力,减少产品分层或开裂。The beneficial effects of the utility model: in the actual production process, due to the added locking holes on the base island, the bonding force between the plastic sealing compound and the lead frame can be increased, and product delamination or cracking can be reduced.
附图说明Description of drawings
以下结合附图和具体实施方式对本实用新型进一步说明。Below in conjunction with accompanying drawing and specific embodiment the utility model is further described.
图1为现有技术中的DIP8双芯片引线框结构图;Fig. 1 is the structure diagram of DIP8 double-chip lead frame in the prior art;
图2为本实用新型结构示意图。Fig. 2 is a structural schematic diagram of the utility model.
具体实施方式Detailed ways
参见图1,本实施例以DIP8双芯片引线框为例,该引线框包括基岛2、小基岛3及引脚1。DIP8双芯片引线框含有8个引脚,其中7脚、8脚和基岛2相连,在基岛2上设锁位孔4。锁位孔可设1-3个,本例中设2个。锁位孔的孔径为0.711mm。由于在基岛上增加的锁位孔,可以增加塑封料和引线框的结合力,减少产品分层。Referring to FIG. 1 , this embodiment takes a DIP8 double-chip lead frame as an example, and the lead frame includes a
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201020678940.3U CN201893335U (en) | 2010-12-24 | 2010-12-24 | Dual-chip integrated circuit lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201020678940.3U CN201893335U (en) | 2010-12-24 | 2010-12-24 | Dual-chip integrated circuit lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201893335U true CN201893335U (en) | 2011-07-06 |
Family
ID=44222805
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201020678940.3U Expired - Fee Related CN201893335U (en) | 2010-12-24 | 2010-12-24 | Dual-chip integrated circuit lead frame |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201893335U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103943593A (en) * | 2014-03-26 | 2014-07-23 | 张轩 | Lead frame with two kinds of chips |
| CN109075151A (en) * | 2016-04-26 | 2018-12-21 | 凌力尔特科技有限责任公司 | The lead frame that mechanical engagement and electrically and thermally for component package circuit conduct |
| US11749576B2 (en) | 2018-03-27 | 2023-09-05 | Analog Devices International Unlimited Company | Stacked circuit package with molded base having laser drilled openings for upper package |
| US11844178B2 (en) | 2020-06-02 | 2023-12-12 | Analog Devices International Unlimited Company | Electronic component |
-
2010
- 2010-12-24 CN CN201020678940.3U patent/CN201893335U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103943593A (en) * | 2014-03-26 | 2014-07-23 | 张轩 | Lead frame with two kinds of chips |
| CN109075151A (en) * | 2016-04-26 | 2018-12-21 | 凌力尔特科技有限责任公司 | The lead frame that mechanical engagement and electrically and thermally for component package circuit conduct |
| US11749576B2 (en) | 2018-03-27 | 2023-09-05 | Analog Devices International Unlimited Company | Stacked circuit package with molded base having laser drilled openings for upper package |
| US11844178B2 (en) | 2020-06-02 | 2023-12-12 | Analog Devices International Unlimited Company | Electronic component |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110706 Termination date: 20141224 |
|
| EXPY | Termination of patent right or utility model |
