CN1826210A - 用于在sic薄膜上外延生长适用表面的处理的方法 - Google Patents
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Abstract
本发明涉及一种制备用于微电子和/或光电应用的半导体材料的晶片的方法。该方法包括在氧化气氛中对所述材料退火的步骤以及利用基于胶质二氧化硅的微粒的磨料进行研磨的步骤。该研磨步骤可利用研磨头(10)执行,所述半导体材料衬底(12)被插入到所述研磨头(10)中。所述液态磨料被注射到所述研磨头中,例如通过侧面导管(18)。压力(20)和由箭头(22)表示的运动被施加到所述研磨头(10)以紧靠研磨垫(14)执行研磨。这两个步骤的组合产生了令人满意的表面状况,特别是在碳化硅的情况中。
Description
技术领域
本发明大体上涉及用于微电子和/或光电应用的半导体材料的处理。
特别的是,它涉及一种制备厚度在1nm(纳米)或几十纳米到100nm或者数百nm例如400nm或500nm范围中的薄膜的表面。
特别的是,本发明涉及用于在其上执行外延生长的单晶碳化硅膜。
背景技术
该膜可以是被转移到另外的材料(覆盖有氧化物或者其它膜,如沉积氧化物、氮化物等的硅、单晶或者多晶SiC等)上的碳化硅膜。
特别的是,本发明可以应用到SIC衬底,例如多种类型的4H SiC衬底,所述SIC衬底被用于以制造电子电源元件为目的的外延生长。
为获得高质量的外延生长,初始表面必须没有缺陷,并且必须尽可能地光滑。
薄层转移方法是已知的,特别是用于转移薄的SiC膜的方法,并且已知作为“智能剥离(smart-cut)”方法(或衬底断裂方法);例如在A.J.AubertonHervéet al的题目为“why can Smart-Cut changethe future of microelectronics?”的文章中所描述的,该文章位于国际期刊High Speed Electronics and System 2000年第1期第10卷第131-146页。断裂后,该方法留下大约5nm rms(均方根)的粗糙度,这与外延生长不是非常一致。
必须通过应用热氧化类型处理(已知为退火处理)和/或离子蚀刻来将该粗糙度降低到大约1nm到2nm rms。然而,那些技术不能产生理想的最终粗糙度(0.1到0.2nm rms)。
因为热SiC氧化作用非常慢,尤其在硅表面上,因此退火步骤不会消耗充分的材料以显著降低粗糙度。
另外,SiC的化学-机械研磨(CMP)难以执行,因为研磨表面的化学反应性与例如硅的材料相比要低一些。另外,研磨速率非常低,为每小时10nm的数量级,与用于硅研磨的每分钟50nm不同。
另外,SiC的机械硬度非常高,并且已知用于研磨硅的“金刚石”磨料或者某些磨料的使用可能导致划痕。
因此,能够产生足够高的研磨速率而不会产生所述的划痕和缺陷的磨料是难以使用的。因此,SiC研磨方法经常过于漫长(数小时),并且基于金刚石微粒的磨料不能产生小于1nm rms的粗糙度。
因为这两个原因,SiC研磨技术是非常特殊的。目前,几乎没有SiC衬底研磨方法是已知的。
美国文献US-A-5 895 583描述了一种连续研磨方法:对于去除由每个研磨步骤产生的加工硬化区域,数个步骤是必需的。该方法使用基于具有减小的直径的含金刚石的微粒的磨料。
2002年8月2日提交的法国专利申请No.02/09869描述了一种利用磨料(金刚石/二氧化硅)的混合物的方法,该方法能够产生与分子成键相一致的粗糙度。
除了研磨,还存在其它技术能够产生低的粗糙度:其多数是基于利用来自等离子区(反应离子蚀刻,RIE)或者射束(例如气体丛离子束)的离子轰击该表面,US-2002 0014407中描述了这样一种技术。那些技术主要考虑研磨速率,但是表面状况对于外延生长经常过于粗糙,并且特别是该表面不能修匀。
因此,在发展处理或者制备膜特别是碳化硅膜的表面的新方法方面存在一个问题。
另外一个问题是要发明一种处理膜特别是碳化硅膜的方法,该方法能够产生低的粗糙度,和/或能够产生足够的研磨速率,同时不会产生划痕或者缺陷。
还存在另外一个问题,即发展一种处理膜特别是碳化硅膜的方法,该方法能够产生与外延生长相一致的低的粗糙度,优选小于15埃()或者10rms或者5rms或者1rms。
发明内容
本发明提供一种制备材料的晶片的表面的方法,该方法包括:
在氧化气氛中退火的步骤;
利用基于胶质二氧化硅的微粒的磨料进行研磨的步骤。
这两个步骤的组合能够产生令人满意的表面状况,特别是在碳化硅的情况中。
该退火步骤能够产生小于或等于20rms量级的粗糙度。例如,它能够在1100℃到1300℃的范围中的温度执行1.5小时(h)到2.5小时范围中的时间间隔。
所述退火步骤之后,可以执行表面脱氧步骤,例如利用化学制剂如氢氟酸的类型的脱氧步骤。在离子蚀刻的情况中,RCA(SC1、SC2)类型的化学清洗步骤可以在该退火步骤之后执行。
研磨例如利用胶质SYTON W30类型胶质二氧化硅并且利用以在10圈每分钟(rpm)到100rpm范围中的速度旋转的研磨头来执行。
研磨之后,可以执行化学清洗步骤,例如利用氢氟酸。
最后,可以执行离子蚀刻步骤,例如在退火步骤之前。
附图说明
图1A和1B是研磨设备的图示。
具体实施方式
下面描述了一个实施例,涉及SiC膜的硅表面。应当回想起SiC是极性物质,并且因此包括由不同的原子构成的两个表面(硅表面和碳表面)。
所述薄膜例如通过衬底断裂方法(“智能剥离”)获得,例如通过上述A.J.Aubertonhervéet al的文章所描述的。
首先,在氧化气氛中在所述薄膜上执行热处理,例如在100℃或1150℃到1300℃的范围中的温度持续1小时到3小时范围中的时间间隔。在氧化气氛中的这种退火步骤能够产生2nm rms数量级的粗糙度。一种用于执行所述退火步骤的装置的一个实例在“Thermal and Dopant Processes”,Chapter 4,AdvancedSemiconductor Fabrication Handbook,ICE,1998中进行了描述。
该处理过的表面可以通过化学腐蚀来进行脱氧,例如利用10%的氢氟酸。
随后,执行CMP(化学-机械研磨),例如利用IC1000垫(由RODEL分布,压缩率=3%)和基于胶质二氧化硅SYTON W30(或硅溶胶)类型的微粒(pH=10.2,粘度=2兆帕斯卡·秒(mPs·s),平均微粒尺寸=125mm,包括30%重量的SiO2)。
图1A示出了研磨头10,待研磨的衬底12被插入到所述研磨头10中。图1B示出了所述研磨头、待研磨的衬底12、还有板16以及研磨垫14。液态磨料被注射到所述研磨头10中,例如通过侧面导管18。压力20和由箭头22表示的运动被应用到研磨头10以执行研磨。
可选的是,利用氢氟酸的化学清洗可防止所述表面上的磨料的结晶。
这样的方法可以产生这样的表面,其具有的粗糙度能够使它被用于高质量的同质外延生长(SiC外延生长上的SiC),并且可选的是,也可以用于异质外延生长(SiC上的AlN,AlGaN或GaN)。
在涉及4H类型SiC的薄膜(通过“智能剥离”方法获得)的实例中:
退火步骤在氧化气氛中执行(例如在1150℃持续2小时),之后是在10%的HF中的表面脱氧。
之后利用CMP研磨所述表面。研磨是在下面的条件之下执行:
利用旋转的研磨板,研磨头被施加到所述研磨板上,所述研磨头同样旋转,转速为60rpm的量级(该转速可以在10rpm到100rpm的范围中);0.75巴的压力(该压力可在0.1巴到1巴的范围中)被施加到所述研磨头;
研磨时间为15分钟(最小值)到30分钟。
经过研磨后获得的粗糙度为3rms的量级。
最终的清洗利用具有10%氢氟酸的去电离水浸泡执行10分钟。
下面的表I概括了在不同条件下获得的用于薄的SiC膜的结果。
I | II | III | IV | V(nm) | VI |
1 | 无 | 5.02 | |||
2 | 离子蚀刻+1150℃退火,时间:2h | 3.02 | |||
3 | 离子蚀刻+1150℃退火,时间:2h | 30min/70rpm/0.75b | UR100/glansox | 0.583 | 软垫 |
4 | 1150℃退火,时间:2h | 30min/60rpm/0.75b | UR100/glansox | 1.246 | 软垫 |
5 | 1150℃退火,时间:2h+离子蚀刻 | 1.12 | |||
6 | 1150℃退火,时间:2h | 2.54 | 退火足以降低粗糙度 | ||
7 | 1300℃退火,时间:1h | 1.64 | |||
8 | 1150℃退火,时间:2h | 15min/25rpm/0.6b | IC 1000/syton | 0.267 | 中等地降低转速 |
9 | 1150℃退火,时间:2h | 30min/60rpm/0.75b | IC 1000/syton | 0.101 | |
10 | 1150℃退火,时间:2h | 15min/60rpm/0.75b | IC 1000/syton | 0.155 | 磨损的垫 |
11 | 1150℃退火,时间:2h | 15min/60rpm/0.75b | IC 1000/syton | 0.064 | 新垫 |
表I
在表中,列I指示出试验编号,并且列II示出了在CMP研磨之前执行的处理的特征。试验2和3经历了离子蚀刻,之后是在1150℃退火2小时;对于试验n°5,所述处理为在1150℃退火2小时,之后是离子蚀刻。
对于试验4、6以及8到10,仅执行在1150℃退火2小时。
列III给出了用于执行CMP研磨的条件:时间、转速、施加的压力。
列IV示出了所述垫和磨料混合物的特征。
列V示出了在5微米(μm)×5μm的表面积上的粗糙度测量。
任何的注释被示于列VI中。
该表显示出了之后是研磨的退火步骤的组合可以将初始膜的粗糙度基本降低到小于2nm rms(试验3-5和7-11)、1.5nm(试验3-5、8-11)、1nm rms(试验3、8-11)、0.5nm rms(试验8-11)或者0.1nm rms(试验11)。
因此,本发明能够产生这样的碳化硅膜,即其具有的粗糙度小于2nm rms、小于1nm rms、小于0.5nm rms或者小于0.1nm rms。
例如在试验n°3中,先前的离子蚀刻的使用同样改善了这个结果。
最好的结果看起来是利用IC1000垫并且利用Syton W30磨料溶液获得的。
表II示出了关于试验n°10和11的更加详细的条件。
试验n°10利用“S107”板执行,而试验n°11利用“S126”板执行。
表II比较了利用板S126和S107的粗糙度。
执行了两种类型的测量:扫描特定的表面积(列S,以平方微米(μm2)表示的表面积),以及点测量(列B,以μm×μm表示的表面测量)。
最后三列以埃示出:作为均方根值(rms)的粗糙度,平均粗糙度(Ra),以及最大粗糙度(Rmax)。
表1中示出的对于试验10和11的值分别对应于在表II的第三和第七行中所示的那些值(rms列)。
利用板S126和S107的粗糙度的比较 | |||||
板 | S(μm2) | Bμm | rms() | Ra() | Rmax() |
S107 | 1um×1um5um×5um | 0.3×0.93×1 | 0.970.71.551.38 | 0.770.551.211.06 | 14.78.216.112.1 |
S126 | 1um×1um5um×5um | 0.6×0.71.5×4 | 0.370.340.640.31 | 0.280.270.50.25 | 7329.74.9 |
表II
在这些表中所示的结果表示本发明的方法能够利用快速技术产生适用于在薄的SiC膜上外延生长(“外延生长适用(epiready)”)的表面,该方法使用了在微电子中标准的步骤和设备。SiC表面越光滑并且它的粗糙度越低,该外延生长的质量越好,这可以基本上提高在薄膜上制造的电子元件的产量。
本发明的表面制备方法包括退火步骤,之后是研磨,该方法因此能够产生高质量的不粗糙的并且光滑的表面。
多种类型的4H SiC衬底的实例已经给出,但是本发明同样可以应用到多种类型的6H或者3C SiC衬底。
Claims (14)
1.一种制备碳化硅的晶片的表面的方法,该方法包括:
在氧化气氛中退火的步骤,从而降低晶片表面的粗糙度;
利用基于胶质二氧化硅的微粒的磨料研磨的步骤。
2.根据权利要求1所述的方法,其特征在于,所述退火步骤在1000℃到1300℃范围中的温度执行。
3.根据权利要求1或者2所述的方法,其特征在于,所述退火步骤执行1小时到2.5小时的范围中的时间间隔。
4.根据权利要求1-3中任一项所述的方法,其特征在于,还包括在所述退火步骤之后的所述表面的脱氧步骤或者在离子蚀刻的情况中RCA(SC1,SC2)类型的化学清洗步骤。
5.根据权利要求4所述的方法,其特征在于,所述脱氧步骤在氢氟酸中执行。
6.根据权利要求1-5中任一项所述的方法,其特征在于,在研磨之后,执行化学清洗步骤。
7.根据权利要求6所述的方法,其特征在于,所述清洗步骤使用氢氟酸。
8.根据上述权利要求中任一项所述的方法,其特征在于,所述材料为半导体材料。
9.根据上述权利要求中任一项所述的方法,其特征在于,研磨利用SYTON W30类型的胶质二氧化硅执行。
10.根据上述权利要求中任一项所述的方法,其特征在于,研磨利用研磨头执行,所述研磨头以10rpm到100rpm范围中的速度旋转。
11.根据上述权利要求中任一项所述的方法,其特征在于,在0.1巴到1巴范围中的压力被施加到所述研磨头。
12.根据上述权利要求中任一项所述的方法,其特征在于,研磨执行15分钟到30分钟范围中的时间间隔。
13.根据上述权利要求中任一项所述的方法,其特征在于,研磨利用IC1000类型的研磨垫执行。
14.根据上述权利要求中任一项所述的方法,其特征在于,还包括离子蚀刻步骤。
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US20080261401A1 (en) * | 2004-04-08 | 2008-10-23 | Ii-Vi Incorporated | Chemical-Mechanical Polishing of Sic Surfaces Using Hydrogen Peroxide or Ozonated Water Solutions in Combination with Colloidal Abrasive |
US7459702B2 (en) * | 2004-10-26 | 2008-12-02 | Jayant Neogi | Apparatus and method for polishing gemstones and the like |
FR2884647B1 (fr) * | 2005-04-15 | 2008-02-22 | Soitec Silicon On Insulator | Traitement de plaques de semi-conducteurs |
US7528040B2 (en) | 2005-05-24 | 2009-05-05 | Cree, Inc. | Methods of fabricating silicon carbide devices having smooth channels |
DE102005024073A1 (de) * | 2005-05-25 | 2006-11-30 | Siltronic Ag | Halbleiter-Schichtstruktur und Verfahren zur Herstellung einer Halbleiter-Schichtstruktur |
JP5277722B2 (ja) * | 2008-05-21 | 2013-08-28 | 新日鐵住金株式会社 | 炭化珪素単結晶ウェハ表面の研磨方法 |
EP2172967A1 (en) | 2008-08-04 | 2010-04-07 | Siltronic AG | Method for manufacturing silicon carbide |
FR2954585B1 (fr) * | 2009-12-23 | 2012-03-02 | Soitec Silicon Insulator Technologies | Procede de realisation d'une heterostructure avec minimisation de contrainte |
JP5772635B2 (ja) * | 2012-02-02 | 2015-09-02 | 三菱電機株式会社 | 炭化珪素単結晶基板の製造方法 |
JP5990444B2 (ja) * | 2012-11-01 | 2016-09-14 | 昭和電工株式会社 | 炭化珪素半導体装置の製造方法 |
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KR100792057B1 (ko) | 2008-01-04 |
US20050020084A1 (en) | 2005-01-27 |
EP1646478A1 (fr) | 2006-04-19 |
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DE602004004658T4 (de) | 2008-08-21 |
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FR2857895B1 (fr) | 2007-01-26 |
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US7060620B2 (en) | 2006-06-13 |
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