CN1681037A - Method and apparatus to measure disk drive head load/unload velocity - Google Patents
Method and apparatus to measure disk drive head load/unload velocity Download PDFInfo
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- CN1681037A CN1681037A CN 200410084868 CN200410084868A CN1681037A CN 1681037 A CN1681037 A CN 1681037A CN 200410084868 CN200410084868 CN 200410084868 CN 200410084868 A CN200410084868 A CN 200410084868A CN 1681037 A CN1681037 A CN 1681037A
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- 238000006243 chemical reaction Methods 0.000 description 2
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Abstract
One embodiment of the present invention is an apparatus to provide a measure of disk drive head velocity in a disk drive wherein movement is produced by a disk drive motion mechanism that includes a coil, which apparatus includes: (1) a controller that outputs one or more digital signals that are applied as input to a first component, and in response, the first component outputs a reference voltage; (2) a second component, responsive to voltage output across the coil and the reference voltage, outputs a measure of a difference between the coil voltage and the reference voltage; and (3) a third component, responsive to the measure of the difference, outputs a first value if the coil voltage is greater than the reference voltage and a second value if the coil voltage is less than the reference voltage, which third component output is applied as input to the controller; wherein the controller executes a search algorithm that varies the one or more digital signals while observing changes in the third component output to provide a digital estimate of the coil voltage, which estimate provides a measure of the disk drive head velocity.
Description
Affiliated technical field
The present invention relates to a kind of method and apparatus of measuring the load/unload speed of read/write head.
Background technology
As known in the art, most of small-sized (form factor) hard disk drive utilizes a ring road (ramp) load/unload program, by rotation read/write head arm (arm) read/write head is moved down along a ring road, (promptly be put into the position of read/write hard disk) read/write head is downloaded on the hard disk.In addition, as known in the art, when finishing after the data access of hard disk, rotation read/write head arm unloads read/write head so that read/write head moves up along this ring road from hard disk.
For guaranteeing the long-term reliability of hard disk drive, should control the load/unload of above-mentioned read/write head on this ring road, in order to avoid damage hard disk and read/write head.Usually, this relates to the use servo-control system, and this servo-control system attempts to keep the load/unload speed of read/write head on the track of the best.Therefore, this wherein needs to measure the speed of read/write head in the load/unload process.
As everyone knows, the motion of read/write head is by electric current being applied on the voice coil loudspeaker voice coil magnet (" VCM "), the read/write head arm being rotated produce.Measure the art methods of read/write head speed, need to use digital to analog converter to measure back electromotive force (back-EMF) voltage that in VCM, generates usually.As everyone knows, VCM back electromotive force (back-EMF) is proportional with the angular velocity of VCM, and this just provides the method for measuring read/write head speed.The problem of these art methods is them: (a) circuit is very complicated usually; And (b) require to reserve on the printed circuit board (PCB) additional space.Therefore, art methods causes the hard disk drive cost to increase.
In view of top described, the utmost point need overcome top one or more problems of the prior art.
Summary of the invention
In order to solve above-mentioned prior art problems and deficiency, the object of the present invention is to provide a kind of device that can be used for measuring hard disk drive read/write head load/unload speed, wherein, the hard disk drive that contains coil produces motion.This device comprises: (a) controller, and output is used as one or more digital signals of the input of first assembly, and in response, this first assembly output reference voltage; (b) second assembly, the voltage output and the reference voltage of response coil, and the measured value of the difference of output between this coil voltage and this reference voltage; And (c) the 3rd assembly, respond the measured value of this difference, if this coil voltage greater than this reference voltage, output first value, and if this coil voltage be lower than this reference voltage, output second value, the output of the 3rd assembly is used as the input of controller; Wherein, this controller is carried out searching algorithm, changes one or more digital signals, observes the variation of the 3rd assembly output simultaneously, so that the digital estimated value of this coil voltage is provided, this estimated value is used to measure the speed of this read/write head.
Description of drawings
Fig. 1 represents that one measures the block diagram of read/write head speed device, and this device one or more embodiment according to the present invention make;
Fig. 2 represents the process flow diagram of the algorithm that one or more embodiment according to the present invention create, and this algorithm is carried out by the controller of device shown in Figure 1, and this algorithm is used to provide the measured value of read/write head speed;
Fig. 3 represents the process flow diagram of the algorithm that one or more alternatives according to the present invention are created, by one according to one or more alternatives of the present invention, and having used the controller of the digital to analog converter (" DAC ") of N position to carry out this algorithm, this algorithm is used to provide the measured value of read/write head speed;
Fig. 4 represents to be used for to make the circuit diagram of one or more embodiment of device shown in Figure 1;
Fig. 5 represents the process flow diagram of the algorithm that one or more embodiment according to the present invention make, and this algorithm makes read/write head speed near predetermined read/write head velocity amplitude, just, and target velocity;
Fig. 6 represents the block diagram of the device of the algorithm shown in the execution graph 5, and this device one or more embodiment according to the present invention are made.
Embodiment
Below will and be described further in conjunction with the accompanying drawings with the specific embodiment of the present invention.
The measurement mechanism of one or more embodiment of the present invention, when hard drive read/write head (a) by when a ring road is downloaded on the hard disk; Or (b) when hard disk is unloaded on this ring road, this measurement mechanism is in order to measure read/write head speed.As everyone knows, read/write head is attached on the read/write head arm, and this read/write head arm is driven by a hard disk drive motion, and this hard disk drive motion comprises the coil that is commonly referred to voice coil loudspeaker voice coil magnet (" VCM ").According to this structure, read/write head is from rotating from the fixing distance of a fulcrum.We also know, for making the read/write head motion, current impulse are applied on the VCM, and this current impulse makes the read/write head arm begin to move.After the current impulse decay, the read/write head arm continues to move (because inertia), because this motion will generate back electromotive force (back-EMF) voltage in VCM.We know that the angular velocity of the back electromotive force of VCM (back-EMF) voltage and VCM is proportional, thereby the linear velocity of driving device Read/writing head with hard dish is proportional.Therefore, the measured value of read/write head speed can be provided with VCM back electromotive force (back-EMF) voltage.
What Fig. 1 represented is the block diagram of the measurement mechanism 1000 of read/write head speed, and this device 1000 is according to one or more embodiment mades of the present invention.Suppose that device 1000 utilizes V
DThe measurement bandwidth, V
D/ 2 is the intermediate value of bandwidth.As shown in Figure 1, controller 100 produces N+1 digital signal or output signal: GPIO (O) arrives GPIO (N), and digital signal or output signal GPIO (O) are arrived GPIO (N) as the input of resistor R (O) to R (N).According to one or more embodiment of the present invention, controller 100 can be the microcontroller in the hard disk drive, and more particularly, controller 100 can be digital signal processor (" DSP ").According to one or more these embodiment of the present invention, can with but be not limited to the general purpose I of DSP/O output, provide digital signal or output signal GPIO (O) to GPIO (N).In addition, suppose select for use GPIO (O) to GPIO (N) and R (O) to R (N), so that self-resistance device R (O) to the voltage output range (just by changing the signal value resulting scope of GPIO (O) to GPIO (N)) of R (N) will be from O to V
D, and mid point is at V
D/ 2.
Further as shown in Figure 1, (after driving the cephalomotor current attenuation of read/write) back electromotive force (back-EMF) of generating in VCM is used as circuit unit 110 at input port 110
1(positive input) and input port 110
2The input of (negative input), wherein circuit unit 110 amplifies by unit, and output signal V
Back=V
D/ 2+VCM back electromotive force.Any making circuit unit 110 that can utilize the assembly of commercial easy acquisition and utilize several different methods known to a person of ordinary skill in the art.
Further as shown in Figure 1, at summing point 120, (be V from the output of circuit unit 110
Back) to deduct from resistor R (O) to the output of R (N) (be V
Ref), add V
D/ 2, and with input (that is, the input=V of amplifier 130 of this difference as amplifier 130
Back-V
Ref+ V
D/ 2).Can be easy to recognize as those of ordinary skill in the art, use amplifier 130 to come conditioning signal and suitable voltage level is provided.Then, will export the input of the plus end of device 140 as a comparison from the difference of the amplification of amplifier 130, and with V
D/ 2 inputs of the negative terminal of device 140 as a comparison.Then, be used as the input of controller 100 from the output 150 of comparer 140.Understand easily, if V
Back-V
Ref+ V
D/ 2＜V
D/ 2, then export 150 and be O, and V
Back-V
Ref+ V
D/ 2＞V
D/ 2, then export 150 and be: such as but not limited to 1.Can utilize the commercial assembly that is easy to obtain, and utilize known to those skilled in the art a plurality of methods any one make amplifier 130 and comparer 140.
According to one or more embodiment of the present invention, resistor R (O) has resistance value R (i)=2 to R (N)
i* R.Therefore, the numeral input by will having predetermined voltage level (O or V) is as the input of resistance R (O) to R (N), can have 2 from resistor R (O) to the voltage output of R (N)
N+1Individual different value.As will be described in detail below, and according to one or more embodiment of the present invention, device 1000 provides has 2
N+1The measured value of the speed of the read/write head of resolution.
Fig. 2 represents the algorithm flow chart that one or more embodiment according to the present invention make, and carries out this algorithm by the controller 100 of device 1000, and uses this algorithm that a measured value of read/write head speed is provided.According to one or more embodiment of the present invention, this algorithm is the scale-of-two searching algorithm.
As shown in Figure 2, in the unit 400, controller 100 is set to 0 with each numeral output GPIO (O) to GPIO (N).Transfer control to unit 410 then.
In the unit 410, controller 100 output GPIO (O) wait for device 1000 ready (settle) to GPIO (N).Transfer control to unit 420 then.
In the unit 420, controller 100 is provided with the logic inverse value that equals digital state value Comparator State with digital state variable TargetState, and wherein Comparator State is corresponding to the output 150 from comparer 140 shown in Figure 1.According to one or more embodiment of the present invention, (a) as GPIO (O) during to each numeral output of GPIO (N)=0, if VCM is back electromotive force＜V
Ref, then Comparator State has the first digital state value (such as but not limited to 0); And (b), as GPIO (O) during to each numeral output of GPIO (N)=0, if VOM is back electromotive force＞V
Ref, then Comparator State has second digital value (such as but not limited to 1).Above-mentioned then algorithm is carried out the scale-of-two retrieval with decision VCM back electromotive force.Transfer control to 430 then.
In the unit 430, controller 100 is provided with N and equals measuring skew bit number.According to one or more these embodiment of the present invention, this will determine the resolution of velocity survey.Transfer control to unit 400 then, the circulation of beginning scale-of-two retrieval.
In the unit 440, controller 100 is arranged to voltage corresponding to logical one with GPIO (N), promptly is that N general output digital signal is arranged to logical one, and remaining numeral output then keeps the value before their.Notice that the scale-of-two retrieval is to begin and down to least significant bit (LSB) from highest significant position.Transfer control to unit 450 then.
In the unit 450, controller 100 waits for that devices 1000 are ready.Transfer control to unit 460 then.
At identifying unit 460, controller 100 judges whether Comparator State (that is, output state 150) equals TargetState.In fact, this decision V
RefWhether enough big so that VCM back-emf signal and V
RefBetween difference reindexing.If transfer control to unit 470, otherwise transfer control to unit identifying unit 480.
In the unit 470, controller 100 is arranged to equal 0 with GPIO (N).In fact, V
RefToo big, with V
RefBe reduced to the value before unit 440 increases.Transfer control to unit 480 then.
At identifying unit 480, controller 100 judges whether N equals 0.If transfer control to unit 500, otherwise transfer control to unit 490.
In the unit 490, controller 100 is provided with N=N-1.Then, transfer control to unit 440 to continue retrieval.
In the unit 500, controller 100 carries out following conversion: will ((span that is provided to GPIO (N) by GPIO (O), promptly 2
N+1)/2 deduct the value to GPIO (N) representative by GPIO (O)) convert voltage to, and this voltage be multiply by proportionality constant, so that this voltage transitions is become speed; This proportionality constant can such as but not limited to magnet strength, coil turn or the like, be determined as usual by those of ordinary skill in the art based on specific drive characteristics, not need excessive test.
One or more alternative of the present invention, by with single resistor and N position DAC (digital to analog converter), the addition resistor R (O) that replaces device 1000 shown in Figure 1 is made to R (N).According to one or more such embodiment: (a) N of self-controller 100 numeral exported input as N position DAC in the future; (b) will be used as the input of resistor from the output voltage of N position DAC; And (c) output voltage (V of self-resistance device in the future
Ref) as the input of the summing point 120 of device 1000 shown in Figure 1.
Fig. 3 represents the algorithm flow chart that one or more embodiment according to the present invention make, according to of the present invention one or more alternatives of utilizing N position DAC, carry out this algorithm by controller, and use this algorithm that a measured value of read/write head speed is provided.In fact, this algorithm is the scale-of-two retrieval.
As shown in Figure 3, in the unit 1400, controller 100 is arranged to equal 2 with d
(N-1), D=d, and DAC=0, wherein: (a) D is the output from this algorithm; (b) DAC is the output voltage from N position DAC; And (c) d represents the N bit digital input of N position DAC.Then, transfer control to unit 1410.
In the unit 1410, after controller 100 is applied to N position DAC with input, wait for that device 1000 is ready.Transfer control to unit 1420 then.
In the unit 1420, controller 100 is arranged to equal the logic inverse value of digital state value Comparator State with digital state variable TargetState, and wherein ComparatorState is corresponding to the output 150 from comparer 140 shown in Figure 1.Algorithm before similar is carried out the value of this algorithm search N position DAC, and this value makes Comparator State be set to 0 o'clock initial value from DAC and changes.Transfer control to unit 1430 then.
In the unit 1430, controller 100 is arranged to equal the DAC bit number with N.According to one or more such embodiment of the present invention, this will determine the resolution of velocity survey.The circulation of 1440 beginnings from the unit is transferred in control.
In the unit 1440, controller 100 is provided with DAC=D and UP=+1.Transfer control to unit 1450 then.
In the unit 1450, controller 100 waits for that devices 1000 are ready.Then, transfer control to unit 1460.
At identifying unit 1460, controller 100 judges whether Comparator State (that is digital output state 150) equals TargetState.In fact, whether this is to determine to deduct enough big amount so that it and V from the VCM back-emf signal
RefBetween difference reindexing.If, transfer control to unit 1470, otherwise, transfer control to identifying unit 1480.
In the unit 1470, controller 100 is provided with UP and equals-1.In fact, deduct too much, return and reset the quantity that deducts, return again to deduct less a little amount from the VCM back-emf signal.Transfer control to identifying unit 1480 then.
At identifying unit 1480, controller 100 judges whether N equals 0.If transfer control to unit 1500, otherwise transfer control to unit 1490.
In the unit 1490, controller 100 is provided with N=N-1, d=d/2, D=D+ (UP*d).Transfer control to unit 1440 then.
In the unit 1500, controller 100 is done following conversion: ((span that is provided by DAC)/2 deduct the value of representing with D) converted to voltage, again this voltage be multiply by a proportionality constant this voltage transitions is become speed, this proportionality constant can be by those of ordinary skill in the art based on specific drivers ' characteristics, such as but not limited to the intensity of magnet, number of turn of coil or the like, determine as usual, do not need excessive test.
Fig. 4 represents to be used for the circuit diagram of one or more embodiment of the device 1000 shown in the construction drawing 1.As shown in Figure 1, come self-controller (for ease of understanding the present invention, not shown in Fig. 4) numeral output GPIO (O) be used as the input of resistor R (O) to GPIO (N) to R (N), be used as the input of total chalaza 120 to the output of R (N) from resistor R (O).
Shown in Fig. 4 was further, the input (being the VCMP of VCM back electromotive force) of holding from VCM " just " was used as terminal 110
1Input, by a resistor adjustment, be increased to V there at summing point 121
D/ 2, and as the input of the negative terminal of differential amplifier 135.Shown in Fig. 4 was further, the input (being the VCMN of VCM back electromotive force) of holding from VCM " bearing " was used as terminal 110
2Input, by a resistor adjustment, be added to V there
Ref(below will describe), and as the input of the negative terminal of differential amplifier 135.As above in conjunction with Figure 1, V
RefBe to receive with numeral output GPIO (O) to the input of the form of GPIO (N), origin self-resistance device R (O) determines to the output of R (N).
Shown in Fig. 4 is further, be used as the input of the anode of comparer 145 from the output of differential amplifier 135.At last, as further shown in Figure 4, V
D/ 2 are used as the negative terminal input of comparer 140.
As top with reference to as described in the figure 1, if V
Back-V
Ref+ V
D/ 2＜V
D/ 2, be 0 from the output 150 of comparer 145, if V
Back-V
Ref+ V
D/ 2＞V
D/ 2, then export 150 and be V
D(, being not limited to this) as example.Can utilize any one making differential amplifier 135 and comparer 145 of the known a plurality of suitable assemblies of those of ordinary skill in the art.
Fig. 5 represents the algorithm flow chart that one or more embodiment according to the present invention create, and can carry out this algorithm by the controller 900 such as but not limited to device shown in Figure 6 2000.This algorithm is a feedback of utilizing the measurement of read/write head speed, makes read/write head near predetermined read/write head speed, the i.e. feedback control algorithm of target velocity.As what can be readily appreciated that from Fig. 6, device 2000 comprises device shown in Figure 1 1000, and has increased vcm current driver 910.To this embodiment, only use resistor R shown in Figure 1 (0).
As shown in Figure 5, in the unit 700, controller 900 output GPIO (O) are so that generate desired value corresponding to read/write head speed, i.e. the reference voltage level of target velocity.Control is sent to unit 710 then.
In the unit 710, controller 9000 waits for that circuit are ready.Control is sent to unit 720 then.
In the unit 720, the controller 900 vcm current drivers 910 of stopping using.Transfer control to unit 730 then.
In the unit 730, controller 900 waits for that circuit come from the recovering state of the vcm current driver 910 of stopping using.Transfer control to unit 740 then.
In the unit 740, controller 900 sampling Comparator State (for example, shown in Figure 6 digital output status signal 950) from comparer 940.Transfer control to identifying unit 750 then.
At identifying unit 750, whether controller 900 judges whether to be lower than reference voltage level so that judge the VCM back electromotive force by Comparator State=0.If transfer control to unit 760, otherwise transfer control to unit 770.
In the unit 760, controller 900 is provided with VelocityError=+Vconstant.In fact, the VCM back electromotive force is lower than reference voltage level, more electric current must be applied to VCM and go up so that quicken read/write head.Transfer control to unit 780 then.
In the unit 770, controller 900 is provided with VelocityError=-Vconstant.In fact, the VCM back electromotive force is higher than reference voltage level.Transfer control to unit 780 then.
In the unit 780, controller 900 is provided with ControlOutput=(VelocityError*PROPORTIONALgain)+Integrator.In the present invention, ControlOutput is the magnitude of current that is applied to the acceleration on the VCM or this read/write head that slows down, so that the speed of read/write head is near required target velocity.Can decide suitable Vconstant and PROPORTIONALgain value as usual by those of ordinary skill in the art based on the characteristic and the desired properties of specific driver, not need excessive test.Transfer control to unit 790 then.
In the unit 790, controller 900 activates vcm current drivers 910, and electric current output is arranged to equal ControlOutput.Transfer control to unit 800 then.
In the unit 800, controller 900 is by being provided with Integrator=Integrator+ (VelocityError*INTEGRATORgain) in the hope of the correcting value summation.Can be based on the mechanical property of specific hard disk drive and required performance, test as usual by those of ordinary skill in the art and to decide suitable INTEGRATORgain value, do not need excessive test.
In the unit 810, the schedule time of 910 output currents such as controller 900 drivers such as vcm current such as marquis such as grade.Transfer control to unit 820 then.
At identifying unit 820, controller 900 judges whether asked to stop algorithm.If transfer control to 830 so that withdraw from, otherwise transfer control to unit 720.
Comprise various embodiments of the present invention although at length illustrated and described at this, those skilled in the art still can derive of the present invention many other the different embodiment that comprise above-mentioned technical characterictic and technique effect at an easy rate.
Claims (8)
1. device that is used for measuring read/write head load/unload speed at hard disk drive, described read/write head produces motion by the hard disk drive motion that comprises a coil, and this device comprises:
Controller, output is used as one or more digital signals of the input of first assembly; Described first assembly is then exported a reference voltage with in response;
Second assembly, the voltage that responds described coil is exported and described reference voltage, to export the measured value of difference between described coil voltage and the described reference voltage; And
The 3rd assembly responds the measured value of described difference, if described coil voltage is greater than described reference voltage, output first value, if and described coil voltage is lower than described reference voltage, output second value, the output of described the 3rd assembly is used as the input of described controller;
Wherein, when described controller is observed the variation of described the 3rd assembly output, just carry out searching algorithm, change one or more digital signals, so that the digital estimated value of described coil voltage is provided, described estimated value is as a measured value of described read/write head speed.
2. device as claimed in claim 1 is characterized in that, described first assembly comprises one or more resistors.
3. device as claimed in claim 2 is characterized in that, described first assembly comprises the digital to analog converter (DAC) with one or more inputs, and the output of described digital to analog converter is used as the input of resistor.
4. device as claimed in claim 2 is characterized in that, described the 3rd assembly is a comparer.
5. device as claimed in claim 3 is characterized in that, described the 3rd assembly is a comparer.
6. device as claimed in claim 2 is characterized in that, described second assembly is a differential amplifier.
7. device as claimed in claim 3 is characterized in that, described second assembly is a differential amplifier.
8. control the device of read/write head speed in hard disk drive, described motion is driven by the hard disk drive motion that comprises a coil, and the effect of this coil is to make read/write head near predetermined velocity amplitude, and this device comprises:
Current driver, the response current signal is applied to electric current on the described coil;
Controller is exported: the one or more digital signals that (a) are used as the input of first assembly; Described first assembly is exported a reference voltage with in response; And (b) described current signal;
Second assembly, the voltage that responds described coil is exported and described reference voltage, to export the measured value of the difference between described coil voltage and the described reference voltage; And
The 3rd assembly responds the measured value of described difference, if described coil voltage is greater than described reference voltage, output first value, if and described coil voltage is lower than described reference voltage, output second value, the output of described the 3rd assembly is used as the input of described controller;
Wherein, when described controller is observed variation in the output of described the 3rd assembly, just carry out feedback algorithm and change described current signal; Wherein, when the output of described the 3rd assembly equals described second value, described feedback algorithm make described current signal more multiple current be provided on the coil, otherwise, make described current signal that less electric current is provided.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/687,056 US6894453B2 (en) | 2002-10-22 | 2003-10-16 | Method and apparatus to measure disk drive head load/unload velocity |
| US10/687,056 | 2003-10-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1681037A true CN1681037A (en) | 2005-10-12 |
Family
ID=35067582
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200420064419 Expired - Fee Related CN2735500Y (en) | 2003-10-16 | 2004-05-31 | Device for measuring loading/unloading speed of read/write head |
| CN 200410084868 Pending CN1681037A (en) | 2003-10-16 | 2004-10-08 | Method and apparatus to measure disk drive head load/unload velocity |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200420064419 Expired - Fee Related CN2735500Y (en) | 2003-10-16 | 2004-05-31 | Device for measuring loading/unloading speed of read/write head |
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| Country | Link |
|---|---|
| CN (2) | CN2735500Y (en) |
-
2004
- 2004-05-31 CN CN 200420064419 patent/CN2735500Y/en not_active Expired - Fee Related
- 2004-10-08 CN CN 200410084868 patent/CN1681037A/en active Pending
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| Publication number | Publication date |
|---|---|
| CN2735500Y (en) | 2005-10-19 |
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