CN1319159C - Semiconductor package with heat sink - Google Patents

Abstract

A semiconductor package with heat sink connects at least a chip and a heat sink covering the chip on a substrate, the surface of the heat sink contacting the substrate is opened with a plurality of grooves or openings, so that the heat sink is fixed on the substrate by an adhesive material laid between the heat sink and the substrate and filled in the grooves or openings; the provision of the recess or opening enables the adhesive material applied therein to provide an anchoring effect to firmly locate the heat sink on the substrate. Because the fixing parts such as bolts and the like are not used, holes do not need to be reserved on the substrate, and the circuit layout performance and the arrangement condition of output/input ends (such as solder balls and the like) on the substrate are not influenced; meanwhile, the heat sink is fixed on the substrate, so that the chip is not cracked.

Description

Semiconductor package with heat sink

technical field

The invention relates to a semiconductor package, in particular to a semiconductor package with a heat sink, which can improve the heat dissipation efficiency of the semiconductor package.

Background technique

Flip chip ball grid array (Flip Chip Ball Grid Array, FCBGA) semiconductor package is a packaging structure with flip chip and ball grid array at the same time, at least one chip is electrically connected by multiple solder bumps (Solder Bump) On one surface of the substrate, and on the other surface of the substrate (usually the surface opposite to the crystal plane), a plurality of solder balls (Solder) as input/output (Input/Output, I/O) terminals are implanted Ball). In order to release the heat generated by the operation of the chip, a heat sink is also provided in the above-mentioned semiconductor package. For example, in U.S. Patent Nos. 5,311,402, 5,637,920, 5,931,222 and 6,011,304, the heat sink can be placed on the substrate by adhesive or solder, and its area is often larger than that of the chip to cover the chip. , so that the heat from the chip can be effectively released. However, in order to improve the electrical function of the package, a passive component (Passive Component) should be added on the substrate, so that the area on the substrate used to connect with the heat sink is reduced, making it difficult for the heat sink to be positioned and attached to it. On the substrate, it often causes the heat sink to fall off, and this situation will be more serious when using a large heat sink. In addition, using adhesive or solder to bond the heat sink and the plane of the substrate together may cause problems such as impurities on the contact surface of the heat sink or the substrate or stress between the heat sink and the substrate, resulting in a gap between the heat sink and the substrate. The phenomenon of delamination occurs between them, causing the heat sink to fall off; in addition, when the substrate with the heat sink attached is subjected to external force, such as vibration, the heat sink may also fall off.

In view of this, there are existing technologies to arrange the heat sink on the chip or to fix the heat sink on the substrate by mechanical means. The former, such as U.S. Patent No. 6,093,961, is to clamp a heat sink on a chip that is connected to the substrate in a flip-chip manner. Feet, the ends of each leg are hook-shaped; when a certain pressure is applied to make the heat sink touch and press against the upper surface of the chip, the legs of the heat sink can use its elasticity to expand slightly outward, making the hook-shaped end Engaging with the corners of the lower surface of the chip, the heat sink is fixed and positioned on the chip. However, this structure is easy to damage the chip due to the pressure when the heat sink is pressed onto the chip. At the same time, the heat sink that contacts the chip has a different coefficient of thermal expansion (Coefficient of Thermal Expansion, CTE) from the chip, so it will be damaged at high temperature. Or in the temperature cycle process, the difference in thermal expansion coefficient may cause the chip to be subjected to thermal stress and cause crack damage (Crack).

The packaging structure invented by U.S. Patent Nos. 5,396,403 and 5,926,371 is to fix the heat sink on the substrate by mechanical means, wherein a plurality of holes are provided on the part of the heat sink that is in contact with the substrate, and the corresponding parts on the substrate are also A plurality of holes are drilled, so that fixing parts such as bolts are embedded in the corresponding holes of the heat sink and the substrate, so that the heat sink and the substrate can be connected, and the heat sink can be positioned on the substrate; in addition, in US Patent No. 6,441,485 In the No. 1 case, the edge of the heat sink is connected with an extension part, and the end of the extension part has a hook-like structure, so that the extension part passes through the hole opened on the substrate, and the hook-shaped structure is engaged with the substrate, so that A heat sink is positioned on the substrate.

However, this way of fixing the heat sink on the substrate by means of a fixing piece or an extension may cause many problems. One is that a part of the area needs to be reserved on the substrate for opening holes, making it difficult to plant more heat sinks on the substrate. Solder balls, thus affecting the circuit layout (Routability) on the substrate; moreover, the opening of holes also increases the manufacturing cost of the substrate and the complexity of the process; in addition, the substrate with holes may invade the holes due to external moisture or pollutants , will lead to problems such as poor reliability of the packaged product.

Therefore, how to solve the above-mentioned problems and improve the adhesion between the heat sink and the substrate so that the heat sink can be firmly positioned on the substrate without causing chip cracks or affecting the circuit layout on the substrate is currently an important issue in the semiconductor industry. topic.

Contents of the invention

In order to overcome the above-mentioned shortcoming of the prior art, the object of the present invention is to provide a semiconductor package with a heat sink, which is to provide a plurality of grooves or openings on the contact surface of the heat sink and the substrate, so that the heat sink can be used An adhesive material laid between the heat sink and the substrate and filled in the groove or hole is fixed on the substrate, and the arrangement of the groove or the hole enables the adhesive material laid therein to have anchoring ( Anchor) function, so that the heat sink is firmly positioned on the substrate.

Another object of the present invention is to provide a semiconductor package with a heat sink. There is no need to reserve holes on the substrate, and the heat sink is fixed on the substrate by means of an adhesive material, so that it will not affect the solder ball layout on the substrate. Environment and circuit layout (Routability).

Another object of the present invention is to provide a semiconductor package with a heat sink so that the heat sink can be positioned on the substrate without cracking the chip.

In order to achieve the above and other objects, a semiconductor package with a heat sink of the present invention includes: a substrate with an upper surface and an opposite lower surface; at least one chip is arranged on the upper surface of the substrate, and by A plurality of conductive components are electrically connected to the substrate; a heat sink is arranged on the upper surface of the substrate and covers the chip, and the heat sink has a flat portion and a support extending from the edge of the flat portion to the substrate part, so that the flat part is supported by the support part and supported above the chip, wherein the part of the support part in contact with the upper surface of the substrate is provided with a plurality of concave parts, the concave part is a groove, and the groove The diameter of the opening port is smaller than the inner diameter of its closed end; an adhesive material is laid between the support portion of the heat sink and the upper surface of the substrate, and is filled into the recess of the heat sink, and fixed by the adhesive material The heat sink is on the substrate; and a plurality of solder balls are planted on the lower surface of the substrate.

A semiconductor package with a heat sink of the present invention may further include: a substrate having an upper surface and an opposite lower surface; at least one chip disposed on the upper surface of the substrate and electrically connected by a plurality of conductive components. Connected to the substrate; a heat sink is arranged on the upper surface of the substrate and covers the chip, the heat sink has a flat portion and a support portion extending from the edge of the flat portion to the substrate, so that the flat portion Supported by the supporting part and supported above the chip, wherein the supporting part is outwardly formed with a plurality of flanges in contact with the upper surface of the substrate, so that each part of the flanges in contact with the substrate is provided with at least one Opening hole; an adhesive material is laid between the flange of the heat sink and the upper surface of the substrate, and is filled into the opening of the heat sink, and the heat sink is fixed on the substrate by the adhesive material and a plurality of solder balls planted on the lower surface of the substrate.

The advantage of the above-mentioned semiconductor package is that by using a heat sink with a groove or an opening, an adhesive material is laid between the heat sink and the substrate and filled in the groove or hole, so that the heat sink can be fixed. On the substrate; the arrangement of grooves or openings enables the adhesive material laid therein to provide an anchoring effect, enhance the adhesion between the heat sink and the substrate, and make the heat sink firmly positioned on the substrate. Since there is no need to use bolts to fix the heat sink on the substrate, there is no need to reserve holes in the substrate, so the layout of solder balls on the substrate and the circuit layout (Routability) will not be affected, making the substrate suitable for structures filled with solder balls At the same time, the substrate without holes will not be invaded by external moisture or pollutants, ensuring the reliability of the packaged product. In addition, the heat sink is positioned on the substrate, so it will not easily cause chip cracks (Crack) as in the prior art.

Description of drawings

1 is a cross-sectional view of a semiconductor package according to Embodiment 1 of the present invention;

2 is a cross-sectional view of a semiconductor package according to Embodiment 2 of the present invention;

3A is a top view of a heat sink in the semiconductor package of FIG. 2;

3B is a cross-sectional view of another example of a heat sink in the semiconductor package of FIG. 2;

4 is a cross-sectional view of a semiconductor package according to Embodiment 3 of the present invention;

5A is a top view of a heat sink in the semiconductor package of FIG. 4;

5B is a partially enlarged view of a heat sink in the semiconductor package of FIG. 4;

5C is a cross-sectional view of another example of a heat sink in the semiconductor package of FIG. 4; and

FIG. 5D is a cross-sectional view of still another example of the heat sink in the semiconductor package of FIG. 4 .

Detailed ways

Embodiments of the semiconductor package with heat sink of the present invention will be described in detail below with reference to FIGS. 1 , 2 , 3A, 3B, 4 and FIGS. 5A to 5D .

Example 1

FIG. 1 is a semiconductor package according to Embodiment 1 of the present invention. As shown in the figure, the semiconductor package of the present invention uses a substrate 10 as a chip carrier (Chip Carrier), and the substrate 10 is mainly made of a commonly used resin material, such as epoxy resin (Epoxy resin), polyimide ( Polyimide) resin, BT (Bismaleimide Triazine) resin, FR4 resin, etc.

The substrate 10 has an upper surface 100 and an opposite lower surface 101. A plurality of welding pads (Bond Pads) 102 are formed at predetermined positions on the upper surface 100 for planting solder bumps (SolderBump) 12. The lower surface of the substrate 10 A plurality of solder ball pads (Ball Pad) 103 are formed on the surface 101 for connecting with solder balls (Solder Ball) 17. The substrate 10 belongs to the prior art and will not be repeated here.

Prepare at least one chip 11, the chip 11 has an active surface (Active Surface) 110 and a relative non-active surface (Non-activeSurface) 111 that are laid with electronic components and circuits (not marked), wherein the chip 11 A plurality of bonding pads 112 are formed on the active surface 110 , so that the bonding pads 112 of the chip 11 correspond to the bonding pads 102 of the substrate 10 . The active surface 110 of the chip 11 is connected to the upper surface 100 of the substrate 10 by a plurality of solder bumps 12, so that the two ends of each solder bump 12 are soldered to the corresponding solder pads 102, 112 respectively, so that the chip 11 electrically connected to the substrate 10 . This structure using solder bumps to connect the chip to the substrate is called flip-chip (Flip-Chip) technology, and its major advantage is that the electrical connection path between the chip and the substrate can be effectively shortened and the quality of the electrical connection can be ensured.

It is a better choice to lay an insulating material 13 such as resin between the chip 11 and the substrate 10 to fill the gap between adjacent solder bumps 12, so that the solder bumps 12 can be covered by the insulating material 13, which can The bonding force between the chip 11 and the substrate 10 is improved. This method of filling the gap between the chip and the substrate is called the underfill technology. For example, the existing dispensing (Dispense) method can be used to inject insulating materials, and the insulating materials can be filled by capillarity. The gap between adjacent solder blocks, the underfill technology belongs to the prior art, and will not be repeated here.

Furthermore, at least one passive component (Passive Component) 14, such as a capacitor (Capacitor), etc., can be connected to the position where the solder bump 12 or the chip 11 is not provided on the upper surface 100 of the substrate 10, so that the overall semiconductor package The electrical function of the parts is more perfect.

A heat sink 15 is arranged on the upper surface 100 of the substrate 10 and the non-active surface 111 of the chip 11, and the heat sink 15 and the chip 11 are bonded by an adhesive 18 (such as heat-conducting glue, etc.), so that the chip 11 and the passive The component 14 is covered by the cooling fin 15 and is isolated from the outside world from moisture and pollutants. The function of the heat sink 15 is to dissipate the heat generated during the operation of the chip 10 to the outside through the thermal conductive adhesive 18 and the heat sink 15 , thereby improving the heat dissipation effect of the semiconductor package. The heat sink 15 has a flat portion 150 and a support portion 151 extending from the edge of the flat portion 150 to the substrate 10 , so that the flat portion 150 is supported by the support portion 151 and can be supported above the chip 11 . Wherein, a plurality of grooves 152 are defined at the portion where the supporting portion 151 is in contact with the upper surface 100 of the substrate 10 , so that the upper surface 100 of the substrate 10 is partially exposed in the grooves 152 . As shown in Figure 1, when the aperture of the opening end of the cooling fin 15 groove 152 is less than the inner diameter of its closed end, it has a better effect, so that its section can be tapered to produce anchoring effect, and the groove 152 The number is at least two and are symmetrical to each other, or grooves 152 are formed on four sides of the heat sink 15 (not limited thereto).

Lay an adhesive material 16, such as adhesive (Adhesive) or solder (Solder), etc., between the support portion 151 of the heat sink 15 and the upper surface 100 of the substrate 10, and apply appropriate pressure to make the adhesive material 16 squeezed. Fill in the groove 152 of the heat sink 15 after pressing, and then perform a baking (Baking) procedure, so that the adhesive material 16 is solidified so that it has an anchoring (Anchor) function, so that the adhesive material 16 can be anchored The heat sink 15 is on the substrate 10 .

A plurality of solder balls 17 are planted on the solder ball pad 103 on the lower surface 101 of the substrate 10. The solder balls 17 are used as the input/output (Input/Output, I/O) end of the semiconductor package to communicate with external devices such as printed circuits. Board (Printed Circuit Board, not marked) is electrically connected, so that the chip 11 can be electrically connected to the printed circuit board through solder balls 17; thus the semiconductor package of the present invention is completed.

In this embodiment, the groove 152 provided on the heat sink 15 will not be exposed on the outer surface of the heat sink 15, thus will not affect the appearance of the overall semiconductor package; The glue is applied between the heat sink and the substrate is similar, so the manufacturing cost and the complexity of the process will not be increased.

Example 2

FIG. 2 is a diagram showing a semiconductor package according to Embodiment 2 of the present invention. As shown in the figure, the structure of the semiconductor package of this embodiment is roughly the same as that of Embodiment 1, except that the portion where the heat sink 15 is in contact with the upper surface 100 of the substrate 10 is provided with a plurality of vertical openings that run through the support portion 151. Hole 153, so that the opening 153 has a first opening 154 facing the substrate 10 and an opposite second opening 155, and the effect is better when the diameter of the first opening 154 is smaller than the diameter of the second opening 155. As shown in FIG. 3A , the opening 153 is preferably located at a corner of the heat sink 15 (but not limited thereto). Also as shown in Figure 2, the opening 153 of the cooling fin 15 is in a stepped structure, and the part of the opening 153 closer to the first opening 154 uses a stepped turning structure to reduce the aperture to form the first opening 154 to produce Anchoring. The adhesive material 16 is laid between the support portion 151 of the heat sink 15 and the upper surface 100 of the substrate 10, and is squeezed into the opening 153 of the heat sink 15 through the first opening 154, overflows and flows to the second opening. 155 , after being baked and solidified, a rivet-like structure with a locking effect is formed, which can effectively fix the heat sink 15 on the substrate 10 .

Furthermore, the opening 153 of the heat sink 15 can also be in a structure similar to a cone or the diameter of the aperture is tapered toward one end (Taper). As shown in FIG. 3B, the aperture of the opening 153 is from the second opening 155 to the first opening 154. Tapered so that the first opening 154 is located at the tip or narrow end of the opening 153 .

Example 3

FIG. 4 shows a semiconductor package according to Embodiment 3 of the present invention. As shown in FIG. 4 , the structure of the semiconductor package of Embodiment 3 is substantially the same as that of Embodiment 1, except that the supporting portion 151 of the heat sink 15 outwardly forms a plurality of flanges in contact with the upper surface 100 of the substrate 10 156, the flange 156 is formed on the corner of the heat sink 15, and the effect is better (as shown in Figure 5A, but not limited thereto), so that the openings 153 of the heat sink 15 are opened on each flange 156 and penetrate through The flange 156 exposes a part of the upper surface 100 of the substrate 10 in the opening 153 of the flange 156 (as shown in FIG. 5B ), so the adhesive material 16 is laid on the flange 156 and the substrate 10. Between the surfaces 100 , the opening 153 of the flange 156 of the cooling fin 15 is squeezed and filled, so that the cooling fin 15 is fixed on the substrate 10 through the adhesive material 16 .

Because one end opening 157 of the opening 153 that runs through the flange 156 is exposed on the surface of the heat sink 15, the laying amount of the adhesive material 16 can be easily monitored; when the adhesive material 16 injected into the opening 153 overflows the When the opening 157 is opened, it means that enough adhesive material 16 has been laid in the opening 153 and between the heat sink 15 and the substrate 10 , and there is no need to inject more adhesive material 16 .

In addition, the opening 153 defined on the flange 156 of the heat sink 15 can also be in a similar cone shape ( FIG. 5C ) or a stepped shape ( FIG. 5D ). As shown in FIG. 5C , the tapered opening 153 has a first opening 154 facing the substrate 10 and an opposite second opening 155 , and the diameter of the opening 153 tapers toward one end, so that the first opening 154 The aperture is smaller than the aperture of the second opening 155; as shown in FIG. The aperture of the two openings 155, and the portion of the opening 153 closer to the first opening 154 is reduced by a stepped turning structure to form the first opening 154, so that the flange 156 and the substrate 10 laid on the heat sink 15 The adhesive material 16 between the surfaces 100 is squeezed and filled into the opening 153 through the first opening 154 .

The advantage of the above-mentioned semiconductor packaging structure is that by using the heat sink with a groove or an opening, an adhesive material is laid between the heat sink and the substrate, and filling the groove or hole can fix the heat sink in the On the substrate; the setting of grooves or openings enables the adhesive material laid therein to provide anchoring (Anchor) fixation to improve the adhesion between the heat sink and the substrate, so that the heat sink can be firmly positioned on the substrate . Therefore, there is no need to reserve holes on the substrate to embed bolts and other fixtures to connect the heat sink to the substrate, so it will not affect the layout of the solder balls on the substrate and the circuit layout (Routability), making the substrate suitable for planting At the same time, the substrate without holes will not be invaded by external moisture or pollutants, ensuring the reliability of the packaged product. In addition, since the heat sink is positioned on the substrate instead of being clamped on the chip, it will not cause chip cracks (Crack).

Claims (3)

1. A semiconductor package with a heat sink, characterized in that the semiconductor package comprises: a substrate having an upper surface and an opposite lower surface; At least one chip is disposed on the upper surface of the substrate and is electrically connected to the substrate by a plurality of conductive components; A heat sink is arranged on the upper surface of the substrate and covers the chip, the heat sink has a flat part and a support part extending from the edge of the flat part to the substrate, so that the flat part is supported by the support part And the frame is supported above the chip, wherein, the part where the supporting part is in contact with the upper surface of the substrate is provided with a plurality of concave parts, the concave part is a groove, and the diameter of the opening port of the groove is smaller than the inner diameter of the closed end; An adhesive material is laid between the support portion of the heat sink and the upper surface of the substrate, and is filled into the concave portion of the heat sink, and the heat sink is fixed on the substrate by the adhesive material; and A plurality of solder balls are planted on the lower surface of the substrate. 2. The semiconductor package according to claim 1, wherein the semiconductor package further comprises: at least one passive component, which is connected to a portion of the upper surface of the substrate where no chip is provided and is dissipated by the heat dissipation covered by the film. 3. The semiconductor package as claimed in claim 1, wherein the adhesive material is any one of adhesive and solder.

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