CN119677175A - Solar cell, preparation method thereof and photovoltaic module - Google Patents
Solar cell, preparation method thereof and photovoltaic module Download PDFInfo
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- CN119677175A CN119677175A CN202411586141.6A CN202411586141A CN119677175A CN 119677175 A CN119677175 A CN 119677175A CN 202411586141 A CN202411586141 A CN 202411586141A CN 119677175 A CN119677175 A CN 119677175A
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Abstract
The invention provides a solar cell, a preparation method thereof and a photovoltaic module, wherein the solar cell comprises a semiconductor substrate, the semiconductor substrate comprises a front surface and a back surface which are oppositely arranged, a first intrinsic amorphous silicon layer, a first doped layer, a first transparent conducting layer and a first metal electrode are prepared on the front surface of the semiconductor substrate upwards, a second intrinsic amorphous silicon layer, a second doped layer, a second transparent conducting layer and a second metal electrode are prepared on the back surface of the semiconductor substrate downwards, a first aluminum oxide layer is located between the first doped layer and the first transparent conducting layer, a first dielectric layer is located on the first transparent conducting layer, and the first metal electrode penetrates through the first dielectric layer and is connected with the first transparent conducting layer.
Description
Technical Field
The disclosure relates to the technical field of solar cells, in particular to a solar cell, a preparation method thereof and a photovoltaic module.
Background
In the current manufacturing process of crystalline silicon heterojunction solar cells (HJT), after intrinsic amorphous silicon passivation layers and amorphous silicon doped layers are deposited on two sides of a silicon wafer after texturing, a physical vapor deposition (Physical Vapor Deposition, PVD) process is adopted to deposit Transparent Conductive Oxide (TCO) to achieve the dual functions of carrier collection and antireflection films due to low transverse conductivity. In the process, three problems are that 1, amorphous silicon is damaged when TCO is deposited, 2, the anti-reflection effect of the TCO film is insufficient, and 3, the TCO film is easy to corrode and poor in reliability, and the power stability of the assembly is affected.
Disclosure of Invention
The disclosure provides a solar cell, a preparation method thereof and a photovoltaic module, so as to at least solve the technical problems in the prior art.
According to a first aspect of the present disclosure, there is provided a solar cell comprising:
a semiconductor substrate including a front surface and a back surface disposed opposite to each other;
the front surface of the semiconductor substrate is provided with a first intrinsic amorphous silicon layer, a first doping layer, a first transparent conducting layer and a first metal electrode upwards, and the back surface of the semiconductor substrate is provided with a second intrinsic amorphous silicon layer, a second doping layer, a second transparent conducting layer and a second metal electrode downwards;
a first aluminum oxide layer located between the first doped layer and the first transparent conductive layer;
a first dielectric layer on the first transparent conductive layer; the first metal electrode penetrates through the first dielectric layer and is connected with the first transparent conductive layer.
In one embodiment, the thickness of the first alumina layer ranges from 1 nm to 10nm, and the thickness of the first dielectric layer ranges from 40 nm to 120nm.
In an embodiment, the material of the first dielectric layer includes at least one of SiN x、SiNOx、SiOx or MgF x.
In an embodiment, the method further comprises:
a second aluminum oxide layer located between the second doped layer and the second transparent conductive layer;
and the second metal electrode penetrates through the second dielectric layer and is connected with the second transparent conductive layer.
According to a second aspect of the present disclosure, there is provided a method of manufacturing a solar cell, the method comprising:
providing a semiconductor substrate, wherein the semiconductor substrate comprises a front surface and a back surface which are oppositely arranged;
Forming a first intrinsic amorphous silicon layer on the front surface of the semiconductor substrate and forming a second intrinsic amorphous silicon layer on the back surface of the semiconductor substrate;
Forming a first doped layer on the first intrinsic amorphous silicon layer and a second doped layer on the second intrinsic amorphous silicon layer;
forming a first aluminum oxide layer on the first doped layer;
Forming a first transparent conductive layer on the first alumina layer and forming a second transparent conductive layer on the second doped layer;
Forming a first dielectric layer on the first transparent conductive layer;
forming a plurality of first trenches on the first dielectric layer, wherein the first trenches penetrate through the first dielectric layer and expose the surface of the first transparent conductive layer;
And forming a first metal electrode in the first groove, and forming a second metal electrode on the second transparent conductive layer.
In one embodiment, the forming the first plurality of trenches includes forming the first plurality of trenches by a laser process.
In one embodiment, the forming the first aluminum oxide layer includes forming the first aluminum oxide layer by an atomic layer deposition process;
the forming the first dielectric layer comprises forming the first dielectric layer through a plasma enhanced chemical vapor deposition process.
In one embodiment, the thickness of the first alumina layer ranges from 1 nm to 10nm, and the thickness of the first dielectric layer ranges from 40 nm to 120nm.
In an embodiment, the method further comprises:
After forming the second doped layer, a second aluminum oxide layer is formed on the second doped layer, the second aluminum oxide layer being located between the second doped layer and the second transparent conductive layer.
In an embodiment, the method further comprises:
forming a second dielectric layer on the second transparent conductive layer after forming the second transparent conductive layer;
Forming a plurality of second trenches on the second dielectric layer, wherein the second trenches penetrate through the second dielectric layer and expose the surface of the second transparent conductive layer;
the forming of the second metal electrode comprises forming the second metal electrode in the second groove.
According to a third aspect of the present disclosure, there is provided a photovoltaic module comprising a solar cell as in any of the embodiments described above.
According to the solar cell, the preparation method thereof and the photovoltaic module, the first dielectric layer is formed on the first transparent conductive layer, the first dielectric layer and the first transparent conductive layer can be formed into a double-layer optical film structure, the current situation that the single-layer transparent conductive film is poor in antireflection effect is made up, the light energy utilization rate is improved, the short-circuit current is improved, the efficiency is improved, meanwhile, the acid and alkali corrosion resistance of the first dielectric layer can be utilized, the first transparent conductive layer is protected, and the device can pass reliability tests such as PID (potential induced degradation resistance), DH (Damp heat test) and HF (Halogen Free test).
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the disclosure, nor is it intended to be used to limit the scope of the disclosure. Other features of the present disclosure will become apparent from the following specification.
Drawings
The above, as well as additional purposes, features, and advantages of exemplary embodiments of the present disclosure will become readily apparent from the following detailed description when read in conjunction with the accompanying drawings. Several embodiments of the present disclosure are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings, in which:
In the drawings, the same or corresponding reference numerals indicate the same or corresponding parts.
Fig. 1 is a schematic structural diagram of a solar cell according to an embodiment of the disclosure;
fig. 2 is a schematic structural diagram of a solar cell according to another embodiment of the present disclosure;
Fig. 3 is a flowchart of a method for manufacturing a solar cell according to an embodiment of the present disclosure;
Fig. 4a to 4f are schematic views of a solar cell according to a first embodiment of the disclosure in a manufacturing process;
Fig. 5a to 5d are schematic diagrams of a solar cell according to a second embodiment of the disclosure in a manufacturing process.
Reference numerals:
10. semiconductor substrate, 21, first intrinsic amorphous silicon layer, 22, second intrinsic amorphous silicon layer, 31, first doping layer, 32, second doping layer, 41, first alumina layer, 42, second alumina layer, 51, first transparent conductive layer, 52, second transparent conductive layer, 61, first dielectric layer, 62, second dielectric layer, 71, first metal electrode, 72, second metal electrode, 81, first groove, 82, second groove.
Detailed Description
In order to make the objects, features and advantages of the present disclosure more comprehensible, the technical solutions in the embodiments of the present disclosure will be clearly described in conjunction with the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are only some embodiments of the present disclosure, but not all embodiments. Based on the embodiments in this disclosure, all other embodiments that a person skilled in the art would obtain without making any inventive effort are within the scope of protection of this disclosure.
The embodiment of the disclosure provides a solar cell, fig. 1 is a schematic structural diagram of the solar cell provided in the embodiment of the disclosure, and as shown in fig. 1, the solar cell includes:
the semiconductor substrate 10, the semiconductor substrate 10 includes a front surface and a back surface disposed opposite to each other.
The semiconductor substrate 10 may be an elemental semiconductor material substrate (e.g., a silicon substrate, a germanium substrate, etc.), a composite semiconductor material substrate (e.g., a silicon germanium substrate, etc.), or a silicon-on-insulator substrate (Silicon on Insulator, SOI), a germanium-on-insulator (Germanium on Insulator, GOI) substrate, or a polysilicon substrate, etc. In a preferred embodiment, the semiconductor substrate 10 may be crystalline silicon, and the crystalline silicon may be P-type single crystal silicon or N-type single crystal silicon. Preferably, it may be N-type monocrystalline silicon.
At least one of the front and back surfaces of the semiconductor substrate 10 is formed into a pyramidal textured structure (not shown).
The solar cell further includes a semiconductor substrate 10 having a front surface provided with a first intrinsic amorphous silicon layer 21, a first doping layer 31, a first transparent conductive layer 51, and a first metal electrode 71, and a back surface provided with a second intrinsic amorphous silicon layer 22, a second doping layer 32, a second transparent conductive layer 52, and a second metal electrode 72.
In an embodiment, the first intrinsic amorphous silicon layer 21 and the second intrinsic amorphous silicon layer 22 are passivation layers, the passivation layers have good passivation effect on the surface of the semiconductor substrate, and superior surface passivation capability is an important condition for obtaining higher battery efficiency, so that minority carrier lifetime of the battery can be greatly improved.
In an embodiment, the first doped layer 31 may be an N-type doped layer, and the second doped layer 32 may be a P-type doped layer.
The first and second doped layers 31 and 32 may be microcrystalline silicon doped layers or amorphous silicon doped layers.
The first doped layer 31 and the second doped layer 32 form the PN junction and back field of the heterojunction solar cell.
In an embodiment, the first transparent conductive layer 51 and the second transparent conductive layer 52 are made of transparent conductive oxide, and the transparent conductive oxide may be a single layer or a stacked layer structure of indium tin oxide, zinc oxide doped with aluminum, or indium oxide doped with tungsten.
The thickness of the first transparent conductive layer 51 and the second transparent conductive layer 52 is 10-100 nm.
In one embodiment, the first metal electrode 71 and the second metal electrode 72 are positive and negative electrodes for forming a battery, and are used for collecting photo-generated carriers, and the material may be silver, silver-coated copper grid or copper. The first metal electrode 71 is disposed on the first transparent conductive layer 51, and the second metal electrode 72 is disposed on the second transparent conductive layer 52, so that the metal electrode is in direct contact with the transparent conductive layer, and good ohmic contact is ensured.
The solar cell further comprises a first aluminum oxide layer 41 between the first doped layer 31 and the first transparent conductive layer 51.
In this embodiment, a first aluminum oxide layer is formed between the first doped layer and the first transparent conductive layer, so, when laser slotting is performed on the first dielectric layer subsequently, the laser heat involved is transferred to the first aluminum oxide layer, and the first aluminum oxide layer protects the lower amorphous silicon layer from being damaged by high temperature, and at the same time, the first aluminum oxide layer is thermally activated by using the heat, so that the field passivation effect of the expected design is achieved, the open-circuit voltage is further improved, and the conversion efficiency of the battery is improved.
In one embodiment, the thickness of the first alumina layer 41 ranges from 1 nm to 10nm. If the thickness of the first aluminum oxide layer is too thick, the thickness of the whole solar cell is increased, and the performance of the cell is affected, and if the thickness of the first aluminum oxide layer is too thin, the effect of protecting the lower amorphous silicon layer is not achieved.
The solar cell further comprises a first dielectric layer 61 located on the first transparent conductive layer 51, wherein the first metal electrode 71 penetrates through the first dielectric layer 61 and is connected with the first transparent conductive layer 51.
In this embodiment, by forming the first dielectric layer on the first transparent conductive layer, the first dielectric layer and the first transparent conductive layer may be formed into a dual-layer optical film structure, so as to make up for the current situation that the single-layer transparent conductive film has poor antireflection effect, improve the light energy utilization rate, promote the short-circuit current, and promote the efficiency, and simultaneously, the acid and alkali corrosion resistance of the first dielectric layer may also be utilized to protect the first transparent conductive layer, so that the device passes the reliability test such as PID (potential induced degradation resistance), DH (Damp heat experiment), HF (Halogen Free test), etc.
In an embodiment, the material of the first dielectric layer 61 includes at least one of SiN x、SiNOx、SiOx or MgF x.
The first dielectric layer 61 may be a multi-layer composite film structure, such as a dual SiN x/SiNO structure, a dual SiN x/SiOx structure, or SiN x/SiNO/MFx, etc.
In one embodiment, the thickness of the first dielectric layer is in the range of 40-120nm.
Fig. 2 is a schematic structural diagram of a solar cell according to another embodiment of the present disclosure.
As shown in fig. 2, the solar cell further includes a second aluminum oxide layer 42 between the second doped layer 32 and the second transparent conductive layer 52;
The second dielectric layer 62 is disposed on the second transparent conductive layer 52, wherein the second metal electrode 72 penetrates the second dielectric layer 62 and is connected to the second transparent conductive layer 52.
In the embodiment shown in fig. 2, the solar cell has the same structure on both sides, wherein the second aluminum oxide layer 42 has the same structure and function as the first aluminum oxide layer 41, and the second dielectric layer 62 has the same structure and function as the first dielectric layer 61.
An embodiment of the present disclosure provides a method for manufacturing a solar cell, and fig. 3 is a flowchart of the method for manufacturing a solar cell provided by the embodiment of the present disclosure, referring to fig. 3, the method includes the following steps:
Step 301, providing a semiconductor substrate, wherein the semiconductor substrate comprises a front surface and a back surface which are oppositely arranged;
Step 302, forming a first intrinsic amorphous silicon layer on the front surface of a semiconductor substrate and forming a second intrinsic amorphous silicon layer on the back surface of the semiconductor substrate;
Step 303, forming a first doping layer on the first intrinsic amorphous silicon layer and forming a second doping layer on the second intrinsic amorphous silicon layer;
Step 304, forming a first alumina layer on the first doped layer;
Step 305, forming a first transparent conductive layer on the first alumina layer and forming a second transparent conductive layer on the second doped layer;
Step 306, forming a first dielectric layer on the first transparent conductive layer;
Step 307, forming a plurality of first trenches on the first dielectric layer, wherein the first trenches penetrate through the first dielectric layer and expose the surface of the first transparent conductive layer;
Step 308, forming a first metal electrode in the first trench and forming a second metal electrode on the second transparent conductive layer.
The method for manufacturing the solar cell provided by the embodiment of the disclosure is described in further detail below with reference to specific embodiments. Fig. 4a to fig. 4f are schematic diagrams of a solar cell according to a first embodiment of the disclosure during a manufacturing process, and fig. 5a to fig. 5d are schematic diagrams of a solar cell according to a second embodiment of the disclosure during a manufacturing process. The first embodiment will be described in detail.
First, referring to fig. 4a, step 301 is performed to provide a semiconductor substrate 10, the semiconductor substrate 10 including oppositely disposed front and back surfaces.
The semiconductor substrate 10 may be an elemental semiconductor material substrate (e.g., a silicon substrate, a germanium substrate, etc.), a composite semiconductor material substrate (e.g., a silicon germanium substrate, etc.), or a silicon-on-insulator substrate (Silicon on Insulator, SOI), a germanium-on-insulator (Germanium on Insulator, GOI) substrate, or a polysilicon substrate, etc. In a preferred embodiment, the semiconductor substrate 10 may be crystalline silicon, and the crystalline silicon may be P-type single crystal silicon or N-type single crystal silicon. Preferably, it may be N-type monocrystalline silicon.
Next, the method further includes pre-cleaning the semiconductor substrate 10 and gettering the semiconductor substrate 10.
Next, the semiconductor substrate 10 is subjected to a texturing process, and after the texturing step, at least one of the front surface and the back surface of the semiconductor substrate 10 is formed into a pyramid-shaped textured structure (not shown in the figure).
In practice, the texturing process comprises placing the semiconductor substrate 10 in 0.5% -10% KOH solution, reacting at 50-85deg.C for 1-20 min, and preferably preparing textured structure capable of reducing reflection and absorbing more light sources. In the embodiment, the anisotropic corrosion characteristic of silicon in low-concentration alkali liquor is mainly utilized, and silicon and the alkali liquor perform a series of chemical reactions to form pyramid suede on the surface of a silicon wafer.
Next, with continued reference to fig. 4a, step 302 is performed to form a first intrinsic amorphous silicon layer 21 on the front side of the semiconductor substrate 10 and a second intrinsic amorphous silicon layer 22 on the back side of the semiconductor substrate 10.
In practice, the first and second intrinsic amorphous silicon layers 21 and 22 may be deposited by a chemical vapor deposition method (Chemical Vapor Deposition, CVD).
In an embodiment, the first intrinsic amorphous silicon layer 21 and the second intrinsic amorphous silicon layer 22 are passivation layers, the passivation layers have good passivation effect on the surface of the semiconductor substrate, and superior surface passivation capability is an important condition for obtaining higher battery efficiency, so that minority carrier lifetime of the battery can be greatly improved.
Next, with continued reference to fig. 4a, step 303 is performed to form a first doped layer 31 on the first intrinsic amorphous silicon layer 21 and a second doped layer 32 on the second intrinsic amorphous silicon layer 22.
In practice, the first doped layer 31 and the second doped layer 32 may be deposited by a chemical vapor deposition method (Chemical Vapor Deposition, CVD).
In an embodiment, the first doped layer 31 may be an N-type doped layer, and the second doped layer 32 may be a P-type doped layer.
The first and second doped layers 31 and 32 may be microcrystalline silicon doped layers or amorphous silicon doped layers.
The first doped layer 31 and the second doped layer 32 form the PN junction and back field of the heterojunction solar cell.
Next, referring to fig. 4b, step 304 is performed to form a first aluminum oxide layer 41 on the first doped layer 32.
In one embodiment, forming first aluminum oxide layer 41 includes forming first aluminum oxide layer 41 by an atomic layer deposition (Atomic Layer Deposition, ALD) process.
Specifically, during the atomic layer deposition process, trimethylaluminum is used to react with H 2 O to form an AlO x film, i.e., first aluminum oxide layer 41. In the technological process, the technological temperature is 150-210 ℃ and the technological time is 18-36min.
In one embodiment, the thickness of the first alumina layer 41 ranges from 1 nm to 10nm. If the thickness of the first aluminum oxide layer is too thick, the thickness of the whole solar cell is increased, and the performance of the cell is affected, and if the thickness of the first aluminum oxide layer is too thin, the effect of protecting the lower amorphous silicon layer is not achieved.
Next, referring to fig. 4c, step 305 is performed to form the first transparent conductive layer 51 on the first alumina layer 41 and the second transparent conductive layer 52 on the second doped layer 32.
In practice, the first transparent conductive layer 51 and the second transparent conductive layer 52 may be deposited by a physical vapor deposition process (Physical Vapor Deposition, PVD)
The first transparent conductive layer 51 and the second transparent conductive layer 52 are made of transparent conductive oxide, and the transparent conductive oxide can be a single-layer or laminated-layer structure of indium tin oxide, aluminum-doped zinc oxide or tungsten-doped indium oxide, and the transparent conductive layer can effectively increase the collection of carriers and reduce the reflection of light.
The thickness of the first transparent conductive layer 51 and the second transparent conductive layer 52 is 10-100 nm.
Next, referring to fig. 4d, step 306 is performed to form the first dielectric layer 61 on the first transparent conductive layer 51.
In one embodiment, forming the first dielectric layer 61 includes forming the first dielectric layer 61 by a plasma enhanced chemical vapor deposition process. In the technological process, the technological temperature is 200-270 ℃ and the technological time is 20-30min.
In an embodiment, the material of the first dielectric layer 61 includes at least one of SiN x、SiNOx、SiOx or MgF x.
The first dielectric layer 61 may be a multi-layer composite film structure, such as a dual SiN x/SiNO structure, a dual SiN x/SiOx structure, or SiN x/SiNO/MFx, etc.
In one embodiment, the thickness of the first dielectric layer is in the range of 40-120nm.
Next, referring to fig. 4e, step 307 is performed to form a plurality of first trenches 81 on the first dielectric layer 61, wherein the first trenches 81 penetrate the first dielectric layer 61 to expose the surface of the first transparent conductive layer 51.
In one embodiment, forming the plurality of first trenches 81 includes forming the plurality of first trenches 81 by a laser process.
To ensure good electrical contact, a laser grooving process is required to open the first dielectric layer 61 according to a predetermined pattern, and a plurality of first trenches 81 are formed in the first dielectric layer 61. In the laser grooving process, a large amount of laser heat is generated, the first alumina layer 41 can be used as a heat absorption layer to absorb and activate by utilizing the heat transferred by laser, so that the field passivation effect of the expected design is achieved, the open-circuit voltage is further improved, the battery conversion efficiency is improved, and if the layer is not arranged, the heat brought by laser grooving damages the amorphous silicon on the lower layer, thereby causing efficiency loss.
In this embodiment, the laser technique may employ a picosecond UV laser or a femtosecond UV laser, and the depth of the first trench 81 may be adjusted by power and may be stopped only at the first dielectric layer 61. During laser grooving, the power may be 60-70W, and in a preferred embodiment, the power may be 64W. In the laser grooving process, the spot size of the laser is 80-240 mu m, and the width of the formed first groove is 10-20 mu m.
In another embodiment, the first trench 81 may also be formed by a masking process.
In practice, a mask layer may be formed on the first dielectric layer 61, then the mask layer is patterned, a first trench is patterned on the mask layer, and then the first dielectric layer 61 is etched downward according to the first trench pattern to form the first trench 81.
Next, referring to fig. 4f, step 308 is performed to form a first metal electrode 71 in the first trench 81 and a second metal electrode 72 on the second transparent conductive layer 52.
In practice, the process of forming the first metal electrode 71 and the second metal electrode 72 includes, but is not limited to, a screen printing process.
The first metal electrode 71 and the second metal electrode 72 are positive and negative electrodes for forming a battery, and are effective for collecting photo-generated carriers, and the material thereof may be silver, silver-coated copper grid or copper. The first metal electrode 71 is disposed on the first transparent conductive layer 51, and the second metal electrode 72 is disposed on the second transparent conductive layer 52, so that the metal electrode is in direct contact with the transparent conductive layer, and good ohmic contact is ensured.
And finally, curing the solar cell.
The second embodiment will be described in detail with reference to fig. 5a to 5 d.
It should be noted that the steps before fig. 5a are the same as those in fig. 4a, and are not repeated here.
Next, referring to fig. 5a, after the second doped layer 32 is formed, a second aluminum oxide layer 42 is formed on the second doped layer 32, the second aluminum oxide layer 42 being located between the second doped layer 32 and the second transparent conductive layer 52.
In this embodiment, the second alumina layer 42 is formed on the second doped layer 31 at the same time as the first alumina layer 41 is formed.
The formation process and function of the second alumina layer 42 are the same as those of the first alumina layer 41, and will not be described again here.
Next, referring to fig. 5b, after the second transparent conductive layer 52 is formed, a second dielectric layer 62 is formed on the second transparent conductive layer 52.
In this embodiment, the second dielectric layer 62 is formed on the second transparent conductive layer 52 at the same time as the first dielectric layer 61 is formed.
The formation and function of the second dielectric layer 62 are the same as those of the first dielectric layer 61, and will not be described again here.
Next, referring to fig. 5c, a plurality of second trenches 82 are formed on the second dielectric layer 62, and the second trenches 82 penetrate through the second dielectric layer 62 to expose the surface of the second transparent conductive layer 52.
In this embodiment, the second trench 82 is formed at the same time as the first trench 81 is formed.
The process of forming the second trenches 82 is the same as the process of forming the first trenches 81, and will not be described again.
Next, referring to fig. 5d, a second metal electrode 72 is formed within the second trench 82.
In the second embodiment, the solar cell has the same structure on both sides, wherein the structure and function of the second alumina layer 42 are the same as those of the first alumina layer 41, and the structure and function of the second dielectric layer 62 are the same as those of the first dielectric layer 61.
The embodiment of the disclosure also provides a photovoltaic module, which comprises the solar cell in any one of the embodiments.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps recited in the present disclosure may be performed in parallel or sequentially or in a different order, provided that the desired results of the technical solutions of the present disclosure are achieved, and are not limited herein.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present disclosure, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
The foregoing is merely specific embodiments of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the disclosure, and it is intended to cover the scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.
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