CN119364915B - Photodiode, diode assembly and optical filter - Google Patents
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- CN119364915B CN119364915B CN202411826631.9A CN202411826631A CN119364915B CN 119364915 B CN119364915 B CN 119364915B CN 202411826631 A CN202411826631 A CN 202411826631A CN 119364915 B CN119364915 B CN 119364915B
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Abstract
本申请提供一种光电二极管、二极管组件及光滤波器，涉及技术光通信领域。光电二极管包括：衬底、第一深阱、第二阱和掺杂区域；其中，第一深阱设置在衬底上，第二阱设置在第一深阱上，掺杂区域设置在第二阱上；掺杂区域包括第一类宽掺杂区和第二类窄掺杂区，第一类宽掺杂区与第二类窄掺杂区交替分布在第二阱上，第一类宽掺杂区或第二类窄掺杂区与第二阱形成电极结构。二极管组件包括光电二极管；多个光电二极管组成全差分阵列。光滤波器包括时间读取电路、时钟电路，以及二极管组件；二极管组件用于对接收的光信号进行光电转换，得到电流信号；时间读取电路用于基于电流信号进行模数转换，得到传输信号；时钟电路用于对时钟相位进行校准。
The present application provides a photodiode, a diode assembly and an optical filter, which relate to the technical optical communication field. The photodiode includes: a substrate, a first deep well, a second well and a doped region; wherein the first deep well is arranged on the substrate, the second well is arranged on the first deep well, and the doped region is arranged on the second well; the doped region includes a first type of wide doped region and a second type of narrow doped region, the first type of wide doped region and the second type of narrow doped region are alternately distributed on the second well, and the first type of wide doped region or the second type of narrow doped region forms an electrode structure with the second well. The diode assembly includes a photodiode; a plurality of photodiodes form a fully differential array. The optical filter includes a time reading circuit, a clock circuit, and a diode assembly; the diode assembly is used to perform photoelectric conversion on the received optical signal to obtain a current signal; the time reading circuit is used to perform analog-to-digital conversion based on the current signal to obtain a transmission signal; the clock circuit is used to calibrate the clock phase.
Description
Technical Field
The application relates to the technical field of optical communication, in particular to a photodiode, a diode assembly and an optical filter.
Background
A quantum computer is a computer that performs information processing using quantum mechanics principles. Unlike conventional classical computers, quantum computers use quantum bits (qubits) as the basic unit of information, which can improve efficiency in processing large amounts of data and complex calculations. At normal temperature, optical communication is becoming a preferred I/O solution in a high-performance system, and the communication interface using optical fiber as a communication medium does not increase the refrigeration burden of a low-temperature cavity, and has the advantages of high bandwidth, small signal attenuation, electromagnetic interference resistance, wavelength division multiplexing reduction, and low-temperature measurement and control system integration level improvement.
Because the movement efficiency of carriers can be influenced by low temperature, in order to improve the communication speed of the communication interface under the low temperature condition, an integrated serializer, a communication scheme adopting passive backscattering and the like are generally used, but the modes can lead the existing communication interface to have the conditions of high energy consumption, serious crosstalk, poor stability, poor photoelectric detection responsiveness and the like, so that the optical communication effect is poor, and the current optical communication requirement cannot be met.
Disclosure of Invention
Accordingly, an objective of the present application is to provide a photodiode, a diode assembly and an optical filter, so as to solve the problem of poor optical communication effect in the prior art.
In order to solve the problems, in a first aspect, an embodiment of the present application provides a photodiode including a substrate, a first deep well, a second well, and a doped region;
Wherein the first deep well is arranged on the substrate, the second well is arranged on the first deep well, and the doped region is arranged on the second well;
The doped region comprises a first wide doped region and a second narrow doped region, the first wide doped region and the second narrow doped region are alternately distributed on the second well, and the first wide doped region or the second narrow doped region and the second well form an electrode structure;
wherein the electrode structure comprises a PN structure, a PP structure or an NN structure.
In the implementation process, since the incident light efficiency incident on the photodiode is positively correlated with the output current of the photodiode, a corresponding first deep well can be arranged on the substrate, a corresponding second well is arranged on the first deep well, a corresponding doped region is arranged on the second well, the doped region comprises a first wide doped region and a second narrow doped region which are alternately distributed, the first wide doped region and the second narrow doped region and the second well at the bottom form electrode structures such as PN, PP, NN and the like, and PN junctions can be formed in the substrate, the first deep well, the second well and the doped region or the second narrow doped region on the surface, so that PN junctions of various depths can be fully utilized, the area of the whole depletion region in the photodiode is increased, more photon-generated carriers are collected, and the photoelectric signal conversion efficiency is improved.
Optionally, an isolation region is disposed between the adjacent first-type wide doped region and the second-type narrow doped region.
In the implementation process, in order to reduce the premature breakdown of the PN junction formed between the two adjacent first-type wide doped regions, the second-type narrow doped regions and the well or the substrate, a corresponding isolation region can be arranged between the adjacent first-type wide doped regions and the second-type narrow doped regions, so that the adverse effect of the premature breakdown on the avalanche voltage of the photodiode is reduced, and the stability of the photodiode in operation is further improved.
Optionally, on the optical communication surface where the first-type wide doped region and the second-type narrow doped region are distributed, the edge of the doped region is the second-type narrow doped region;
The second type of narrow doped region is for receiving diffused carriers.
In the implementation process, in order to implement the receiving and converting of the optical signal, on the optical communication surface of the photodiode, the edge of the doped region may be set to be a second type narrow doped region, and the first type wide doped region is set at the central region of the optical communication surface, so that the diffused carriers are received by the second type narrow doped region, and the first type wide doped region receives the optical signal, thereby effectively improving the receiving efficiency of the optical signal and the migration efficiency of the carriers, and further improving the conversion efficiency of the optical signal.
Optionally, on the optical communication surface, the isolation region is arranged between the second-type narrow doped region at the edge and the deep well doped region of the first deep well;
The isolation region is disposed between the deep well doped region and a substrate doped region of the substrate.
In the implementation process, in order to supply power to the substrate and the deep well, on the optical communication surface, the first deep well is further provided with a corresponding deep well doping region, so as to form a corresponding deep well electrode structure, the deep well electrode structure supplies power to the first deep well, and the substrate is further provided with a corresponding substrate doping region, so as to form a corresponding substrate electrode structure, and the substrate electrode structure supplies power to the substrate. Accordingly, in order to reduce the adverse condition of the premature breakdown of the PN junction between the second type narrow doped region at the edge of the doped region and the deep well doped region of the first deep well, and reduce the adverse condition of the premature breakdown of the N junction between the deep well doped region and the substrate doped region, an isolation region may be disposed between the second type narrow doped region and the deep well doped region, and an isolation region may be disposed between the deep well doped region and the substrate doped region, so that the adverse effect of the premature breakdown of the PN junction on the avalanche voltage of the photodiode is further reduced while power supply is realized.
Optionally, if there are multiple wide doped regions of the first type, bias voltages of the electrode structures on two adjacent wide doped regions of the first type are different.
In the implementation process, since the diffusion time of the photodiode under part of the process is longer than the drift time of the depletion region and the time constant of the device RC, the light detection bandwidth is limited by the diffusion process of the charge neutral region, so that under the condition of a plurality of first-type wide doped regions, the bias voltages applied by electrode structures on two adjacent first-type wide doped regions of each second-type narrow doped region are different, so that corresponding electric fields are generated through the different bias voltages, the migration speed of carriers generated by light is accelerated, the transmission time of the carriers is reduced, and the efficiency of the detection bandwidth of the tube is improved.
Optionally, the bias voltages different from the electrode structure on the first type wide doping region include V1 and V2, V1 is a bias voltage of the electrode structure on the first type wide doping region in a central region of the doping regions, V2 is another bias voltage different from V1 of the electrode structure on the first type wide doping region, and the bias voltage of the electrode structure on the second type narrow doping region is V3, V2> V1> V3.
In the implementation process, the different bias voltages set on the plurality of first-type wide doped regions may include V1 and V2, where V1 is a bias voltage of an electrode structure on the first-type wide doped region in the central region in the doped region, V2 is another bias voltage different from V1, and the bias voltage of the electrode structure on the second-type narrow doped region is V3.
Optionally, the number and size parameters of the first type wide doped region and the second type narrow doped region are determined based on the area parameter of the optical communication surface of the photodiode;
the first-type wide doping region comprises a shielding region and a non-shielding region formed by the electrode structure, and the non-shielding region is an effective light receiving region.
In the implementation process, the size of the doped region is determined based on the area parameter of the optical communication surface of the photodiode, so that the number and the size parameter of the first-type wide doped region and the second-type narrow doped region in the doped region are also determined based on the area parameter of the optical communication surface, the first-type wide doped region comprises a shielding region formed by the electrode structure and a non-shielding region which is not formed by the electrode structure, and the non-shielding region is used as an effective light receiving region of the first-type wide doped region, so that the optical signal is received according to the area difference between the electrode structure and the first-type wide doped region. The number and size of the doped regions can be set according to the actual size of the photodiode to accommodate a variety of different bandwidth requirements.
In a second aspect, embodiments of the present application provide a diode assembly comprising a photodiode according to any one of the above;
wherein a plurality of the photodiodes form a fully differential array.
In the implementation process, in order to reduce interference caused by common mode signals on the chip and reduce the requirement of light alignment, a plurality of photodiodes can be arranged into a fully differential array so as to reduce the interference of offset voltage caused by light spots not at the center of the light detector, effectively reduce common mode noise and improve the accuracy and stability of the diode assembly when processing the light signals.
Optionally, wherein the diode assembly includes a first face and a second face;
a plurality of differential first group photodiodes are arranged on the first surface;
A plurality of differential second group photodiodes are arranged on the second surface;
the first group of photodiodes and the second group of photodiodes are in a central symmetry structure;
the first group of photodiodes and the second group of photodiodes are respectively provided with a first bias voltage and a second bias voltage.
In the implementation process, in order to reduce the loss of optical energy caused by the pseudo-differential structure, two groups of differential photodiodes can be respectively arranged on the first surface and the second surface of the diode component, and two different bias voltages are applied to realize the true-differential photoelectric receiver structure, so that the conversion efficiency of photoelectric signals is effectively improved, and the noise and the area waste caused by the virtual part in the pseudo-differential structure are reduced. In addition, in order to avoid common mode signal interference on the chip and reduce the requirement of light alignment, the two groups of photodiodes can be arranged to be of a central symmetrical structure, so that the interference of offset voltage caused by light spots not at the center of the optical detector is reduced, common mode noise is effectively reduced, and the accuracy and stability of the diode assembly in processing the light signals are further improved.
In a third aspect, an embodiment of the present application provides an optical filter, where the optical filter includes a time reading circuit, a clock circuit, and a diode assembly as described in any one of the above;
The time reading circuit is connected with the diode component and the clock circuit;
The diode component is used for carrying out photoelectric conversion on the received optical signal to obtain a current signal;
The time reading circuit is used for carrying out analog-to-digital conversion based on the current signal to obtain a transmission signal;
The clock circuit is used for calibrating clock phase.
In the implementation process, the diode component arranged in the optical filter performs photoelectric conversion on the optical signal to obtain a corresponding current signal, the time reads the current to perform analog-to-digital conversion on the current signal to obtain a transmission signal for transmission, and the clock circuit can be further arranged to calibrate the clock phase during transmission in consideration of the influence of conditions such as burst communication and the like on the transmission process, so that the accuracy and stability of the optical signal during processing can be improved while the power consumption of the optical filter is reduced, the optical communication effect of an optical communication interface is optimized, and various different optical communication requirements are met.
In summary, the embodiments of the present application provide a photodiode, a diode assembly, and an optical filter, which are configured to increase migration efficiency of photo-generated carriers by disposing PN junctions with multiple depths in the photodiode, and further improve accuracy and stability of optical signals through the diode assembly of the fully differential array, so as to improve accuracy, stability, and efficiency of the optical filter when processing the optical signals, thereby optimizing optical communication effects of an optical communication interface, and meeting various different optical communication requirements.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and should not be considered as limiting the scope, and other related drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a photodiode according to an embodiment of the present application;
fig. 2 is a detailed schematic structure of a photodiode according to an embodiment of the present application;
Fig. 3 is a schematic structural diagram of a diode assembly according to an embodiment of the present application;
Fig. 4 is a schematic structural diagram of an optical filter according to an embodiment of the present application.
The icons are 110-substrate, 120-first deep well, 130-second well, 141-first wide doped region, 142-second narrow doped region, 143-electrode structure, 150-isolation region, 121-deep well doped region, 111-substrate doped region, PD 1-first group photodiode, PD 2-second group photodiode, A-distribution direction, 200-diode component, 300-time reading circuit, 400-clock circuit.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on embodiments of the present application without making any inventive effort, are intended to fall within the scope of the embodiments of the present application.
With the development of superconducting quantum computing scale expansion, a room temperature measurement and control system cannot realize kilobit magnitude because of the problems of large heat leakage, low integration level and the like of cables crossing temperature areas (300K temperature area to 4K temperature area). And the low-temperature quantum measurement and control is a technology for accurately operating and measuring a quantum system in an extremely low-temperature environment. In low temperature environments, the noise of the quantum system can be greatly reduced, and the lifetime of the quantum state can be significantly increased, which is very advantageous for achieving accurate quantum operation and measurement. Meanwhile, the low-temperature environment is also favorable for realizing the initialization and the reading of the quantum system. Because the low temperature cavity cooling power is limited, the digital controller needs algorithm execution and quantum error correction at the room temperature end. The entire process including qubit readout, data transfer, quantum error correction, and algorithm execution needs to be completed within the qubit decoherence time. Therefore, a low power consumption high speed communication link is required between the low temperature processor and the normal temperature classical processor.
Photons are ideal low noise carriers of quantum information. Photons are weakly coupled to their environment, do not suffer from the inverse drying problem of substance-based systems, and can operate at millikelvin temperatures or high vacuum. The thermal conductivity of the optical fiber is 2-3 orders of magnitude lower than that of the copper coaxial line, the optical fiber has the characteristics of ultra-high bandwidth, wavelength division administration and frequency division multiplexing, the silicon optical integrated circuit is rapidly developed due to the compatibility with CMOS, and the optical interface is gradually applied to low-temperature communication. In order to receive optical signals, an efficient, high-speed, miniaturized, low-power-consumption on-chip optical receiver is necessary. Photomultiplier tubes have been used on a large scale, but they are large and susceptible to magnetic fields, and have a large thermal load in a low-temperature environment. Although the gain of the photodiode is not larger than that of the photomultiplier, the noise term is larger, the photodiode is compatible with a commercial CMOS (complementary metal oxide semiconductor) process, and the photodiode is compact in structure, is not influenced by a magnetic field and is a better choice. The common photodiodes are usually designed for normal temperature use, and carriers are frozen at low temperature, so that the quantum efficiency is reduced. Because the movement efficiency of carriers can be influenced by low temperature, in order to improve the communication speed of the communication interface under the low temperature condition, an integrated serializer, a communication scheme adopting passive backscattering and the like are generally used, but the modes can lead the existing communication interface to have the conditions of high energy consumption, serious crosstalk, poor stability, poor photoelectric detection responsiveness and the like, so that the optical communication effect is poor, and the current optical communication requirement cannot be met.
In order to solve the above-mentioned problems, the embodiments of the present application provide a photodiode, in which the photodiode is disposed in a diode assembly, and the diode assembly is disposed in an optical filter, and the optical filter may be integrated in various CMOS (Complementary Metal-Oxide Semiconductor, complementary metal oxide semiconductor) electro-optical devices, for example, various types of semiconductor chips, sensors, etc., and can transmit control signals of a room temperature side classical control processor to the low temperature quantum measurement and control electro-optical device. The input optical fiber transmits the uplink green light and the red light which are carried with the downlink control signals and are to be modulated in the low-temperature modulator into the electro-optical device in the low-temperature cavity from the room temperature side, the red light is converted into an electric signal by the diode component integrated with the upper differential structure of the optical filter and the front-end amplifying circuit, and the electric signal is sampled and judged in parallel to directly drive the low-temperature high-speed DAC (Digital-to-Analog Converte, digital-to-analog converter) to realize the quantum bit control. The power consumption of a digital signal processing circuit on the quantum measurement and control chip can be reduced, the heat load of a dilution refrigerator is obviously reduced, the complexity of the system is reduced, the measurement and control fidelity is improved, the energy consumption, the high-speed communication crosstalk and the loss of the digital signal processing circuit of the cross-temperature-zone communication interface are effectively reduced, and the optical communication effect of the optical communication interface is further optimized.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a photodiode according to an embodiment of the present application, where the photodiode may include a substrate 110, a first deep well 120, a second well 130, and a doped region, the first deep well 120 is disposed on the substrate 110, the second well 130 is disposed on the first deep well 120, and the doped region is disposed on the second well 130.
It should be noted that, the substrate 110, the first Deep Well 120, the second Deep Well, etc. may be made of various types of hole-type semiconductor materials or electron-type semiconductor materials, i.e., P-type semiconductor or N-type semiconductor, and taking a P-type substrate as an example, the first Deep Well 120 disposed on the substrate 110 is N-type, the first Deep Well 120 is denoted as a corresponding Deep N-Well (i.e., DNW), and the second Well 130 disposed on the first Deep Well 120 is denoted as a corresponding P-Well (i.e., PW, P-Well).
It should be noted that the doped region may be a heavily doped region, the doped region may include a first wide doped region 141 and a second narrow doped region 142, the first wide doped region 141 and the second narrow doped region 142 may also be selected according to the material conditions of the substrate 110, the first deep well 120, and the second deep well, for example, based on the above example, the first wide doped region 141 may be configured as a narrower heavily doped p+ region, and the second narrow doped region 142 may be configured as a wider heavily doped n+ region.
The first wide doped regions 141 and the second narrow doped regions 142 are alternately distributed on the second well 130, and the first wide doped regions 141 or the second narrow doped regions 142 and the second well 130 form an electrode structure 143, wherein the electrode structure 143 may include a PN structure (i.e., a PN junction), a PP structure, or an NN structure.
Illustratively, based on the above example, a corresponding PP structure may be formed between the relatively narrow heavily doped p+ region in the first type wide doped region 141 and the second well 130 of PW, and a corresponding PN structure may be formed between the relatively wide heavily doped n+ region in the second type narrow doped region 142 and the second well 130 of PW.
In the embodiment shown in fig. 1, the substrate 110, the first deep well 120, the second well 130, and the first type wide doped region 141 or the second type narrow doped region 142 in the doped regions of the surface may form a PN junction, so that the PN junction with each depth can be fully utilized, the area of the whole depletion region in the photodiode is increased, and more photo-generated carriers are collected, thereby improving the photoelectric signal conversion efficiency.
Optionally, referring to fig. 2, fig. 2 is a detailed schematic structural diagram of a photodiode according to an embodiment of the present application, in which, in order to reduce premature breakdown of a PN junction formed between two adjacent first-type wide doped regions 141 and second-type narrow doped regions 142 and a well or substrate 110, an isolation region 150 is disposed between the adjacent first-type wide doped regions 141 and second-type narrow doped regions 142, and a corresponding isolation region 150 is disposed between the adjacent first-type wide doped regions 141 and second-type narrow doped regions 142, so as to reduce adverse effects caused by premature breakdown on avalanche voltage of the photodiode, and further improve stability of the photodiode during operation.
Optionally, the isolation region 150 may be configured as a shallow trench isolation region 150, i.e. STI (Shallow Trench Isolation), where a shallow trench may be etched in the second well 130, and an insulating material (such as silicon dioxide) may be filled to isolate the adjacent first-type wide doped region 141 and second-type narrow doped region 142, which may effectively reduce capacitive coupling and leakage current between devices and improve performance and reliability of the integrated circuit.
The isolation regions 150 may be fabricated by, for example, cleaning and pre-treating the second well 130, forming clusters of isolation trenches on the second well 130 using photolithographic techniques, and then transferring the pattern to the substrate 110 by an etching process to form shallow trenches. An insulating material, such as silicon dioxide, is filled into the shallow trenches to form isolation regions 150, which are required to ensure compactness and uniformity of the insulating material during filling. The filled substrate 110 is subjected to a CMP (CHEMICAL MECHANICAL Polishing) process to remove excess insulating material and restore the flatness of the substrate 110. The isolation regions 150 are further subjected to subsequent processing, such as annealing, cleaning, etc., according to specific requirements.
Optionally, in order to implement receiving and converting of the optical signal, on the optical communication surface where the first wide doped region 141 and the second narrow doped region 142 are distributed, the edge of the doped region is the second narrow doped region 142, the first wide doped region 141 is disposed at the central region of the optical communication surface, the second narrow doped region 142 is used for receiving the diffused carrier, the second narrow doped region 142 receives the diffused carrier, and the first wide doped region 141 receives the optical signal, so that the receiving efficiency of the optical signal and the migration efficiency of the carrier are effectively improved, and the photoelectric signal conversion efficiency is improved.
In order to supply power to the substrate 110 and the deep well, on the optical communication surface, the first deep well 120 is further provided with a corresponding deep well doping region 121, so as to form a corresponding deep well electrode structure, the deep well electrode structure supplies power to the first deep well 120, and the substrate 110 is further provided with a corresponding substrate doping region 111, so as to form a corresponding substrate electrode structure, and the substrate electrode structure supplies power to the substrate 110.
Illustratively, the doping materials of the deep well doping region 121 and the substrate doping region 111 may also be selected according to the material conditions of the substrate 110, the first deep well 120, and the second deep well, for example, on the basis of the above examples, the deep well doping region 121 may be configured as a heavily doped n+ region, and the substrate doping region 111 may be configured as a heavily doped p+ region to respectively perform a corresponding power supply process for the substrate 110 and the first deep well 120.
Optionally, in order to reduce the adverse condition of the premature breakdown of the PN junction between the second-type narrow doped region 142 at the edge of the doped region and the deep well doped region 121 of the first deep well 120, on the optical communication surface, an isolation region 150 is disposed between the second-type narrow doped region 142 at the edge and the deep well doped region 121 of the first deep well 120, and an isolation region 150 is disposed between the deep well doped region 121 and the substrate doped region 111 of the substrate 110, so that the adverse effect of the premature breakdown of the PN junction on the avalanche voltage of the photodiode can be further reduced while power supply is realized.
Optionally, since the photodiode diffusion time under the partial process is longer than the drift time of the depletion region and the time constant of the device RC, the photodetection bandwidth is limited by the diffusion process of the charge neutral region, so if there are multiple first-type wide doped regions 141, the bias voltages of the electrode structures 143 on two adjacent first-type wide doped regions 141 of each second-type narrow doped region 142 are different, and corresponding electric fields are generated by the different bias voltages, so as to accelerate the migration speed of the carriers generated by light, reduce the transmission time of the carriers, and thereby improve the efficiency of the detection bandwidth of the tube.
Alternatively, the bias voltages of the electrode structures 143 on the adjacent two first-type wide doped regions 141 may be set to V1 and V2, respectively, and v1+.v2.
Further, the bias voltages of the electrode structures 143 on the first wide doped region 141 are V1 and V2, V1 is the bias voltage of the electrode structure 143 on the first wide doped region 141 in the central region in the doped region, V2 is another bias voltage different from V1, the bias voltage of the electrode structure 143 on the second narrow doped region 142 is V3, in order to further increase the transfer rate of the photo-generated carriers, the charge collection speed is accelerated, three different bias voltages can be set to be V2> V1> V3, so that photo-generated carriers generated by the electrode structures 143 on two sides of the first type wide doped region 141 on two sides of the second type narrow doped region 142 are accelerated by an electric field to be swept into the electrode structures 143 on the middle second type narrow doped region 142, and the photoelectric signal conversion efficiency of the photodiode is further improved.
Illustratively, taking the applied bias as positive charge, v1=0.5v, v2=1v, v3=0v may be set.
For example, V1 and V2 may also be set to two voltages of the same magnitude but opposite, e.g., v1= -0.5V, v2=0.5V, v3=0V, etc.
It should be noted that the size of the doped region is determined based on the area parameter of the optical communication surface of the photodiode, and therefore, the number and size parameters of the first type wide doped region 141 and the second type narrow doped region 142 are determined based on the area parameter of the optical communication surface of the photodiode. The first type wide doped region 141 includes a blocking region and a non-blocking region formed by the electrode structure 143, where the non-blocking region is an effective light receiving region. The first type wide doped region 141 includes a blocking region formed by the electrode structure 143, and a non-blocking region not formed by the electrode structure 143, and the non-blocking region is used as an effective light receiving region of the first type wide doped region 141, so that light signal receiving is realized according to an area difference between the electrode structure 143 and the first type wide doped region 141. The number and size of the doped regions can be set according to the actual size of the photodiode to accommodate a variety of different bandwidth requirements.
Optionally, the larger the light communication surface is, the larger the light receiving area of the photodiode is, the larger the photocurrent can be generated, but the parasitic capacitance is increased and the bandwidth is reduced, so the number of electrode structures 143 formed on the doped regions can be set according to the actual current requirement and the bandwidth requirement, that is, the number of the first-type wide doped regions 141 and the second-type narrow doped regions 142 is set, only one possible embodiment in which 3 first-type wide doped regions 141 and 4 second-type narrow doped regions 142 are provided is shown in fig. 2, and the other numbers will not be repeated. In the distribution direction a of the doped regions on the optical communication surface, parameters such as the lengths, depths, etc. of the first wide doped region 141 and the second narrow doped region 142 may be set according to practical requirements, standard manufacturing processes, etc., for example, the length of the first wide doped region 141 is set to 4 μm, and the length of the second narrow doped region 142 is set to 0.25 μm, etc.
For example, the length of the electrode structure 143 in the distribution direction a may be set to 0.22 μm, and thus, the length of the effective light receiving region on each of the first-type wide doping regions 141 in the distribution direction a is 4 to 0.22=3.78 μm.
Optionally, the present application further provides a diode assembly, where the diode assembly may include a photodiode as described in any one of fig. 1-2, so as to reduce interference caused by common mode signals on a chip, reduce requirements for optical alignment, and a plurality of photodiodes form a fully differential array, so as to reduce interference of offset voltages caused by light spots not in the center of the photodetector, effectively reduce common mode noise, and improve accuracy and stability of processing optical signals by the diode assembly.
Alternatively, the fully differential array is formed by a plurality of photodiodes in a specific arrangement, each photodiode forming a differential pair with its neighboring photodiodes. When light is irradiated onto the array, each photodiode produces a corresponding photocurrent, and the photocurrent differences between the differential pairs reflect the spatial distribution of light intensity. Each photodiode cell is a semiconductor device capable of converting an optical signal into an electrical signal. The inside of the PN junction comprises a plurality of PN junctions with different depths and photosensitive characteristics, when light irradiates the PN junctions, electron-hole pairs are generated, and accordingly photocurrent is formed under reverse voltage. In a fully differential array, adjacent photodiodes are organized into differential pairs. The two photodiodes in each differential pair share a common electrode (e.g., anode or cathode) and the other electrode is connected to a different circuit node, respectively. When an optical signal is incident on the differential pair, the difference between the photocurrents generated by the two photodiodes can be measured and recorded. The plurality of differential pairs are arranged in an array according to a specific layout. The actual shape of the array may be designed according to the application requirements, such as a linear array, a two-dimensional array, etc.
The quantum efficiency of the photodiode designed for room temperature tends to 0 when the temperature is lower than 50K, and the photoelectric crisis sense provided by the application can be normally carried out at low temperature. As the temperature decreases, the breakdown voltage and ionization coefficient of the photodiode decrease significantly, and the photo-responsive current and multiplication layer thickness of the avalanche region increase significantly. The photodiode can be regarded as a current source with a large impedance, and the current magnitude and the incident light power are increased. The mechanism is that in a reverse biased diode, incident photons strike the depletion region causing ionization of the covalent bonds to produce electron-hole pairs, known as photogenerated carriers. Some carriers are recombined in the motion process, the rest drifts to the electrode under the action of the built-in electric field, and the generated current is called photocurrent. Responsivity of photodiode a photodiode can be regarded as a current source with very high impedance, the current magnitude and the increase of the incident light power are increased. The mechanism is that in a reverse biased diode, incident photons strike the depletion region causing ionization of the covalent bonds to produce electron-hole pairs, known as photogenerated carriers. Some carriers are recombined in the motion process, the rest drifts to the electrode under the action of the built-in electric field, and the generated current is called photocurrent. Responsivity of photodiodeI.e. the magnitude of the current generated per unit optical power, quantum efficiencyThe number of photo-generated carriers generated for one photon incidence, namely the magnitude of current generated per unit optical power; the quantum efficiency η is the number of photogenerated carriers generated by incidence of one photon.
Optionally, referring to fig. 3, fig. 3 is a schematic structural diagram of a diode assembly according to an embodiment of the present application, where the diode assembly may include a first surface and a second surface. A plurality of differential first group photodiodes PD1 are provided on the first surface, and a plurality of differential second group photodiodes PD2 are provided on the second surface.
The first group of photodiodes PD1 and the second group of photodiodes PD2 are in a central symmetrical structure, and the first bias voltage and the second bias voltage are respectively provided on the first group of photodiodes PD1 and the second group of photodiodes PD 2.
In high-speed communication, the error rate is generally ensured by transmitting differential signals. However, the conventional optical communication receiver is in a pseudo-differential structure, and a photodiode which is light-shielded is used as a dummy device, and the structure loses half of the input optical energy, so that the responsivity is low, and the noise performance is reduced, because the dummy part mainly generates noise. And, the corresponding design area is wasted. The differential structure of the present application is a true differential structure, and is advantageous in terms of photoelectric conversion efficiency (responsiveness) and noise, and does not waste the designed area. In order to avoid common mode signal interference on the chip and reduce the requirement of light alignment, a fully differential diode array with central symmetry is designed, so that the interference of offset voltage caused by light spots not at the center of a light detector can be reduced, common mode noise is effectively reduced, and the accuracy and stability of signals are improved.
For example, the number of differential photodiodes in the first group of photodiodes PD1 and the second group of photodiodes PD2 may be designed according to practical requirements, and in order to realize a centrosymmetric structure, a plurality of pairs of photodiodes may be used, only a structure including two pairs of differential photodiodes in each group of photodiodes is shown in fig. 3, and the other numbers will not be described again. The first bias voltage applied to the first set of photodiodes PD1 may be denoted as V B1 and the second bias voltage applied to the second set of photodiodes PD2 may be denoted as V B2.
Optionally, referring to fig. 4, fig. 4 is a schematic structural diagram of an optical filter according to an embodiment of the application, where the optical filter may include a time reading circuit 300, a clock circuit 400, and the diode assembly 200 described above.
The time reading circuit 300 is connected to the diode assembly 200 and the clock circuit 400, the diode assembly 200 is used for performing photoelectric conversion on the received optical signal to obtain a current signal, the time reading circuit 300 is used for performing analog-to-digital conversion based on the current signal to obtain a transmission signal, and the clock circuit 400 is used for calibrating the clock phase. The diode component 200 arranged in the optical filter performs photoelectric conversion on the optical signal to obtain a corresponding current signal, the time reads the current to perform analog-to-digital conversion on the current signal to obtain a transmission signal for transmission, and the clock circuit 400 can be further arranged to calibrate the clock phase during transmission in consideration of the influence of conditions such as burst communication and the like, so that the power consumption of the optical filter is reduced, the accuracy and stability of the optical signal during processing can be improved, the optical communication effect of an optical communication interface is optimized, and various different optical communication requirements are met.
For example, in a high-speed communication interface for qubit manipulation in a cross-temperature area, serial signal transmission needs to be coded into parallel signal driving ADC (Analog-to-Digital Converter ), and common serial-to-parallel conversion is implemented by using a shift register, and meanwhile, decision needs to be performed before the shift register, where a decision circuit and a parallel-to-serial conversion circuit need to work at full speed of a communication rate, and a high-speed operation has high requirements on the speed of the circuit, so that the circuit design is complicated. Therefore, in the time reading circuit 300 of the present application, the conversion of the analog signal amplified at the front end into the digital signal driving the ADC can be accomplished by using the time interleaving method, which includes amplifying the voltage outputted at the front end to the rail-to-rail range, then performing the multiplexing sampling by the time interleaving method, performing the sample-hold by the DFF according to the sampled value, and then driving the two-way selector to restore the corresponding to the corresponding level, mainly because the noise may exist in the output of the front end, and reducing the noise of the output serial signal by this method. The control signals of different paths are generated through global clock frequency division, and the different paths are controlled.
The signals sampled by different paths can be processed in parallel by the time interleaving method, and can be directly output to the ADC without an additional serial-parallel conversion circuit, and meanwhile, the speed requirement of each path after the time interleaving is reduced, so that the required working speed is reduced, and the voltage output by the front end can be converted into a required parallel output signal with lower power consumption.
For example, during quantum operation, the communication is not continuous, but is burst high-speed communication in a period of time, and calculation error correction is performed in other times, and the communication is not needed in these times, which means that the interface circuit needs to be turned off when not in communication to save power consumption, and meanwhile, the communication is quickly turned on when needed, that is, the communication in burst mode needs to be implemented, and in order to implement burst communication, the clock circuit 400 is configured to perform clock recovery in burst mode. Firstly, the burst mode optical communication needs to perform fast clock recovery, the conventional clock recovery needs more time to adjust the VCO to test the CDR, often needs hundreds of cycles, the application of the burst mode must avoid the CDR circuit to operate under the transient state, on the other hand, the conventional clock recovery clock is generated by the VCO, this mode essentially generates an independent new clock by the oscillator, the energy of this clock needs to be provided additionally, so that a large power consumption needs to be consumed, and because of the off-chip clock, in order to make the best use of the local clock, the clock circuit 400 of the present application generates a suitable sampling clock by continuously feedforward adjusting the phase of the local clock.
In the clock circuit 400 of the present application, a phase interpolator may be used to adjust the local clock, which requires multiple input clocks of different phases, typically four-phase inputs or eight-phase inputs, and then selects two adjacent input phases for weighted interpolation. By adjusting the weights of the two phases, the phase interpolator can output clocks of arbitrary phases. Firstly, the amplified signal is compared with a local clock input phase discriminator, the phase difference between the output voltage of the phase discriminator and the local clock input phase discriminator is in a linear relation, the output voltage of the phase discriminator is fed back to a phase interpolator, the phase interpolator adjusts the weight proportion between different phases through the output voltage of the phase discriminator, and the adjusted phase is changed, so that the phase difference between the clock and the signal is reduced, and finally, the optimal sampling clock is recovered through continuous feedforward, and the timing error is reduced. Compared with the prior art structure using the CDR of the VCO, since the phase interpolator is fully excited by the external input clock, an oscillator is not needed, the noise performance is superior to that of the VCO, and the same random jitter (jitter) performance can be realized with lower power consumption. And the phase interpolator is directly phase fed instead of frequency fed, its lock with respect to the VCO is more accurate.
In addition, the components in the embodiments of the present application may be integrated together to form a single part, or the components may exist separately, or two or more components may be integrated to form a single part.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and variations will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application. It should be noted that like reference numerals and letters refer to like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, article, or apparatus. Without further limitation, an element defined by the phrase "comprising" does not exclude the presence of additional identical elements in a process, article or apparatus that comprises the element.
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