CN119342134B - I2C signal transmission method and foldable equipment - Google Patents
I2C signal transmission method and foldable equipment Download PDFInfo
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- CN119342134B CN119342134B CN202411890926.2A CN202411890926A CN119342134B CN 119342134 B CN119342134 B CN 119342134B CN 202411890926 A CN202411890926 A CN 202411890926A CN 119342134 B CN119342134 B CN 119342134B
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Abstract
The invention discloses an I2C signal transmission method and foldable equipment. In order to reduce the number of signal lines crossing a screen, the I2C signal transmission method is applied to foldable equipment comprising a first under-screen chip, a second under-screen chip and an application processor, connection between the application processor and the first under-screen chip is established through an I2C_SCL signal line and an I2C_SDA signal line, connection between the first under-screen chip and the second under-screen chip is established through the first signal line and the second signal line, the first signal line and the second signal line are the signal lines crossing the screen, and I2C signals transmitted through the I2C_SCL signal line and the I2C_SDA signal line by the application processor and signals of a first type transmitted through other signal lines except the I2C_SCL signal line and the I2C_SDA signal line by the application processor are transmitted through a time division multiplexing mode. The invention can reduce the number of the cross-screen signal lines and reduce the cost. The invention is suitable for the field of signal bridging and conversion.
Description
Technical Field
The invention relates to the field of signal bridging and conversion, in particular to an I2C signal transmission method and foldable equipment.
Background
The most common foldable device is a foldable double-screen mobile phone, which is an important branch in the current smart phone field, and each screen is provided with an under-screen chip. Under the same screen as the application processor is a first under-screen chip, and under the other screen is a second under-screen chip.
Fig. 1 shows the physical positional relationship and the logical connection relationship between an application processor and a first under-screen chip and a second under-screen chip in a dual-screen mobile phone. When the application processor configures the two under-screen chips, the first under-screen chip is configured through the (Inter-INTEGRATED CIRCUIT, I2C) interface, and I2C signals are routed to the second under-screen chip through the first under-screen chip and the second under-screen chip is configured. In addition, the first screen and the second screen are connected through a hinge, the application processor, the first under-screen chip and the second under-screen chip are sequentially and electrically connected, and data can be exchanged.
For small-sized devices such as mobile phones, the resources such as internal size and area are extremely limited, and the more pins or/and cross-screen signal wires of a chip are, the higher the packaging cost, the higher the cost of wiring a circuit board and the like are.
The prior art communicates with the second under-screen chip by adding two I2C Input/Output (I/O) pins, which requires consuming certain chip pin resources. One of the main goals of current I/O pin convergence schemes is to reduce the number of cross-screen signal lines.
In addition, even if there is a slight difference between the first under-screen chip and the second under-screen chip, two different chips are formed, and then design, test, production and manufacturing are performed on the two different chips, which requires very high development and manufacturing costs. Therefore, if the I/O pin convergence scheme can further enable two under-screen chips to have the same circuit design, the comprehensive cost of the under-screen chips can be further reduced.
How to reduce the number of pins or/and cross-screen signal lines of a chip is a technical problem to be solved in the field.
Disclosure of Invention
In order to alleviate or partially alleviate the above technical problem, the solution of the present invention is as follows:
An I2C signal transmission method is applied to foldable equipment comprising a first under-screen chip, a second under-screen chip and an application processor, connection between the application processor and the first under-screen chip is established through an I2C_SCL signal line and an I2C_SDA signal line, connection between the first under-screen chip and the second under-screen chip is established through a first signal line and a second signal line, the first signal line and the second signal line are cross-screen signal lines, I2C signals transmitted through the I2C_SCL signal line and the I2C_SDA signal line by the application processor and signals of a first type transmitted through other signal lines except the I2C_SCL signal line and the I2C_SDA signal line by the application processor in a time division multiplexing mode.
Further, in the first under-screen chip, the I2C_SCL signal line and the I2C_SDA signal line are connected, the first signal line and the second signal line are connected in a receiving mode, the connection between the first signal line and the I2C_SCL signal line is gated through a plurality of multiplexers, the connection between the second signal line and the I2C_SDA signal line is gated, so that the transmission of I2C signals is realized, and the first type signals are gated into the first signal line and the second signal line through a plurality of multiplexers.
Further, the first under-screen chip further comprises a first detection module, a second detection module and a first I2C-to-APB module, if the first detection module detects that the I2C signal comprises a start mark and an address in the I2C signal belongs to a first address set, the first I2C-to-APB module converts the I2C signal into a first APB command to access an on-chip register of the first under-screen chip, and the second detection module detects a stop mark in the I2C signal, wherein the first address set belongs to the address set of the first under-screen chip.
The first I2C-to-APB module converts the signals input by the first signal wire and the second signal wire into a second APB command to access an on-chip register of the second under-screen chip, and the fourth detection module detects a stop sign in the signals input by the first signal wire and the second signal wire, wherein the second address set belongs to the address set of the second under-screen chip if the third detection module detects that the signals input by the first signal wire and the second signal wire comprise a start sign and the acquired address belongs to the second address set.
Further, if the first detection module detects that the I2C signal includes the start flag, the second detection module is started.
Further, if the third detection module detects that the signals input by the first signal line and the second signal line comprise the start mark, the fourth detection module is started.
Further, when the second off-screen chip completes configuration, then the mask I2C signal is routed to the second off-screen chip.
Further, the first under-screen chip and the second under-screen chip have the same circuit.
Further, in the first under-screen chip, a first multiplexer and a second multiplexer are further included;
In a default setting, the first multiplexer selects the return signal output from the first under-screen chip as the first multiplexer output signal, the second multiplexer selects the return signal output from the first under-screen chip as the second multiplexer output signal, and if the address in the I2C signal is detected to belong to the second address set, the first multiplexer selects the return signal output from the first signal line as the first multiplexer output signal, and the second multiplexer selects the return signal output from the second signal line as the second multiplexer output signal.
A foldable device comprising a first under-screen chip, a second under-screen chip and an application processor, the foldable device applying any one of the aforementioned I2C signal transmission methods.
The technical scheme of the invention has one or more of the following beneficial technical effects:
(1) By multiplexing the I/O pins, the cross-screen signal wires are reduced, the packaging cost is reduced, the wiring quantity and complexity of the circuit board are reduced, and the cost of the circuit board is reduced.
(2) The routing or transmission of the I2C command can be realized by two identical under-screen chips, and various costs of the chips are reduced.
Furthermore, other advantageous effects that the present invention has will be mentioned in the specific embodiments.
Drawings
FIG. 1 is a schematic diagram of the relationship of chips in a dual-screen handset;
FIG. 2 is a schematic diagram of an overall scheme of cross-screen chip communication;
FIG. 3 is a schematic diagram of an address filtering scheme for a first under-screen chip;
FIG. 4 is a schematic diagram of an address filtering scheme of a second under-screen chip;
fig. 5 is a schematic diagram of a data return scheme.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In order to clearly describe the technical solution of the embodiments of the present invention, in the embodiments of the present invention, the words "first", "second", etc. are used to distinguish the same item or similar items having substantially the same function and effect. Those skilled in the art will appreciate that the words "first," "second," and the like do not limit the number and order of execution.
Fig. 2 is a schematic diagram of an overall scheme of cross-screen chip communication. The dual-screen mobile phone comprises an application processor, a first under-screen chip and a second under-screen chip. Wherein the first under-screen chip and the application processor are located under the first screen, and the second under-screen chip is located under the second screen.
The application processor configures the first under-screen chip through the I2C interface. The I2C interface is connected with two signal lines to the first under-screen chip, namely an I2C_SCL signal line and an I2C_SDA signal line, and is used for transmitting I2C signals.
The i2c_scl signal line is a serial clock line (Serial Clock Line, SCL) responsible for generating a synchronization pulse clock, the i2c_sda signal line is a serial data line (SERIAL DATA LINE, SDA) responsible for transmitting serial data, and the i2c_scl signal line and the i2c_sda signal line are conventional signal lines connecting the application processor and the first under-screen chip, since both are located under the first screen.
The i2c signals include an i2c_sda signal and an i2c_scl signal, the i2c_sda signal line for transmitting the i2c_sda signal, and the i2c_scl signal line for transmitting the i2c_scl signal.
Two SPI interfaces, SPI1 and SPI2, are shown by way of example in FIG. 2. The application processor and the first off-screen chip send and receive SPI signals via other interfaces than the aforementioned I2C interface or other signal lines than the i2c_scl signal line and the i2c_sda signal line, such as the SPI1 interface and the SPI2 interface, and the signal lines connected to the first off-screen chip.
In addition to the SPI1 interface and the SPI2 interface, several other types of interfaces may be included between the application processor and the first under-screen chip, which may be set according to the actual application needs. These several other types of interfaces may be used as interfaces other than the I2C interface to serve as multiplexed signal lines for transmitting the aforementioned I2C signals. The present invention is not limited to this, at all.
The first under-screen chip comprises two edge detection modules which are respectively used for detecting SPI signals output by an SPI2 interface and an SPI1 interface and respectively outputting tx_data0 signals and tx_data1 signals to two edge receiving modules in the second under-screen chip. The two edge receiving modules respectively send SPI signals to the sensor 1 and the sensor 2 through two ports of the second under-screen chip.
The first under-screen chip includes two edge detection modules each detecting an rx_data0 signal output from the frame data generation module in the second under-screen chip. The frame data generating module receives SPI signals respectively sent by the sensor 1 and the sensor 2 from the two ports of the second under-screen chip.
Optionally, the first under-screen chip may also send a tx_clk clock signal to the second under-screen chip.
In the present invention, the tx_data0 signal, the tx_data1 signal, the rx_data0 signal, and the tx_clk clock signal are all transmitted by means of the cross-plane signal line.
In the present invention, the tx_data0 signal and the tx_data1 signal are signals sent by the application processor to the second under-screen chip, and are first type signals sent based on the exemplary SPI1 interface and SPI2 interface.
In the present invention, in order to reduce or not to increase the cross-screen signal lines between the first screen and the second screen, when configuring the second screen, the first signal line transmitting tx_data0 data is multiplexed to the signal line transmitting i2c_scl signal, and the second signal line transmitting tx_data1 data is multiplexed to the signal line transmitting i2c_sda signal, so as to implement configuration of the second screen.
Further, the configuration of the second screen refers to the configuration of various registers of the second under-screen chip.
Further, the multiplexing is time division multiplexing.
Preferably, the first under-screen chip and the second under-screen chip in the present invention may be identical chips.
Fig. 3 shows a schematic diagram of an address filtering scheme of the first under-screen chip. The first under-screen chip comprises a first detection module, a second detection module and a first I2C-to-advanced peripheral Bus (ADVANCED PERIPHERAL Bus, APB) module. In the first under-screen chip, the i2c_scl signal line and the i2c_sda signal line are connected, and the first signal line and the second signal line are connected. The terms "access" and "connect" refer herein in the art to a determination based on whether a signal is input to or output from the first under-screen chip.
The first under-screen chip receives the I2C signal from the application processor according to the i2c_scl signal line and the i2c_sda signal line. The I2C signal typically includes a start flag, an address, intermediate data, and a stop flag.
The first under-screen chip stores a first address set and a second address set, wherein the first address set belongs to the address set of the first under-screen chip, and the second address set belongs to the address set of the second under-screen chip.
The i2c_scl signal line and the i2c_sda signal line are connected to the first detection module. The first detection module detects a start mark according to the received I2C signal, and if the start mark is detected, the first detection module judges whether the address in the I2C signal belongs to a first address set or a second address set through address comparison.
If the result of the comparison indicates that the first address set belongs to, the I2C signal is converted to a first APB command by a first I2C-to-APB module, such as for accessing an on-chip register of a first off-screen chip, and enabling a second detection module.
Further, the i2c_scl signal line and the i2c_sda signal line may be directly connected to the first I2C to APB module, and at least used for transmitting intermediate data in the I2C signal.
If the result of the comparison indicates that the second address set belongs to the second address set, the second detection module is turned off, so that power consumption can be saved, and the first I2C-to-APB module is not instructed to convert the I2C signal into the first APB command, in other words, the I2C signal is not converted into the first APB command.
The i2c_scl signal line and the i2c_sda signal line also access the second detection module. The second detection module is used for detecting a stop sign in the I2C signal and sending the detected result to the first I2C-to-APB module.
For example, the first I2C to APB module receives information indicating that a stop flag is detected, and stops converting the I2C signal to the first APB command.
And through a plurality of multiplexers, the connection between the first signal line and the I2C_SCL signal line is gated, and the connection between the second signal line and the I2C_SDA signal line is gated, so that the transmission of I2C signals is realized. And the first type signal is gated into the first signal line and the second signal line through a plurality of multiplexers. By making the above gating in different periods of time, time division multiplexing of the first signal line and the second signal line can be achieved.
Further, by default, the I2C signal transmitted by the i2c_scl signal line and the i2c_sda signal line is transmitted to the second under-screen chip through the first signal line and the second signal line, respectively. A specific gating implementation may be to gate several multiplexers through a configuration register. By way of example, switching of the input signals may be accomplished by configuring registers to gate a particular combination of multiplexers in fig. 2. The input "1" of the multiplexer is a constant high level.
The first signal line is also used to transmit the tx_data0 signal and the second signal line is also used to transmit the tx_data1 signal. The first signal line and the second signal line may transmit different types of signals in a time division multiplexing manner. Also, it is possible to avoid adding two more cross-screen signal lines between the first under-screen chip and the second under-screen chip to transmit the I2C signal. In fig. 2, 2 kinds of signals can be transmitted through the first signal line expressed by tx_data0/i2c_scl, and 2 kinds of signals can be transmitted through the second signal line expressed by tx_data1/i2c_sda.
Further, the I2C signal may be transmitted or routed to the second off-screen chip by way of a configuration register. Typically, the masking step occurs after the second under-screen chip completes the configuration.
Fig. 4 shows a schematic diagram of an address filtering scheme of the second under-screen chip. In the second under-screen chip, the first signal line and the second signal line are connected to a third detection module.
The third detection module detects whether signals input by the first signal line and the second signal line contain a start mark. If the start mark exists, then whether the address following the start mark belongs to the second address set or not is acquired. If the address in the I2C signal belongs to the second address set, the first signal line and the second signal line are considered to transmit the I2C signal. The second I2C-to-APB module then converts the I2C signal to a second APB command to access the on-chip registers of the second off-screen chip.
The fourth detection module will also be enabled upon detection of the revealing flag. Otherwise, the fourth detection module is turned off. The fourth detection module is enabled for the purpose of detecting by the fourth detection module whether a stop flag is present.
The first signal line and the second signal line are connected to the second I2C-to-APB module and are at least used for transmitting intermediate data in the I2C signal.
The first signal line and the second signal line are connected to the fourth detection module to detect a stop sign in the I2C signal and send the detected result to the second I2C-to-APB module.
For example, the second I2C to APB module receives information indicating that a stop flag is detected, and stops converting the I2C signal to the second APB command.
Firstly, comparing a starting mark with an address according to a received I2C signal, if the starting mark and the address belong to a second address set, starting a third detection module, converting an I2C command into an APB command through an I2C-to-APB module so as to access an on-chip register of a second under-screen chip, and if the starting mark and the address do not belong to the second address set, closing the third detection module so as to reduce power consumption.
In addition, although there is a certain difference in the information processing logic in the illustrations of fig. 3 and fig. 4, in practice, the first under-screen chip and the second under-screen chip may be designed by using the same circuit, and only a part of the functional modules need to be turned off in practical use.
Fig. 5 shows a schematic diagram of a data return scheme. The first multiplexer and the second multiplexer are applied in the first under-screen chip.
In one aspect, the first multiplexer defaults to selecting the i2c_scl_o return signal from the first under-screen chip output as the first multiplexer output signal for the return data of the clock signal.
When the address comparison detection result indicates that the address in the I2C signal belongs to the second address set, the first multiplexer selects the i2c_scl_o return signal from the first signal line output as the first multiplexer output signal. When the fourth detection module detects information indicating that the stop flag is detected, the first multiplexer continues to select the default i2c_scl_o return signal from the first under-screen chip output as the first multiplexer output signal.
On the other hand, for the return data of the serial data, the second multiplexer defaults to select the i2c_sda_o return signal from the first under-screen chip output as the second multiplexer output signal. When the address comparison detection result indicates that the address in the I2C signal belongs to the second address set, the second multiplexer selects the i2c_sda_o return signal from the second signal line output as the second multiplexer output signal. When the fourth detection module detects information indicating that the stop flag is detected, the second multiplexer continues to select the default i2c_sda_o return signal from the first under-screen chip output as the second multiplexer output signal.
Further, if the address comparison detection result indicates that the address in the I2C signal belongs to the first address set, or neither belongs to the first address set nor the second address set, the second multiplexer continues to select the default i2c_sda_o return signal from the output of the first under-screen chip as the output signal of the second multiplexer.
In addition, because the positions and logic relations of the first under-screen chip, the second under-screen chip and the application processor are different, if the two under-screen chips are designed into two chips with differences, various costs of chip design, manufacturing, testing and the like are increased. The invention can realize the routing or transmission of the I2C command by two identical under-screen chips, and reduce various costs of the chips.
Numerous specific details are set forth in the above description in order to provide a better illustration of the invention. It will be understood by those skilled in the art that the present invention may be practiced without some of these specific details. In some instances, well known methods, procedures, components, and circuits have not been described in detail so as not to obscure the present invention.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
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| CN112201206A (en) * | 2020-10-29 | 2021-01-08 | 京东方科技集团股份有限公司 | Foldable display module, foldable display device, manufacturing method and display method |
| CN117827727A (en) * | 2022-09-27 | 2024-04-05 | 华为技术有限公司 | Folding screen system and signal transmission method |
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| EP1388842B1 (en) * | 2002-08-09 | 2013-10-02 | Semiconductor Energy Laboratory Co., Ltd. | Multi-window display device and method of driving the same |
| CN112711349B (en) * | 2020-12-30 | 2023-06-27 | 武汉华星光电半导体显示技术有限公司 | Touch display screen and touch display device |
| CN118251051A (en) * | 2024-03-18 | 2024-06-25 | 武汉华星光电半导体显示技术有限公司 | Organic light-emitting diode display panel |
| CN119087174A (en) * | 2024-08-26 | 2024-12-06 | 格科微电子（上海）有限公司 | A chip reliability testing system and method |
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| CN112201206A (en) * | 2020-10-29 | 2021-01-08 | 京东方科技集团股份有限公司 | Foldable display module, foldable display device, manufacturing method and display method |
| CN117827727A (en) * | 2022-09-27 | 2024-04-05 | 华为技术有限公司 | Folding screen system and signal transmission method |
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