CN118677252A - Power supply circuit, chip and electronic equipment - Google Patents
Power supply circuit, chip and electronic equipment Download PDFInfo
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- CN118677252A CN118677252A CN202411157249.3A CN202411157249A CN118677252A CN 118677252 A CN118677252 A CN 118677252A CN 202411157249 A CN202411157249 A CN 202411157249A CN 118677252 A CN118677252 A CN 118677252A
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- 238000010586 diagram Methods 0.000 description 7
- 238000005070 sampling Methods 0.000 description 7
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- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 238000004590 computer program Methods 0.000 description 3
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- 230000002411 adverse Effects 0.000 description 2
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- 230000006870 function Effects 0.000 description 2
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- 239000007787 solid Substances 0.000 description 2
- 230000000087 stabilizing effect Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
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- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
本申请提供了一种供电电路、芯片及电子设备，属于芯片电路的领域。该供电电路包括线性稳压器、第一开关电路和外部电压接收端。其中，线性稳压器的电压输入端用于接收第一电压，线性稳压器的电压输出端与第一开关电路的第一端耦接。外部电压接收端用于接收第二电压，第一开关电路的第二端和外部电压接收端用于耦接负载。本申请实施方式在线性稳压器后级增设了第一开关电路，通过第一开关电路将线性稳压器与负载隔离。供电电路在将接收到的第二电压施加到负载时，保持第一晶体管断开，从而可以避免第二电压施加到线性稳压器的电压输出端，进而避免了线性稳压器的电压输出端的电压大于电压输入端的电压，防止了线性稳压器上产出倒灌电流的问题。
The present application provides a power supply circuit, a chip and an electronic device, which belongs to the field of chip circuits. The power supply circuit includes a linear regulator, a first switch circuit and an external voltage receiving end. Among them, the voltage input end of the linear regulator is used to receive a first voltage, and the voltage output end of the linear regulator is coupled to the first end of the first switch circuit. The external voltage receiving end is used to receive a second voltage, and the second end of the first switch circuit and the external voltage receiving end are used to couple a load. In the implementation of the present application, a first switch circuit is added to the rear stage of the linear regulator, and the linear regulator is isolated from the load by the first switch circuit. When the power supply circuit applies the received second voltage to the load, the first transistor is kept disconnected, thereby avoiding the second voltage from being applied to the voltage output end of the linear regulator, thereby avoiding the voltage at the voltage output end of the linear regulator being greater than the voltage at the voltage input end, and preventing the problem of backflow current generated on the linear regulator.
Description
Technical Field
The present application relates to the field of chip circuits, and in particular, to a power supply circuit, a chip, and an electronic device.
Background
In portable electronic devices and industrial electronic products, considering the high requirement of a load on the quality (such as ripple) of a power supply, some chips can be designed through compatibility, so that the load can be powered by using a linear voltage regulator (low dropout regulator, LDO) inside the chip or an external power supply. When any power supply path is used for supplying power to a load, the voltage applied to the load by the power supply path may affect other power supply paths, so that a reverse current is generated on other power supply paths, which is easy to cause adverse effect on a chip circuit and even may cause damage to the chip circuit.
Disclosure of Invention
The embodiment of the application provides a power supply circuit, a chip and electronic equipment, which are used for preventing the problem of backward current on a power supply path.
In order to achieve the above purpose, the embodiment of the present application adopts the following technical scheme:
In a first aspect, a power supply circuit is provided. The power supply circuit comprises a linear voltage stabilizer, a first switch circuit and an external voltage receiving end. The voltage input end of the linear voltage stabilizer is used for receiving the first voltage, and the voltage output end of the linear voltage stabilizer is coupled with the first end of the first switch circuit. The external voltage receiving terminal is used for receiving a second voltage, and the second terminal of the first switch circuit and the external voltage receiving terminal are used for being coupled with a load.
According to the embodiment of the application, the first switch circuit is additionally arranged at the rear stage of the linear voltage stabilizer, and the linear voltage stabilizer is isolated from a load through the first switch circuit. The second voltage for supplying power to the load can be prevented from being applied to the voltage output end of the linear voltage stabilizer, so that the problem that the voltage of the voltage output end of the linear voltage stabilizer is larger than that of the voltage input end is avoided, and the reverse current is prevented from being generated on the linear voltage stabilizer.
In some possible implementations, the power supply circuit is configured to apply the second voltage received by the external voltage receiver to the load. The first switching circuit is maintained open during application of the second voltage to the load. In the embodiment of the application, when the power supply circuit receives the second voltage from the external voltage receiving end to supply power to the load, the first switch circuit is disconnected, so that the linear voltage stabilizer and the load can be isolated, the problem that the second voltage is applied to the voltage output end of the linear voltage stabilizer, and the backward current is generated on the linear voltage stabilizer is avoided.
In some possible embodiments, the power supply circuit further comprises a second switching circuit, a first end of the second switching circuit being coupled to the external voltage receiving terminal, a second end of the second switching circuit being for coupling to a load. The embodiment of the application couples the external voltage receiving terminal with the load through the second switch circuit, so that the power supply circuit can select whether to supply power to the load by the second voltage by controlling the second switch circuit.
In some possible implementations, the power supply circuit is further configured to apply a third voltage, generated by the linear regulator based on the first voltage, to the load by turning on the first switching circuit, the third voltage being less than the first voltage. The second switching circuit is maintained open during the application of the third voltage to the load. The linear voltage regulator can still stably output the third voltage in the case that the first voltage or the load current is changed. In the embodiment of the application, when the first switch circuit is conducted, the third voltage output by the linear voltage stabilizer is applied to the load, and at the moment, the second switch circuit is kept to be disconnected, so that current can be prevented from flowing backwards to an external voltage receiving end.
In some possible embodiments, the first switching circuit includes a first transistor, a first terminal of the first transistor being a first terminal of the first switching circuit, a second terminal of the first transistor being a second terminal of the first switching circuit, a control terminal of the first transistor being for receiving the first control signal. The first transistor is controlled to be turned on or turned off by the first control signal. When the first transistor is turned on, the first switch circuit is turned on; when the first transistor is turned off, the first switching circuit is turned off.
In some possible embodiments, the second switching circuit comprises a second transistor, a first terminal of the second transistor being a first terminal of the second switching circuit, a second terminal of the second transistor being a second terminal of the second switching circuit, a control terminal of the second transistor being for receiving the second control signal. The embodiment of the application controls the on or off of the second transistor through the second control signal. When the second transistor is turned on, the second switch circuit is turned on; when the second transistor is turned off, the second switching circuit is turned off.
In some possible embodiments, the first transistor is an N-type transistor and the second transistor is a P-type transistor; or, the first transistor is a P-type transistor, and the second transistor is an N-type transistor. The first control signal and the second control signal are the same control signal. The first transistor and the second transistor adopt different types of transistors, so that the same control signal can be shared, and control logic is simplified.
In a second aspect, a power supply circuit is also provided. The power supply circuit comprises a linear voltage stabilizer, a second switch circuit and an external voltage receiving end. The voltage input end of the linear voltage stabilizer is used for receiving the first voltage, and the voltage output end of the linear voltage stabilizer is used for being coupled with a load. The external voltage receiving end is used for receiving the second voltage, the first end of the second switching circuit is coupled with the external voltage receiving end, and the second end of the second switching circuit is used for being coupled with a load.
In a third aspect, a chip is provided. The chip comprising a load and a power supply circuit of any of the first or second aspects, the power supply circuit being coupled to the load.
In a fourth aspect, an electronic device is provided. The electronic device includes a device case and the chip in the above third aspect, part or all of the chip being disposed in the device case.
It should be appreciated that the technical effects of the second aspect to the fourth aspect may refer to the technical effects of the first aspect and any embodiment thereof, and are not described herein.
Drawings
Fig. 1 is a schematic structural diagram of a chip according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a circuit structure of a linear voltage regulator according to an embodiment of the present application;
Fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a chip and a first power supply circuit in the chip according to an embodiment of the present application;
FIG. 5 is a schematic diagram of a chip and a second power supply circuit in the chip according to an embodiment of the present application;
FIG. 6 is a schematic diagram of a third power supply circuit in a chip and a chip according to an embodiment of the present application;
Fig. 7 is a schematic structural diagram of a chip and a fourth power supply circuit in the chip according to an embodiment of the present application.
Reference numerals: 100. a chip; 110. a power supply circuit; 111. a linear voltage stabilizer; 112. a first switching circuit; 113. a second switching circuit; 120. a load; 210. adjusting the transistor; 211. a parasitic diode; 220. an error amplifier; 230. a voltage division sampling circuit; 300. an electronic device; 310. an apparatus housing.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to fig. 1 to 7 and the embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
The terms "first," "second," and the like, in accordance with embodiments of the present application, are used solely for the purpose of distinguishing between similar features and not necessarily for the purpose of indicating a relative importance, number, sequence, or the like.
The terms "exemplary" or "such as" and the like, as used in relation to embodiments of the present application, are used to denote examples, illustrations, or descriptions. Any embodiment or design described herein as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.
The terms "coupled" and "connected" in accordance with embodiments of the application are to be construed broadly, and may refer, for example, to a physical direct connection, or to an indirect connection via electronic devices, such as, for example, electrical resistance, inductance, capacitance, or other electrical devices.
In portable electronic devices and industrial electronic products, some chips are designed for compatibility in consideration of high requirements of loads on power quality. As shown in fig. 1, by integrating one or more linear regulators 111 inside the chip 100, a voltage input terminal of the linear regulator 111 is coupled to a system voltage terminal Vsys of the chip 100, and a voltage output terminal of the linear regulator 111 is coupled to the load 120. Also, the load 120 is coupled to the external voltage terminal Vin of the chip 100. So that the chip 100 can either receive the voltage from the system voltage terminal Vsys and supply the load 120 through the linear voltage regulator 111, or directly supply the load 120 using the voltage received from the external voltage receiving terminal.
Fig. 2 shows a schematic circuit configuration of a linear voltage regulator. As shown in fig. 2, the linear regulator 111 may include a tuning transistor 210, an error amplifier 220, and a voltage division sampling circuit 230. The first terminal of the adjusting transistor 210 is used as the voltage input terminal of the linear voltage regulator 111, and the second terminal of the adjusting transistor 210 is used as the voltage output terminal of the linear voltage regulator 111. The voltage division sampling circuit 230 is coupled to the second terminal of the adjustment transistor 210, and in some examples, the voltage division sampling circuit 230 may include a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is coupled to the second end of the adjusting transistor 210, the second end of the first resistor R1 is coupled to the first end of the second resistor R2, and the second end of the second resistor R2 may serve as the ground GND of the linear voltage regulator 111. The common input terminal of the error amplifier 220 is for receiving the reference voltage Vref, the inverting input terminal of the error amplifier 220 is coupled to the second terminal of the first resistor R1, and the output terminal of the error amplifier 220 is coupled to the control terminal of the adjustment transistor 210.
The voltage stabilizing process of the linear voltage stabilizer 111 is as follows: the voltage division sampling circuit 230 divides the voltage at the second terminal of the adjustment transistor 210 through the first resistor R1 and the second resistor R2, and the error amplifier 220 compares the voltage sampled by the voltage division sampling circuit 230 with the reference voltage Vref to control the driving voltage of the adjustment transistor 210, thereby changing the on-voltage drop of the adjustment transistor 210 to keep the voltage at the second terminal of the adjustment transistor 210 stable. For example, when the voltage at the second terminal of the adjustment transistor 210 increases, the voltage sampled by the voltage division sampling circuit 230 increases (is greater than the reference voltage Vref), so that the error amplifier 220 decreases the output voltage, so that the on-resistance of the adjustment transistor 210 increases, the voltage division of the adjustment transistor 210 increases (i.e., the on-voltage drop increases), so that the voltage at the second terminal of the adjustment transistor 210 decreases, and one feedback control is completed, thereby stabilizing the output voltage.
When the load 120 is powered by the linear voltage regulator 111, the voltage at the voltage input terminal of the linear voltage regulator 111 is always greater than the voltage at the voltage output terminal, and the parasitic diode 211 on the adjusting transistor 210 is always in a reverse bias state, so that no leakage occurs. However, when the load 120 is directly powered by an external power source, the voltage at the voltage input end of the linear voltage regulator 111 may be smaller than the voltage at the voltage output end, so that the parasitic diode 211 of the adjusting transistor 210 is in a forward bias state, and a reverse current is generated, which easily causes adverse effects on the circuit and may even cause damage to the linear voltage regulator 111.
In the embodiment of the application, the first switch circuit 112 is added at the rear stage of the linear voltage stabilizer 111, and the linear voltage stabilizer 111 is isolated from the load 120 by the first switch circuit 112. Therefore, when the load 120 directly adopts an external power supply to directly supply power, the voltage of the voltage output end of the linear voltage stabilizer 111 is larger than the voltage of the voltage input end, and the problem that the reverse current is generated on the linear voltage stabilizer 111 is avoided.
The embodiment of the application provides an electronic device, as shown in fig. 3, the electronic device 300 includes a device housing 310 and a chip 100, and part or all of the chip 100 is disposed in the device housing 310. The electronic device 300 may be referred to as a User Equipment (UE), an access terminal, a terminal unit, a subscriber unit (subscriber unit), a terminal station, a Mobile Station (MS), a mobile station, a terminal agent, a terminal apparatus, or the like. For example, the electronic device 300 may be a cell phone, a sound box, a tablet computer, a notebook computer, etc. The embodiment of the present application is not limited to the specific type and structure of the electronic device 300. In some examples, the electronic device 300 may be deployed on land, including indoors or outdoors, handheld, or vehicle-mounted; the device can be deployed on the water surface; and can be deployed on aircrafts, balloons and satellites in the air, and the application does not limit the application scenario of the electronic device 300.
It should be understood that the chip 100 may be a computing chip (e.g., a central processing unit, an image processor, a microcontroller, etc.), a memory chip (e.g., a random access memory, a read only memory, a flash memory, etc.), a communication chip (e.g., a bluetooth chip, an ethernet interface chip, etc.), a sensing chip (e.g., a sensor chip), etc., and the present application does not limit the type of the chip 100 in any way.
As shown in fig. 4, in some embodiments, the chip 100 may include a load 120 and a power supply circuit 110, the power supply circuit 110 being coupled to the load 120. In some examples, load 120 may be a resistor, capacitor, inductor, transistor, or the like, internal to chip 100.
With continued reference to fig. 4, in some embodiments, the power supply circuit 110 includes a linear regulator 111, a first switch circuit 112, and an external voltage receiving terminal. The voltage input terminal of the linear voltage regulator 111 is coupled to the system voltage terminal Vsys of the chip 100, and is configured to receive the first voltage V1. The external voltage receiving terminal is coupled to the external voltage terminal Vin of the chip 100 for receiving the second voltage V2, and is coupled to the load 120. In some examples, the first switching circuit 112 includes a first transistor. The first end of the first transistor is coupled to the voltage output terminal of the linear voltage regulator 111 as the first end of the first switch circuit 112, the second end of the first transistor is coupled to the load 120 as the second end of the first switch circuit 112, and the control end of the first transistor is configured to receive the first control signal ctr1. In some examples, the first control signal ctr1 may be provided by a controller internal to the chip 100. When the first control signal ctr1 controls the first transistor to be turned on, the first switch circuit 112 is turned on; when the first control signal ctr1 controls the first transistor to be turned off, the first switching circuit 112 is turned off.
In some usage scenarios, the power supply circuit 110 may apply the received second voltage V2 to the load 120. During the application of the second voltage V2 to the load 120, the first transistor is controlled to be turned off by the first control signal ctr1, so that the first switching circuit 112 isolates the linear regulator 111 from the load 120, avoiding the application of the second voltage V2 to the voltage output terminal of the linear regulator 111. In some examples, the second voltage V2 is greater than the first voltage V1, thereby preventing the problem of reverse current flow across the linear regulator 111. In other examples, the second voltage V2 is less than or equal to the first voltage V1, so that the problem of generating a reverse current on the linear voltage regulator 111 can be prevented in a scenario where the first voltage V1 is disconnected (e.g., the voltage input terminal of the linear voltage regulator 111 is grounded or floating).
As shown in fig. 5, further, the power supply circuit 110 further includes a second switch circuit 113. In some examples, the second switching circuit 113 includes a second transistor having a first terminal coupled to the external voltage receiving terminal as the first terminal of the second switching circuit 113, a second terminal coupled to the load 120 as the second terminal of the second switching circuit 113, and a control terminal for receiving the second control signal ctr2. In some examples, the second control signal ctr2 may also be provided by a controller internal to the chip 100. When the second control signal ctr2 controls the second transistor to be turned on, the second switching circuit 113 is turned on; when the second control signal ctr2 controls the second transistor to be turned off, the second switching circuit 113 is turned off. The embodiment of the application controls the second transistor to be turned on or off by the second control signal ctr2, so as to select whether the load 120 is supplied with the second voltage V2.
In other usage scenarios, the power supply circuit 110 may apply the third voltage V3 generated by the linear regulator 111 based on the first voltage V1 to the load 120 by turning on the first switch circuit 112, where the linear regulator 111 may still stably output the third voltage V3 when the first voltage V1 or the current of the load 120 changes, and the third voltage V3 is smaller than the first voltage V1. During the application of the third voltage V3 to the load 120, the second switching circuit 113 is controlled to be turned off by the second control signal ctr2, so that the current can be prevented from flowing backward to the external voltage receiving terminal as well.
In some embodiments, the first transistor is an N-type transistor and the second transistor is a P-type transistor; or, the first transistor is a P-type transistor, and the second transistor is an N-type transistor. The first control signal ctr1 and the second control signal ctr2 are the same control signal. That is, the first transistor and the second transistor employ different types of transistors. The control terminal of the first transistor may be coupled to the control terminal of the second transistor (as shown in fig. 6), and the control terminal of the first transistor is coupled to the control terminal of the second transistor and then receives the same control signal, thereby facilitating the simplification of control logic.
In other embodiments, as shown in fig. 7, the power supply circuit 110 includes a linear regulator 111, a second switching circuit 113, and an external voltage receiving terminal. The voltage input terminal of the linear voltage regulator 111 is coupled to the system voltage terminal Vsys of the chip 100 for receiving the first voltage V1, and the voltage output terminal of the linear voltage regulator 111 is coupled to the load 120. The first terminal of the second switch circuit 113 is coupled to the external voltage terminal Vin of the chip 100 as an external voltage receiving terminal for receiving the second voltage V2, and the second terminal of the second switch circuit 113 is coupled to the load 120. As in fig. 5, the second control signal ctr2 of the second switch circuit 113 may still be provided by a controller within the chip 100 to control on or off.
The embodiment of the application provides a power supply circuit, a chip and electronic equipment. The power supply circuit comprises a linear voltage stabilizer, a first switch circuit and an external voltage receiving end. The voltage input end of the linear voltage stabilizer is used for receiving the first voltage, and the voltage output end of the linear voltage stabilizer is coupled with the first end of the first switch circuit. The external voltage receiving terminal is used for receiving a second voltage, and the second terminal of the first switch circuit and the external voltage receiving terminal are used for being coupled with a load. According to the embodiment of the application, the first switch circuit is additionally arranged at the rear stage of the linear voltage stabilizer, and the linear voltage stabilizer is isolated from a load through the first switch circuit. When the power supply circuit applies the second voltage received by the external voltage receiving end to the load, the first transistor is kept to be disconnected, so that the second voltage is prevented from being applied to the voltage output end of the linear voltage stabilizer, the voltage of the voltage output end of the linear voltage stabilizer is further prevented from being larger than the voltage of the voltage input end, and the problem that reverse current is generated on the linear voltage stabilizer is prevented.
In the several embodiments provided in the present application, it should be understood that the disclosed circuits, chips and electronic devices may be implemented in other ways. For example, the above-described device embodiments are merely illustrative, e.g., the division of the modules is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple modules or components may be combined or integrated into another device, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interface, indirect coupling or communication connection of devices or modules, electrical, mechanical, or other form.
The modules described as separate components may or may not be physically separate, and components shown as modules may or may not be physically separate, i.e., may be located in one device, or may be distributed over multiple devices. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional module in the embodiments of the present application may be integrated in one device, or each module may exist alone physically, or two or more modules may be integrated in one device.
In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using a software program, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in accordance with embodiments of the present application are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital subscriber line (Digital Subscriber Line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device including one or more servers, data centers, etc. that can be integrated with the medium. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid state disk (Solid STATE DISK, SSD)), etc.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
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| CN202411157249.3A CN118677252A (en) | 2024-08-22 | 2024-08-22 | Power supply circuit, chip and electronic equipment |
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| CN202411157249.3A CN118677252A (en) | 2024-08-22 | 2024-08-22 | Power supply circuit, chip and electronic equipment |
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| CN114079371A (en) * | 2020-08-18 | 2022-02-22 | 华为技术有限公司 | Electronic device |
| CN116155090A (en) * | 2021-11-23 | 2023-05-23 | 瑞昱半导体股份有限公司 | Power supply circuit and power supply method |
| CN116683049A (en) * | 2022-02-23 | 2023-09-01 | 苏州佳世达电通有限公司 | Electronic device |
| CN118484049A (en) * | 2023-09-28 | 2024-08-13 | 荣耀终端有限公司 | Voltage regulator circuits, chip systems and electronic devices |
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