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CN118504758A - Method and device for predicting chip yield - Google Patents

Method and device for predicting chip yield Download PDF

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CN118504758A
CN118504758A CN202410636547.4A CN202410636547A CN118504758A CN 118504758 A CN118504758 A CN 118504758A CN 202410636547 A CN202410636547 A CN 202410636547A CN 118504758 A CN118504758 A CN 118504758A
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沈嘉禄
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Dingdao Zhixin Shanghai Semiconductor Co ltd
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Abstract

The application provides a method and a device for predicting the yield of chips, wherein the method comprises the following steps: obtaining the defect density, the chip area and the module parameters of each functional module in the chip, wherein the module parameters of the functional modules at least comprise: a first area ratio of the functional module in the chip; determining a module yield of the functional module based on the chip area, the defect density and the first area occupation ratio of the functional module; and determining the chip yield of the chip based on the module yield of each functional module.

Description

Method and device for predicting chip yield
Technical Field
The present application relates to the field of chip manufacturing technologies, and in particular, to a method and an apparatus for predicting chip yield.
Background
The yield of the chip represents the qualification rate of the chip and is an important index for measuring the production quality of the chip. By estimating the yield of the chip, a reliable basis can be provided for the research and development of chip products and production. Based on this, how to reasonably predict the yield of chips is a technical problem that needs to be solved by those skilled in the art.
Disclosure of Invention
In one aspect, the present application provides a method for predicting a chip yield, including:
obtaining defect density, chip area and module parameters of each functional module in the chip, wherein the module parameters of the functional module at least comprise: a first area ratio of the functional module in the chip;
determining a module yield of the functional module based on the chip area, the defect density, and the first area ratio of the functional module;
And determining the chip yield of the chip based on the module yield of each functional module.
In one possible implementation manner, the module parameters of the functional module further include: a second area ratio of the repairable area in the functional module;
The determining the module yield of the functional module based on the chip area, the defect density and the first area ratio of the functional module includes at least one of:
Determining a first module yield of an unrepairable region in the functional module and a second module yield of a repairable region in the functional module under the condition of no repair based on the chip area, the defect density and the first area ratio and the second area ratio of the functional module;
Determining a first module yield of an unrepairable region in the functional module and a third module yield of the repairable region in the functional module under the condition of being repaired based on the chip area, the defect density and the first area occupation ratio and the second area occupation ratio of the functional module;
The determining the chip yield of the chip based on the module yield of each functional module comprises at least one of the following steps:
Determining the first chip yield of the chip on the premise of not repairing by redundancy based on the first module yield and the second module yield of each functional module;
and determining the second chip yield of the chip on the premise of repairing by redundancy based on the first module yield and the third module yield of each functional module.
In yet another possible implementation manner, the method further includes: obtaining a qualified chip proportion in a wafer bearing the chips and a fixed yield loss of the wafer;
The determining the first chip yield of the chip on the premise of not repairing by redundancy based on the first module yield and the second module yield of each functional module comprises the following steps:
Determining the first chip yield of the chip on the premise of not repairing by redundancy on the basis of the first module yield, the second module yield, the qualified chip proportion and the fixed yield loss of each functional module;
The determining, based on the first module yield and the third module yield of each functional module, the second chip yield of the chip on the premise of repairing by redundancy includes:
And determining the second chip yield of the chip on the premise of repairing by redundancy on the basis of the first module yield, the third module yield, the qualified chip proportion and the fixed yield loss of each functional module.
In yet another possible implementation manner, the determining the first chip yield of the chip without redundancy repair based on the first module yield, the second module yield, the qualified chip proportion, and the fixed yield loss of each functional module includes:
determining the product of the first module yield of each functional module in the chip to obtain the first total yield of the unrepairable area in the chip;
determining the product of the second module yield of each functional module in the chip to obtain a second total yield under the condition that the repairable area in the chip is not repaired;
determining the product of the first total yield, the second total yield, the qualified chip proportion and the fixed yield loss as the first chip yield of the chip on the premise that the chip is not repaired by redundancy;
The determining the second chip yield of the chip on the premise of repairing by redundancy based on the first module yield, the third module yield, the qualified chip proportion and the fixed yield loss of each functional module comprises the following steps:
determining the product of the first module yield of each functional module in the chip to obtain the first total yield of the unrepairable area in the chip;
Determining the product of the third module yield of each functional module in the chip to obtain the third total yield of the repairable area in the chip under the condition of being repaired;
And determining the product of the first total yield, the third total yield, the qualified chip proportion and the fixed yield loss as the second chip yield of the chip on the premise of repairing the chip by redundancy.
In yet another possible implementation manner, the method further includes:
and determining the ratio of the third total yield to the first total yield as a yield improvement factor achieved by the chip through redundancy repair.
In yet another possible implementation manner, when the module class of the functional module is the target class, the module parameters of the functional module further include: repairable proportion of repairable areas in the functional module can be repaired;
determining a second module yield of the functional module, comprising:
Combining module types of the functional modules, and determining a second module yield of a repairable area in the functional module under the condition of no repair based on the chip area, the defect density and the first area occupation ratio and the second area occupation ratio of the functional module;
Determining a third module yield of the functional module, comprising:
And combining the module types of the functional modules, and determining a third module yield of the repairable area in the functional module under the condition of being repaired based on the second module yield of the functional module and the repairable proportion.
In yet another possible implementation manner, the determining, based on the chip area, the defect density, and the first area ratio and the second area ratio of the functional module, the second module yield of the repairable area in the functional module without repair includes:
If the module type of the functional module is the target type, determining a second module yield of the repairable area in the functional module under the condition of no repair based on the chip area, the defect density and the first area occupation ratio and the second area occupation ratio of the functional module;
If the module category of the functional module is not the target category, determining a set reference value as a second module yield of the repairable area in the functional module under the condition of no repair;
The determining, based on the second module yield and the repairable proportion of the functional module, a third module yield of the repairable area in the functional module under the condition of being repaired, including:
if the module category of the functional module is the target category, determining a third module yield of the repairable area in the functional module under the condition of being repaired based on the second module yield of the functional module and the repairable proportion;
And if the module category of the functional module is not the target category, determining the set reference value as a third module yield of the repairable area in the functional module under the condition of being repaired.
In yet another possible implementation manner, the method further includes: obtaining a first effective area coefficient of the chip;
The module parameters of the functional module further include: a second effective area coefficient of the functional module;
Determining a first module yield of the functional module, comprising:
Determining a first module yield of an unrepairable region in the functional module based on the chip area, the defect density, the first effective area coefficient, the first area occupation ratio, the second area occupation ratio and the second effective area coefficient of the functional module;
when determining the second module yield of the repairable area in the functional module under the condition of no repair based on the chip area, the defect density and the first area occupation ratio and the second area occupation ratio of the functional module, the method specifically comprises the following steps:
And determining a second module yield of the repairable area in the functional module under the condition of no repair based on the chip area, the defect density, the first effective area coefficient, the first area occupation ratio, the second area occupation ratio and the second effective area coefficient of the functional module.
In yet another possible implementation manner, the determining, based on the second module yield of the functional module and the repairable proportion, a third module yield of a repairable area in the functional module in a repaired condition includes:
Determining repairable yield loss of the repairable area under the condition of no repair based on the second module yield of the repairable area under the condition of no repair in the functional module;
determining a target product of the repairable yield loss and the repairable ratio;
and determining the sum of the target product and the second module yield of the functional module as a third module yield of the repairable area in the functional module under the condition of being repaired.
In still another aspect, the present application further provides an apparatus for predicting a chip yield, including:
The first information obtaining unit is used for obtaining defect density, chip area and module parameters of each functional module in the chip, wherein the module parameters of the functional modules at least comprise: a first area ratio of the functional module in the chip;
A module yield determining unit, configured to determine a module yield of the functional module based on the chip area, the defect density, and the first area occupation ratio of the functional module;
And the chip yield determining unit is used for determining the chip yield of the chip based on the module yield of each functional module.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only embodiments of the present application, and other drawings may be obtained according to the provided drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a method for predicting chip yield according to an embodiment of the present application;
FIG. 2 is a schematic flow chart of a method for predicting chip yield according to an embodiment of the present application;
FIG. 3 is a schematic flow chart of a method for predicting chip yield according to an embodiment of the present application;
FIG. 4 is a schematic flow chart of a method for predicting chip yield according to an embodiment of the present application;
fig. 5 is a schematic diagram of a composition structure of an apparatus for predicting chip yield according to an embodiment of the present application;
Fig. 6 is a schematic diagram of another composition structure of an apparatus for predicting chip yield according to an embodiment of the present application;
fig. 7 is a schematic diagram of a composition structure of an electronic device according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without any inventive effort, are intended to be within the scope of the application.
Referring to fig. 1, a flowchart of a method for predicting chip yield according to an embodiment of the present application is shown, where the method of the present application may be applied to an electronic device. The electronic equipment can be a mobile phone, a tablet personal computer, a personal computer or a server and the like; but may also be node devices in a distributed system or a clustered system, without limitation.
The method of the embodiment can comprise the following steps:
S101, obtaining the defect density, the chip area and the module parameters of each functional module in the chip.
The defect density of the chip refers to the number of defects occurring in a unit area of the chip. For example, the defect density of a chip may be the ratio of the number of defects present on the surface of the chip to the chip area of the chip during the chip fabrication process, typically measured in terms of the number of defects per square centimeter. The defect density of a chip is an important index for measuring the quality of the chip.
Functional modules in a chip refer to devices or modules corresponding to specific areas on which the chip is mounted or deployed. For example, the functional modules in the chip may include various types of memories, capacitors, logic circuit modules, and the like, and may also include a blank module corresponding to a blank area where a specific device or circuit is not provided.
The module parameters of the functional module at least comprise: the functional module has a first area ratio in the chip. For example, the functional module occupies 30% of the total area of the chip, and the first area of the functional module occupies 30%.
S102, for each functional module in the chip, determining the module yield of the functional module based on the chip area, the defect density and the first area occupation ratio of the functional module.
The module yield of the functional module is used for representing the qualification probability of the functional module or the duty ratio of the qualification part in the functional module.
It will be appreciated that the defect density of the chip reflects the number of defects per unit area of the chip, while the functional module is part of the chip and occupies a part of the area of the chip, based on which the module yield of the functional module can be calculated with the chip area and the first area ratio of the functional module in the chip determined.
The calculation mode for calculating the module yield of the functional module can be various, and the application is not limited to this.
In one possible implementation, the yield of the chip may be derived based on poisson distribution modeling, and the index in the index function may be an exponential function based on e, with the index being the negative of the product of the chip area and defect density. On the basis, a yield calculation formula of the functional module can be constructed.
If the first area ratio of the functional module, the first product of multiplication of the chip area and the defect density is determined, a second product obtained by multiplying the first product by minus one is calculated, the power of the second product based on e and the exponent is calculated, and the power is taken as the module yield of the functional module. That is, the module yield Y mod of the functional module can be expressed as the following formula one:
Where D 0 represents defect density, C area represents chip area, and Mod p represents a first area ratio of the functional module in the chip.
Of course, other possibilities for calculating the module yield of the functional module are possible, and the application is not limited thereto.
It is understood that the parameter indexes affecting the module yield of the functional module may also include the effective area coefficient of the chip, the effective area coefficient of the functional module, and the like.
The effective area coefficient of the chip is also called an effective area value, which is used for reflecting the coverage condition of the effective area capable of realizing the function in the chip, and the larger the value is, the more the area capable of realizing the function in the chip is relatively. For example, the effective area coefficient of the chip may be a ratio of an effective area capable of realizing a function to an area not capable of realizing a function in the chip, or the like. Similarly, the effective area coefficient of the functional module reflects the coverage of the effective area in the functional module that can implement the function.
For ease of distinction, the effective area coefficient of the chip is referred to as a first effective area coefficient, while the effective area coefficient of the functional module is referred to as a second effective area coefficient,
Correspondingly, the application can also determine the module yield of the functional module by combining at least one of the first effective area coefficient of the chip and the second effective area coefficient of the functional module on the basis of the chip area, the defect density and the first area ratio of the functional module. For example, in the above formula one, the index of the formula one is multiplied by at least one of the first effective area coefficient and the second effective area coefficient to calculate the module yield of the functional module.
S103, determining the chip yield of the chip based on the module yield of each functional module.
For example, the product of the module yields of the functional modules may be used as the chip yield of the chip. The method can also be used for comprehensively determining the chip yield of the chip by combining the module types of different functional modules and the module yields of all the functional modules. Of course, there may be other ways of determining the chip yield of the chip, without limitation.
The yield of the chip is used for representing the probability that the chip is qualified, namely the probability that the chip does not contain any defects.
It will be appreciated that other factors affecting the chip yield of a chip may be possible, e.g., the chip yield may also be related to the proportion of acceptable chips in the wafer carrying the chip, the fixed yield loss of the wafer, etc. Based on this, in an alternative way, the application can also combine at least one of the qualified chip proportion in the wafer and the fixed yield loss of the wafer on the basis of the module yield of each functional module to determine the chip yield of the chip.
The proportion of qualified chips in the wafer refers to the duty ratio of the qualified chips in the wafer. For example, the proportion of acceptable chips is not the proportion of acceptable chips in the wafer to all chips in the wafer that are functional. The functional chip means a chip capable of realizing a certain function, but the functional chip is not necessarily a qualified chip, and thus the functional chip may include a qualified chip and a chip capable of realizing at least part of the function but failed.
The fixed yield loss of wafers refers to the final wafer yield due to the fixed defects present during wafer processing. For example, some inherent defects inevitably occur due to the limitation of the wafer production process, such as damage to the edge position of the wafer due to the influence of the photolithographic photomask, and the like, so that the qualification rate of the wafer is lost, the qualification rate of the wafer is reduced, and on the basis, the qualification rate of the wafer is determined to be a fixed yield loss.
The proportion of acceptable chips in the wafer and the fixed yield loss of the wafer can be provided by a wafer processing manufacturer without limitation.
From the above, the application considers that the defect density of the chip can be different along with the difference of the chip area, and not only combines the defect density of the chip, but also combines the area of the chip and the area occupation ratio of the functional module in the chip to determine the module yield of each functional module, thereby determining the module yield of the functional module reasonably. In addition, the application combines the module yield of each functional module in the chip to comprehensively determine the chip yield of the chip, fully considers the influence of the module yield of each type of functional module in the chip on the chip yield, and more comprehensively analyzes the chip yield, thereby determining the chip yield of the chip more reasonably and reliably.
It will be appreciated that by providing redundant areas in the functional module, a redundant design may be achieved which enables the functional module to achieve defect repair by means of the redundant areas, i.e. by means of the redundant repair. The region which can be repaired in the functional module is a repairable region in the functional module. Based on this, in the case that the functional module has a defect, the repairable area in the functional module has a repairable possibility, so that the repairable area in the functional module is considered to have no defect through repair. Based on this, the module parameters of the functional module in the present application may at least further include: a second area ratio of the repairable area of the functional module. The second area ratio is a ratio of the repairable area in the functional module to a total area of the functional module.
In the case where a defective region of a functional module is repaired, since a defective region occurring in the functional module is also considered as a pass region due to the repair, the chip yield of a chip may also be different between the case where redundancy repair is considered and the case where redundancy repair is not considered. In the application, in order to more reasonably determine the chip yield of the chip, the chip yield of the chip under the condition of repairing by redundancy or the chip yield of the chip under the condition of not repairing by redundancy can be determined according to actual needs.
Of course, it is also possible to determine the chip yield of the chip with the aid of redundancy repair and the chip yield of the chip without the aid of redundancy repair at the same time.
In the present application, for convenience of distinction, the chip yield in the case of the chip without redundancy repair is referred to as a first chip yield, and the chip yield in the case of the chip with redundancy repair is referred to as a second chip yield.
The following describes the implementation process of determining the first chip yield and the second chip yield of the chip, respectively.
First, a description will be given of determining a first chip yield of a chip, as shown in fig. 2, which is a schematic flow chart of a method for predicting a chip yield according to an embodiment of the present application. The method of the embodiment can comprise the following steps:
s201, obtaining the defect density, the chip area and the module parameters of each functional module in the chip.
In the present application, the module parameters of the functional module include at least: the functional module has a first area ratio in the chip and a second area ratio in the repairable area of the functional module.
The repairable area of the functional module refers to an area which can be repaired in the functional module under the condition that the functional module has defects through redundant design in the functional module.
S202, for each functional module in the chip, determining a first module yield of an unrepairable area in the functional module and a second module yield of a repairable area in the functional module under the condition of no repair based on the area of the chip, the defect density and the first area ratio and the second area ratio of the functional module.
The first module yield of the unrepairable area in the functional module is related to the area of the unrepairable area in the functional module, the defect density of the chip and the like. And on the premise that the second area ratio of the repairable area in the chip in the functional module is known, the area ratio of the unrepairable area in the functional module in the chip can be determined. That is, the 1-second area ratio is the area ratio of the unrepairable region in the functional module.
The second module yield of the repairable area in the functional module refers to the yield of the repairable area in the functional module without considering that the repairable area in the functional module is repaired by redundancy repair. It can be seen that the second module yield is related to the area of the unrepairable area in the functional module and the defect density corresponding to the chip in which the functional module is located.
On the above basis, the first module yield and the second module yield can be calculated in a related manner to calculate the module yields of the functional modules.
For example, based on the first area ratio Mod p, the second area ratio Mod rep, the chip area C area, and the defect density D 0 of the functional module, the first module yield Y mod1 of the unrepairable area in the functional module is calculated according to the following formula two:
Similarly, based on the first area ratio Mod p, the second area ratio Mod rep, the chip area C area, and the defect density D 0 of the functional module, the second module yield Y mod2 of the repairable area in the functional module without repair is calculated by the following formula three:
of course, the above is described by taking one implementation manner of calculating the first module yield and the second module yield as an example, and the manner of calculating the module yield of the functional module by other manners is also applicable to the present embodiment, which is not limited thereto.
It will be appreciated that the present application may also achieve a first effective area coefficient of the chip, similar to the previous embodiment of fig. 1. Accordingly, the module parameters of the functional module may further include: a second effective area coefficient of the functional module. Based on the above, the embodiment can determine the first module yield of the unrepairable area in the functional module and the second module yield of the repairable area in the functional module under the condition of no repair based on the chip area, the defect density, the first effective area coefficient, the first area occupation ratio, the second area occupation ratio and the second effective area coefficient of the functional module.
For example, the index in equation two may be replaced with the negative of the product of the chip area, defect density, first effective area coefficient, 1-second area duty, first area duty, and second effective area coefficient to calculate the first module yield. Similarly, the negative number of the product of the chip area, the defect density, the first effective area coefficient, the first area duty ratio, the second area duty ratio and the second effective area coefficient is replaced by the index in the formula III, and the yield of the second module is calculated.
S203, determining the first chip yield of the chip on the premise of not repairing by redundancy based on the first module yield and the second module yield of each functional module.
The first chip yield of the chip under the condition of no redundancy repair refers to the yield of the chip under the premise of repairing the repairable area of each functional module in the chip by redundancy without consideration. Based on the above, the first chip yield is related to the first module yield of the unrepairable area in each functional module in the chip and the second module yield of the repairable area in each functional module under the condition that the repairable area is not repaired, so that the module yields of the functional modules in the two aspects can be integrated, and the chip yield of the chip under the premise of not repairing by redundancy can be determined.
For example, a first average of the first module yields of the functional modules and a second average of the second module yields of the functional modules may be calculated. And calculating the weighted sum of the first average value and the second average value to obtain the first chip yield of the chip, or determining the first chip yield of the chip by the product of the first average value and the second average value.
In an alternative manner, in order to more comprehensively reflect the influence of the yield of each functional module on the yield of the chip, the product of the yields of the first modules of each functional module in the chip can be determined, so as to obtain the first total yield of the unrepairable area in the chip. Correspondingly, determining the product of the second module yield of each functional module in the chip to obtain the second total yield of the repairable area in the chip under the condition of unrepaired. Correspondingly, the product of the first total yield and the second total yield is determined as the first chip yield of the chip under the premise of not repairing by redundancy.
Of course, there may be other ways of determining the first chip yield of the chip, which will not be described herein.
Similar to the previous embodiments, in this embodiment, at least one of the proportion of acceptable chips in the wafer carrying the chips and the fixed yield loss of the wafer can also be obtained. Correspondingly, the first chip yield of the chip under the premise of not repairing by redundancy can be determined based on the first module yield and the second module yield of each functional module and combining at least one of the qualified chip proportion and the fixed yield loss.
For example, a first chip yield of a chip is determined based on the first average value, the second average value, and in combination with at least one of the qualified chip ratio and the fixed yield loss calculated above.
For another example, on the basis of the first total yield and the second total yield calculated above, the product of the first total yield, the second total yield, the qualified chip proportion and the fixed yield loss is determined as the first chip yield of the chip under the premise of not repairing by redundancy.
In this embodiment, considering that the characteristics of the repairable area and the non-repairable area of each functional module in the chip are different, the yields of the two partial areas in the functional modules are different, on the basis, the first module yield of the non-repairable area in each functional module and the second module yield of the repairable area in the functional module under the condition of no repair are respectively determined, and the first module yield of the non-repairable area in each functional module and the second module yield of the repairable area in each functional module are combined, the yield of the chip under the condition of no repair by redundancy is comprehensively determined, so that the yield of the chip under the condition of no repair by redundancy can be comprehensively and accurately determined.
The determination of the second chip yield of the chip is described below. Referring to fig. 3, a schematic flow chart of a method for predicting chip yield according to an embodiment of the present application is shown, where the method of the present embodiment may include:
s301, obtaining the defect density, the chip area and the module parameters of each functional module in the chip.
In the present application, the module parameters of the functional module include at least: the functional module has a first area ratio in the chip and a second area ratio in the repairable area of the functional module.
S302, for each functional module in the chip, determining the first module yield of the unrepairable area in the functional module and the third module yield of the repairable area in the functional module under the condition of being repaired based on the chip area, the defect density and the first area ratio and the second area ratio of the functional module.
The determining the first module yield of the functional module may be referred to in the foregoing description of the embodiment of fig. 2, and will not be described herein.
It will be appreciated that the third module yield of the repairable area in the functional module in the event of repair is related to the yield improvement by redundancy repair, and the module yield of the repairable area in the functional module in the event of non-repair (i.e., the second module yield).
The improvement of the yield rate of the functional module through redundancy repair is related to the characteristics of the functional module, and the improvement is not limited.
In one possible implementation, the yield improvement through redundancy repair is related to yield loss of the repairable area in the functional module without repair and the repairable proportion of the functional module repairable area that can be repaired. Based on this, the module parameters of the functional module may further include: the repairable proportion of repairable areas in the functional module, i.e. the proportion (or probability) of repairable areas in the functional module that can be repaired. For convenience of description, yield loss of the repairable area in the functional module without repair is referred to as repairable yield loss.
Wherein the repairable yield loss of the functional module is related to the yield of the second module of the repairable area in the functional module without repair. Based on the method, the repairable yield loss of the repairable area under the condition of no repair can be determined based on the second module yield of the repairable area under the condition of no repair in the functional module.
For example, the repairable yield loss of the repairable area in the functional module under the condition of no repair is as follows: and subtracting the yield of the second module of the repairable area in the functional module under the condition of no repair.
On the basis, the application can determine the target product of the repairable yield loss of the functional module and the repairable proportion corresponding to the functional module, and determine the sum of the target product and the second module yield of the functional module as the third module yield of the repairable area in the functional module under the condition of being repaired.
For example, assuming that the repairable rate of the repairable area in the functional module is 60%, the yield of the second module of the repairable area in the functional module without repair is 92.2%, the repairable yield loss of the repairable area in the functional module without repair is 1-92.2% = 7.8%, and correspondingly, the yield of the third module of the functional module is: 7.8% by 60% +92.2% = 96.88%.
In an alternative manner, similarly to the previous embodiment, considering the index affecting the module yield of the functional module may further include: the first effective area coefficient of the chip and the second effective area coefficient of the functional module are also determined based on the chip area, the defect density and the first effective area coefficient of the chip, the first area occupation ratio, the second area occupation ratio and the second effective area coefficient of the functional module, and the first module yield and the third module yield of the unrepairable area in the functional module are determined.
S303, determining the second chip yield of the chip on the premise of repairing by redundancy based on the first module yield and the third module yield of each functional module.
It can be understood that each functional module consists of a repairable area and an unrepairable area, and under the premise that the chip is repaired by redundancy, the yield in the chip is related to the yield of the repairable area in each functional module in the chip and the yield of the unrepairable area in each functional module in the chip, based on the results, the yield of the first module and the yield of the third module in each functional module are comprehensively and accurately determined, and therefore, the reference basis of another dimension is provided for chip production.
In the present application, there are many possibilities for determining the specific implementation of the second chip yield of the chip. The specific implementation is similar to the previous implementation of determining the first chip yield.
For example, a first average of the first module yields of the functional modules and a third average of the third module yields of the functional modules may be determined. Then, the product of the first average value and the third average value is determined as the second chip yield of the chip.
For another example, in one possible implementation manner, in order to more comprehensively reflect the influence of the yield of each functional module on the chip yield, the product of the yields of the first modules of each functional module in the chip may be determined, so as to obtain the first total yield of the unrepairable area in the chip; correspondingly, determining the product of the third module yield of each functional module in the chip to obtain the third total yield of the repairable area in the chip under the condition of being repaired. On the basis, the product of the first total yield and the third total yield can be determined as the second chip yield of the chip under the premise of repairing by redundancy.
Of course, other specific implementations of determining the second chip yield of the chip are also possible, and will not be described herein.
It will be appreciated that, as in the previous embodiments, at least one of the proportion of acceptable chips in the wafer carrying the chips and the fixed yield loss of the wafer may also be obtained in this embodiment. Correspondingly, the second chip yield of the chip under the premise of not repairing by redundancy can be determined based on the first module yield and the third module yield of each functional module and combining at least one of the qualified chip proportion and the fixed yield loss.
For example, the product of the first total yield, the third total yield, the qualified chip proportion and the fixed yield loss is determined as the second chip yield of the chip under the premise of repairing by redundancy.
It will be appreciated that the present application may also determine the ratio of the third total yield to the first total yield, which is determined as the yield improvement factor achieved by the chip via redundancy repair. The yield improvement factor reflects the condition that the chip can improve the yield by means of redundancy repair, so that a reference basis of another dimension is provided for chip or wafer production.
It can be appreciated that the types of functional modules that can be deployed in a chip are large, and that the sensitivity of different functional modules to defect repair is different. Some types of functional modules may be considered to be capable of being fully repaired, while some types of functional modules may have some probability of being capable of being repaired. Based on this, when the module class of the function module is the target class, the module parameters of the function module further include: a repairable proportion of repairable areas in the functional module that characterizes a proportion of repairable areas in the functional module that can be repaired.
The functional modules of the target class are functional modules which have a certain probability of being repaired in the repairable area. For example, a repairable area of memory in a chip cannot be repaired one hundred percent, but only a certain proportion of repairable area can be repaired, and then the repairable proportion of repairable area in the memory can be repaired needs to be marked.
While for functional modules outside the target class, the repairable proportion of the repairable area can be considered to be 100%, or the repairable proportion is not required to be concerned. Based on this, for a functional module that does not belong to the target class, the repairable proportion of the functional module may not be included in the module parameters of the functional module, but is 100% by default. Of course, the repairable proportion of the functional module may be set to 100% in the module parameters of the functional module, which is not limited.
For example, these functional blocks are insensitive to defects for blank areas, logic areas and capacitances in the chip, and therefore can be considered as repairable areas that can be completely repaired.
On the basis of the above, the types of the functional modules are different, and the specific processes of determining the second module yield of the repairable area in the functional module under the condition of no repair and the third module yield of the repairable area in the functional module under the condition of repair are also different.
Correspondingly, the application can also combine the module types of the functional module, and determine the second module yield of the repairable area in the functional module under the condition of no repair based on the chip area, the defect density, the first area occupation ratio and the second area occupation ratio of the functional module.
Similarly, in combination with the module category of the functional module, a third module yield of the repairable area in the functional module under the condition of being repaired is determined based on the second module yield of the functional module and the repairable proportion of the functional module.
The following description is made in connection with one implementation. Fig. 4 is a schematic flow chart illustrating a method for predicting chip yield according to an embodiment of the present application, where the method may include:
S401, obtaining the defect density, the chip area, the first effective area coefficient, the module parameters of each functional module in the chip, the qualified chip proportion in the wafer bearing the chip and the fixed yield loss of the wafer.
Wherein, the module parameters of the functional module at least comprise: the first area ratio of the functional module in the chip, the second area ratio of the repairable area in the functional module and the second effective area coefficient of the functional module. In particular, when the module class of the functional module is the target class, the module parameters of the functional module further include: repairable proportion of repairable areas in the functional module may be repaired.
Of course, the module parameters of each functional module may also include a repairable proportion of the functional module, for example, the repairable proportion may be 100% for non-target types of functional modules such as capacitor and blank modules.
S402, for each functional module in the chip, determining the first module yield of the unrepairable area in the functional module based on the chip area, the defect density and the first effective area coefficient of the chip, and the first area occupation ratio, the second area occupation ratio and the second effective area coefficient of the functional module.
For example, the first module yield Y mod1 of the unrepairable area in the functional module may be calculated based on the first area ratio Mod p, the second area ratio Mod rep, the chip area C area, the defect density D 0, the first effective area coefficient M1 of the chip, and the second effective area coefficient M2 of the functional module according to the following formula four:
Of course, there may be other ways of calculating the yield of the first module in combination with the above multiple index parameters affecting the chip and the functional module, which is not limited.
In this embodiment, in order to calculate the yield of the chip more comprehensively and accurately, when calculating the first module yield of the unrepairable area in each functional module in the chip, an effective area coefficient that can affect the yield of the chip and the functional module is used in addition to the area of the unrepairable area in the functional module in consideration of the defect density of the chip. It will be appreciated that the determination of the first module yield in other ways as mentioned in the previous embodiments is equally applicable to this embodiment if the effective area coefficients of the chip and the functional module are not taken into account.
For example, the calculation method of the formula two is adopted to calculate the first module yield of the functional module, which is also applicable to the present embodiment.
S403, if the module type of the functional module is the target type, determining a second module yield of the repairable area in the functional module under the condition of no repair based on the chip area, the defect density and the first effective area coefficient of the chip, and the first area occupation ratio, the second area occupation ratio and the second effective area coefficient of the functional module.
As described above, the repairable area in the functional module of the target class is relatively sensitive to defects, and the repairable area cannot be completely repaired. For example, the functional modules of the target class include at least a memory, such as an enhanced dynamic random access memory, a high density static random access memory, a memory with static storage function, and the like. Of course, the functional modules of the target class may also include other functional modules that are more sensitive to defects, which are not described herein.
For example, based on the first area ratio Mod p of the functional module, the second area ratio Mod rep of the repairable area in the functional module, the chip area C area, the defect density D 0, the first effective area coefficient M1 of the chip, and the second effective area coefficient M2 of the functional module, the second module yield Y mod2 of the repairable area in the functional module under the condition of no repair can be calculated by the following formula five:
of course, in combination with the above index parameters affecting the chip and the functional module obtained in this embodiment, other ways of calculating the yield of the second module may be used, which is not limited.
In this embodiment, in order to calculate the yield of the chip more comprehensively and accurately, when calculating the yield of the second module in the absence of repair in each functional module in the chip, the effective area coefficient that can affect the yield of the chip and the functional module is considered in addition to the area of the unrepairable area in the functional module in consideration of the defect density of the chip.
It will be appreciated that the calculation of the second module yield in other ways than those mentioned in the previous embodiments is equally applicable to this embodiment, if the effective area coefficients of the chip and the functional module are not taken into account. For example, the calculation of the second module yield of the functional module using the above formula three is also applicable to the present embodiment.
S404, if the module type of the functional module is the target type, determining a third module yield of the repairable area in the functional module under the condition of being repaired based on the second module yield and the repairable proportion of the functional module.
The calculation of the yield of the second module may be referred to in the foregoing description, and will not be described herein.
For example, the 1-second module yield can be calculated first, and the repairable yield loss of the repairable area in the functional module under the condition of no repair can be obtained. Then, a target product of the repairable yield loss and a repairable proportion of the repairable area in the functional module is calculated. And finally, determining the sum of the target product and the second module yield of the functional module as a third module yield of the repairable area in the functional module under the condition of being repaired.
S405, if the module type of the functional module is not the target type, determining the set reference value as the second module yield of the repairable area in the functional module under the condition of no repair, and determining the set reference value as the third module yield of the repairable area in the functional module under the condition of repair.
The set reference value may be set according to actual needs, and is not limited thereto.
In an alternative, considering that functional modules outside the target class are not sensitive to defects, the repairable areas thereof may be considered to be all qualified, based on which, for such functional modules, the second module yield of the repairable areas thereof without repair and the third module yield of the repairable areas thereof with repair may be considered to be one hundred percent, and thus the reference value may be set to 100%.
It should be noted that, the order of determining the first module yield and the second module yield is not limited to that shown in fig. 4, and in actual application, the second module yield of the functional module may be determined first, and then the first module yield of the functional module may be determined; alternatively, the operations of determining the first module yield and the second module yield are performed simultaneously, which is not limited.
S406, determining the product of the first module yield of each functional module in the chip to obtain the first total yield of the unrepairable area in the chip.
S407, determining the product of the second module yields of the functional modules in the chip to obtain a second total yield under the condition that the repairable area in the chip is not repaired.
S408, determining the product of the third module yield of each functional module in the chip to obtain the third total yield of the repairable area in the chip under the condition of being repaired.
S409, determining the product of the first total yield, the second total yield, the qualified chip proportion and the fixed yield loss as the first chip yield of the chip under the premise that the chip is not repaired by redundancy.
For example, the first chip yield of a chip may be expressed as the following formula six:
First chip yield = first total yield x second total yield x acceptable chip ratio x fixed yield loss;
(formula six);
Therefore, in this embodiment, the module types of the functional modules are combined, and the first module yield of the unrepairable area in the functional module and the second module yield of the repairable area in the functional module under the condition of not being repaired are respectively determined based on the defect density and the effective area coefficient of the chip, and the area of the functional module and the effective area coefficient of the functional module, so that the module yields of different areas in the functional module under the premise of not repairing by redundancy can be more accurately determined by combining the characteristics of the functional modules.
On the basis, the application combines the first module yield of the unrepairable area in each functional module and the second module yield of the repairable area in each functional module under the condition of no repair, integrates the qualified chip proportion of the wafer bearing the chip and the fixed yield loss of the wafer, and can more comprehensively analyze the first chip yield of the chip under the premise of no redundancy repair, thereby improving the accuracy and reliability of the determined first chip yield.
It should be noted that, in the step S409, an implementation manner of determining the first chip yield is taken as an example, if the qualified chip ratio and the fixed yield loss of the wafer are not combined, the first chip yield is determined only based on the first total yield and the second total yield, which is also applicable to the present embodiment and will not be repeated.
S410, determining the product of the first total yield, the third total yield, the qualified chip proportion and the fixed yield loss as the second chip yield of the chip under the premise of repairing the chip by redundancy.
For example, the second chip yield may be expressed as the following equation seven:
second chip yield = first total yield x third total yield x acceptable chip ratio x fixed yield loss;
(equation seven);
Therefore, in this embodiment, the module types of the functional modules are combined, and the first module yield of the unrepairable area and the third module yield of the repairable area in the functional module are respectively determined based on the defect density and the effective area coefficient of the chip, the area of the functional module and the effective area coefficient of the functional module, so that the module yields of different areas of the functional module under the condition of repairing by redundancy can be more accurately determined by combining the characteristics of the functional modules.
On the basis, the method combines the first module yield of the unrepairable areas in the functional modules and the third module yield of the repairable areas in the functional modules under the condition of being repaired, and comprehensively analyzes the qualified chip proportion of the wafer bearing the chip and the fixed yield loss of the wafer, so that the second chip yield of the chip under the premise of repairing by redundancy can be more comprehensively analyzed, and the accuracy and the reliability of the determined second chip yield are improved.
Of course, in fig. 4, only one implementation of calculating the second chip yield of the chip is used for illustration, and if the second chip yield is determined by adopting the foregoing embodiment, the same applies to the present embodiment, which is not repeated herein.
It should be understood that in fig. 4, the first chip yield and the second chip yield are calculated at the same time as an example, and in practical application, only the first chip yield or the second chip yield may be calculated according to actual needs, which is not limited.
In this embodiment, the yield of the chip in different dimensions can be accurately calculated according to the relevant modeling formula obtained by modeling, so that the yield of the chip can be estimated in the stage of introducing and mass-producing a new chip product, and a basis can be provided for the production plan of the chip or the wafer based on the yield of the chip.
Corresponding to the method for predicting the chip yield of the application, the application also provides a device for predicting the chip yield.
Fig. 5 is a schematic diagram showing a composition structure of a device for predicting chip yield according to an embodiment of the present application, where the device of the present application may be applied to an electronic device. The apparatus of this embodiment may include:
A first information obtaining unit 501, configured to obtain a defect density of a chip, a chip area, and module parameters of each functional module in the chip, where the module parameters of the functional module at least include: a first area ratio of the functional module in the chip;
a module yield determining unit 502, configured to determine a module yield of the functional module based on the chip area, the defect density, and the first area occupation ratio of the functional module;
the chip yield determining unit 503 is configured to determine a chip yield of the chip based on the module yields of the functional modules.
In one possible implementation, as shown in fig. 6, another schematic structural diagram of an apparatus for predicting chip yield in an embodiment of the present application is shown.
The device shown in fig. 6 differs from the device shown in fig. 5 in that:
the module parameters of the functional module obtained by the first information obtaining unit 501 further include: a second area ratio of the repairable area in the functional module;
and, the module yield determination unit 502 may include at least one of:
A first block yield determining subunit 5021, configured to determine a first block yield of an unrepairable area in the functional module and a second block yield of a repairable area in the functional module under a condition that the repairable area is not repaired, based on the chip area, the defect density, and the first area ratio and the second area ratio of the functional module;
A second block yield determining subunit 5022, configured to determine, based on the chip area, the defect density, and the first area ratio and the second area ratio of the functional module, a first module yield of an unrepairable area in the functional module and a third module yield of a healable area in the functional module under the condition of being healed;
Correspondingly, the chip yield determining unit 503 includes at least one of the following:
A first total yield determining subunit 5031, configured to determine, based on the first module yield and the second module yield of each functional module, a first chip yield of the chip on the premise that the chip is not repaired by redundancy;
And a second total yield determining subunit 5032, configured to determine, based on the first module yield and the third module yield of each functional module, a second chip yield of the chip on the premise that the chip is repaired by redundancy.
In one possible implementation, the apparatus further includes: a second information obtaining unit, configured to obtain a proportion of qualified chips in a wafer carrying the chips and a fixed yield loss of the wafer;
The first total yield determining subunit is specifically configured to determine, based on a first module yield, a second module yield, the qualified chip proportion, and the fixed yield loss of each functional module, a first chip yield of the chip on the premise that the chip is not repaired by redundancy;
The second total yield determining subunit is specifically configured to determine, based on the first module yield, the third module yield, the qualified chip proportion, and the fixed yield loss of each functional module, a second chip yield of the chip on the premise that the chip is repaired by redundancy.
In yet another possible implementation manner, the first total yield determining subunit includes:
a first product determining subunit, configured to determine a product of a first module yield of each functional module in the chip, and obtain a first total yield of an unrepairable area in the chip;
A second product determining subunit, configured to determine a product of second module yields of the functional modules in the chip, to obtain a second total yield when the repairable area in the chip is not repaired;
a first chip yield determining subunit, configured to determine a product of the first total yield, the second total yield, the qualified chip proportion, and the fixed yield loss as a first chip yield of the chip on the premise that the chip is not repaired by redundancy;
the second total yield determination subunit includes:
a first product determining subunit, configured to determine a product of a first module yield of each functional module in the chip, and obtain a first total yield of an unrepairable area in the chip;
A third product determination subunit, configured to determine a product of the third module yields of the functional modules in the chip, to obtain a third total yield of the repairable area in the chip under the condition of being repaired;
And the second chip yield determining subunit is used for determining the product of the first total yield, the third total yield, the qualified chip proportion and the fixed yield loss as the second chip yield of the chip under the premise of repairing the chip by redundancy.
In yet another possible implementation, the apparatus further includes:
And the factor determining unit is used for determining the ratio of the third total yield to the first total yield as a yield improvement factor achieved by the chip through redundancy repair.
In still another possible implementation manner, when the module class of the functional module is the target class, the module parameter of the functional module obtained by the first information obtaining unit further includes: repairable proportion of repairable areas in the functional module can be repaired;
when determining the second module yield of the functional module, the first module yield determining subunit specifically combines the module types of the functional module, and determines the second module yield of the repairable area in the functional module under the condition of no repair based on the chip area, the defect density, the first area occupation ratio and the second area occupation ratio of the functional module;
When determining the third module yield of the functional module, the second module yield determining subunit specifically combines the module types of the functional module, and determines the third module yield of the repairable area in the functional module under the condition of being repaired based on the second module yield of the functional module and the repairable proportion.
In yet another possible implementation, the first block yield determination subunit includes:
A first classification yield determining subunit, configured to determine, if a module class of the functional module is the target class, a second module yield of a repairable area in the functional module under a condition that no repair is performed, based on the chip area, the defect density, and the first area ratio and the second area ratio of the functional module;
A second classification yield determining subunit, configured to determine, if the module class of the functional module is not the target class, a set reference value as a second module yield of a repairable area in the functional module under a condition that no repair is available;
the second block yield determination subunit includes:
a third classification yield determining subunit, configured to determine, if the module class of the functional module is the target class, a third module yield of a repairable area in the functional module under a repaired condition based on the second module yield of the functional module and the repairable proportion;
and the fourth classification yield determining subunit is used for determining the set reference value as the third module yield of the repairable area in the functional module under the condition of being repaired if the module category of the functional module is not the target category.
In yet another possible implementation, the apparatus further includes: a third information obtaining unit, configured to obtain a first effective area coefficient of the chip;
The module parameters of the functional module obtained by the first information obtaining unit further include: a second effective area coefficient of the functional module;
Correspondingly, when determining the first module yield, the first module yield determining subunit specifically includes: determining a first module yield of an unrepairable region in the functional module based on the chip area, the defect density, the first effective area coefficient, the first area occupation ratio, the second area occupation ratio and the second effective area coefficient of the functional module;
The first block yield determining subunit or the first classification yield determining subunit determines, based on the chip area, the defect density, and the first area ratio and the second area ratio of the functional module, a second module yield of the repairable area in the functional module under the condition of no repair, specifically:
And determining a second module yield of the repairable area in the functional module under the condition of no repair based on the chip area, the defect density, the first effective area coefficient, the first area occupation ratio, the second area occupation ratio and the second effective area coefficient of the functional module.
In yet another possible implementation manner, the third classification yield determining subunit includes:
a loss determination subunit, configured to determine, based on a second module yield of a repairable area in the functional module in a case where there is no repair, a repairable yield loss of the repairable area in the case where there is no repair;
A product determination subunit configured to determine a target product of the repairable yield loss and the repairable ratio;
And the repairable yield determining subunit is used for determining the sum of the target product and the second module yield of the functional module as a third module yield of the repairable area in the functional module under the condition of being repaired.
In yet another aspect, the present application further provides an electronic device, as shown in fig. 7, which shows a schematic structural diagram of the electronic device, where the electronic device may be any type of electronic device, and the electronic device includes at least a processor 701 and a memory 702;
Wherein the processor 701 is configured to perform the method for predicting chip yield in any one of the embodiments above.
The memory 702 is used to store programs needed for the processor to perform operations.
It is understood that the electronic device may further comprise a display unit 703 and an input unit 704.
Of course, the electronic device may also have more or fewer components than in fig. 7, without limitation.
In another aspect, the present application also provides a computer readable storage medium having stored therein at least one instruction, at least one program, a set of codes, or a set of instructions, the at least one instruction, the at least one program, the set of codes, or the set of instructions being loaded and executed by a processor to implement a method for predicting chip yield as described in any one of the embodiments above.
The present application also proposes a computer program comprising computer instructions stored in a computer readable storage medium. The computer program, when run on an electronic device, is configured to perform the method of predicting chip yield in any one of the embodiments above.
It is to be understood that, in the present application, the terms "first," "second," "third," "fourth," and the like in the description and in the claims and the above figures, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the application described herein may be implemented in other sequences than those illustrated herein.
It should be noted that, in the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described as different from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other. Meanwhile, the features described in the embodiments in the present specification may be replaced with or combined with each other to enable those skilled in the art to make or use the present application. For the apparatus class embodiments, the description is relatively simple as it is substantially similar to the method embodiments, and reference is made to the description of the method embodiments for relevant points.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
The foregoing is merely a preferred embodiment of the present application and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present application, which are intended to be comprehended within the scope of the present application.

Claims (10)

1. A method of predicting chip yield, comprising:
obtaining defect density, chip area and module parameters of each functional module in the chip, wherein the module parameters of the functional module at least comprise: a first area ratio of the functional module in the chip;
determining a module yield of the functional module based on the chip area, the defect density, and the first area ratio of the functional module;
And determining the chip yield of the chip based on the module yield of each functional module.
2. The method for predicting chip yield according to claim 1, wherein the module parameters of the functional module further comprise: a second area ratio of the repairable area in the functional module;
The determining the module yield of the functional module based on the chip area, the defect density and the first area ratio of the functional module includes at least one of:
Determining a first module yield of an unrepairable region in the functional module and a second module yield of a repairable region in the functional module under the condition of no repair based on the chip area, the defect density and the first area ratio and the second area ratio of the functional module;
Determining a first module yield of an unrepairable region in the functional module and a third module yield of the repairable region in the functional module under the condition of being repaired based on the chip area, the defect density and the first area occupation ratio and the second area occupation ratio of the functional module;
The determining the chip yield of the chip based on the module yield of each functional module comprises at least one of the following steps:
Determining the first chip yield of the chip on the premise of not repairing by redundancy based on the first module yield and the second module yield of each functional module;
and determining the second chip yield of the chip on the premise of repairing by redundancy based on the first module yield and the third module yield of each functional module.
3. The method of predicting chip yield of claim 2, further comprising: obtaining a qualified chip proportion in a wafer bearing the chips and a fixed yield loss of the wafer;
The determining the first chip yield of the chip on the premise of not repairing by redundancy based on the first module yield and the second module yield of each functional module comprises the following steps:
Determining the first chip yield of the chip on the premise of not repairing by redundancy on the basis of the first module yield, the second module yield, the qualified chip proportion and the fixed yield loss of each functional module;
The determining, based on the first module yield and the third module yield of each functional module, the second chip yield of the chip on the premise of repairing by redundancy includes:
And determining the second chip yield of the chip on the premise of repairing by redundancy on the basis of the first module yield, the third module yield, the qualified chip proportion and the fixed yield loss of each functional module.
4. The method for predicting chip yield according to claim 3, wherein determining the first chip yield of the chip without redundancy repair based on the first module yield, the second module yield, the qualified chip ratio, and the fixed yield loss of each functional module comprises:
determining the product of the first module yield of each functional module in the chip to obtain the first total yield of the unrepairable area in the chip;
determining the product of the second module yield of each functional module in the chip to obtain a second total yield under the condition that the repairable area in the chip is not repaired;
determining the product of the first total yield, the second total yield, the qualified chip proportion and the fixed yield loss as the first chip yield of the chip on the premise that the chip is not repaired by redundancy;
The determining the second chip yield of the chip on the premise of repairing by redundancy based on the first module yield, the third module yield, the qualified chip proportion and the fixed yield loss of each functional module comprises the following steps:
determining the product of the first module yield of each functional module in the chip to obtain the first total yield of the unrepairable area in the chip;
Determining the product of the third module yield of each functional module in the chip to obtain the third total yield of the repairable area in the chip under the condition of being repaired;
And determining the product of the first total yield, the third total yield, the qualified chip proportion and the fixed yield loss as the second chip yield of the chip on the premise of repairing the chip by redundancy.
5. The method of predicting chip yield of claim 4, further comprising:
and determining the ratio of the third total yield to the first total yield as a yield improvement factor achieved by the chip through redundancy repair.
6. The method for predicting chip yield according to claim 2, wherein when the module class of the functional module is a target class, the module parameters of the functional module further include: repairable proportion of repairable areas in the functional module can be repaired;
determining a second module yield of the functional module, comprising:
Combining module types of the functional modules, and determining a second module yield of a repairable area in the functional module under the condition of no repair based on the chip area, the defect density and the first area occupation ratio and the second area occupation ratio of the functional module;
Determining a third module yield of the functional module, comprising:
And combining the module types of the functional modules, and determining a third module yield of the repairable area in the functional module under the condition of being repaired based on the second module yield of the functional module and the repairable proportion.
7. The method for predicting chip yield according to claim 6, wherein the determining, in combination with the module class of the functional module, a second module yield of a repairable area in the functional module without repair based on the chip area, the defect density, and the first area ratio and the second area ratio of the functional module, comprises:
If the module type of the functional module is the target type, determining a second module yield of the repairable area in the functional module under the condition of no repair based on the chip area, the defect density and the first area occupation ratio and the second area occupation ratio of the functional module;
If the module category of the functional module is not the target category, determining a set reference value as a second module yield of the repairable area in the functional module under the condition of no repair;
The determining, based on the second module yield and the repairable proportion of the functional module, a third module yield of the repairable area in the functional module under the condition of being repaired, including:
if the module category of the functional module is the target category, determining a third module yield of the repairable area in the functional module under the condition of being repaired based on the second module yield of the functional module and the repairable proportion;
And if the module category of the functional module is not the target category, determining the set reference value as a third module yield of the repairable area in the functional module under the condition of being repaired.
8. The method of predicting chip yield according to claim 2, 6 or 7, further comprising: obtaining a first effective area coefficient of the chip;
The module parameters of the functional module further include: a second effective area coefficient of the functional module;
Determining a first module yield of the functional module, comprising:
Determining a first module yield of an unrepairable region in the functional module based on the chip area, the defect density, the first effective area coefficient, the first area occupation ratio, the second area occupation ratio and the second effective area coefficient of the functional module;
when determining the second module yield of the repairable area in the functional module under the condition of no repair based on the chip area, the defect density and the first area occupation ratio and the second area occupation ratio of the functional module, the method specifically comprises the following steps:
And determining a second module yield of the repairable area in the functional module under the condition of no repair based on the chip area, the defect density, the first effective area coefficient, the first area occupation ratio, the second area occupation ratio and the second effective area coefficient of the functional module.
9. The method for predicting a chip yield according to claim 6, wherein determining a third module yield of a repairable area in the functional module in a repaired condition based on the second module yield of the functional module and the repairable ratio comprises:
Determining repairable yield loss of the repairable area under the condition of no repair based on the second module yield of the repairable area under the condition of no repair in the functional module;
determining a target product of the repairable yield loss and the repairable ratio;
and determining the sum of the target product and the second module yield of the functional module as a third module yield of the repairable area in the functional module under the condition of being repaired.
10. An apparatus for predicting chip yield, comprising:
The first information obtaining unit is used for obtaining defect density, chip area and module parameters of each functional module in the chip, wherein the module parameters of the functional modules at least comprise: a first area ratio of the functional module in the chip;
A module yield determining unit, configured to determine a module yield of the functional module based on the chip area, the defect density, and the first area occupation ratio of the functional module;
And the chip yield determining unit is used for determining the chip yield of the chip based on the module yield of each functional module.
CN202410636547.4A 2024-05-21 2024-05-21 Method and device for predicting chip yield Pending CN118504758A (en)

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