CN118444864A - Signal extender and signal transmission method - Google Patents

Abstract

A signal extender and a signal transmission method for transmitting information by connecting a first device and a second device. The signal extender at least comprises a first terminal, a second terminal, a channel switch and a driving unit. The first end point is connected with the first device, and the second end point is connected with the second device. The channel switcher is connected with the first endpoint and can select one of the first channel or the second channel to be connected with the first endpoint and the second endpoint according to a switching signal. The driving unit is connected to the second channel, and can generate a second electronic signal transmitted on the second channel according to a first electronic signal provided by the second device when the second channel is selected to be connected with the first end point and the second end point. The second channel transmits the second electronic signal to the first device, and the reference voltage of the second electronic signal does not exceed a preset value.

Description

Signal extender and signal transmission method

Technical Field

The present application relates to a signal extender, and more particularly to a signal transmission method capable of correcting a signal level in the signal extender.

Background technique

In general computer control centers, the monitor and the computer room are often separated. The monitor and the host need to be connected through signal extension products such as extenders to enhance signal transmission. Among the transmission signals, there is a pair of display data channel (DDC) signals responsible for transmitting the best resolution data signal (EDID) that the monitor can use and the image encryption data signal (HDCP) to ensure that users get the best image quality.

FIG. 1 is a schematic diagram of a conventional first device 110 and a second device 120 connected via a display data channel (DDC). The first device 110 has a first interface P1, and the second device 120 has a second interface P2. The first interface P1 and the second interface P2 can be connected by a data line to establish a DDC channel. In order to transmit data signals, the first device 110 and the second device 120 include a set of transceivers, namely, a first receiver 112, a first transmitter 114, a second receiver 122 and a second transmitter 124. Generally speaking, electronic signals are transmitted in a way of current or voltage changes. When the second transmitter 124 in the second device 120 wants to transmit data to the first device 110, the second transmitter 124 turns on or off the transistor Q2 in the second device 120 according to the logic value of 1 or 0 in the data, so that a current _IL is generated on the DDC line flowing from the first interface P1 to the second interface P2, and finally pulled down to the ground by the transistor Q2. Thereby, the first receiver 112 in the first device 110 can read the voltage level on the first interface P1 to determine whether the data value transmitted by the second device 120 is 0 or 1.

In contrast, the first transmitter 114 in the first device 110 also transmits data to the second receiver 122 in the second device 120 through the transistor Q1. The detailed principle will not be repeated.

In other words, the DDC channel uses the open drain circuit (Open Drain) of the chip-level bus (I2C Bus) to transmit data between systems. However, the open drain circuit has the problem of being unable to extend the transmission distance and being unable to cascade, which can easily cause the circuit equivalent internal resistance to be too high, resulting in the I2C low-level reference voltage to be too high, that is, the logic low voltage used to represent bit 0 is higher than the judgment threshold. As a result, the judgment will fail and the screen cannot be displayed.

For example, there is a line resistance _RL on the DDC channel between the first interface P1 and the second interface P2. The line resistance _RL is a concept of equivalent resistance, which summarizes various line losses, analog switching circuit resistance, printed circuit board oxidation attenuation, or integrated circuit internal load impedance, second device resistance _RB , etc. that occur on the DDC. Therefore, when the second transmitter 124 of the second device 120 pulls down the voltage on the DDC channel, for the first receiver 112, the voltage value read on the first interface P1 is roughly converted to:

V = _RL / ( _RL + _RA )

Where _RA is the first device internal resistance. When the DDC channel is very long or an extender is connected in series, the line internal resistance _RL value is likely to increase. According to the above formula, when the line internal resistance _RL ratio is too large, the logic low voltage representing bit 0 will be higher than the readable threshold value, affecting the connection function of the DDC channel.

In view of this, an improved signal extender and signal transmission method are yet to be developed.

Summary of the invention

The embodiment of the present application proposes a signal extender that can solve the problem of voltage level shift of traditional signals. The signal extender can be used to connect a first device and a second device to transmit information, and at least includes a first endpoint, a second endpoint, a channel switch, and a driving unit. The first endpoint can be connected to the first device, and the second endpoint can be connected to the second device. The channel switch is connected to the first endpoint, and can select one of a first channel or a second channel to connect to the first endpoint and the second endpoint according to a switching signal. The driving unit is connected to the second channel, and can generate a second electronic signal transmitted on the second channel according to a first electronic signal provided by the second device when the second channel is selected to be connected to the first endpoint and the second endpoint. The second channel will transmit the second electronic signal to the first device, and the reference voltage of the second electronic signal does not exceed a preset value.

In a further embodiment, when the switching signal causes the channel switch to switch to the second channel, the driving unit pulls the current to the ground line and makes the reference voltage of the second electronic signal not higher than the preset value.

In a further embodiment, the signal extender further comprises a direction determination unit connected between the first terminal and the channel switch for determining the direction of a current on the first terminal to generate the switching signal. When the direction of the current is flowing from the first device into the first terminal, the switching signal causes the channel switch to switch to the second channel.

In a further embodiment, the channel switch is connected to the first end point. The channel switch connects the first end point to the first channel or the second channel according to the switching signal to form a signal transmission channel between the first device and the second device. Specifically, the direction determination unit includes a comparator connected to different positions on the signal transmission channel to detect a potential difference. The direction determination unit can output the switching signal according to the potential difference so that the channel switch decides to use the first channel or the second channel.

In a further embodiment, the direction determination unit further includes a logic gate electrically coupled to the output end of the comparator and the first end point, for determining the direction of the current. When the direction of the current is flowing from the first device into the first end point, the direction determination unit makes the switching signal a high voltage signal, otherwise makes the switching signal a low voltage signal.

In a further embodiment, the driving unit may include a first transistor and a second transistor. The first transistor includes a first drain connected to the second channel and a voltage source, a first source connected to ground, and a first gate. The second transistor includes a second drain connected to the first gate and the voltage source, a second source connected to ground, and a second gate connected to the second terminal. When the channel switcher switches to use the second channel, the second gate receives the first electronic signal of the second device, so that the first transistor correspondingly pulls the current from the first device down to the first source to ground, and the first transistor generates a second electronic signal with a lower low level for the first device to read.

In a further embodiment, the signal extender may be a DDC channel extender, and the first electronic signal and the second electronic signal may be serial data link signals. The first device is a computer host, and the second device is a display.

Another embodiment of the present application is a signal transmission method implemented based on the above-mentioned signal extender, which can transmit information between a first device and a second device. First, according to a switching signal, one of a first channel or a second channel is selected to connect the first device and the second device in series. When the second channel is selected to be connected to the first terminal and the second terminal in the signal extender, a second electronic signal is generated according to a first electronic signal provided by the second device, and the second electronic signal is transmitted to the first device using the second channel; wherein the reference voltage of the second electronic signal does not exceed a preset value.

In a further embodiment, the switching signal is determined according to a direction of a current on the first terminal. When the direction of the current flows from the first device to the first terminal, the switching signal causes the channel switch to switch to the second channel.

In a further embodiment, when the switching signal selects to use the second channel, a driving unit is used to pull the current to the ground line, and the reference voltage of the second electronic signal is not higher than the preset value.

In summary, the signal extender proposed in the embodiment of the present application can solve the problem of conventional signal voltage level deviation. A direction determination unit is used to determine the direction of the current, and a driving unit is used to generate a second electronic signal with a correct reference voltage according to the first electronic signal, so that the first device can correctly receive the information to be transmitted by the second device.

BRIEF DESCRIPTION OF THE DRAWINGS

The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

FIG. 1 is a schematic diagram showing a conventional first device 110 and a second device 120 connected via a display data channel DDC.

FIG. 2 is a structural diagram of a signal extender 200 connected in series with a first device 110 and a second device 120 according to an embodiment of the present application.

FIG. 3 is a schematic diagram of the structure of a signal extender 200 according to an embodiment of the present application.

FIG. 4 is a specific circuit diagram of the direction determination unit 210 according to an embodiment of the present application.

FIG. 5 is a specific circuit diagram of the channel switch 220 according to an embodiment of the present application.

FIG. 6 is a specific circuit diagram of the driving unit 230 according to an embodiment of the present application.

FIG. 7 is a flow chart of a signal transmission method according to an embodiment of the present application.

FIG. 8 is a schematic diagram of signal levels according to an embodiment of the present application.

Detailed ways

The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

FIG2 is a schematic diagram of a signal extender 200 of an embodiment of the present application, which is connected in series with a first device 110 and a second device 120. The present application proposes a signal extender 200, which is connected in series between a first device 110 and a second device 120, so as to improve the signal quality of a DDC channel and solve the problems caused by conventional technologies. The signal extender 200 includes a first endpoint Pa and a second endpoint Pb at each end. The first endpoint Pa can be connected to a first interface P1 of the first device 110. The second endpoint Pb can be connected to a second interface P2 of the second device 120. Generally speaking, the first device 110 can be, but is not limited to, a computer host, and the second device 120 can be, but is not limited to, a display. The embodiment of the present application can also be applied to other occasions where a wired extender is used to transmit digital data.

3 is a schematic diagram of the structure of a signal extender 200 according to an embodiment of the present application. The signal extender 200 mainly includes three circuit units: a direction determination unit 210, a channel switch 220 and a driving unit 230.

The first terminal Pa can be connected to the first device 110, and the second terminal Pb can be connected to the second device 120. The channel switch 220 is connected to the first terminal Pa, and can select one of a first channel L1 or a second channel L2 to connect to the second terminal Pb according to a switching signal #S. More specifically, the first channel L1 is defined as the line segment extending from the first switching contact SW1 to the second terminal Pb, and the second channel L2 is defined as the line segment extending from the second switching contact SW2 to the third terminal Pc and then extending to the second terminal Pb through the driving unit 230. The channel switch 220 can select to connect the first terminal Pa to the first switching contact SW1 or the second switching contact SW2 according to the switching signal #S, thereby changing the data transmission path between the first device 110 and the second device 120.

The driving unit 230 is connected to the second channel L2. When the second channel L2 is selected to be connected to the first terminal Pa and the second terminal Pb, the driving unit 230 generates a second electronic signal ES2 transmitted on the second channel L2 according to a first electronic signal ES1 provided by the second device 120. The second channel L2 transmits the second electronic signal ES2 to the first device 110. In this embodiment, the data signal transmitted by the second device 120 using the first electronic signal ES1 will be copied into the second electronic signal ES2 and correctly transmitted to the first device 110. The signal quality of the second electronic signal ES2 is improved, that is, the reference voltage thereof will not exceed a preset value. For example, the bit values 0 and 1 in digital data are usually represented by the logic high potential and logic low potential of the electronic signal. The judgment criteria of the logic high potential and the logic low potential have preset ranges according to different applications. When the potential of the electronic signal is lower than a preset value representing the logic low potential, it can be judged as the bit value 0. The reference voltage of the electronic signal represents the lowest voltage that can be displayed during the transmission process. The first electronic signal ES1 output by the second device 120 often has a problem of too high reference voltage due to the line internal resistance _RL , and is therefore a signal of poor quality. The driving unit 230 designed in this embodiment has better sensitivity, and can read correct data from the first electronic signal ES1 with poor signal quality, and convert it into a second electronic signal ES2 with better signal quality before transmitting it to the first device 110, thereby ensuring the correctness of data transmission.

In one embodiment, when the second device 120 wants to transmit data to the first device 110, the first electronic signal ES1 carrying the data is transmitted by the second device 120 to the driving unit 230 in the form of voltage changes. The driving unit 230 obtains the data to be transmitted in the first electronic signal ES1 according to the voltage change condition at the second terminal Pb. At the same time, the driving unit 230 can generate a second electronic signal ES2 carrying the same data according to the first electronic signal ES1, and transmit it to the first device 110. In this embodiment, since the current of the second electronic signal ES2 is independent of the transmission path of the first electronic signal ES1, the signal quality is not affected by the line internal resistance _RL .

When the switching signal #S causes the channel switch 220 to switch to the second channel L2, the driving unit 230 can transmit the second electronic signal ES2 to the first device 110. For example, when transmitting the second electronic signal ES2, the driving unit 230 can pull the current Ic from the first device 110 to the ground line, and make the reference voltage representing bit 0 in the second electronic signal ES2 not higher than the preset value. The first device 110 can read the data to be transmitted in the second electronic signal ES2 according to the voltage condition on the first interface P1. Although in the embodiment of Figure 3, the driving unit 230 pulls the current Ic to the ground line. However, in the implementation design, the current can also be pulled down to other circuits.

The function of the direction determination unit 210 is to determine the signal transmission direction or current direction between the first device and the second device to determine the channel to be switched. The specific implementation can be extended to several. For example, the direction determination unit 210 can be a microcontroller (MCU), an application specific chip (ASIC), or a programmable gate array (FPGA) of the signal extender 200, which has simple control, calculation, and judgment functions, and can execute program codes to achieve specific functions. Under this architecture design, the direction determination unit 210 can directly treat the voltage or current on the first terminal Pa as an input signal, and generate a corresponding switching signal #S after the internal pre-designed program calculation and judgment. A flash memory (not shown) can be implemented in the signal extender 200 to store firmware or a control program so that the direction determination unit 210 can execute accordingly. In another case, the control program can also be directly made into a logic circuit and integrated into the direction determination unit 210. Since there are many mature solutions based on microprocessors and programs to achieve control purposes, this embodiment will not be described in detail.

On the other hand, the direction determination unit 210 can be implemented with a specific circuit architecture. FIG4 is a specific circuit diagram of the direction determination unit 210 of an embodiment of the present application. The direction determination unit 210 is connected between the first terminal Pa and the channel switch 220, and can determine the direction of the current Ic on the first terminal Pa to generate a switching signal #S. The output switching signal #S can be used to enable the channel switch 220 to decide to use the first channel L1 or the second channel L2 to form a physical signal transmission channel extending from the first interface P1 to the second interface P2.

More specifically, the direction determination unit 210 may include a comparator 212. The comparator 212 has two input terminals, each connected to a different position on the signal transmission channel, such as between the first interface P1 and the first terminal Pa, to detect a potential difference #V. To further illustrate, a line resistor may be included between different positions on the signal transmission channel to which the comparator is connected, so that the current passing through generates a potential difference. For example, a resistor R _P may be configured between the first interface P1 and the first terminal Pa. When any current passes through, a potential difference #V is generated. The comparator 212 of the direction determination unit 210 may determine the switching signal #S accordingly according to the potential difference #V. For example, when the direction of the current Ic is to flow from the first device 110 into the first terminal Pa, the switching signal #S causes the channel switch 220 to switch to the second channel L2.

In this embodiment, the comparator 212 can be a commercially available amplifier chip driven by a voltage source _VDD . The two input terminals of the comparator 212 are respectively matched with corresponding resistors R1, R2, R3 and R4 to adjust the level of the input voltage. Considering the high-speed transmission frequency required by the DDC channel, the comparator 212 can select specifications that match the high-speed frequency. These specification values can be appropriately adjusted according to the actual design of the product, and therefore are not limited in the embodiments of the present application.

In a further embodiment, the DDC channel may be in a specific state, such as a state where no signal is transmitted. In this embodiment, the direction determination unit 210 is designed to determine whether the state of the DDC channel meets a specific condition, and when the specific condition is met, the DDC channel is switched to a preset state through the switching signal #S. For example, the direction determination unit 210 further includes a logic gate 214, which is electrically coupled to the output end of the comparator 212 and the first terminal Pa. The logic gate 214 performs an "AND" logic operation, the purpose of which is to determine the direction of the current Ic, that is, to further limit the selection of the second channel L2 by the switching signal #S only when the actual signal transmission is confirmed, otherwise the default state of the signal extender 200 is to use the first channel L1. Therefore, when the second channel L2 is selected, the direction of the current Ic is to flow from the first device to the first terminal Pa, and the direction determination unit 210 makes the switching signal #S a logic high signal. When the first channel L1 is selected, the switching signal #S is a logic low signal.

In a further embodiment, the direction determination unit includes a first inverter and a second inverter. A first inverter is connected to the first terminal Pa and the input terminal of the logic gate 214, and can transmit the inverted logic potential of the voltage of the first terminal Pa to the logic gate 214. The second inverter is connected to the output terminal of the logic gate 214, and can receive the switching signal and generate an inverted switching signal #S.

For example, the first inverter may be a transistor Q3, and the second inverter may be a transistor Q4. A transistor Q3 is connected to the first terminal Pa and the input terminal of the logic gate 214, and can transmit the inverted logic potential of the voltage of the first terminal Pa to the logic gate 214. The signal generated by the output terminal of the logic gate 214 is the switching signal #S, which is connected to the second switching contact SW2 in the channel switch 220. At the same time, the transistor Q4 is connected to the output terminal of the logic gate 214, and after inverting the switching signal #S, it is transmitted to the first switching contact SW1. In this embodiment, a metal oxide semiconductor field effect transistor (MOSFET) can be used to realize the inversion function of the transistor Q3 and the transistor Q4. Each inverter is connected to the voltage source _VDD , and is respectively matched with corresponding resistors R5 and R6 to adjust the output signal level. The values of these resistors can be appropriately adjusted according to the product specifications, and therefore are not limited in the embodiments of the present application.

In summary, one possible operation mode of the direction determination unit 210 of FIG. 4 is to determine the current direction according to the voltage difference between the first interface P1 and the first terminal Pa and generate a switching signal #S for the channel switch 220 to perform subsequent steps.

FIG5 is a specific circuit diagram of the channel switch 220 of an embodiment of the present application. The channel switch 220 includes two sets of switch circuits, a first switch circuit 223 and a second switch circuit 227, wherein the first switch circuit 223 is arranged between the first channel L1 and the first terminal Pa, and the second switch circuit 227 is arranged between the second channel L2 and the first terminal Pa. The first switch circuit 223 receives an inverted switching signal #S, and the second switch circuit 227 receives the switching signal #S. When the switching signal #S is a high potential signal, the first switch circuit 223 forms an open circuit, and the second switch circuit 227 forms a path, so that the second channel L2 is connected to the first terminal Pa. When the switching signal #S is a low potential signal, the second switch circuit 227 forms an open circuit, and the first switch circuit 223 forms a path, so that the first channel L1 is connected to the first terminal Pa.

Further, the first switch circuit 223 is composed of a transistor 222 and a transistor 224, and is used to determine the conduction state from the first terminal Pa to the second terminal Pb according to the voltage value on the first switching contact SW1. The second switch circuit 227 is composed of a transistor 226 and a transistor 228, and is used to determine the conduction state from the first terminal Pa to the third terminal Pc according to the voltage value on the second switching contact SW2. The third terminal Pc is connected to the driving unit 230 shown in FIG. 3. According to the design of the direction judgment unit 210 of FIG. 4, the voltage values of the first switching contact SW1 and the second switching contact SW2 are logically inverted. In other words, only one group of the first switch circuit 223 and the second switch circuit 227 will be turned on at a time, and the other group will be turned off. Therefore, the channel switch 220 realizes the function of selecting the first channel L1 or the second channel L2 to conduct the signal according to the switching signal #S.

The function of the channel switch 220 can be summarized as connecting the first terminal Pa to the first channel L1 or the second channel L2 according to the switching signal #S to form a signal transmission channel between the first device 110 and the second device 120. The first switch circuit 223 is connected between the first channel L1 and the first terminal Pa. The second switch circuit 227 is connected between the second channel L2 and the first terminal Pa. More specifically, the first switch circuit 223 receives the inverse of the switching signal #S from the first switching contact SW1, and the second switch circuit 227 receives the switching signal #S from the second switching contact SW2. When the switching signal #S is a high potential signal, the first switch circuit 223 forms an open circuit, and the second switch circuit 227 forms a path, so that the second channel L2 is connected to the first terminal Pa. Conversely, when the switching signal #S is a low potential signal, the second switch circuit 227 forms an open circuit, and the first switch circuit 223 forms a path, so that the first channel L1 is connected to the first terminal Pa.

In the present embodiment, the first switch circuit 223 is composed of the source S of the transistor 222 and the source S of the transistor 224 connected in series. At the same time, the gate G of the transistor 222 and the gate G of the transistor 224 are commonly connected to the first switching point SW1. Similarly, the second switch circuit 227 is composed of the transistor 226 and the transistor 228 connected in series with the source S. The gate G of the transistor 226 and the gate G of the transistor 228 are commonly connected to the second switching point SW2. In FIG5, the drain D of the transistor 222 and the drain D of the transistor 226 are commonly connected to the first terminal Pa, and the drain D of the transistor 224 and the drain D of the transistor 228 are respectively connected to the second terminal Pb and the third terminal Pc. In actual design, the first switch circuit 223 and the second switch circuit 227 may not be limited to the dual transistor series mode of FIG5, but may also be implemented by using a single or multiple transistors to implement the switch circuit. On the other hand, it can be understood that although the connection method of the source and the drain is specifically described in the above-mentioned transistors 222, 224, 226 and 228, in many types of transistors, the source and the drain have functional equivalent properties, that is, the coupling method of the source and the drain can be swapped.

FIG6 is a specific circuit diagram of the driving unit 230 of an embodiment of the present application. In addition to being grounded and connected to a voltage source V _DD , the driving unit 230 is also connected to a third terminal Pc and a second terminal Pb. The driving unit 230 may include a first transistor 232 and a second transistor 234. The first transistor 232 includes a first drain D1 coupled to the second channel L2 and a voltage source V _DD through the third terminal Pc, a first source S1 connected to the ground, and a first gate G1. A resistor R7 may be included between the first drain D1 and the voltage source V _DD for adjusting the voltage and current. The second transistor 234 includes a second drain D2 connected to the first gate G1. The second drain D2 is also connected to the voltage source V _DD through a resistor R8. The second source S2 is grounded, and the second gate G2 is connected to the second terminal Pb. When the channel switch 220 switches to use the second channel L2, the second gate G2 receives the first electronic signal ES1 of the second device 120 through the second terminal Pb, so that the first transistor 232 correspondingly pulls the current Ic from the first device 110 to the first source S1 to ground, and the driving unit 230 generates the second electronic signal ES2 for the first device 110 to read. More specifically, when the second device 120 transmits data through the first electronic signal ES1 with poor signal quality, the second transistor 234 of the driving unit 230 is turned on or off as the voltage on the second terminal Pb changes, thereby causing the first gate G1 of the first transistor to be turned on or off by the voltage change of the second drain D2 of the second transistor 234, and then causing the first drain D1 of the first transistor 232 to generate the second electronic signal ES2. The design of the driving unit 230 allows the first device 110 to read the second electronic signal ES2 without being affected by the line internal resistance _RL . Since the first transistor 232 and the second transistor 234 in the driving unit 230 must be responsible for correctly acquiring data from the first electronic signal ES1 with poor signal quality, the configuration parameters of the first transistor 232 and the second transistor 234 can be particularly optimized to achieve better implementation effects.

It is understandable that the first electronic signal ES1 received by the driving unit 230 from the second terminal Pb, and the second electronic signal ES2 output from the third terminal Pc, are actually represented by continuous voltage or current waveform changes to represent the transmitted data. Therefore, the form of expression in the signal transmission process is not limited to voltage or current, but can also be a series of transformation combinations of voltage and current. In this embodiment, the first transistor 232 and the second transistor 234 can also be implemented by commercially available transistors, such as MOSFET. Considering the demand for high-speed transmission, the model specifications can be changed according to demand and are not limited to the present application.

FIG. 7 is a flow chart of a signal transmission method according to an embodiment of the present application. The signal transmission method implemented in the signal extender 200 proposed in the present application can be summarized as the following steps to transmit information between a first device 110 and a second device 120. First, in step 701, the signal extender 200 is started. In step 703, in the absence of a signal or in a non-transmission state, the first channel L1 is preset to be turned on to transmit an electronic signal. In the present application, the electronic signal can be a serial data line signal (SDA) that complies with the DDC specification. In step 705, the direction determination unit 210 in the signal extender 200 detects the direction of the current on the transmission line. In step 707, it is determined whether the current flows from the first device 110 to the second device 120. If not, the state of step 703 is maintained, and the first device 110 and the second device 120 are connected in series using the first channel L1.

In contrast, if it is determined that the current flows from the first device 110 to the second device 120, step 709 is performed to switch to the second channel L2, and the driving unit 230 is enabled to transmit the electronic signal to the first device 110. More specifically, when the second channel L2 is selected to be connected to the first terminal Pa and the second terminal Pb in the signal extender, a second electronic signal ES2 is generated according to a first electronic signal ES1 provided by the second device 120, and the second electronic signal ES2 is transmitted to the first device 110 using the second channel L2. In this embodiment, the data content substantially transmitted by the second electronic signal ES2 is the same as that of the first electronic signal ES1, but because the current paths are isolated from each other, the line internal resistance _RL in the original channel will not affect the first device 110 from reading the second electronic signal ES2.

FIG8 is a schematic diagram of signal levels of an embodiment of the present application. In a conventional signal extender, due to the existence of the line internal resistance _RL , the reference voltage of the transmitted first electronic signal ES1, i.e., the voltage SL1 used to represent the bit value 0, is often higher than the preset judgment level VL of the logic low potential, so that the receiving end cannot read the value 0. The method proposed in the present application can correctly read the first electronic signal ES1 and generate the second electronic signal ES2 with the correct logic potential accordingly. The correct logic potential means that the voltage SH representing the bit value 1 is higher than the preset judgment level VH of the logic high potential, and the voltage SL2 representing the bit value 0 will not exceed the preset judgment level VL of the logic low potential. The advantage of this embodiment is that the first electronic signal ES1 is replaced by the second electronic signal ES2 with improved quality and transmitted to the first device 110, so that the data can be smoothly transmitted and interpreted by the first device 110. The above-mentioned high potential judgment level VH and low potential judgment level VL are common preset values in digital circuits, so the actual range is not within the scope of the embodiment of the present application. For example, the preset determination level VH of the logic high voltage may be 1.0V, and the preset determination level VL of the low voltage may be 0.6V.

The embodiment of the present application takes the DDC channel extender as an example, the first electronic signal ES1 and the second electronic signal ES2 can be the serial data link signal SDA. However, the same design can also be applied to signal transmission extenders of other specifications, such as high-definition multimedia interface HDMI or display port DP.

In summary, the signal extender proposed in the embodiment of the present application can solve the problem of conventional signal voltage level shift. A direction determination unit 210 is used to determine the current direction, and a driving unit 230 is used to generate a second electronic signal ES2 with a correct reference voltage according to the first electronic signal ES1, so that the first device 110 can correctly receive the information to be transmitted by the second device 120. The signal extender of the present application can be implemented in a simple pure hardware manner without the intervention of firmware. It can be applied to any specification of DDC channel without compatibility issues.

It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims (10)

1. A signal extender for connecting a first device to a second device for communicating information, comprising:

a first endpoint for connecting the first device;

a second endpoint for connecting the second device;

the channel switcher is connected with the first endpoint, and selects one of the first channel or the second channel to be connected with the second endpoint according to a switching signal; and

The driving unit is connected to the second channel and is used for generating a second electronic signal according to the first electronic signal provided by the second device when the second channel is selected to be connected with the first end point and the second end point, wherein the second channel transmits the second electronic signal to the first device, and the reference voltage of the second electronic signal does not exceed a preset value.

2. The signal extender of claim 1, wherein when the switching signal causes the channel switch to selectively connect to the second channel, the driving unit pulls down the current from the first device toward ground, and the driving unit causes the reference voltage of the second electronic signal to not exceed the predetermined value.

3. The signal extender of claim 1, further comprising a direction determination unit coupled between the first terminal and the channel switch for determining a direction of a current on the first terminal to generate the switching signal, wherein the switching signal causes the channel switch to selectively connect to the second channel when the direction of the current flows from the first device into the first terminal.

4. The signal extender of claim 3, wherein the channel switch connects the first endpoint with the first channel or the second channel to form a signal transfer channel according to the switching signal;

the direction judging unit comprises a comparator connected to the signal transmission channel for detecting the potential difference; and

The direction judging unit outputs the switching signal according to the potential difference so that the channel switcher is connected with the first channel or the second channel.

5. The signal extender of claim 4, wherein:

The direction judging unit further comprises a logic gate electrically coupled to the output end of the comparator and the first endpoint for judging the direction of the current; and

The direction judging unit makes the switching signal be a high potential signal when the direction of the current flows from the first device to the first endpoint, and makes the switching signal be a low potential signal otherwise.

6. The signal extender of claim 1, wherein the drive unit comprises:

A first transistor including a first drain connected to the second channel and a voltage source, a first source connected to ground, and a first gate; and

A second transistor including a second drain connected to the first gate and the voltage source, a second source connected to ground, and a second gate connected to the second terminal; wherein:

When the channel switch is connected to the second channel, the second gate receives the first electronic signal of the second device, causes the first transistor to pull down the current from the first device to the first source to ground, and causes the first transistor to generate the second electronic signal for reading by the first device.

7. The signal extender of claim 1, wherein:

the signal extender is a DDC channel extender;

the first electronic signal and the second electronic signal are serial data link signals;

the first device is a host computer; and

The second device is a display.

8. A method of signal transmission for transmitting information between a first device and a second device, comprising:

according to the switching signal, a channel switcher selects one of a first channel or a second channel, and the first device and the second device are connected in series through the selected first channel or second channel;

generating a second electronic signal based on the first electronic signal provided by the second device when the second channel is selected; and

Transmitting the second electronic signal to the first device by the second channel, wherein the reference voltage of the second electronic signal does not exceed a preset value.

9. The signaling method of claim 8, further comprising:

Determining a direction of current flow between the first device and the second device to generate the switching signal; wherein the switching signal causes the channel switch to selectively connect to the second channel when the direction of the current is from the first device.

10. The signal transmission method according to claim 9, wherein when the switching signal selects the second channel, the driving unit pulls down the current to the ground, and the reference voltage of the second electronic signal is not higher than the preset value.