CN113744682A - Display chip and electronic equipment - Google Patents
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- CN113744682A CN113744682A CN202111039679.1A CN202111039679A CN113744682A CN 113744682 A CN113744682 A CN 113744682A CN 202111039679 A CN202111039679 A CN 202111039679A CN 113744682 A CN113744682 A CN 113744682A
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
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- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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Abstract
本申请公开了一种显示芯片及电子设备，该显示芯片包括：直通单元、图像处理单元和信号增强单元；直通单元连接于显示芯片的信号输入端与信号输出端之间，直通单元具有导通状态和断开状态；其中，直通单元处于导通状态时，用于将信号输入端的电信号传输至信号输出端；图像处理单元连接于信号输入端与信号输出端之间，图像处理单元具有导通状态和断开状态；其中，图像处理单元处于导通状态时，用于将信号输入端的电信号经图像处理后传输至信号输出端；信号增强单元设置于直通单元的电信号传输路径，和/或，信号增强单元设置于图像处理单元的电信号传输路径。
The present application discloses a display chip and an electronic device. The display chip includes: a pass-through unit, an image processing unit and a signal enhancement unit; the pass-through unit is connected between a signal input end and a signal output end of the display chip, and the pass-through unit has a conduction state and disconnected state; wherein, when the through unit is in the on state, it is used to transmit the electrical signal of the signal input end to the signal output end; the image processing unit is connected between the signal input end and the signal output end, and the image processing unit has a conductive On state and off state; wherein, when the image processing unit is in the on state, it is used to transmit the electrical signal of the signal input end to the signal output end after image processing; the signal enhancement unit is arranged on the electrical signal transmission path of the through unit, and /or, the signal enhancement unit is arranged on the electrical signal transmission path of the image processing unit.
Description
Technical Field
The application relates to the technical field of electronic products, in particular to a display chip and electronic equipment.
Background
At present, electronic devices such as mobile phones are equipped with a display chip, and the display chip can perform image processing on input image signals (i.e., electrical signals), and then output the image signals to a screen driving chip and perform image display through a screen. The display device can be specifically divided into an integrated display chip and an independent display chip, and the independent display chip can improve the smoothness of display and enhance the display color. The circuit of the display chip may be provided with a switch or other devices, and the display chip is in different operating states (i.e., different image processing is performed on the electrical signal) by switching the on/off states of the switch. However, in the working process of the display chip, due to the influence of parasitic capacitance/parasitic resistance/parasitic inductance and the like possibly existing in devices such as a switch and the like, an electric signal may be attenuated, so that the intensity of the electric signal output by the display chip is reduced, and even the screen driving chip cannot recognize the electric signal to influence the image display effect.
Disclosure of Invention
The embodiment of the application provides a display chip and electronic equipment to solve the problem that the current display chip has low output electric signal strength, and the screen driving chip can not be identified to influence the image display effect.
In order to solve the technical problem, the present application is implemented as follows:
in a first aspect, an embodiment of the present application provides a display chip, including:
the direct connection unit is connected between the signal input end and the signal output end of the display chip and has a conducting state and a disconnecting state; when the through unit is in a conducting state, the through unit is used for transmitting the electric signal of the signal input end to the signal output end;
an image processing unit connected between the signal input terminal and the signal output terminal, the image processing unit having an on state and an off state; when the image processing unit is in a conducting state, the image processing unit is used for transmitting the electric signal of the signal input end to the signal output end after image processing;
the signal enhancement unit is arranged on an electric signal transmission path of the direct connection unit, and/or the signal enhancement unit is arranged on an electric signal transmission path of the image processing unit.
In a second aspect, an embodiment of the present application further provides an electronic device, including the display chip as described in the first aspect above.
Therefore, in the above scheme of the application, the signal enhancement unit is arranged in the electrical signal transmission path of the through unit in the display chip and/or the electrical signal transmission path of the image processing unit to reinforce the electrical signal to be processed, the electrical signal in the processing process or the intensity of the electrical signal to be output, so that the problem that the intensity of the electrical signal is reduced due to attenuation of the electrical signal caused by parasitic capacitance/parasitic resistance/parasitic inductance and the like possibly existing in devices such as a switch and the like in the display chip, and even the image display effect is influenced due to the fact that the screen driving chip cannot identify the electrical signal is avoided.
Drawings
FIG. 1 is a schematic diagram of a display chip according to an embodiment of the present disclosure;
FIG. 2 is a second schematic diagram of a display chip according to an embodiment of the present application;
FIG. 3 is a third schematic diagram of a display chip according to an embodiment of the present application;
FIG. 4 shows a circuit diagram of an inverter according to an embodiment of the present application;
FIG. 5 is a schematic diagram showing waveforms of electrical signals at different nodes in a display chip according to an embodiment of the present application;
FIG. 6 shows a circuit diagram of a second inverter of an embodiment of the present application;
fig. 7 shows a fourth schematic diagram of a display chip according to an embodiment of the present application.
Detailed Description
Exemplary embodiments of the present application will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
As shown in fig. 1, an embodiment of the present application provides a display chip 10, including: a pass-through unit 11, an image processing unit 12 and a signal enhancement unit 13.
The pass-through unit 11 is connected between a signal input end and a signal output end of the display chip 10, and the pass-through unit 11 has a conducting state and a disconnecting state; when the pass-through unit 11 is in a conducting state, the pass-through unit is configured to transmit an electrical signal at the signal input end to the signal output end.
The image processing unit 12 is connected between the signal input end and the signal output end, and the image processing unit 12 has a conducting state and a disconnecting state; when the image processing unit 12 is in a conducting state, the image processing unit is configured to transmit the electrical signal of the signal input end to the signal output end after image processing.
The signal enhancement unit 13 is disposed in an electrical signal transmission path of the through unit 11, and/or the signal enhancement unit 13 is disposed in an electrical signal transmission path of the image processing unit 12.
For example: the display chip can obtain image content (i.e., electrical signals of an image) of the main control chip 20, such as an Application Processor (AP). The image content may be transmitted to the screen 30 (or called a display screen) for displaying through the pass-through unit 11 (or called a bypass), for example, the image content may be transmitted by using a Mobile Industry Processor Interface (MIPI) protocol. Alternatively, the image content may be processed by a frame complementing circuit, a color processing circuit, etc. of the image processing unit 12, and then transmitted to the screen 30 (or called as a display screen) for display.
The electrical signal transmission path of the signal enhancement unit 13 disposed in the through unit 11 may include, but is not limited to: the input end of the signal enhancement unit 13 is connected to the signal input end, and the output end of the signal enhancement unit 13 is respectively connected to the input end of the direct connection unit 11 and the input end of the image processing unit 12; or, an input end of the signal enhancement unit 13 is connected to an output end of the pass-through unit 11 and an output end of the image processing unit 12, respectively, and an output end of the signal enhancement unit 13 is connected to the signal output end; or, the input end of the signal enhancement unit 13 is connected to the signal input end and the input end of the image processing unit 12, respectively, and the output end of the signal enhancement unit 13 is connected to the input end of the through unit 11; or, an input end of the signal enhancement unit 13 is connected to an output end of the through unit 11, and an output end of the signal enhancement unit 13 is connected to the signal output end and an output end of the image processing unit 12.
The electrical signal transmission path of the signal enhancement unit 13 disposed in the image processing unit 12 may include, but is not limited to: the input end of the signal enhancement unit 13 is connected to the signal input end, and the output end of the signal enhancement unit 13 is respectively connected to the input end of the direct connection unit 11 and the input end of the image processing unit 12; or, an input end of the signal enhancement unit 13 is connected to an output end of the pass-through unit 11 and an output end of the image processing unit 12, respectively, and an output end of the signal enhancement unit 13 is connected to the signal output end; or, the input end of the signal enhancement unit 13 is connected to the signal input end and the input end of the through unit 11, respectively, and the output end of the signal enhancement unit 13 is connected to the input end of the image processing unit 12; or, an input end of the signal enhancement unit 13 is connected to an output end of the image processing unit 12, and an output end of the signal enhancement unit 13 is connected to an output end of the direct connection unit 11 and the signal output end, respectively; or the signal enhancement unit 13 may also be disposed at other positions in the image processing unit 12, and the like, and the embodiment of the present application is not limited thereto.
In the above scheme, the signal enhancement unit 13 is disposed in the electrical signal transmission path of the through unit 11 in the display chip 10 and/or the electrical signal transmission path of the image processing unit 12 to reinforce the electrical signal to be processed, the electrical signal in the processing process, or the intensity of the electrical signal to be output, so as to avoid the problem that the intensity of the electrical signal output by the display chip is reduced, and even the screen driving chip cannot identify and affect the image display effect, due to attenuation of the electrical signal caused by parasitic capacitance, parasitic resistance, parasitic inductance, and the like, which may exist in devices such as switches in the display chip 10.
As an implementation: as shown in fig. 2, the pass-through unit 11 includes: a first switch 111; the first switch 111 is connected between the signal input terminal and the signal output terminal.
When the first switch 111 is in a conducting state, the pass-through unit 11 is in a conducting state; when the first switch 111 is in the off state, the pass unit 11 is in the off state.
In other words, the signal input terminal of the display chip 10 is connected to the signal output terminal through the first switch 111, that is, the first switch 111 connected between the signal input terminal and the signal output terminal forms a through path of the display chip 10. For example: in the case that the image content acquired from the main control chip 20 does not need to be processed, the image processing unit 12 may be in a disconnected state, and the pass-through unit 11 may be in a connected state, so that the electrical signal input from the signal input terminal is subjected to signal enhancement processing by the signal enhancement unit 13 through the pass-through path, and then transmitted to the screen 30 through the signal output terminal for displaying.
The image processing unit 12 includes: a second switch 121, a first image processing circuit 122, and a third switch 123; the second switch 121, the first image processing circuit 122 and the third switch 123 are sequentially connected in series between the signal input end and the signal output end.
Wherein, when the second switch 121 and the third switch 123 are both in the on state, the image processing unit 12 is in the on state; when both the second switch 121 and the third switch 123 are in the off state, the image processing unit 12 is in the off state.
In other words, the second switch 121, the first image processing circuit 122, and the third switch 123, which are connected in order between the signal input terminal and the signal output terminal, i.e., the signal input terminal of the display chip 10 is connected to the signal output terminal through the second switch 121, the first image processing circuit 122, and the third switch 123, respectively, are formed as an image processing path of the display chip 10. For example: in the case that the image content acquired from the main control chip 20 needs to be processed, the image processing unit 12 may be in a conducting state, and the through unit 11 may be in a disconnecting state, so that the electrical signal input from the signal input end is transmitted to the screen 30 for display through the signal output end after being subjected to the image processing by the first image processing circuit 122 and the signal enhancement by the signal enhancement unit 13 through the image processing path.
Wherein the first switch 121 is configured to prevent an electrical signal from entering the first image processing circuit 122 when the pass-through unit 11 is turned on; the second switch 123 is used for preventing the electric signal transmitted to the signal transmission terminal from flowing back to the first image processing circuit 122.
Alternatively, the first image processing circuit 122 may include: a MIPI receiving circuit 1221, a frame complementing circuit 1222, a color processing circuit 1223, and a MIPI transmitting circuit 1224, which are connected in sequence between the second switch 121 and the third switch 123; the MIPI receiving circuit 1221 receives the image content acquired from the main control chip 20 and transmits the image content to the frame supplementing circuit 1222 for frame supplementing processing, the electrical signal subjected to frame supplementing processing by the frame supplementing circuit 1222 is transmitted to the color processing circuit 1223 for color processing, the electrical signal subjected to color processing by the color processing circuit 1223 is transmitted to the signal enhancement unit 13 by the MIPI transmitting circuit 1224, and the electrical signal subjected to signal enhancement processing by the signal enhancement unit 13 is output to the screen 30 for display by the output signal output end.
Preferably, an input end of the signal enhancement unit 13 is connected to an output end of the pass-through unit 11 and an output end of the image processing unit 12, respectively, and an output end of the signal enhancement unit 13 is connected to the signal output end.
In this embodiment, by disposing the signal enhancement unit 13 at the position of the signal output terminal of the display chip 10, when the image content acquired from the main control chip 20 does not need to be processed, the switch K1 can be controlled to be closed, and the switches K2 and K3 can be controlled to be opened, so that the image content can be transmitted to the screen 30 through the pass-through unit 11 and the signal enhancement unit 13 for displaying. Or, in the case that the image content acquired from the main control chip 20 needs to be processed, the switch K1 may be controlled to be opened, and the switches K2 and K3 may be controlled to be closed, so that the image content may be subjected to frame complementing processing, color processing, and the like by the image processing unit 12, and then transmitted to the screen 30 for display by the signal enhancing unit 13.
Therefore, the display chip 10, whether in the through path or the image processing path, can enable the electrical signal input to the display chip 10 to be transmitted to the screen 30 for display after being subjected to the signal enhancement processing of the signal enhancement unit 13, so as to ensure the signal intensity of the electrical signal output to the screen 30 through the display chip 10, avoid attenuation of the electrical signal due to parasitic capacitance/parasitic resistance/parasitic inductance and the like possibly existing in devices such as a switch and the like in the display chip 10, reduce the intensity of the electrical signal output by the display chip, thereby improving the quality of the output signal of the display chip 10, and being beneficial to improving the image display effect.
Optionally, the signal enhancement unit 13 may employ an amplifier or an inverter to improve signal strength.
For example: the signal enhancing unit 13 includes: an amplifier; optionally, the amplifier may amplify the attenuated signal by 1.1 times and 1.2 times. The amplifier may be provided in an electric signal transmission path of the through unit 11, and/or the amplifier may be further provided in an electric signal transmission path of the image processing unit 12. Wherein the number of the amplifiers may be one or more. When the number of the amplifiers is plural, the plural amplifiers may be sequentially connected in series to the electrical signal transmission path of the pass-through unit 11, and/or the electrical signal transmission path of the image processing unit 12; of course, a plurality of amplifiers may be alternately connected in series to the electrical signal transmission path of the through unit 11, and/or the electrical signal transmission path of the image processing unit 12, for example, one amplifier is connected in series to the signal input terminal, and another amplifier is connected in series to the signal output terminal, etc., which is not limited in this embodiment of the application.
Preferably, the input end of the amplifier is connected to the output end of the direct connection unit 11 and the output end of the image processing unit 12, and the output end of the amplifier is connected to the signal output end, so as to ensure that the electric signal passing through the display chip 10 is transmitted to the screen 30 for displaying after being subjected to the signal enhancement processing of the signal enhancement unit 13, thereby better ensuring the signal intensity of the electric signal output to the screen 30 through the display chip 10.
Another example is: as shown in fig. 3, the signal enhancing unit 13 includes: a first inverter 131 and a second inverter 132; the first inverter 131 and the second inverter 132 are sequentially connected in series to an electrical signal transmission path of the through unit 11, and/or the first inverter 131 and the second inverter 132 are sequentially connected in series to an electrical signal transmission path of the image processing unit 12.
For example: the input end of the signal enhancement unit 13 is connected to the output end of the direct connection unit 11 and the output end of the image processing unit 12, and when the output end of the signal enhancement unit 13 is connected to the signal output end, the input end of the first phase inverter 131 is connected to the output end of the direct connection unit 11 and the output end of the image processing unit 12, the output end of the first phase inverter 131 is connected to the input end of the second phase inverter 132, and the output end of the second phase inverter 132 is connected to the signal output end.
As shown in fig. 4, a circuit diagram of an inverter is given. Wherein, the starting voltage V of the PMOS tubeGS<0, the turn-on voltage V of the NMOS tubeGS>0. If the input end VIWhen the voltage is low (such as 0V), the load tube (PMOS tube) is conducted, the input tube (NMOS tube) is cut off, and the output voltage V isOClose to VDD. If input VIIf the voltage is high level (5V, for example), the input tube is conducted, the load tube is cut off, and the output voltage V isOClose to 0V. Therefore, by setting the power supply voltage of the inverter (if the power supply voltage of the inverter can be set according to the strength of the electric signal input by the signal input end), the inverter can restore the signal deformed to a certain degree to the original signal, and the signal strength of the output signal is improved under the condition that the signal is possibly attenuated in a longer transmission distance.
In this embodiment, the first inverter 131 may perform an inversion process on the electrical signal output from the through path or the image processing path to obtain an electrical signal with a phase reversed by 180 degrees, and the electrical signal may be subjected to an inversion process again by the second inverter 132 to obtain an electrical signal with enhanced signal strength and the same phase as the original signal (i.e., the electrical signal output from the through path or the image processing path). As shown in fig. 5, a is an original high-quality signal (i.e., an electrical signal input to the display chip 10), B is a signal that is severely attenuated after passing through a parasitic resistance/a parasitic capacitance/a parasitic inductance in the display chip 10, C is a signal modified by the first inverter 131, and D is a high-quality signal modified by the second inverter 132, and it can be seen from fig. 5 that the signal enhancement unit 13 has a good signal modification effect, so that the display chip 10 having the signal enhancement unit 13 can have a high signal output quality.
Optionally, as shown in fig. 6, the display chip 10 further includes: a first power supply circuit 14 and a second power supply circuit 15.
The first power supply circuit 14 is connected to the first power supply terminal of the second inverter 132, and the output voltage of the first power supply circuit 14 is adjustable; the second power supply circuit 15 is connected to the second power supply terminal of the second inverter 132, and the output voltage of the second power supply circuit 15 is adjustable.
Alternatively, the first power supply terminal of the second inverter 132 may be a source of a PMOS transistor in the second inverter 132; the second power supply terminal of the second inverter 132 may be a source of an NMOS transistor in the second inverter 132.
Alternatively, the voltage regulation of the first power supply circuit 14 and the second power supply circuit 15 may be: the output voltages of the first power supply circuit 14 and the second power supply circuit 15 are adjusted by adjusting the control signals of the switching tubes in the first power supply circuit 14 and the second power supply circuit 15, which is not specifically limited in the embodiment of the present application.
Alternatively, a first power supply terminal of the first inverter 132 is connected to the first power supply circuit 14, and a second power supply terminal of the first inverter 132 is connected to the second power supply circuit 15.
Alternatively, the first power supply terminal of the first inverter 132 may be a source of a PMOS transistor in the first inverter 132; the second power supply terminal of the first inverter 132 may be a source of an NMOS transistor in the first inverter 132.
In this embodiment, the output voltages of the first power supply circuit 14 and the second power supply circuit 15 may be adjusted based on the voltage of the electrical signal input by the signal input terminal of the display chip 10, so that the display chip 10 may be adapted to perform modification processing on electrical signals with different driving voltages to output signals with corresponding voltages.
Alternatively, the first power supply circuit 14 and the second power supply circuit 15 may be based on the existing power supply circuit in the display chip 10, so as to save development cost and avoid excessive occupation of the internal space of the chip by the newly added power supply circuit. Alternatively, a power supply circuit outside the display chip 10 is used to supply power to the first inverter 132 and the second inverter 132 in the display chip 10, and the embodiment of the present application is not limited thereto.
As another implementation: as shown in fig. 7, the pass-through unit 11 includes: a first switch 111; the first switch 111 is connected between the signal input terminal and the signal output terminal.
When the first switch 111 is in a conducting state, the pass-through unit 11 is in a conducting state; when the first switch 111 is in the off state, the pass unit 11 is in the off state.
In other words, the signal input terminal of the display chip 10 is connected to the signal output terminal through the first switch 111, that is, the first switch 111 connected between the signal input terminal and the signal output terminal forms a through path of the display chip 10. For example: in the case that the image content acquired from the main control chip 20 does not need to be processed, the image processing unit 12 may be in a disconnected state, and the pass-through unit 11 may be in a connected state, so that the electrical signal input from the signal input terminal is subjected to signal enhancement processing by the signal enhancement unit 13 through the pass-through path, and then transmitted to the screen 30 through the signal output terminal for displaying.
Optionally, the image processing unit 12 includes: a fourth switch 124 and a second image processing circuit 125; the fourth switch 124 and the second image processing circuit 125 are sequentially connected in series between the signal input terminal and the signal output terminal.
Wherein, when the fourth switch 124 is in the conducting state, the image processing unit 12 is in the conducting state; when the fourth switch 124 is in the off state, the image processing unit 12 is in the off state.
Optionally, an input end of the signal enhancement unit 13 is connected to an output end of the image processing unit 12, and an output end of the signal enhancement unit 13 is connected to an output end of the pass-through unit 11 and the signal output end, respectively. For example: the input end of the signal enhancement unit 13 is connected to the output end of the second image processing circuit 125, and the output end of the signal enhancement unit 13 is connected to the output end of the direct connection unit 11 and the signal output end, respectively.
In this embodiment, the signal enhancement unit 13 is disposed at the output end of the second image processing circuit 125, and the design of the switch at the output end of the second image processing circuit 125 is eliminated, so that the attenuation before the electric signal passing through the through path is transmitted to the signal output end due to the influence of the parasitic capacitance/parasitic resistance/parasitic inductance of the switch can be reduced, that is, the scheme not only reduces the circuit parasitic parameters of the display chip to reduce the attenuation suffered by the signal, but also further improves the signal output quality through the signal enhancement unit 13.
Optionally, the signal enhancement unit 13 includes: a first inverter 131 and a second inverter 132; the first inverter 131 and the second inverter 132 are sequentially connected in series to an electrical signal transmission path of the through unit 11, and/or the first inverter 131 and the second inverter 132 are sequentially connected in series to an electrical signal transmission path of the image processing unit 12.
For example: the input end of the signal enhancement unit 13 is connected to the output end of the image processing unit 12, the output end of the signal enhancement unit 13 is respectively connected to the output end of the direct connection unit 11 and the signal output end, the input end of the first phase inverter 131 is connected to the output end of the image processing unit 12, the output end of the first phase inverter 131 is connected to the input end of the second phase inverter 132, and the output end of the second phase inverter 132 is respectively connected to the output end of the direct connection unit 11 and the signal output end.
In this embodiment, the first inverter 131 may perform an inversion process on the electrical signal output from the image processing path to obtain an electrical signal with a phase reversed by 180 degrees, and the electrical signal is subjected to an inversion process again by the second inverter 132 to obtain an electrical signal with enhanced signal strength and the same phase as the original signal (i.e., the electrical signal output from the through path or the image processing path). The signal enhancement unit 13 can perform a better signal correction function on the signal to be output, and the display chip 10 with the signal enhancement unit 13 can have higher signal output quality.
Wherein the fourth switch 124 is configured to prevent an electrical signal from entering the second image processing circuit 125 when the pass-through unit 11 is turned on; the first inverter 131 and the second inverter 132 in the signal enhancement unit 13 may also be used to prevent the electric signal transmitted to the signal transmission terminal from flowing back to the second image processing circuit 125.
Alternatively, the second image processing circuit 125 may include: a MIPI receiving circuit 1251, a frame complementing circuit 1252, a color processing circuit 1253, and a MIPI transmitting circuit 1254, which are connected in sequence between the fourth switch 124 and the signal enhancing unit 13; the MIPI receiving circuit 1251 receives image content acquired from the main control chip 20 and transmits the image content to the frame supplementing circuit 1252 for frame supplementing processing, the electrical signal subjected to frame supplementing processing by the frame supplementing circuit 1252 is transmitted to the color processing circuit 1253 for color processing, the electrical signal subjected to color processing by the color processing circuit 1253 is transmitted to the signal enhancing unit 13 by the MIPI transmitting circuit 1254, and the electrical signal subjected to signal enhancing processing by the signal enhancing unit 13 is output to the screen 30 for display by the output signal output end. In this way, before the electrical signal passing through the image processing path is sent to the signal output end by the MIPI transmitting circuit 1254, signal correction and reinforcement are performed by the signal enhancing unit 13 including the first inverter 131 and the second inverter 132, and the influence of the circuit of the MIPI transmitting circuit 1254 can be isolated, parasitic parameters of the circuit can be reduced, and the display chip 10 having the signal enhancing unit 13 can be ensured to have high signal output quality.
In this embodiment, the signal enhancement unit 13 may be disposed at the output end of the image processing path, and when the image content acquired from the main control chip 20 does not need to be processed, the switch K1 may be controlled to be closed, and the switch K4 may be controlled to be opened, so that the image content may be transmitted to the screen 30 through the through unit 11 for displaying. Alternatively, in the case that the image content acquired from the main control chip 20 needs to be processed, the switch K1 may be controlled to be opened, and the switch K4 may be controlled to be closed, so that the image content may be subjected to frame complementing processing, color processing, and the like by the image processing unit 12, and then transmitted to the screen 30 for display by the signal enhancement unit 13. Therefore, the display chip 10 can ensure the signal strength of the electrical signal output to the screen 30 through the display chip 10 no matter in the through path or the image processing path, and avoid attenuation of the electrical signal due to parasitic capacitance/parasitic resistance/parasitic inductance and the like possibly existing in devices such as a switch and the like in the display chip 10, so that the strength of the electrical signal output by the display chip is reduced, thereby improving the quality of the output signal of the display chip 10 and being beneficial to improving the image display effect.
Optionally, the display chip 10 further includes: a first power supply circuit 14 and a second power supply circuit 15.
The first power supply circuit 14 is connected to the first power supply terminal of the second inverter 132, and the output voltage of the first power supply circuit 14 is adjustable; the second power supply circuit 15 is connected to the second power supply terminal of the second inverter 132, and the output voltage of the second power supply circuit 15 is adjustable.
Alternatively, the first power supply terminal of the second inverter 132 may be a source of a PMOS transistor in the second inverter 132; the second power supply terminal of the second inverter 132 may be a source of an NMOS transistor in the second inverter 132.
Alternatively, the voltage regulation of the first power supply circuit 14 and the second power supply circuit 15 may be: the output voltages of the first power supply circuit 14 and the second power supply circuit 15 are adjusted by adjusting the control signals of the switching tubes in the first power supply circuit 14 and the second power supply circuit 15, which is not specifically limited in the embodiment of the present application.
Alternatively, a first power supply terminal of the first inverter 132 is connected to the first power supply circuit 14, and a second power supply terminal of the first inverter 132 is connected to the second power supply circuit 15.
Alternatively, the first power supply terminal of the first inverter 132 may be a source of a PMOS transistor in the first inverter 132; the second power supply terminal of the first inverter 132 may be a source of an NMOS transistor in the first inverter 132.
In this embodiment, the output voltages of the first power supply circuit 14 and the second power supply circuit 15 may be adjusted based on the voltage of the electrical signal input by the signal input terminal of the display chip 10, so that the display chip 10 may be adapted to perform modification processing on electrical signals with different driving voltages to output signals with corresponding voltages.
Alternatively, the first power supply circuit 14 and the second power supply circuit 15 may be based on the existing power supply circuit in the display chip 10, so as to save development cost and avoid excessive occupation of the internal space of the chip by the newly added power supply circuit. Alternatively, a power supply circuit outside the display chip 10 is used to supply power to the first inverter 132 and the second inverter 132 in the display chip 10, and the embodiment of the present application is not limited thereto.
The embodiment of the invention also provides an electronic device, which comprises the display chip 10.
Optionally, the electronic device further comprises: a main board and a display screen (or called a screen); the display chip 10 is arranged on the mainboard, a signal input end of the display chip 10 is connected with the main control chip on the mainboard, and a signal output end of the display chip is connected with the display screen. That is, the display chip can be used as an independent display chip of electronic equipment such as a mobile phone and the like, so that the display fluency is improved, the display color is enhanced, and the better signal output quality can be ensured.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
While preferred embodiments of the present application have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the true scope of the embodiments of the application.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.
While the foregoing is directed to the preferred embodiment of the present application, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the principles of the disclosure and, therefore, the scope of the disclosure is to be defined by the appended claims.
Claims (12)
1. A display chip, comprising:
the direct connection unit is connected between the signal input end and the signal output end of the display chip and has a conducting state and a disconnecting state; when the through unit is in a conducting state, the through unit is used for transmitting the electric signal of the signal input end to the signal output end;
an image processing unit connected between the signal input terminal and the signal output terminal, the image processing unit having an on state and an off state; when the image processing unit is in a conducting state, the image processing unit is used for transmitting the electric signal of the signal input end to the signal output end after image processing;
the signal enhancement unit is arranged on an electric signal transmission path of the direct connection unit, and/or the signal enhancement unit is arranged on an electric signal transmission path of the image processing unit.
2. The display chip of claim 1, wherein the pass-through unit comprises: a first switch;
the first switch is connected between the signal input end and the signal output end; when the first switch is in a conducting state, the through unit is in a conducting state; when the first switch is in an off state, the pass-through unit is in an off state.
3. The display chip of claim 1, wherein the image processing unit comprises: a second switch, a first image processing circuit, and a third switch;
the second switch, the first image processing circuit and the third switch are sequentially connected in series between the signal input end and the signal output end; when the second switch and the third switch are both in a conducting state, the image processing unit is in a conducting state; when the second switch and the third switch are both in an off state, the image processing unit is in an off state.
4. The display chip of claim 1, wherein the image processing unit comprises: a fourth switch and a second image processing circuit;
the fourth switch and the second image processing circuit are sequentially connected in series between the signal input end and the signal output end; when the fourth switch is in a conducting state, the image processing unit is in a conducting state; and when the fourth switch is in an off state, the image processing unit is in the off state.
5. The display chip of claim 4, wherein an input terminal of the signal enhancement unit is connected to an output terminal of the image processing unit, and an output terminal of the signal enhancement unit is connected to an output terminal of the pass-through unit and the signal output terminal, respectively.
6. The display chip according to any one of claims 1 to 3, wherein an input terminal of the signal enhancement unit is connected to an output terminal of the pass-through unit and an output terminal of the image processing unit, respectively, and an output terminal of the signal enhancement unit is connected to the signal output terminal.
7. The display chip of any one of claims 1 to 3, wherein the signal enhancement unit comprises: an amplifier.
8. The display chip of any one of claims 1 to 5, wherein the signal enhancement unit comprises: a first inverter and a second inverter;
the first phase inverter and the second phase inverter are sequentially connected in series with an electrical signal transmission path of the through unit, and/or the first phase inverter and the second phase inverter are sequentially connected in series with an electrical signal transmission path of the image processing unit.
9. The display chip of claim 8, further comprising:
the first power supply circuit is connected with a first power supply end of the second phase inverter, and the output voltage of the first power supply circuit is adjustable;
and the second power supply circuit is connected with a second power supply end of the second phase inverter, and the output voltage of the second power supply circuit is adjustable.
10. The display chip of claim 9, wherein a first power supply terminal of the first inverter is connected to the first power supply circuit, and a second power supply terminal of the first inverter is connected to the second power supply circuit.
11. An electronic device characterized by comprising the display chip according to any one of claims 1 to 10.
12. The electronic device of claim 11, further comprising: a main board and a display screen;
the display chip set up in on the mainboard, just display chip's signal input part with main control chip on the mainboard is connected, display chip's signal output part with the display screen is connected.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111039679.1A CN113744682A (en) | 2021-09-06 | 2021-09-06 | Display chip and electronic equipment |
| PCT/CN2022/116521 WO2023030451A1 (en) | 2021-09-06 | 2022-09-01 | Display chip and electronic device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111039679.1A CN113744682A (en) | 2021-09-06 | 2021-09-06 | Display chip and electronic equipment |
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| CN113744682A true CN113744682A (en) | 2021-12-03 |
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| WO (1) | WO2023030451A1 (en) |
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| CN115237845A (en) * | 2022-07-28 | 2022-10-25 | 维沃移动通信有限公司 | Signal processing method, signal processing device and mobile equipment |
| WO2023030451A1 (en) * | 2021-09-06 | 2023-03-09 | 维沃移动通信有限公司 | Display chip and electronic device |
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| CN113744682A (en) * | 2021-09-06 | 2021-12-03 | 维沃移动通信有限公司 | Display chip and electronic equipment |
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| Publication number | Publication date |
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| WO2023030451A1 (en) | 2023-03-09 |
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Application publication date: 20211203 |