CN118073326B - A wafer cutting path structure and photomask - Google Patents

Abstract

The invention provides a dicing channel structure of a wafer and a photomask, comprising a dicing channel main body; the process detection area is arranged on the cutting channel main body, and a process detection pattern is arranged in the process detection area; and a density compensation region around the process detection region, wherein the density compensation region is provided with a density compensation pattern. The process detection area and the seal compensation area form a cutting channel pattern area, and the pattern density of the cutting channel pattern area is the same as that of the chip unit. The first pattern and the second pattern on the photomask can be transferred to the wafer to obtain the dicing channel structure of the wafer, and the measuring machine can accurately measure the size data of the chip units on the wafer based on the dicing channel structure, so that the real manufacturing process result is obtained.

Description

A wafer cutting path structure and photomask

Technical Field

The invention relates to the field of semiconductor devices, and in particular to a wafer cutting path structure and a photomask.

Background technique

Wafer measurement data is an important data reflecting the semiconductor process status. It is usually measured by a measuring machine to measure the test area of the wafer, thereby collecting measurement data such as the thickness of the film deposited on the wafer and the etching depth. However, due to the complexity of the wafer structure, the measuring machine is prone to inaccurate measurement data when measuring the size data of the chip unit on the wafer, resulting in the measurement data being unable to reflect the actual process results.

Summary of the invention

The purpose of the present invention is to provide a wafer cutting path structure and a photomask, wherein a first pattern and a second pattern on the photomask can be transferred to the wafer to obtain the wafer cutting path structure, and a measuring machine can accurately measure the size data of the chip unit on the wafer based on the cutting path structure, thereby obtaining a real process result.

To solve the above technical problems, the present invention is achieved through the following technical solutions:

As described above, the present invention provides a wafer dicing street structure, comprising:

A scribe line body is formed between two adjacent chip units of the wafer; and

A process detection area is provided on the cutting path body, and a process detection pattern is provided in the process detection area;

A density compensation area is provided on the cutting path body and is located around the process detection area, and the density compensation area is provided with a density compensation pattern;

The process detection area and the sealing compensation area form a cutting path graphic area, the graphic density of the cutting path graphic area is greater than the graphic density of the process detection area, and the graphic density of the cutting path graphic area is the same as the graphic density of the chip unit.

In one embodiment of the present invention, a plurality of the process inspection patterns are provided, and the plurality of the process inspection patterns are arranged equidistantly along the length direction of the cutting road body.

In one embodiment of the present invention, a plurality of density compensation patterns are provided, and the plurality of density compensation patterns are equidistantly distributed on both sides of the process inspection pattern.

In one embodiment of the present invention, the distance between two adjacent density compensation patterns is expressed as D, and 3 μm≤D≤5 μm.

In one embodiment of the present invention, the distance between two adjacent process inspection patterns is expressed as T, and 3 μm≤T≤5 μm.

In one embodiment of the present invention, the process inspection pattern is a closed pattern formed by connecting a plurality of inspection line segments end to end, and the length of the inspection line segment is represented by S, where 35 μm≤S≤60 μm.

In one embodiment of the present invention, the density compensation pattern is a closed pattern formed by connecting a plurality of compensation line segments end to end, and the length of the compensation line segment is represented by L, 2 μm≤L≤20 μm.

In one embodiment of the present invention, the process detection pattern is a rectangle, the density compensation pattern is a rectangle, and an inclination angle is formed between the density compensation pattern and the length direction of the cutting path body. The angle of the inclination angle is represented by A, 20°≤A≤80°.

In one embodiment of the present invention, a groove is etched along the thickness direction of the cutting path body at the density compensation pattern, the cross section of the groove is consistent with the density compensation pattern, and the ratio of the depth of the groove to the width of the groove is expressed as B, 18≤B≤22.

The present invention further provides a photomask, on which a first pattern having the same structure as the density compensation pattern and a second pattern having the same structure as the process detection pattern are arranged.

As described above, the present invention provides a wafer cutting path structure and a photomask. The first pattern and the second pattern on the photomask can be transferred to the wafer to obtain the wafer cutting path structure. The measuring machine can accurately measure the size data of the chip unit on the wafer based on the cutting path structure, thereby obtaining the real process results.

Of course, any product implementing the present invention does not necessarily need to achieve all of the above-mentioned advantages at the same time.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for describing the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

FIG. 1 is an exemplary structure of a cutting path structure according to an embodiment of the present invention;

FIG2 is a structure of a wafer in one embodiment of the present invention;

FIG3 is another exemplary structure of a cutting path structure according to an embodiment of the present invention;

FIG. 4 is a structural diagram of a measuring machine according to an embodiment of the present invention.

In the figure: 10, measuring machine; 20, wafer; 30, chip unit; 40, cutting path body; 41, cutting path graphic area; 42, process inspection area; 43, density compensation area.

Detailed ways

The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the conditions under which the present invention can be implemented, so they have no substantial technical significance. Any modification of the structure, change of the proportion relationship or adjustment of the size shall fall within the scope of the technical content disclosed by the present invention without affecting the effects and purposes that can be achieved by the present invention.

Please refer to FIG. 1, which is a cutting path structure of a wafer provided by the present invention. The cutting path structure can cooperate with a wafer measuring machine 10 to measure the size of a chip unit 30 on a wafer 20, thereby accurately measuring the size data of the chip unit 30 on the wafer 20 and obtaining a true process result. It should be noted that when a thin film deposition process is performed on the surface of the wafer 20, the wafer measuring machine 10 can be based on the above-mentioned cutting path structure to accurately measure the thickness of the thin film deposited on the chip unit 30 on the wafer 20 to obtain a true process result. When an etching process is performed on the surface of the wafer 20, the wafer measuring machine 10 can be based on the above-mentioned cutting path structure to accurately measure the depth of etching of the chip unit 30 on the wafer 20 to obtain a true process result.

Please refer to FIG. 1 . Specifically, the cut-way structure of the wafer 20 may be a pattern added on the cut-way, and the area where the pattern is set may be defined as a cut-way pattern area 41. The cut-way pattern area 41 may be used as a reference area to indicate the process result of the chip unit 30 on the wafer 20. When performing thin film deposition, the cut-way pattern area 41 and the chip unit 30 area on the wafer 20 may be deposited synchronously, so that the wafer measurement machine 10 can obtain the deposited film thickness of the chip unit 30 on the wafer 20 by measuring the film deposition thickness of the cut-way pattern area 41. Further, due to the different pattern densities in different areas on the wafer 20, a load effect is often generated in the thin film deposition or etching process, resulting in different film thicknesses or different etching depths in different areas. In the present application, the pattern of the cut-way pattern area 41 may increase the pattern density on the cut-way, so that the pattern density of the cut-way pattern area 41 is the same as the pattern density of the chip unit 30 on the wafer 20. Furthermore, when performing thin film deposition, the load effect caused by the difference in pattern density is greatly reduced, and the thickness of the thin film deposited in the cutting line pattern area 41 is also close to the thickness of the thin film deposited in the chip unit 30 area on the wafer 20. When performing etching, the load effect caused by the difference in pattern density is greatly reduced, and the etching depth of the cutting line pattern area 41 is also close to the etching depth of the chip unit 30 on the wafer 20.

Please refer to FIG. 1 and FIG. 4 . This cutting path graphic area 41 can also be used as an alignment mark for the wafer measuring machine 10. When the wafer measuring machine 10 measures the size of the wafer 20, the machine can align the cutting path graphic area 41 with the area to be measured, so that the measurement can be performed. Specifically, the wafer measuring machine 10 can store the marking pattern in advance. When measuring, the wafer measuring machine 10 can scan and identify the pattern of the cutting path graphic area 41. When the pattern of the cutting path graphic area 41 is consistent with the pre-stored marking pattern, the measuring end of the wafer measuring machine 10 can be aligned to the cutting path graphic area 41 for measurement. As a result, the measurement position of the wafer measuring machine 10 is more accurate, which improves the accuracy of the measurement result.

Referring to FIG. 1 and FIG. 2 , the cut street structure of the wafer 20 may include a cut street body 40 and a cut street pattern area 41. The wafer 20 may include a plurality of chip units 30, and the cut street body 40 is formed between two adjacent chip units 30, so that the plurality of chip units 30 may be isolated by the cut street body 40. The cut street pattern area 41 may include a process detection area 42 and a density compensation area 43. The process detection area 42 and the density compensation area 43 may be arranged on the cut street body 40, a process detection pattern may be arranged in the process detection area 42, and a density compensation pattern may be added in the density compensation area 43. In the process of the chip unit 30 on the wafer 20, the process detection pattern and the density compensation pattern may be operated synchronously, so that the process results at the process detection pattern and the density compensation pattern may be used as a reference for the process results of the chip unit 30. Furthermore, by setting the density compensation area 43 around the process detection area 42, the pattern density of the process detection area 42 can be increased, so that the pattern density of the cutting line pattern area 41 is consistent with the pattern density of the chip unit 30, and the load effect in the process of the wafer 20 is reduced, so that the process result of the cutting line pattern area 41 can be closer to the process result of the chip unit 30 on the wafer 20. Furthermore, when the wafer measurement machine 10 measures the cutting line pattern area 41, more realistic wafer process data can be obtained.

Please refer to FIG. 2 . It should be noted that the wafer 20 of the present invention may be composed of a plurality of chip units 30 and a cutting road body 40 . A plurality of chip units 30 are distributed in the main area of the wafer 20 , and a plurality of cutting road bodies 40 are staggeredly distributed between the plurality of chip units 30 in the horizontal or vertical direction, thereby separating the plurality of chip units 30 . The chip unit 30 may be rectangular or in other shapes, and the cutting road body 40 may be in a strip shape or in other shapes. The plurality of chip units 30 may occupy most of the area of the wafer 20 , and their surfaces have dense chip function patterns. The plurality of cutting road bodies 40 serve as separation areas, and the patterns on their surfaces are relatively sparse. If the wafer measurement machine 10 directly measures the deposition thickness or etching depth of the chip unit 30 , the measurement operation may easily affect the chip function due to the dense chip function patterns on the surface of the chip unit 30 . Based on the above-mentioned basic structure of the wafer, a cutting road pattern area 41 may be provided on the plurality of cutting road bodies 40 for measurement.

Please refer to FIG. 1 . There may be multiple process detection patterns in the cutting road graphic area 41 on the cutting road main body 40. After the cutting road graphic area 41 and the wafer chip unit 30 perform a film deposition operation synchronously, the wafer measurement machine 10 may measure the thickness of the deposited film at multiple process detection patterns. And obtain the optimal value through the thickness of the deposited film at multiple process detection patterns. The optimal value may be the average of the multiple deposited film thicknesses, or may be an accurate value obtained based on the multiple deposited film thicknesses by other methods. After the cutting road graphic area 41 and the wafer 20 chip unit 30 perform an etching operation synchronously, the wafer measurement machine 10 may measure the etching depth at multiple process detection patterns, and obtain the optimal value through the etching depth at multiple process detection patterns. The optimal value may be the average of the multiple etching depths, or may be an accurate value obtained based on the multiple etching depths by other methods. Furthermore, a plurality of process detection patterns can be arranged equidistantly along the length direction of the cutting road body 40. The equidistant arrangement can improve the density uniformity of the process detection patterns, so that the internal pattern density of the cutting road pattern area 41 is more consistent, so that the deposited film thickness or etching depth of the pattern in the cutting road pattern area 41 is more consistent. The accuracy of the final measurement data is improved. For example, when the width of the cutting road body 40 is 100μm, the spacing D between two adjacent process detection patterns can be set to 3μm≤D≤5μm. Of course, the spacing D between each two process detection patterns can also be set to other values, which can be adaptively designed based on the width of the cutting road body 40.

Please refer to FIG. 1 . The specific structure of the process detection pattern can be a closed pattern formed by connecting multiple detection line segments end to end, and the length of the detection line segment can be set based on the width of the cutting road body 40. For example, the width of the cutting road body 40 is 100 μm, and the length S of the detection line segment is adaptively set to 35 μm ≤ S ≤ 60 μm. When the number of the multiple detection line segments is four, the four detection line segments are connected end to end to form a rectangle. The width of the rectangle can be 50 μm, and the length of the rectangle can be 60 μm. Of course, the size of the rectangle can be adaptively designed based on the actual size of the cutting road body 40. Further, the specific structure of the process detection area 42 can be that a groove is formed by etching along the thickness direction of the cutting road body 40 at multiple process detection patterns. The cross section of the groove can be consistent with the process detection pattern. It should be noted that the depth of the groove formed at multiple process detection patterns can be consistent, so that the deposition thickness or etching depth is more consistent during the deposition of thin films or etching operations. Thus, the size measured by the wafer measurement machine 10 at the process detection pattern will be more accurate. Furthermore, when the ratio of the depth to the width of the groove is too high, it is difficult for the deposited material or the etching gas to enter the groove depth, which can easily cause the problem of uneven process results in various grooves, and thus the measurement data of the measuring machine 10 is inaccurate. Based on this, the ratio E of the depth of the groove at the process inspection pattern to the width of the groove can be set to 18≤E≤22. This ratio of depth to width is moderate, which reduces the problem of uneven process results and improves the accuracy of measurement data.

Please refer to FIG. 1 . If only process detection patterns are set in the cutting path pattern area 41, its pattern density will be lower than the pattern density of the plurality of chip units 30 on the wafer 20. Therefore, the cutting path pattern area 41 can be provided with a density compensation pattern to increase the pattern density. Moreover, the density compensation pattern is combined with the process detection pattern to make the overall pattern of the cutting path pattern area 41 more distinctive, so that the wafer measurement machine 10 can more easily identify the pattern of the cutting path pattern area 41, thereby reducing the problem of the machine identifying the position error.

Please refer to FIG. 1 . Specifically, the number of density compensation patterns is not limited, and can be one or more. Preferably, the overall density of multiple density compensation patterns is greater than the density of one density compensation pattern. When multiple density compensation patterns are distributed around the process detection pattern, the overall pattern density of the cutting road pattern area 41 can be greatly improved, so that the pattern density of the cutting road pattern area 41 is consistent with the pattern density of multiple chip units 30 on the wafer 20. The specific pattern distribution of the cutting road pattern area 41 is not limited. For example, three process detection patterns can be distributed on a cutting road body 40, and the three process detection patterns are arranged in sequence along the length direction of the cutting road body 40, and three density compensation patterns are distributed on both sides of each process detection pattern. For another example, two process detection patterns can be distributed on a cutting road body 40, and the two process detection patterns are arranged in sequence along the length direction of the cutting road body 40, and a density compensation pattern is distributed on the four sides of each process detection pattern.

Please refer to FIG. 1 . Specifically, when multiple density compensation patterns are distributed on both sides of each process detection pattern, the multiple density compensation patterns distributed on each side can be equidistantly distributed, so that the multiple density compensation patterns are equidistantly arranged along the length direction of the cutting road body 40. The equidistant arrangement can improve the density uniformity of the density compensation area 43, so that the internal pattern density of the cutting road pattern area 41 is more consistent, so that the deposited film thickness or etching depth of the pattern in the cutting road pattern area 41 is more consistent. The accuracy of the final measurement data is improved. For example, when the width of the cutting road body 40 is 100 μm, the spacing between two adjacent density compensation patterns can be set to T, and the value range of T can be set to 3 μm ≤ T ≤ 5 μm. Of course, the spacing D between each two density compensation patterns can also be set to other values, which can be adaptively designed based on the width of the cutting road body 40. It should be noted that when the spacing T between the density compensation patterns is set to a range of 3μm≤T≤5μm, and the spacing D between the process detection patterns is set to a range of 3μm≤D≤5μm, the density distribution difference between the density compensation image and the process detection pattern is small, which can improve the consistency of the internal pattern density of the cutting path pattern area 41, so that the deposited film thickness or etching depth of the pattern in the cutting path pattern area 41 is more consistent, thereby improving the accuracy of the final measurement data.

Referring to FIG. 1 , the specific structure of the density compensation pattern may be a closed pattern formed by connecting multiple compensation line segments end to end, and the length of the compensation line segment may be set based on the width of the cutting road body 40. For example, the width of the cutting road body 40 is 100 μm, and the length L of the compensation line segment is adaptively set to 2 μm ≤ L ≤ 20 μm. When the number of the multiple compensation line segments is four, the four detection line segments are connected end to end to form a rectangle. The width of the rectangle may be 2 μm, and the length of the rectangle may be 20 μm. Of course, the size of the rectangle formed by the compensation line segments may be adaptively designed based on the size of the actual cutting road body 40. Further, the specific structure of the density compensation area 43 may be that a groove is formed by etching along the thickness direction of the cutting road body 40 at multiple density compensation patterns. The cross section of the groove may be consistent with the density compensation pattern. It should be noted that the depth of the groove formed at multiple density compensation patterns may be consistent, so that the deposition thickness or etching depth is more consistent during the deposition of thin films or etching operations. Thus, the size measured by the wafer measurement machine 10 at the density compensation pattern will be more accurate. Furthermore, when the ratio of the depth to the width of the groove is too high, it is difficult for the deposited material or the etching gas to enter the groove depth, which can easily cause the problem of uneven process results in various grooves, and thus the measurement data of the measuring machine 10 is inaccurate. Based on this, the ratio of the depth of the groove at the density compensation pattern to the width of the groove can be expressed as B, and the value range of B can be 18≤B≤22. This ratio of depth to width is moderate, which reduces the problem of uneven process results and improves the accuracy of measurement data.

Please refer to FIG. 1 . Specifically, when the length S of the detection line segment is adaptively set to 35 μm ≤ S ≤ 60 μm, and the length L of the compensation line segment is adaptively set to 2 μm ≤ L ≤ 20 μm, the size of the process detection area 42 is contrasted with the size of the density compensation area 43 , so that the overall pattern of the cutting path pattern area 41 is more distinctive, and the wafer measurement machine 10 can more easily identify the pattern of the cutting path pattern area 41 , thereby reducing the problem of position error in machine recognition.

Please refer to FIG. 1 , when the process detection pattern is set to a rectangle, and the density compensation pattern is set to a rectangle. Since there are many horizontal or vertical rectangles in the patterns on the multiple chip units 30 on the wafer 20, in order to further improve the distinctiveness of the cutting road pattern area 41, the density compensation pattern can be set to an inclined rectangle so that it forms an inclination angle with the length direction of the cutting road. Thus, the wafer measurement machine 10 can more quickly identify the inclined rectangle of the density compensation pattern from the numerous patterns on the wafer 20. Further, since the density compensation pattern is distributed around the process detection pattern, when the wafer measurement machine 10 identifies the inclined rectangle of the density compensation, it can also quickly locate the process detection pattern on one side of the inclined rectangle, so that the size can be measured, which greatly improves the measurement efficiency. Further. The angle of the inclination angle formed between the density compensation pattern and the length direction of the cutting road can be expressed as A, and the angle range of A can be set to 20°≤A≤80°. The specific setting angle can be adaptively set based on the size of the cutting road body 40.

Please refer to FIG. 1 and FIG. 3 . It is worth noting that when the density compensation pattern is set as an inclined rectangle, and multiple density compensation patterns are arranged on both sides of each process detection pattern, the angle of the inclination angle formed by the inclined rectangles on both sides can be set to the same angle, and the inclination directions of the inclined rectangles on both sides can be set to the same direction or to the opposite direction. When the inclination directions of the inclined rectangles on both sides are opposite, the overall pattern of the cutting road pattern area 41 is more distinctive, and the wafer measurement machine 10 can more easily identify the pattern of the cutting road pattern area 41.

Please refer to Figures 1 and 4. When the cutting road structure is used to measure with the wafer measuring machine 10, for example, after the chip unit 30 area of the wafer 20 to be measured is synchronously processed with the cutting road graphic area 41, when the size needs to be measured, the wafer 20 to be measured can be placed on the machine for measurement. The machine can scan the surface of the wafer 20 to identify the cutting road graphic area 41, so that the imaging device of the machine is aligned with the cutting road graphic area 41 for measurement. It should be noted that the alignment area can specifically be the process detection area 42 of the cutting road graphic area 41, and when measuring, it can also be the size to be measured at the process detection graphic. Of course, the alignment area can also be the density compensation area 43, and when measuring, it can also be the size to be measured at the density compensation graphic. Here, when measuring the dimension to be measured at the process detection pattern, the imaging device can emit an incident light to the process detection area 42 and receive the optical data reflected by the area, so as to calculate the dimension to be measured, such as the thickness of the deposited film or the etching depth. The dimension measured by the cutting road pattern area 41 can represent the measured dimension of the chip unit 30 on the wafer 20. At this time, the density compensation pattern is added around the process detection pattern to increase the density of the cutting road pattern area 41, so that the pattern density of the cutting road pattern area 41 is consistent with the pattern density of the chip unit 30 on the wafer 20. Furthermore, when the film is deposited, the load effect caused by the difference in pattern density is greatly reduced, and the thickness of the film deposited in the cutting road pattern area 41 is also close to the thickness of the film deposited in the chip unit 30 area on the wafer 20. When etching is performed, the load effect caused by the difference in pattern density is greatly reduced, and the etching depth of the cutting road pattern area 41 is also close to the etching depth of the chip unit 30 on the wafer 20. Therefore, the dimension data measured by the cutting path area can better represent the actual process data of the chip unit 30, thereby improving the accuracy of the measurement data. Furthermore, when the cutting path pattern area 41 is used as an alignment mark of the wafer measurement machine 10, the density compensation pattern is combined with the process detection pattern to make the overall pattern of the cutting path pattern area 41 more distinctive, so that the wafer measurement machine 10 can more easily identify the pattern of the cutting path pattern area 41, thereby reducing the problem of the machine identifying the position error and improving the measurement alignment efficiency.

The present invention also provides a photomask, on which a first pattern having the same structure as the above-mentioned density compensation pattern and a second pattern having the same structure as the process detection pattern may be provided. When making this cutting path structure, the first pattern and the second pattern on the photomask may be copied to a wafer by exposure to obtain the cutting path structure of the wafer. It should be noted that the first pattern having the same structure as the density compensation pattern may mean that the density compensation pattern is a proportional reduction or enlargement of the first pattern. Similarly, the second pattern having the same structure as the density compensation pattern may mean that the density compensation pattern is a proportional reduction or enlargement of the second pattern.

In summary, the present invention provides a wafer cutting path structure and a mask. The first pattern and the second pattern on the mask can be copied onto the wafer to obtain the wafer cutting path structure. The measuring machine can accurately measure the size data of the chip unit on the wafer based on the cutting path structure, thereby obtaining the real process results.

The embodiments of the present invention disclosed above are only used to help illustrate the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is limited only by the claims and their full scope and equivalents.

Claims (7)

1. A wafer dicing road structure, comprising: A dicing road body is formed between two adjacent chip units of the wafer; A process inspection area is disposed on the cutting path body, and a process inspection pattern is disposed in the process inspection area; and A density compensation area is provided on the cutting path body and is located around the process detection area. The density compensation area is provided with a density compensation pattern. There are multiple density compensation patterns, and the multiple density compensation patterns are equidistantly distributed on both sides of the process detection pattern. A groove is etched at the density compensation pattern along the thickness direction of the cutting path body. The process detection area and the density compensation area form a cutting road pattern area, the pattern density of the cutting road pattern area is greater than the pattern density of the process detection area, and the pattern density of the cutting road pattern area is the same as the pattern density of the chip unit; There are multiple process detection patterns, and the multiple process detection patterns are arranged equidistantly along the length direction of the cutting road body. The process detection pattern is a rectangle formed by connecting multiple detection line segments end to end. The density compensation pattern is a rectangle formed by connecting a plurality of compensation line segments end to end, the length of the compensation line segment is represented by L, 2μm≤L≤20μm, and an inclination angle is formed between the density compensation pattern and the length direction of the cutting path body. 2 . The wafer sawing street structure according to claim 1 , wherein a distance between two adjacent process inspection patterns is expressed as T, and 3 μm≤T≤5 μm. 3 . The wafer sawing street structure according to claim 1 , wherein a distance between two adjacent density compensation patterns is expressed as D, and 3 μm≤D≤5 μm. 4 . The wafer sawing street structure according to claim 1 , wherein the length of the detection line segment is represented by S, and 35 μm≤S≤60 μm. 5 . The wafer sawing street structure according to claim 1 , wherein the inclination angle is represented by A, and 20°≤A≤80°. 6 . The wafer cutting path structure according to claim 1 , wherein the cross section of the groove is consistent with the density compensation pattern, and the ratio of the depth of the groove to the width of the groove is expressed as B, 18≤B≤22. 7. A photomask, characterized in that a first pattern having the same structure as the density compensation pattern according to any one of claims 1 to 6 and a second pattern having the same structure as the process detection pattern are arranged on the photomask.