CN117971546B - A method and device for decelerating analysis and accelerating evolution of software local faults - Google Patents
A method and device for decelerating analysis and accelerating evolution of software local faults Download PDFInfo
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Abstract
本发明提供一种软件局部故障减速分析和加速演化的方法及装置，该方法基于软件程序切片技术及插桩、断点调试的思想，针对软件需要监控的代码段或业务逻辑段设置插桩点，插桩点根据软件功能的重要程度进行等比插入，监控软件运行信息，根据监控信息完成软件的局部故障的定位；同时，具体分析软件故障产生要素和条件，基于软件故障演化模型裂变生成大量软件故障，结合构建的软件故障场景模拟测试，加速故障演化过程，快速验证解决方案。本发明能够更加精细的定位和分析软件故障，更具针对性的进行故障修复，提高软件的安全性和可靠性；能够加快软件故障演化的速度，快速模拟验证，获取更多的软件故障解决方案和应对措施，减少软件试错时间及成本。
The present invention provides a method and device for decelerating analysis and accelerating evolution of local software faults. The method is based on software program slicing technology and the idea of plugging and breakpoint debugging. Plug points are set for code segments or business logic segments that need to be monitored by the software. The plug points are inserted proportionally according to the importance of the software functions, and the software operation information is monitored. The local faults of the software are located according to the monitoring information. At the same time, the software fault generation factors and conditions are specifically analyzed, and a large number of software faults are generated based on the fission of the software fault evolution model. Combined with the constructed software fault scenario simulation test, the fault evolution process is accelerated and the solution is quickly verified. The present invention can locate and analyze software faults more precisely, perform fault repair more targetedly, and improve the security and reliability of the software; it can accelerate the speed of software fault evolution, quickly simulate and verify, obtain more software fault solutions and countermeasures, and reduce software trial and error time and cost.
Description
Technical Field
The invention relates to the technical field of software testing, in particular to a method and a device for software local fault deceleration analysis and accelerated evolution.
Background
With the increasing complexity and bulkiness of modern information systems, the number of software defects and the repair difficulty are increased, which may cause the problems of system performance degradation, functional failure and data security, and the rapid positioning and comprehensive evaluation of the software failure of the complex information system become one of the key links of high-quality software delivery. The traditional manual test fault locating and analyzing method can not meet the test requirement of a complex information system, the fault locating and analyzing consumes a great deal of time and resources, the software fault finding rate is low, and the solution is low in effectiveness, so that the need of carrying out accurate locating analysis and rapid evolution processing on the software fault of the complex information system is an important problem to be solved at present.
The software local fault deceleration analysis needs to analyze the internal operation logic and the loading service condition of the memory data of the software; the accelerated evolution of the software fault needs to analyze the logic and conditions of the software fault, and can finish the fission of the software fault based on a specific mode, generate more faults, perform fault simulation test and accelerate the fault evolution. Therefore, software program slicing and instrumentation and running memory snapshot become the main techniques for software local fault deceleration analysis; in addition, software fault evolution and software fault simulation become main technologies of software fault accelerated evolution. Shu Meizhi provides an effective system software fault positioning method, firstly calculating the contribution degree of program sentences to each test case to obtain the suspicion degree of each sentence, ranking the suspicion degree, and positioning the software fault; chi Shuqi proposes a fault diagnosis technology based on static analysis, analyzes a log when a software fault, combines a software source code and a certain algorithm to summarize a generation rule of the software fault, or reproduces a running track and a related context when the software fault is generated, thereby helping a developer to diagnose the software fault. Li Shasha and Cui Tiejun propose a method for calculating an event comprehensive utility coefficient in a system fault evolution process, wherein elements of the system fault evolution comprise an event, event fault probability, influence factors, an event evolution relationship and an event logic relationship in the evolution process, and further propose influence factors of the event utility coefficient comprehensive evaluation system fault.
However, the above method mainly considers how to locate the fault when the software fault occurs, analyze the cause of the fault, locate and repair the fault by intelligent means, and does not consider the accuracy analysis of the software fault location and the multi-scenario analysis of the evolution of the software fault, so that the requirements of the sufficiency, safety and reliability of the test of the complex information system cannot be met.
Disclosure of Invention
In view of the above problems, the present invention provides a method and apparatus for software local fault deceleration analysis and accelerated evolution.
The invention provides a method for software local fault deceleration analysis and accelerated evolution, which comprises the following steps: s1, analyzing software components, identifying a plurality of functional modules of the software, and determining an importance level coefficient of each functional module; step S2, setting a program slice of the software and a pile inserting point corresponding to the program slice according to the importance level coefficient, and monitoring the running process information of the software by utilizing the pile inserting point; s3, analyzing the monitored operation process information, positioning local fault information of the software, and recording the local fault information into a software fault library; s4, based on the software fault library and a preset fault evolution model, fission generating a plurality of software faults; and S5, constructing a fault simulation environment according to the fault types of the plurality of software faults, performing simulation verification of the software faults in the fault simulation environment, logging the verified software faults into the software fault library again as source faults, and returning to the step S4.
In another aspect, the present invention provides a device for decelerating analysis and accelerating evolution of a local fault of software, including: the importance level determining module is used for analyzing the software composition, identifying a plurality of functional modules of the software and determining the importance level coefficient of each functional module; the pile inserting point determining module is used for setting a program slice of the software and a pile inserting point corresponding to the program slice according to the importance level coefficient, and monitoring the running process information of the software by utilizing the pile inserting point; the fault positioning module is used for analyzing the monitored running process information, positioning the local fault information of the software and recording the local fault information into a software fault library; the fault fission module is used for fission generating a plurality of software faults based on the software fault library and a preset fault evolution model; the fault verification module is used for constructing a fault simulation environment according to the fault types of the plurality of software faults, performing simulation verification of the software faults in the fault simulation environment, logging the verified software faults into the software fault library again as source faults, and returning to the fault fission module.
Compared with the prior art, the method and the device for software local fault deceleration analysis and accelerated evolution have the following advantages:
(1) The method can locate and analyze the software faults more finely, so that fault repair can be performed in a targeted manner, the software fault troubleshooting time and the system fault duration are shortened, and the stability and usability of the software are improved.
(2) The method can carry out evolution analysis based on the existing software faults, generate a plurality of software faults through variation, rapidly carry out fault simulation test, acquire more effective solutions and countermeasures of the software faults, and reduce software trial-and-error time and cost.
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The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the present invention with reference to the accompanying drawings, in which:
FIG. 1 schematically illustrates a flow chart of a method of software local fault deceleration analysis and accelerated evolution according to an embodiment of the invention;
FIG. 2 schematically illustrates a schematic diagram of a method of software partial fault deceleration analysis and accelerated evolution according to an embodiment of the invention;
FIG. 3 schematically illustrates a flow chart of an importance level coefficient determination process according to an embodiment of the present invention;
FIG. 4 schematically illustrates a schematic diagram of a program slicing and instrumentation point determination process, according to an embodiment of the present invention;
FIG. 5 schematically illustrates a schematic diagram of a program slice setup process according to an embodiment of the invention;
FIG. 6 schematically illustrates a flow chart of a program slice setup process according to an embodiment of the invention;
FIG. 7 schematically illustrates a schematic diagram of a stake point setting process in accordance with an embodiment of the invention;
FIG. 8 schematically illustrates a schematic diagram of a software fault evolution process according to an embodiment of the present invention;
FIG. 9 schematically illustrates a flow chart of a software fault evolution process according to an embodiment of the invention;
FIG. 10 schematically illustrates a schematic diagram of the accelerated evolution of a software fault according to an embodiment of the present invention;
Fig. 11 schematically shows a block diagram of a device for software local fault deceleration analysis and accelerated evolution according to an embodiment of the invention.
Detailed Description
The present invention will be further described in detail below with reference to specific embodiments and with reference to the accompanying drawings, in order to make the objects, technical solutions and advantages of the present invention more apparent. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The terms "comprises," "comprising," and/or the like, as used herein, specify the presence of stated features, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components.
All terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art unless otherwise defined. It should be noted that the terms used herein should be construed to have meanings consistent with the context of the present specification and should not be construed in an idealized or overly formal manner.
Aiming at the problems of long fault analysis and verification time of the traditional software, the software problem is difficult to quickly locate and the location is inaccurate; the invention provides a method for decelerating analysis and accelerating evolution of a local fault of software, which is difficult to accelerate the evolution of similar problems and can rapidly perform software fault presentation and rapid verification of a solution.
The method provided by the invention solves the problems that the software fault is difficult and inaccurate to locate, the solution is difficult to be quickly and efficiently provided, and the software fault is repaired in time. On the other hand, the core elements of the software faults are analyzed, more software faults are generated through fission based on the software fault accelerated evolution model, and simulation verification is carried out, so that the software test sufficiency requirement is met.
FIG. 1 schematically illustrates a flow chart of a method of software local fault deceleration analysis and accelerated evolution according to an embodiment of the invention. Fig. 2 schematically shows a schematic diagram of a method of software local fault deceleration analysis and accelerated evolution according to an embodiment of the invention.
As shown in fig. 1 and fig. 2, the method for analyzing the local fault deceleration and accelerating the evolution of the software according to the embodiment may include step S1 to step S5.
And S1, analyzing software components, identifying a plurality of functional modules of the software, and determining the importance level coefficient of each functional module.
And S2, setting a program slice of the software and a stake inserting point corresponding to the program slice according to the importance level coefficient, and monitoring the running process information of the software by using the stake inserting point.
And S3, analyzing the monitored operation process information, positioning the local fault information of the software, and recording the local fault information into a software fault library.
And S4, based on the software fault library and a preset fault evolution model, fission generating a plurality of software faults.
And S5, constructing a fault simulation environment according to the fault types of the plurality of software faults, performing simulation verification of the software faults in the fault simulation environment, recording the verified software faults into a software fault library again as source faults, and returning to the step S4.
The method provided by the invention is based on the software program slicing technology and the ideas of instrumentation and breakpoint debugging, instrumentation points are set for code segments or service logic segments to be monitored of software, the instrumentation points are inserted in an equal ratio according to the importance degree of the software function, the running information of the software is monitored, and the positioning and analysis of the local faults of the software are completed according to the monitoring information; meanwhile, the software fault generating elements and conditions are specifically analyzed, a large number of software faults are generated through fission based on a software fault evolution model, and the fault evolution process is accelerated and the solution is rapidly verified by combining the constructed software fault scene simulation test.
Through the embodiment, the method and the device can more finely locate and analyze the software faults, so that fault repair can be carried out more specifically, and the safety and reliability of the software are improved; meanwhile, the software fault evolution speed can be increased, the simulation and verification can be fast carried out, more software fault solutions and countermeasures can be obtained, and the software fault trial-and-error time and cost are reduced.
The technical scheme of the invention is described in detail below.
Fig. 3 schematically shows a flowchart of an importance level coefficient determination process according to an embodiment of the present invention.
As shown in fig. 3, in this embodiment, the step S1 may specifically include steps S11 to S12:
Step S11, a plurality of functional modules of the software are identified aiming at code segments or business logic segments to be monitored of the software;
And step S12, classifying and prioritizing the plurality of functional modules according to the importance degrees, and determining the importance level coefficient of each functional module.
It will be appreciated that the higher the priority of a certain functional module, the higher the importance level coefficient of that module.
Fig. 4 schematically illustrates a schematic diagram of a program slicing and instrumentation point determination process according to an embodiment of the present invention.
As shown in fig. 4, in the present embodiment, in step S2, setting a program slice of software and a stub point of a corresponding program slice according to an importance level coefficient includes: and when the importance level coefficient of any functional module is higher, setting more program slices, and setting a pile inserting point between two adjacent program slices.
Therefore, the method provided by the invention adopts a software program slicing technology and a pile inserting technology, and performs equal proportion slicing and pile point insertion according to the importance level coefficient of the software module. For example, the more core modules, the more program slices are partitioned and stake points inserted.
In particular, fig. 5 schematically shows a schematic diagram of a program slice setting process according to an embodiment of the present invention. Fig. 6 schematically shows a flow chart of a program slice setting procedure according to an embodiment of the invention.
As shown in fig. 5 and 6, in the present embodiment, in step S2, the program slice of the software is set according to the importance level coefficient, which may specifically include steps S21 to S23.
Step S21, analyzing the software program and extracting the program dependency relationship of the software, wherein the program dependency relationship comprises control flow and data flow information.
Step S22, rules of program slicing are defined.
For example, a rule of slicing based on a software trouble keyword, sentence, phrase, or the like is employed.
Step S23, selecting a corresponding program slicing algorithm according to the program slicing rule, and analyzing the extracted program dependency relationship by using the program slicing algorithm to generate a program slice.
For example, the program slicing algorithm employs a graph reachability algorithm.
Further, in the above step S21, the program dependency relationship takes the form of a program dependency graph. Firstly, extracting program dependency relationship, extracting various information from the program, including control flow and data flow information, and forming a program dependency graph.
Program dependency graph (PDG, program DEPENDENCE GRAPH) consists of Control flow graph (CFG, control Flow Graph), control dependency graph (CDG, control DEPENDENCE GRAPH) and data dependency graph (DDG, data Dependence Graph), wherein: the control flow graph describes the transfer condition of control flow in the program, similar to the flow graph under normal condition; the control dependence graph describes the transfer condition of control dependence in the program and is a supplement to the control flow graph; the data dependency graph describes the transfer condition of data dependency in the program, and is the set of all data dependency relations in the program.
The control dependency graph comprises domain nodes, statement nodes and predicate nodes: domain nodes can control the dependency set statements, statement nodes represent common statements in the program, and predicate nodes represent policies or branch conditions in the program. The data dependency graph contains inter-statement data dependencies that can be constructed by inserting data dependency edges between nodes of the control dependency graph.
After the setting of the program slice is completed, the setting of the pile insertion point is required. Fig. 7 schematically illustrates a schematic diagram of a pile insertion point setting process according to an embodiment of the present invention.
As shown in fig. 7, in the present embodiment, the position of the pile insertion point is determined according to the following manner:
Determining the number of pile inserting points according to the importance level coefficient;
And acquiring a source program of any program slice, preprocessing the source program, performing lexical and grammatical analysis on the source program, determining the position of each pile insertion point, and implanting pile insertion codes.
Specifically, the source code instrumentation is completed before program execution, firstly, the number of instrumentation is determined according to the priority of the module and the important coefficient, after the software source program performs complete lexical and grammatical analysis, the instrumentation position is determined, instrumentation codes are implanted, and code compiling and execution are performed to complete the instrumentation point position.
And then analyzing the operation process information monitored by the pile insertion point, positioning the local fault information of the software, and recording the local fault information into a software fault library.
Fig. 8 schematically shows a schematic diagram of a software fault evolution process according to an embodiment of the invention. Fig. 9 schematically shows a flow chart of a software fault evolution process according to an embodiment of the invention.
As shown in fig. 8 and 9, in this embodiment, the step S4 may specifically include step S41 to step S42:
s41, analyzing generation elements of each piece of local fault information in a software fault library, wherein the generation elements comprise generation reasons, generation conditions, calling relations, input parameters or output parameters of faults;
Step S42, generating a plurality of software test cases by utilizing a fault evolution model in combination with the generating elements, and fissionally generating a plurality of software faults.
That is, based on the localized fault information, that is, the fault position where the software occurs, the software fault analysis is performed, the generation cause and the generation condition of the fault and the context where the software fault is located are identified, the situation of the calling chain and the variable and parameter transfer between the calling chains of the fault are analyzed, meanwhile, the software fault deformation is performed by using a boundary value method, an equivalence class division method, a path analysis method and the like in combination with the software test case generation method, and more software faults are generated by fission (evolution).
Fig. 10 schematically shows a schematic diagram of the accelerated evolution of a software fault according to an embodiment of the invention.
As shown in fig. 10, the method provided by the invention is based on the local fault information positioned by the software, the generation reason and the generation condition of each local fault information are fissionally generated to generate more related software fault types, a fault simulation environment is quickly constructed, simulation tests are carried out, effective software faults are recorded, the effective software faults are used as input sources of the software faults to be evolved again, continuous evolution analysis is carried out, and finally comprehensive identification analysis of faults of software program segments is realized.
According to the embodiment of the invention, based on the software fault library and the fault evolution model, a large number of software faults are generated through fission, a fault simulation environment is constructed, and fault solution verification is performed. And warehousing again aiming at effective software faults, and performing software fault evolution and test verification. Therefore, the invention realizes the rapid and accurate analysis and positioning of the local faults of the software, and the evolution and scheme verification of the faults.
Based on the methods disclosed in the above embodiments, for convenience of description, the following simplified application examples are assumed. According to the steps mentioned previously, the following are carried out:
step 1) analyzing the composition structure and module division of the software, and performing the level setting and the importance coefficient determination of the following table 1 according to the importance degree of the software function.
And 2) analyzing the software program, and extracting various information from the program, including control flow and data flow information, so as to form a program dependency graph. And analyzing and processing the extracted dependency relationship based on a slicing method of the graph reachability algorithm, so as to generate a program slice.
And 3) determining the number of the instrumentation according to the priority and the importance coefficient of the module, determining the instrumentation position after the software source program performs complete lexical and grammatical analysis, implanting instrumentation codes in an equal ratio, performing code compiling to generate an executable program, analyzing the instrumentation point output information in the running process of the program, performing software fault positioning, and warehousing the identified software faults.
And 4) analyzing the software faults according to the positioned software faults, identifying the reasons and conditions of the faults and the context where the software faults are located, analyzing the condition of a calling chain of the faults and the variable and parameter transmission of the calling chain, and simultaneously, combining a software test case generation method, utilizing a boundary value method, an equivalence class division method, a path analysis method and the like to deform the software faults, and evolving to generate more software faults.
Step 5) determining and verifying the fault solution according to the evolved fault.
Through the embodiment, the method provided by the invention has at least the following beneficial effects:
(1) The method can locate and analyze the software faults more finely, so that fault repair can be performed in a targeted manner, the software fault troubleshooting time and the system fault duration are shortened, and the stability and usability of the software are improved.
(2) The method can carry out evolution analysis based on the existing software faults, generate a plurality of software faults through variation, rapidly carry out fault simulation test, acquire more effective solutions and countermeasures of the software faults, and reduce software trial-and-error time and cost.
The invention also provides a device for decelerating analysis and accelerating evolution of the local faults of the software, which is described in detail below with reference to fig. 11.
Fig. 11 schematically shows a block diagram of a device for software local fault deceleration analysis and accelerated evolution according to an embodiment of the invention.
As shown in fig. 11, the apparatus 1100 for software local fault deceleration analysis and accelerated evolution according to this embodiment includes an importance level determination module 1110, a instrumentation point determination module 1120, a fault location module 1130, a fault fission module 1140, and a fault verification module 1150.
The importance level determining module 1110 is configured to analyze the software composition, identify a plurality of functional modules of the software, and determine an importance level coefficient of each functional module.
The instrumentation point determining module 1120 is configured to set an instrumentation point of a program slice of the software and a corresponding program slice according to the importance level coefficient, and monitor running process information of the software by using the instrumentation point.
The fault locating module 1130 is configured to analyze the monitored running process information, locate local fault information of the software, and record the local fault information into a software fault library.
The fault fission module 1140 is configured to fission generate a plurality of software faults based on the software fault library and a preset fault evolution model.
The fault verification module 1150 is configured to construct a fault simulation environment according to fault types of a plurality of software faults, perform simulation verification of the software faults in the fault simulation environment, log the verified software faults into the software fault library again as source faults, and return to the fault fission module.
It should be noted that, the embodiment mode of the apparatus portion is similar to the embodiment mode of the method portion, and the achieved technical effects are also similar, and specific details refer to the embodiment mode portion of the method and are not repeated herein.
Any of the importance level determination module 1110, the instrumentation point determination module 1120, the fault location module 1130, the fault fission module 1140, and the fault verification module 1150 may be combined in one module or any of the modules may be split into a plurality of modules according to embodiments of the present invention. Or at least some of the functionality of one or more of the modules may be combined with, and implemented in, at least some of the functionality of other modules. According to embodiments of the invention, at least one of the importance level determination module 1110, the instrumentation point determination module 1120, the fault location module 1130, the fault fission module 1140, and the fault verification module 1150 may be implemented at least in part as hardware circuitry, such as a Field Programmable Gate Array (FPGA), a Programmable Logic Array (PLA), a system on a chip, a system on a substrate, a system on a package, an Application Specific Integrated Circuit (ASIC), or as hardware or firmware in any other reasonable manner of integrating or packaging the circuitry, or as any one of or a suitable combination of any of the three. Or at least one of the importance level determination module 1110, the instrumentation point determination module 1120, the fault localization module 1130, the fault fission module 1140, and the fault verification module 1150 may be at least partially implemented as computer program modules, which when executed, may perform the corresponding functions.
Some of the block diagrams and/or flowchart illustrations are shown in the figures. It will be understood that some blocks of the block diagrams and/or flowchart illustrations, or combinations of blocks in the block diagrams and/or flowchart illustrations, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the instructions, when executed by the processor, create means for implementing the functions/acts specified in the block diagrams and/or flowchart.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise. Furthermore, the word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements.
While the foregoing is directed to embodiments of the present invention, other and further details of the invention may be had by the present invention, it should be understood that the foregoing description is merely illustrative of the present invention and that no limitations are intended to the scope of the invention, except insofar as modifications, equivalents, improvements or modifications are within the spirit and principles of the invention.
Claims (8)
1. A method for software local fault deceleration analysis and accelerated evolution, comprising:
s1, analyzing software components, identifying a plurality of functional modules of the software, and determining an importance level coefficient of each functional module;
Step S2, setting a program slice of the software and a pile inserting point corresponding to the program slice according to the importance level coefficient, and monitoring the running process information of the software by utilizing the pile inserting point;
S3, analyzing the monitored operation process information, positioning local fault information of the software, and recording the local fault information into a software fault library;
S4, based on the software fault library and a preset fault evolution model, fission generating a plurality of software faults; the step S4 includes: step S41, analyzing the generation elements of the local fault information in the software fault library, wherein the generation elements comprise the generation reasons, the generation conditions, the calling relations, the input parameters or the output parameters of the faults; step S42, combining the generating elements, generating a plurality of software test cases by utilizing the fault evolution model, and fissionally generating a plurality of software faults;
and S5, constructing a fault simulation environment according to the fault types of the plurality of software faults, performing simulation verification of the software faults in the fault simulation environment, logging the verified software faults into the software fault library again as source faults, and returning to the step S4.
2. The method for software local fault deceleration analysis and accelerated evolution according to claim 1, wherein said step S1 specifically comprises:
step S11, identifying a plurality of functional modules of the software aiming at code segments or business logic segments to be monitored of the software;
and step S12, classifying and prioritizing the plurality of functional modules according to the importance degrees, and determining the importance level coefficient of each functional module.
3. The method for software local fault deceleration analysis and accelerated evolution according to claim 1, wherein in step S2, the setting the program slice of the software and the instrumentation point corresponding to the program slice according to the importance level coefficient comprises:
And when the importance level coefficient of any functional module is higher, setting more program slices, and setting a pile inserting point between two adjacent program slices.
4. The method for software local fault deceleration analysis and accelerated evolution according to claim 1, wherein in step S2, said setting the program slice of the software according to the importance level coefficient specifically comprises:
S21, analyzing a software program and extracting a program dependency relationship of the software, wherein the program dependency relationship comprises control flow and data flow information;
step S22, defining a rule of program slicing;
Step S23, selecting a corresponding program slicing algorithm according to the program slicing rule, and analyzing the extracted program dependency relationship by using the program slicing algorithm to generate a program slice.
5. The method of software local fault deceleration analysis and accelerated evolution according to claim 4, wherein in step S21, the program dependency is in the form of a program dependency graph consisting of a control flow graph, a control dependency graph, and a data dependency graph, wherein:
The control flow graph describes the transfer condition of the control flow in the program;
the control dependency graph describes the transfer condition of control dependency in a program and is complemented with the control flow graph;
The data dependency graph describes the transfer condition of data dependency in the program, and is a set of all data dependency relations in the program.
6. The method of software local fault deceleration analysis and accelerated evolution according to claim 4, wherein at step S23, the program slicing algorithm employs a graph reachability algorithm.
7. A method of software local fault deceleration analysis and accelerated evolution according to claim 3, wherein the location of the stake points is determined according to the following:
determining the number of pile inserting points according to the importance level coefficient;
and acquiring a source program of any program slice, preprocessing the source program, performing lexical and grammatical analysis on the source program, determining the position of each pile insertion point, and implanting pile insertion codes.
8. A device for software local fault deceleration analysis and accelerated evolution, comprising:
The importance level determining module is used for analyzing the software composition, identifying a plurality of functional modules of the software and determining the importance level coefficient of each functional module;
The pile inserting point determining module is used for setting a program slice of the software and a pile inserting point corresponding to the program slice according to the importance level coefficient, and monitoring the running process information of the software by utilizing the pile inserting point;
The fault positioning module is used for analyzing the monitored running process information, positioning the local fault information of the software and recording the local fault information into a software fault library;
The fault fission module is used for fission generating a plurality of software faults based on the software fault library and a preset fault evolution model; comprising the following steps: analyzing generation elements of each piece of local fault information in the software fault library, wherein the generation elements comprise generation reasons, generation conditions, calling relations, input parameters or output parameters of faults; generating a plurality of software test cases by using the fault evolution model in combination with the generating elements, and fissionally generating a plurality of software faults;
The fault verification module is used for constructing a fault simulation environment according to the fault types of the plurality of software faults, performing simulation verification of the software faults in the fault simulation environment, logging the verified software faults into the software fault library again as source faults, and returning to the fault fission module.
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