CN117971546A - A method and device for decelerating analysis and accelerating evolution of software local faults - Google Patents

Abstract

The invention provides a method and a device for software local fault deceleration analysis and accelerated evolution, wherein the method is based on the software program slicing technology and the ideas of instrumentation and breakpoint debugging, instrumentation points are arranged for code segments or service logic segments to be monitored of software, the instrumentation points are inserted in an equal ratio according to the importance degree of software functions, the running information of the software is monitored, and the positioning of the local faults of the software is completed according to the monitoring information; meanwhile, the software fault generating elements and conditions are specifically analyzed, a large number of software faults are generated based on the software fault evolution model fission, the constructed software fault scene simulation test is combined, the fault evolution process is accelerated, and the solution is rapidly verified. The invention can more finely locate and analyze the software faults, more pointedly carry out fault repair and improve the safety and reliability of the software; the software fault evolution speed can be increased, the verification can be simulated and performed quickly, more software fault solutions and countermeasures can be obtained, and software trial-and-error time and cost are reduced.

Description

A method and device for deceleration analysis and accelerated evolution of software local faults

Technical Field

The present invention relates to the technical field of software testing, and in particular to a method and device for decelerating analysis and accelerating evolution of a local fault of a software.

Background technique

As modern information systems become increasingly complex and large, the number of software defects and the difficulty of repairing them increase, which may lead to system performance degradation, functional failures and data security issues. Rapid positioning and comprehensive evaluation of software faults in complex information systems has become one of the core links in high-quality software delivery. Traditional manual testing fault location, troubleshooting and analysis methods can no longer meet the testing needs of complex information systems. Troubleshooting and analysis consume a lot of time and resources, the software fault detection rate is low and the solution effectiveness is low. Therefore, it is necessary to accurately locate and analyze software faults in complex information systems and quickly evolve them, which is an important problem that needs to be solved at present.

The deceleration analysis of software local faults requires the analysis of the internal operation logic of the software and the use of memory data loading; the accelerated evolution of software faults requires the analysis of the logic and conditions of software faults, and the ability to complete the fission of software faults based on a specific method, generate more faults, perform fault simulation tests, and accelerate fault evolution. Therefore, software program slicing and plugging, running memory snapshots have become the main technologies for deceleration analysis of software local faults; in addition, software fault evolution and software fault simulation have become the main technologies for accelerating the evolution of software faults. Shu Meizhi proposed an effective method for locating system software faults, first calculating the contribution of program statements to each test case, deriving the suspicion of each statement, and ranking the suspicion to locate software faults; Chi Shuqi proposed a fault diagnosis technology based on static analysis, analyzing the log when the software fails, combining the software source code and a certain algorithm to summarize the rules of software fault generation, or reproducing the running trajectory and related context environment when the software fault occurs, so as to help developers diagnose software faults. Li Shasha and Cui Tiejun proposed a method to calculate the comprehensive utility coefficient of events in the process of system fault evolution. The elements of system fault evolution include events, event failure probability, influencing factors, event evolution relationship and event logical relationship in the evolution process. Then, they proposed an event utility coefficient to comprehensively evaluate the influencing factors of system failure.

However, the above methods mainly consider how to locate the fault, analyze the cause of the fault, and locate and repair the fault through intelligent means when the software fault occurs. They have not yet considered the accuracy analysis of software fault location and the multi-scenario analysis of the evolution of software faults. They cannot meet the adequacy, security and reliability requirements of the testing of complex information systems.

Summary of the invention

In view of the above problems, the present invention provides a method and device for decelerating analysis and accelerating evolution of local software faults.

On the one hand, the present invention provides a method for decelerating analysis and accelerating evolution of local software faults, comprising: step S1, analyzing the composition of the software, identifying multiple functional modules of the software, and determining the importance level coefficient of each functional module; step S2, setting the program slice of the software and the insertion points corresponding to the program slice according to the importance level coefficient, and using the insertion points to monitor the running process information of the software; step S3, analyzing the monitored running process information, locating the local fault information of the software, and entering the local fault information into a software fault library; step S4, fissioning and generating multiple software faults based on the software fault library and a preset fault evolution model; step S5, constructing a fault simulation environment according to the fault types of the multiple software faults, performing simulation verification of the software faults under the fault simulation environment, entering the verified software faults as source faults into the software fault library again, and returning to step S4.

On the other hand, the present invention provides a device for slowing down analysis and accelerating evolution of local software faults, including: an importance level determination module, used to analyze software composition, identify multiple functional modules of the software, and determine the importance level coefficient of each functional module; an insertion point determination module, used to set the program slice of the software and the insertion points corresponding to the program slice according to the importance level coefficient, and use the insertion points to monitor the running process information of the software; a fault location module, used to analyze the monitored running process information, locate the local fault information of the software, and enter the local fault information into a software fault library; a fault fission module, used to fission generate multiple software faults based on the software fault library and a preset fault evolution model; a fault verification module, used to build a fault simulation environment according to the fault types of the multiple software faults, simulate and verify the software faults under the fault simulation environment, and re-enter the verified software faults as source faults into the software fault library, and return to the fault fission module.

Compared with the prior art, the method and device for decelerating analysis and accelerating evolution of software local faults provided by the present invention have at least the following beneficial effects:

(1) It can locate and analyze software failures more precisely, thus enabling targeted fault repair, shortening software fault troubleshooting time and the duration of system failures, and improving software stability and availability.

(2) It can perform evolutionary analysis based on existing software faults, generate multiple software faults through mutation, quickly conduct fault simulation tests, obtain more effective solutions and countermeasures for software faults, and reduce the time and cost of software trial and error.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

FIG1 schematically shows a flow chart of a method for decelerating analysis and accelerating evolution of a software local fault according to an embodiment of the present invention;

FIG2 schematically shows a principle diagram of a method for decelerating analysis and accelerating evolution of a software local fault according to an embodiment of the present invention;

FIG3 schematically shows a flow chart of a process for determining an importance level coefficient according to an embodiment of the present invention;

FIG4 schematically shows a principle diagram of a program slicing and an instrumentation point determination process according to an embodiment of the present invention;

FIG5 schematically shows a principle diagram of a program slice setting process according to an embodiment of the present invention;

FIG6 schematically shows a flow chart of a program slice setting process according to an embodiment of the present invention;

FIG7 schematically shows a principle diagram of an instrumentation point setting process according to an embodiment of the present invention;

FIG8 schematically shows a principle diagram of a software fault evolution process according to an embodiment of the present invention;

FIG9 schematically shows a flow chart of a software fault evolution process according to an embodiment of the present invention;

FIG10 schematically shows a principle diagram of accelerating the evolution of software faults according to an embodiment of the present invention;

FIG. 11 schematically shows a structural block diagram of an apparatus for decelerating analysis and accelerating evolution of software local faults according to an embodiment of the present invention.

Detailed ways

In order to make the purpose, technical scheme and advantages of the present invention more clearly understood, the present invention is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. The terms "comprise", "include", etc. used herein indicate the existence of the features, steps, operations and/or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

All terms (including technical and scientific terms) used herein have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

In view of the fact that traditional software fault analysis and verification takes a long time, software problems are difficult to locate quickly and the location is inaccurate; similar problems are difficult to accelerate the evolution, and software fault presentation and solution verification are quickly performed, the present invention provides a method for slowing down analysis and accelerating the evolution of local software faults.

The method proposed in the present invention solves the problem that software fault location is difficult and imprecise, and it is difficult to quickly and efficiently provide solutions and repair software faults in a timely manner. On the other hand, the core elements of software faults are analyzed, and based on the software fault accelerated evolution model, more software faults are fission-generated for simulation verification, thereby meeting the software test adequacy requirements.

Fig. 1 schematically shows a flow chart of a method for decelerating analysis and accelerating evolution of a software local fault according to an embodiment of the present invention. Fig. 2 schematically shows a principle diagram of a method for decelerating analysis and accelerating evolution of a software local fault according to an embodiment of the present invention.

As shown in FIG. 1 and FIG. 2 , the method for decelerating analysis and accelerating evolution of a local software fault in this embodiment may include steps S1 to S5 .

Step S1, analyzing the software composition, identifying multiple functional modules of the software, and determining the importance level coefficient of each functional module.

Step S2, setting the program slices of the software and the insertion points of the corresponding program slices according to the importance level coefficient, and using the insertion points to monitor the running process information of the software.

Step S3, analyzing the monitored operation process information, locating the local fault information of the software, and entering the local fault information into the software fault library.

Step S4, based on the software fault library and the preset fault evolution model, fission generates multiple software faults.

Step S5, constructing a fault simulation environment according to the fault types of multiple software faults, performing simulation verification of the software faults in the fault simulation environment, re-entering the verified software faults as source faults into the software fault library, and returning to step S4.

The method proposed in the present invention is based on software program slicing technology and the ideas of plugging and breakpoint debugging. Insertion points are set for code segments or business logic segments that need to be monitored by the software. The insertion points are inserted proportionally according to the importance of the software functions, and the software operation information is monitored. The local faults of the software are located and analyzed according to the monitoring information. At the same time, the factors and conditions that cause software faults are specifically analyzed, and a large number of software faults are fission-generated based on the software fault evolution model. Combined with the constructed software fault scenario simulation test, the fault evolution process is accelerated and the solution is quickly verified.

Through the above-mentioned embodiments, the present invention can locate and analyze software faults more accurately, so that fault repair can be performed in a more targeted manner, thereby improving the security and reliability of the software; at the same time, it can accelerate the evolution of software faults, quickly simulate and verify, obtain more software fault solutions and countermeasures, and reduce software trial and error time and cost.

The technical solution of the present invention is described in detail below.

FIG3 schematically shows a flow chart of a process for determining an importance level coefficient according to an embodiment of the present invention.

As shown in FIG. 3 , in this embodiment, the above step S1 may specifically include steps S11 to S12:

Step S11, identifying multiple functional modules of the software for the code segment or business logic segment that needs to be monitored by the software;

Step S12: classify and prioritize multiple functional modules according to their importance, and determine the importance level coefficient of each functional module.

It is understandable that the higher the priority of a functional module, the higher the importance level coefficient of the module.

FIG. 4 schematically shows a principle diagram of a program slicing and an instrumentation point determination process according to an embodiment of the present invention.

As shown in FIG. 4 , in this embodiment, in step S2 , the program slices of the software and the insertion points of the corresponding program slices are set according to the importance level coefficient, including: when the importance level coefficient of any functional module is higher, more program slices are set, and an insertion point is set between two adjacent program slices.

Therefore, the method proposed by the present invention adopts software program slicing technology and stub insertion technology to perform equal-proportion slicing and stub insertion according to the importance level coefficient of the software module. For example, the more core the module, the more program slicing and stub insertion are performed.

Specifically, Fig. 5 schematically shows a principle diagram of a program slice setting process according to an embodiment of the present invention. Fig. 6 schematically shows a flow chart of a program slice setting process according to an embodiment of the present invention.

As shown in FIG. 5 and FIG. 6 , in this embodiment, in step S2 , the program slice of the software is set according to the importance level coefficient, which may specifically include steps S21 to S23 .

Step S21, analyzing the software program and extracting the program dependency of the software, wherein the program dependency includes control flow and data flow information.

Step S22, specifying the rules for program slicing.

For example, use rules for slicing based on software fault keywords, sentences, or phrases.

Step S23, selecting a corresponding program slicing algorithm according to the program slicing rule, using the program slicing algorithm to analyze the extracted program dependencies, and generating program slices.

For example, the program slicing algorithm adopts the graph reachability algorithm.

Furthermore, in the above step S21, the program dependency relationship is in the form of a program dependency graph. First, the program dependency relationship extraction is completed, and various types of information, including control flow and data flow information, are extracted from the program to form a program dependency graph.

The Program Dependence Graph (PDG) is composed of the Control Flow Graph (CFG), the Control Dependence Graph (CDG) and the Data Dependence Graph (DDG), where: the Control Flow Graph describes the transfer of control flow in the program, which is similar to the flow graph under normal circumstances; the Control Dependence Graph describes the transfer of control dependencies in the program, which is a supplement to the Control Flow Graph; the Data Dependence Graph describes the transfer of data dependencies in the program, and is the collection of all data dependencies in the program.

The control dependency graph contains domain nodes, statement nodes, and predicate nodes: domain nodes can be used to set statements through control dependencies, statement nodes represent ordinary statements in the program, and predicate nodes represent strategies or branch conditions in the program. The data dependency graph contains data dependencies between statements and can be constructed by inserting data dependency edges between nodes in the control dependency graph.

After the program slices are set, the instrumentation points need to be set. Fig. 7 schematically shows a principle diagram of the instrumentation point setting process according to an embodiment of the present invention.

As shown in FIG. 7 , in this embodiment, the position of the insertion point is determined according to the following method:

Determine the number of insertion points according to the importance level coefficient;

The source program of any program slice is obtained, and after preprocessing the source program, the lexical and grammatical analysis is performed on the source program to determine the location of each insertion point and implant the insertion code.

Specifically, source code stubbing is completed before program execution. The present invention first determines the number of stubbings according to the module priority and importance coefficient, determines the location of the stubbings after a complete lexical and grammatical analysis of the software source program, implants the stubbing code, compiles and executes the code, and completes the location of the stubbing points.

Next, the operation process information monitored by the insertion point is analyzed to locate the local fault information of the software, and the local fault information is entered into the software fault library.

Fig. 8 schematically shows a principle diagram of a software fault evolution process according to an embodiment of the present invention. Fig. 9 schematically shows a flow chart of a software fault evolution process according to an embodiment of the present invention.

As shown in FIG. 8 and FIG. 9 , in this embodiment, the above step S4 may specifically include steps S41 to S42:

Step S41, analyzing the generating factors of each local fault information in the software fault library, the generating factors including the cause of the fault, the occurrence condition, the calling relationship, the input parameter or the output parameter;

Step S42, combining the generation factors, using the fault evolution model to generate multiple software test cases, and fissioning to generate multiple software faults.

That is to say, software fault analysis is performed based on the located local fault information, that is, the location where the software fault occurs, to identify the cause of the fault, the conditions for occurrence, and the context in which the software fault occurs, and to analyze the call chain of the fault and the variable and parameter transfer between the call chains. At the same time, combined with the software test case generation method, the boundary value method, equivalence class partitioning method, path analysis method, etc. are used to deform the software fault and fission (evolve) to generate more software faults.

FIG. 10 schematically shows a principle diagram of accelerating the evolution of software faults according to an embodiment of the present invention.

As shown in Figure 10, the method proposed in the present invention, based on the local fault information located by the software, the causes and conditions of each local fault information, fission generates more related software fault types, quickly builds a fault simulation environment, performs simulation tests, and records valid software faults, which are used as the input source of software faults to evolve again, continuously evolve and analyze, and finally achieve comprehensive identification and analysis of faults in software program segments.

Through the embodiments of the present invention, based on the software fault library and fault evolution model, a large number of software faults are generated by fission, and a fault simulation environment is constructed to verify the fault solution. Valid software faults are re-stored, and software fault evolution and test verification are performed. Therefore, the present invention realizes the rapid and accurate analysis and positioning of local software faults, as well as the evolution of faults and solution verification.

Based on the method disclosed in the above embodiment, for the convenience of description, it is assumed that there is the following simplified application example. According to the above-mentioned steps, implement in sequence:

Step 1) Analyze the software's structure and module division, and determine the level and importance coefficient as shown in Table 1 below based on the importance of the software functions.

Step 2) Analyze the software program and extract various information from the program, including control flow and data flow information, to form a program dependency graph. Based on the slicing method of the graph reachability algorithm, the extracted dependency relationships are analyzed and processed to generate program slices.

Step 3) Determine the number of stubs based on the module priority and importance coefficient. After a complete lexical and grammatical analysis of the software source program, determine the location of the stubs, implant the stub code proportionally, compile the code to generate an executable program, analyze the stub output information during program execution, locate the software fault, and store the identified software fault in the database.

Step 4) Perform software fault analysis based on the located software fault, identify the cause and conditions of the fault, and the context in which the software fault occurs, analyze the call chain of the fault and the variables and parameter transfer in the call chain, and at the same time, combine the software test case generation method, use the boundary value method, equivalence class partitioning method, path analysis method, etc. to deform the software fault and evolve and generate more software faults.

Step 5) Determine and verify the solution to the fault based on the evolved fault.

Through the above embodiments, the method proposed by the present invention has at least the following beneficial effects:

(1) It can locate and analyze software failures more precisely, thus enabling targeted fault repair, shortening software fault troubleshooting time and the duration of system failures, and improving software stability and availability.

(2) It can perform evolutionary analysis based on existing software faults, generate multiple software faults through mutation, quickly conduct fault simulation tests, obtain more effective solutions and countermeasures for software faults, and reduce the time and cost of software trial and error.

The present invention also provides a device for decelerating analysis and accelerating evolution of local software faults, which will be described in detail below in conjunction with FIG. 11 .

FIG. 11 schematically shows a structural block diagram of an apparatus for decelerating analysis and accelerating evolution of software local faults according to an embodiment of the present invention.

As shown in FIG. 11 , the apparatus 1100 for decelerating analysis and accelerating evolution of software local faults according to this embodiment includes an importance level determination module 1110 , an insertion point determination module 1120 , a fault location module 1130 , a fault fission module 1140 and a fault verification module 1150 .

The importance level determination module 1110 is used to analyze the software composition, identify multiple functional modules of the software, and determine the importance level coefficient of each functional module.

The insertion point determination module 1120 is used to set the program slices of the software and the insertion points of the corresponding program slices according to the importance level coefficient, and use the insertion points to monitor the running process information of the software.

The fault location module 1130 is used to analyze the monitored operation process information, locate the local fault information of the software, and enter the local fault information into the software fault library.

The fault fission module 1140 is used to generate multiple software faults by fission based on the software fault library and a preset fault evolution model.

The fault verification module 1150 is used to build a fault simulation environment according to the fault types of multiple software faults, perform simulation verification of software faults in the fault simulation environment, re-enter the verified software faults into the software fault library as source faults, and return them to the fault fission module.

It should be noted that the implementation method of the device part is similar to the implementation method of the method part, and the technical effects achieved are also similar. For specific details, please refer to the above-mentioned method implementation method part, which will not be repeated here.

According to an embodiment of the present invention, any multiple of the importance level determination module 1110, the insertion point determination module 1120, the fault location module 1130, the fault fission module 1140 and the fault verification module 1150 can be combined in one module for implementation, or any one of the modules can be split into multiple modules. Alternatively, at least part of the functions of one or more of these modules can be combined with at least part of the functions of other modules and implemented in one module. According to an embodiment of the present invention, at least one of the importance level determination module 1110, the insertion point determination module 1120, the fault location module 1130, the fault fission module 1140 and the fault verification module 1150 can be at least partially implemented as a hardware circuit, such as a field programmable gate array (FPGA), a programmable logic array (PLA), a system on a chip, a system on a substrate, a system on a package, an application specific integrated circuit (ASIC), or can be implemented by hardware or firmware such as any other reasonable way of integrating or packaging the circuit, or implemented in any one of the three implementation methods of software, hardware and firmware or in a proper combination of any of them. Alternatively, at least one of the importance level determination module 1110, the insertion point determination module 1120, the fault location module 1130, the fault fission module 1140 and the fault verification module 1150 may be at least partially implemented as a computer program module, which may perform corresponding functions when executed.

Some block diagrams and/or flow charts are shown in the accompanying drawings. It should be understood that some blocks or combinations thereof in the block diagrams and/or flow charts may be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that these instructions, when executed by the processor, may create a device for implementing the functions/operations described in these block diagrams and/or flow charts.

In addition, the terms "first" and "second" are used only for descriptive purposes and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the feature. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In addition, the word "one" or "an" preceding an element does not exclude the presence of multiple such elements.

The specific embodiments described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims (9)

1. A method for decelerating analysis and accelerating evolution of a software local fault, characterized by comprising: Step S1, analyzing the software composition, identifying multiple functional modules of the software, and determining the importance level coefficient of each functional module; Step S2, setting program slices of the software and insertion points corresponding to the program slices according to the importance level coefficient, and using the insertion points to monitor the running process information of the software; Step S3, analyzing the monitored operation process information, locating local fault information of the software, and entering the local fault information into a software fault library; Step S4, based on the software fault library and the preset fault evolution model, fission generates multiple software faults; Step S5, constructing a fault simulation environment according to the fault types of the multiple software faults, performing simulation verification of the software faults in the fault simulation environment, re-entering the verified software faults as source faults into the software fault library, and returning to step S4. 2. The method for decelerating analysis and accelerating evolution of software local faults according to claim 1, wherein step S1 specifically comprises: Step S11, identifying multiple functional modules of the software for the code segment or business logic segment that needs to be monitored; Step S12: classify and prioritize the multiple functional modules according to their importance, and determine the importance level coefficient of each functional module. 3. The method for decelerating analysis and accelerating evolution of software local faults according to claim 1, characterized in that, in step S2, setting the program slice of the software and the insertion point corresponding to the program slice according to the importance level coefficient comprises: When the importance level coefficient of any functional module is higher, more program slices are set, and an insertion point is set between two adjacent program slices. 4. The method for decelerating analysis and accelerating evolution of software local faults according to claim 1, wherein step S4 specifically comprises: Step S41, analyzing the generation factors of each local fault information in the software fault library, wherein the generation factors include the cause of the fault, the occurrence condition, the call relationship, the input parameter or the output parameter; Step S42, combining the generation factors, using the fault evolution model to generate multiple software test cases, and fissioning to generate multiple software faults. 5. The method for decelerating analysis and accelerating evolution of software local faults according to claim 1, characterized in that, in step S2, setting the program slice of the software according to the importance level coefficient specifically comprises: Step S21, analyzing the software program and extracting the program dependency of the software, wherein the program dependency includes control flow and data flow information; Step S22, specifying rules for program slicing; Step S23, selecting a corresponding program slicing algorithm according to the program slicing rule, and using the program slicing algorithm to analyze the extracted program dependency to generate program slices. 6. The method for decelerating analysis and accelerating evolution of software local faults according to claim 5, characterized in that, in step S21, the program dependency relationship is in the form of a program dependency graph, and the program dependency graph is composed of a control flow graph, a control dependency graph and a data dependency graph, wherein: The control flow graph describes the transfer of control flow in the program; The control dependency graph describes the transfer of control dependencies in the program and is a supplement to the control flow graph; The data dependency graph describes the transfer of data dependencies in a program and is a collection of all data dependency relationships in the program. 7. The method for deceleration analysis and accelerated evolution of software local faults according to claim 5 is characterized in that, in step S23, the program slicing algorithm adopts a graph reachability algorithm. 8. The method for decelerating analysis and accelerating evolution of a software local fault according to claim 3, wherein the position of the insertion point is determined according to the following method: Determining the number of insertion points according to the importance level coefficient; The source program of any program slice is obtained, the source program is preprocessed, the source program is lexically and grammatically analyzed, the position of each of the insertion points is determined, and the insertion code is implanted. 9. A device for decelerating analysis and accelerating evolution of software local faults, characterized by comprising: An importance level determination module is used to analyze the software composition, identify multiple functional modules of the software, and determine the importance level coefficient of each functional module; An insertion point determination module, used to set program slices of the software and insertion points corresponding to the program slices according to the importance level coefficient, and use the insertion points to monitor the running process information of the software; A fault location module is used to analyze the monitored operation process information, locate the local fault information of the software, and enter the local fault information into the software fault library; A fault fission module, used for fission-generating multiple software faults based on the software fault library and a preset fault evolution model; A fault verification module is used to build a fault simulation environment according to the fault types of the multiple software faults, perform simulation verification of software faults in the fault simulation environment, re-enter the verified software faults into the software fault library as source faults, and return them to the fault fission module.