CN117939745B - High-precision load limiting control circuit and load limiting control method based on load derating curve - Google Patents
High-precision load limiting control circuit and load limiting control method based on load derating curve Download PDFInfo
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/50—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/10—Controlling the intensity of the light
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
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Abstract
The invention discloses a high-precision load limiting control circuit and a load limiting control method based on a load derating curve, wherein the load limiting control circuit comprises a power supply main circuit, a front-stage sampling circuit, a singlechip circuit, an output current detection circuit, a rear-stage sampling circuit, a feedback regulation loop, a dimming circuit and a load derating curve selection circuit; the singlechip circuit can drive the dimming circuit to adjust the power output to the LED lamp according to the input voltage and the selected derating curve of the LED lamp; by the structure, high-precision output load limiting control can be realized, and high-power output is avoided when the input voltage is reduced, or low-power output is avoided when the input voltage is increased.
Description
Technical Field
The invention relates to the field of LED dimming power supplies, in particular to a high-precision load limiting control circuit and a load limiting control method based on a load derating curve.
Background
With the rapid development of the LED illumination industry, the LEDs are installed in various households and outdoor illumination, so that the LED power supply market is vigorously developed, and the requirements on the LED power supply are higher and higher.
Since the input voltages used in each country are different, in order to be compatible with the input voltages of a plurality of countries, the input voltage of the LED power supply needs to be inputted in a wide range, while the input voltage range used in most countries is 100V-277V, the voltage difference is approximately three times, if the LED power supply is designed with the lowest input voltage, the performance of the LED power supply is wasted for a large part when the LED power supply is used with the lowest input voltage, so that the LED power supply is designed with the high voltage as a full LED lamp at the beginning of the design, and the LED power supply is de-rated when the LED power supply is used with the low voltage.
Most LED power supplies in the market inform a user of a derating curve of an LED lamp to enable the user to derate, but if the user does not timely derate according to the derating curve, the service life of the LED power supply is reduced, the LED power supply is seriously damaged even, and because the voltage difference is approximately three times, the over-temperature protection point of the LED power supply is different when the input voltage is low and the input voltage is high; therefore, it is necessary to develop a high-precision load limiting control circuit and a load limiting control method based on a load derating curve.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems existing in the prior art. Therefore, the invention provides a high-precision load limiting control circuit and a load limiting control method based on a load derating curve.
The technical scheme adopted by the embodiment of the invention for solving the technical problems is as follows: the high-precision load limiting control circuit based on the load derating curve comprises a power supply main circuit, a front-stage sampling circuit, a singlechip circuit, an output current detection circuit, a rear-stage sampling circuit, a feedback regulation loop, a dimming circuit and a load derating curve selection circuit;
The front-stage sampling circuit is connected between one end of an alternating current power supply, the input end of the power supply main circuit and the singlechip circuit and is used for acquiring the input voltage of the alternating current power supply;
the output current detection circuit is connected among the output end of the power supply main circuit, the singlechip circuit and one end of the LED lamp and is used for detecting the current output to the LED lamp;
The rear-stage sampling circuit is connected among the output end of the power supply main circuit, the feedback regulation loop, the singlechip circuit and the other end of the LED lamp and is used for detecting the voltage output to the LED lamp;
The load derating curve selecting circuit is connected with the singlechip circuit and is used for selecting a derating curve of the LED lamp;
the dimming circuit is connected between the singlechip circuit and one end of the LED lamp;
The singlechip circuit can drive the dimming circuit to adjust the power output to the LED lamp according to the input voltage and the selected derating curve of the LED lamp;
The post-stage sampling circuit comprises a resistor R40 and a resistor R41, one end of the resistor R40 is connected with the V+ end, the other end of the resistor R40 is respectively connected with the singlechip circuit and one end of the resistor R41, and the other end of the resistor R41 is connected with the GNS end.
As one of the preferred embodiments of the present invention, the load derating curve selection circuit is provided as a dimming signal processing circuit connected to the single chip microcomputer circuit and the dimming system, respectively.
As one of the preferred embodiments of the present invention, the load derating curve selection circuit is set as an NFC circuit connected to the single chip microcomputer circuit.
As one of the preferred embodiments of the present invention, the load derating curve selection circuit includes a dimming signal processing circuit and an NFC circuit, the dimming signal processing circuit is connected to the single chip circuit and the dimming system, respectively, and the NFC circuit is connected to the single chip circuit.
As one of the preferred embodiments of the invention, the dimming circuit comprises a driving circuit and a MOS tube Q1, wherein the input end of the driving circuit is connected with the singlechip, the output end of the driving circuit is connected with the grid electrode of the MOS tube Q1, the source electrode of the MOS tube Q1 is connected with the output current detection circuit, and the drain electrode of the MOS tube Q1 is connected with one end of the LED lamp for PWM dimming the LED lamp.
As one of the preferred embodiments of the present invention, the driving circuit includes a resistor R6, a resistor R8, a transistor Q3-6, a resistor R19-20, and a resistor R27, one end of the resistor R6 is connected to the source of the MOS transistor Q1, the other end is connected to the gate of the MOS transistor Q1, and is connected to the emitter of the transistor Q3 and the emitter of the transistor Q4 through the resistor R8, the collector of the transistor Q3 is connected to the VDC terminal, one end of the resistor R19, and one end of the resistor R20, the base of the transistor Q3 is connected to the other end of the resistor R19, the collector of the transistor Q5, and the base of the transistor Q4, the other end of the resistor R20 is connected to the base of the transistor Q5 and the collector of the transistor Q6, the base of the transistor Q6 is connected to the monolithic circuit, and the emitter of the transistor Q4, and the emitter of the transistor Q6 are connected to the GNS terminal.
As one of the preferred embodiments of the invention, the dimming circuit comprises a control circuit which is respectively connected with the singlechip circuit and the feedback regulation loop and is used for performing voltage dimming on the LED lamp.
As one of the preferred embodiments of the present invention, the control circuit includes an operational amplifier U6, a resistor R8, and a capacitor C11, where the forward input terminal of the operational amplifier U6 is connected to the GNS terminal via the capacitor C11 and to the monolithic circuit via the resistor R8, the reverse input terminal of the operational amplifier U6 is connected to one end of the resistor R6 and the output terminal of the operational amplifier U6, respectively, and the other end of the resistor R6 is connected to the feedback regulation loop.
As one of the preferred embodiments of the present invention, the front-stage sampling circuit comprises an electric energy metering chip U4, an optocoupler DU2-3, a resistor R28-29, a resistor R33, a resistor R36 and a capacitor C9, wherein the input end of the electric energy metering chip U4 is connected with an alternating current power supply, one end of the optocoupler DU3 light emitter is connected with the electric energy metering chip U4 through the resistor R36, the other end of the optocoupler DU3 light emitter is respectively connected with the VSS end and one end of the capacitor C9, the other end of the capacitor C9 is connected with the electric energy metering chip U4, one end of the optocoupler DU3 light receiver is connected with a power supply VCC through the resistor R33 and is connected with a singlechip circuit, the other end of the optocoupler DU3 light receiver and one end of the optocoupler DU2 light emitter are connected with the singlechip circuit through the resistor R29, one end of the other end of the optocoupler DU2 light receiver is respectively connected with one end of the resistor R28 and the electric energy metering chip U4, the other end of the resistor R28 is connected with the VAC end, and the other end of the optocoupler DU2 light receiver is connected with the VSS end.
As one of the preferred embodiments of the invention, the front-stage sampling circuit further comprises a resistor R26, a resistor R31, resistors R34-35, a resistor R37 and a capacitor C8, wherein one end of the resistor R26 is connected with one end of an alternating current power supply, the other end of the resistor R26 is respectively connected with one end of the resistor R37, one end of the capacitor C8 and the electric energy metering chip U4 through the resistor R31 and the resistors R34-35, and the other end of the resistor R37 is respectively connected with the other end of the alternating current power supply, the other end of the capacitor C8 and the VSS end.
As one of preferred embodiments of the present invention, the feedback regulation loop includes an operational amplifier U2A, an operational amplifier U2B, an optocoupler DU1, a resistor R14-17, a resistor R21-23, a resistor R30, a capacitor C3, and a diode D7-8, wherein a forward input terminal of the operational amplifier U2A is connected to the GNS terminal via the resistor R14 and to the VCC terminal via the resistor R15, a reverse input terminal of the operational amplifier U2A is connected to the GNS terminal via the capacitor C3 and to the output current detection circuit and the load via the resistor R16, an output terminal of the operational amplifier U2A is connected to one end of an optocoupler DU1 light emitter and an anode of the diode D8 via the diode D7, one end of the optocoupler DU1 light emitter is grounded, the other end of the optocoupler DU1 light emitter is connected to the power supply main circuit, a cathode of the diode D8 is connected to an output terminal of the operational amplifier U2B, a forward input terminal of the operational amplifier U2B is connected to the resistor R21 and the GNS terminal via the resistor R23 and to the input terminal of the optocoupler DU1 via the resistor V2 and to the resistor v+r 30 via the resistor V.
As one of the preferred embodiments of the present invention, the high-precision load limiting control circuit based on the load derating curve further includes a resistor R18, a resistor R32, a capacitor C4, and a capacitor C7, where the resistor R18 and the capacitor C4 are connected in series between the inverting input terminal of the operational amplifier U2B and the output terminal of the operational amplifier U2B, and the resistor R32 and the capacitor C7 are connected in series between the inverting input terminal of the operational amplifier U2A and the output terminal of the operational amplifier U2A.
As one of preferred embodiments of the present invention, the output current detection circuit includes an operational amplifier U1, a resistor R4, a resistor R7, and a resistor R10, wherein the inverting input terminal of the operational amplifier U1 is connected to one end of the resistor R4, one end of the resistor R7, one end of the resistor R10, and the power supply main circuit, respectively, and the non-inverting input terminal of the operational amplifier U1 is connected to the other end of the resistor R4 and the load, and the other end of the resistor R10 is connected to the output terminal of the operational amplifier U1 and the monolithic circuit, respectively.
The load limiting control method is applied to the high-precision load limiting control circuit based on the load derating curve, and comprises the following steps:
S1, selecting a load derating curve;
S2, detecting the input voltage of a power supply;
s3, determining a derating percentage X according to the input voltage and a load derating curve;
S4, determining target power P2 according to the derating percentage X and the rated power P, wherein the target power P2=the rated power P X;
S5, detecting the output power P1 of the power supply, and comparing the output power P1 with the target power P2;
S6, adjusting the output driving signal so that the output power p1=the target power P2.
The invention has the beneficial effects that: the load limiting control circuit comprises a power supply main circuit, a front-stage sampling circuit, a singlechip circuit, an output current detection circuit, a rear-stage sampling circuit, a feedback regulation loop, a dimming circuit and a load derating curve selection circuit; the front-stage sampling circuit is used for acquiring the input voltage of the alternating current power supply; the output current detection circuit is used for detecting the current output to the LED lamp; the post-stage sampling circuit is used for detecting the voltage output to the LED lamp; the load derating curve selecting circuit is connected with the singlechip circuit and is used for selecting a derating curve of the LED lamp; the dimming circuit is connected between the singlechip circuit and one end of the LED lamp; the singlechip circuit can drive the dimming circuit to adjust the power output to the LED lamp according to the input voltage and the selected derating curve of the LED lamp; the post-stage sampling circuit comprises a resistor R40 and a resistor R41, one end of the resistor R40 is connected with the V+ end, the other end of the resistor R40 is respectively connected with the singlechip circuit and one end of the resistor R41, and the other end of the resistor R41 is connected with the GNS end; by the structure, high-precision output load limiting control can be realized, and high-power output is avoided when the input voltage is reduced, or low-power output is avoided when the input voltage is increased.
Drawings
The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
FIG. 1 is a schematic block diagram of a first embodiment of a high precision load limiting control circuit based on a load derating curve;
FIG. 2 is a schematic block diagram of a second embodiment of a high precision load limiting control circuit based on a load derating curve;
FIG. 3 is a schematic block diagram of a third embodiment of a high precision load limiting control circuit based on a load derating curve;
FIG. 4 is a functional block diagram of a fourth embodiment of a high precision load limiting control circuit based on a load derating curve;
FIG. 5 is a first schematic circuit diagram of a high-precision load limiting control circuit based on a load derating curve;
FIG. 6 is a second circuit schematic of the high precision load limiting control circuit based on a load derating curve;
FIG. 7 is a schematic circuit diagram of a power supply main circuit;
FIG. 8 is a schematic circuit diagram of a pre-stage sampling circuit;
FIG. 9 is a schematic circuit diagram of a single-chip microcomputer circuit;
FIG. 10 is a schematic circuit diagram of an output current detection circuit;
FIG. 11 is a schematic circuit diagram of a post-stage sampling circuit;
FIG. 12 is a schematic circuit diagram of a feedback regulation loop;
FIG. 13 is a schematic circuit diagram of a drive circuit;
FIG. 14 is a schematic circuit diagram of a control circuit;
fig. 15 is a circuit schematic of the NFC circuit;
Fig. 16 is a control flow chart of a load limiting control method.
Detailed Description
Reference will now be made in detail to the present embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein the accompanying drawings are used to supplement the description of the written description so that one can intuitively and intuitively understand each technical feature and overall technical scheme of the present invention, but not to limit the scope of the present invention.
In the description of the present invention, plural means two or more, and greater than, less than, exceeding, etc. are understood to not include the present number, and the above, below, within, etc. are understood to include the present number. The description of the first and second is for the purpose of distinguishing between technical features only and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, it should be understood that references to orientation descriptions such as upper, lower, front, rear, left, right, etc. are based on the orientation or positional relationship shown in the drawings, are merely for convenience of description of the present invention and to simplify the description, and do not indicate or imply that the apparatus or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present invention.
In the present invention, unless clearly defined otherwise, the terms "disposed," "mounted," "connected," and the like are to be construed broadly and may be connected directly or indirectly through an intermediary; the connecting device can be fixedly connected, detachably connected and integrally formed; may be a mechanical connection; may be a communication between two elements or an interaction between two elements. The specific meaning of the words in the invention can be reasonably determined by a person skilled in the art in combination with the specific content of the technical solution.
Referring to fig. 1 to 16, the high-precision load limiting control circuit based on a load derating curve includes a power supply main circuit 10, a front stage sampling circuit 20, a single chip microcomputer circuit 30, an output current detection circuit 40, a rear stage sampling circuit 50, a feedback regulation loop 60, a dimming circuit 70, and a load derating curve selection circuit 80;
the pre-stage sampling circuit 20 is connected between one end of an alternating current power supply, the input end of the power supply main circuit 10 and the singlechip circuit 30, and is used for acquiring the input voltage of the alternating current power supply;
the output current detection circuit 40 is connected among the output end of the power supply main circuit 10, the singlechip circuit 30 and one end of the LED lamp, and is used for detecting the current output to the LED lamp;
The rear sampling circuit 50 is connected among the output end of the power supply main circuit 10, the feedback regulation loop 60, the singlechip circuit 30 and the other end of the LED lamp, and is used for detecting the voltage output to the LED lamp;
The load derating curve selecting circuit 80 is connected with the singlechip circuit 30 and is used for selecting a derating curve of the LED lamp;
The dimming circuit 70 is connected between the singlechip circuit 30 and one end of the LED lamp;
The singlechip circuit 30 can drive the dimming circuit 70 to adjust the power output to the LED lamp according to the input voltage and the selected derating curve of the LED lamp.
In the invention, the working principle is as follows:
① Referring to fig. 5 to 7, in the power supply main circuit 10, when the system is powered on, the mains supply is respectively connected to a terminal L and a terminal N, the terminal N and the terminal L output a voltage HV after rectifying through a rectifier bridge DB1, and charge an electrolytic capacitor EC2, and simultaneously connect a 6 th pin of a switching power supply chip U3 through a resistor R3 and a resistor R5, charge an internal circuit of the switching power supply chip U3 through an internal high voltage starting circuit, and start the switching power supply chip U3 after reaching a starting voltage; the switching power supply chip U3 outputs a driving signal to conduct the MOS tube Q2 through the resistor R12, and the MOS tube Q2 is conducted to drive the transformer T1; meanwhile, a resistor R13 converts the current flowing through the MOS tube Q2 into a voltage signal, the voltage is connected to a3 rd pin of the switching power supply chip U3 for power detection, and the voltage at one end of a rectifier diode D4 is divided by a resistor R11 and a resistor R9 and then is connected to an 8 th pin of the switching power supply chip U3 for zero crossing detection; the transformer T1 carries out rectification filtering on the electrolytic capacitor EC1, the electrolytic capacitor EC3, the electrolytic capacitor EC4, the electrolytic capacitor EC5 and the electrolytic capacitor EC2 through the rectifier diode D1, the rectifier diode D3, the rectifier diode D4, the rectifier diode D5 and the rectifier diode D6, and respectively outputs a power supply terminal V+, a power supply terminal VCC, a power supply terminal VDD, a power supply terminal VDC, a power supply terminal VAC, a power ground terminal GNS, a power ground terminal GND and a power ground terminal VSS to supply power to each chip and each device, and the power supply terminal V+ and the power ground terminal V-can be connected with an LED lamp (load).
② Referring to fig. 5-6 and 9, in the singlechip circuit 30, the power supply terminal VCC is connected to the 6 th pin of the singlechip U5 after being filtered by the resistor R39 and the capacitor C10, and the singlechip U5 performs a reset operation.
③ Referring to fig. 5, 6 and 12, in the feedback regulation loop 60, the feedback regulation loop 60 includes an operational amplifier U2A, an operational amplifier U2B, an optocoupler DU1, resistors R14-17, resistors R21-23, a resistor R30, a capacitor C3 and a diode D7-8, wherein a forward input terminal of the operational amplifier U2A is connected to the GNS terminal via the resistor R14 and to the VCC terminal via the resistor R15, a reverse input terminal of the operational amplifier U2A is connected to the GNS terminal via the capacitor C3 and to the output current detection circuit 40 and the load via the resistor R16, an output terminal of the operational amplifier U2A is connected to one end of the optocoupler DU1 and an anode of the diode D8 via the diode D7, the other end of the optocoupler DU1 is connected to the resistor R17, one end of the optocoupler DU1 is grounded, the other end of the optocoupler is connected to the power supply main circuit 10, a cathode of the diode D8 is connected to an output terminal of the operational amplifier U2B, and the forward input terminal of the operational amplifier U2B is connected to the input terminal of the optocoupler U2B via the resistor V21 and the VCC terminal via the resistor V2 and the resistor V2; the power supply terminal VCC is connected to the 3 rd pin of the operational amplifier U2A after being divided by a resistor R21 and a resistor R23 to generate a reference voltage VREF1, the power supply terminal V+ is connected to the 2 nd pin of the operational amplifier U2A after being divided by a resistor R22 and a resistor R30, and is compared with the 3 rd pin of the operational amplifier U2A, the 1 st pin output signal of the operational amplifier U2A after comparison is connected to the 2 nd pin of the optocoupler DU1 through a switching diode D8, and the 4 th pin of the optocoupler DU1 controls the 2 nd pin of the power chip U3 to carry out negative feedback, so that the output voltage V+ is stabilized; the 1 st pin of the optocoupler DU1 is connected to a power supply terminal VCC through a resistor R17, and the resistor R32 and a capacitor C7 are loop compensation of the operational amplifier U2A; the power supply terminal VCC is connected to the 5 th pin of the operational amplifier U2B after being divided by a resistor R14 and a resistor R15 to generate a reference voltage VREF2; the resistor R4 converts the current flowing through the LED lamp into a voltage signal, the voltage signal is filtered by the resistor R16 and the capacitor C3 and then is connected to the 6 th pin of the operational amplifier U2B, the voltage signal is compared with the 5 th pin of the operational amplifier U2B, the 7 th pin output signal of the compared operational amplifier U2B is connected to the 2 nd pin of the optocoupler U1 through the switching diode D7, the 2 nd pin of the power chip U3 is controlled to carry out negative feedback through the 4 th pin of the optocoupler DU1, the current of the LED lamp is controlled, and the resistor R18 and the capacitor C4 are loop compensation of the operational amplifier U2B.
④ Referring to fig. 5 and 13, as a first embodiment of the dimming circuit 70, the dimming circuit 70 includes a driving circuit 71 and a MOS transistor Q1, wherein an input end of the driving circuit 71 is connected to the single chip microcomputer circuit 30, an output end of the driving circuit is connected to a gate of the MOS transistor Q1, a source of the MOS transistor Q1 is connected to the output current detection circuit 40, and a drain of the MOS transistor Q1 is connected to one end of the LED lamp for PWM dimming the LED lamp; the driving circuit 71 includes a resistor R6, a resistor R8, a transistor Q3-6, a resistor R19-20, and a resistor R27, wherein one end of the resistor R6 is connected to the source of the MOS transistor Q1, the other end is connected to the gate of the MOS transistor Q1, the emitter of the transistor Q3 and the emitter of the transistor Q4 via the resistor R8, the collector of the transistor Q3 is connected to the VDC terminal, one end of the resistor R19, and one end of the resistor R20, the base of the transistor Q3 is connected to the other end of the resistor R19, the collector of the transistor Q5, and the base of the transistor Q4, the other end of the resistor R20 is connected to the base of the transistor Q5 and the collector of the transistor Q6, the base of the transistor Q6 is connected to the singlechip circuit 30, and the collector of the transistor Q4, the emitter of the transistor Q5, and the emitter of the transistor Q6 are connected to the GNS terminal; the 17 th pin of the singlechip U5 outputs a driving voltage which drives an NPN triode Q6 to be conducted through a resistor R27, the NPN triode Q6 pulls down the NPN triode Q5, the NPN triode Q5 is cut off to be conducted, a voltage VDC is connected to a resistor R8 through a resistor R19 and the NPN triode Q3, an NMOS tube Q1 is conducted through the resistor R8, a conducting terminal V of the NMOS tube Q1 is connected to the ground GNS through a resistor R4, an LED lamp is lightened, current flows through the resistor R4, voltage drop is generated at two ends of the resistor R4, and the PNP triode Q4 is a quick discharge triode of the NMOS tube Q1;
⑤ Referring to fig. 6 and 14, as a second embodiment of the dimming circuit 70, the dimming circuit 70 includes a control circuit 72 connected to the single chip circuit 30 and the feedback regulation loop 60, respectively, for voltage dimming the LED lamp; the control circuit 72 includes an operational amplifier U6, a resistor R8, and a capacitor C11, wherein a forward input end of the operational amplifier U6 is connected to the GNS end via the capacitor C11 and to the singlechip circuit 30 via the resistor R8, a reverse input end of the operational amplifier U6 is connected to one end of the resistor R6 and an output end of the operational amplifier U6, and the other end of the resistor R6 is connected to the feedback regulation loop 60;
⑥ Referring to fig. 5, 6 and 10, in the output circuit sampling circuit 40, the output current detection circuit 40 includes an operational amplifier U1, a resistor R4, a resistor R7 and a resistor R10, wherein the inverting input terminal of the operational amplifier U1 is connected to one end of the resistor R4, one end of the resistor R7, one end of the resistor R10 and the power supply main circuit 10, the non-inverting input terminal of the operational amplifier U1 is connected to the other end of the resistor R4 and the load, and the other end of the resistor R10 is connected to the output terminal of the operational amplifier U1 and the single chip microcomputer circuit 30, respectively; the voltage drops at the two ends of the resistor R4 are respectively connected to the 1 st pin of the operational amplifier U1 and the 3 rd pin of the operational amplifier U1, the signal is amplified by the operational amplifier U1 and then is connected to the 18 th pin of the singlechip U5, the current I1 of the load can be obtained, and the amplification factor of the operational amplifier U1 can be determined by setting the resistance values of the resistor R10 and the resistor R7;
⑦ Referring to fig. 5, 6 and 11, in the post-stage sampling circuit 50, the post-stage sampling circuit 50 includes a resistor R40 and a resistor R41, one end of the resistor R40 is connected to the v+ end, the other end of the resistor R40 is connected to the singlechip circuit 30 and one end of the resistor R41, and the other end of the resistor R41 is connected to the GNS end; the power supply terminal V+ is connected to the 15 th pin of the single-chip microcomputer U5 after voltage division through the resistor R40 and the resistor R41, the output voltage U1 can be obtained, and the single-chip microcomputer U5 can obtain the output power U1 x I1 = P1 through the formula P = U x I
⑧ Referring to fig. 5, 6 and 8, in the front-stage sampling circuit 20, the front-stage sampling circuit 20 includes an electric energy metering chip U4, an optocoupler DU2-3, resistors R28-29, a resistor R33, a resistor R36 and a capacitor C9, an input end of the electric energy metering chip U4 is connected to an ac power supply, one end of the optocoupler DU3 light emitter is connected to the electric energy metering chip U4 via the resistor R36, the other end is connected to the VSS end and one end of the capacitor C9, the other end of the capacitor C9 is connected to the electric energy metering chip U4, one end of the optocoupler DU3 light receiver is connected to a power VCC and one end of the optocoupler DU2 light emitter is connected to a GNS end via the resistor R33, the other end of the optocoupler DU2 light emitter is connected to the single-chip circuit 30 via the resistor R29, one end of the optocoupler DU2 light receiver is connected to one end of the resistor R28 and one end of the electric energy metering chip U4, the other end of the resistor R28 is connected to the VAC end, and the other end of the optocoupler DU2 light receiver is connected to the VSS end; the front-stage current flows through a terminal L and a terminal N, the front-stage current is respectively connected to a 3 rd pin and a 4 th pin of an electric energy metering IC U4 after being subjected to voltage division filtering through a resistor R25, a resistor R31, resistors R34-35, a resistor R37 and a capacitor C8, the electric energy metering IC U4 processes collected data, a 6 th pin of the electric energy metering IC U4 outputs square wave pulse signals to transmit the signals to a 20 th pin of a singlechip U5 through a resistor R36 and an optocoupler DU3, the singlechip U5 can obtain the input voltage of a power supply after being subjected to decryption processing, a 7 th pin of the electric energy metering IC U4 is a register configuration function, and the 19 th pin of the singlechip U5 is required to transmit the square wave pulse signals to a register related to the 7 th pin configuration of the electric energy metering IC U4 through a resistor R29 and the optocoupler DU2 after the power supply is electrified.
⑨ Referring to fig. 5, 6 and 15, as a first embodiment of the load derating curve selection circuit 80, the load derating curve selection circuit 80 is provided as a dimming signal processing circuit 81 connected to the single chip microcomputer circuit 30 and the dimming system, respectively; as a second embodiment of the load derating curve selecting circuit 80, the load derating curve selecting circuit 80 is provided as an NFC circuit 82 connected to the singlechip circuit 30; as a third embodiment of the load derating curve selecting circuit 80, the load derating curve selecting circuit 80 includes a dimming signal processing circuit 81 and an NFC circuit 82, the dimming signal processing circuit 81 is connected to the single-chip microcomputer circuit 30 and the dimming system, and the NFC circuit 82 is connected to the single-chip microcomputer circuit 30;
In the NFC circuit 82, the antenna P1 is connected to the 2 nd pin of the NFC chip U7 and the 3 rd pin of the NFC chip U7, after being processed by the NFC chip U7, the 5 th pin of the NFC chip U7 and the 6 th pin of the NFC chip U7 output corresponding I2C signals to the 2 nd pin of the single chip microcomputer U5 and the 3 rd pin of the single chip microcomputer U5, the single chip microcomputer U5 interprets the I2C signals, and the parameters can be set by sensing the antenna P1 through electronic equipment; when the parameters are set through the dimming system, the dimming system sends instructions, after being processed by the dimming signal processing circuit 81, the instructions are respectively connected to the 11 th pin of the singlechip U5 and the 12 th pin of the singlechip U4, and the operations of corresponding instructions are performed after the inside of the singlechip U5 is analyzed.
⑩ Referring to fig. 16, the invention further provides a load limiting control method applied to the high-precision load limiting control circuit based on the load derating curve, comprising the following steps:
S1, selecting a load derating curve;
S2, detecting the input voltage of a power supply;
s3, determining a derating percentage X according to the input voltage and a load derating curve;
S4, determining target power P2 according to the derating percentage X and the rated power P, wherein the target power P2=the rated power P X;
S5, detecting the output power P1 of the power supply, and comparing the output power P1 with the target power P2;
S6, adjusting the output driving signal so that the output power p1=the target power P2.
Specifically, after the load derating curve is selected by the dimming system or the NFC circuit 82, the singlechip U5 compares the output power P1 according to the input voltage, and if the current input voltage is the highest input voltage, derating is not needed; when the highest input voltage starts to decrease, after the derating threshold is reached, the singlechip U5 starts target power P2=rated power PxX, X is the derating percentage, and the percentage value of X forms a proportional relation with the input voltage according to the derating curve; when the input voltage is lower, the percentage value of X is smaller, the 17 th pin of the singlechip U5 can change the duty ratio of a driving signal, and meanwhile, the output voltage U1 and the output current I1 are monitored to judge whether the output power P1 reaches the target power P2 or not, so that derating is completed.
(1) As a first embodiment of the load limiting method, the input voltage AC230V, the power rated P is 600W, the target power p2=rated power px, the initial value of X is equal to 100%, i.e. the target power p2=600w×100% =600w;
When the input voltage reaches the derating threshold value of 150V, the derating percentage X is reduced by 5% every 10V; that is, when the input voltage is AC120V, 150-120=30v, x=100% - (30/10) ×5+=85%, the target power p2=rated power px, the target power p2=600×85+=510W, the output power p1=target power P2, and the 17 th pin of the single chip U5 can change the duty ratio of the driving signal until the output power p1=510W; if the singlechip detects that the output power P1 is less than the target power P2, the derating is not needed, and the singlechip U5 keeps the duty ratio of the original driving signal;
(2) As a second embodiment of the load limiting method, the input voltage AC230V, the power rated P is 600W, the target power p2=rated power px, the initial value of X is equal to 100%, i.e. the target power p2=600w×100% =600w;
when the input voltage reaches the derating threshold value of 150V, the derating percentage X is reduced by 5% every 10V; that is, when the input voltage is AC100V input, 150-100=50v, x=100% - (50/10) ×5% =75%, the target power p2=rated power px, the target power p2=600×75% =450W, the output power p1=target power P2, the 17 th pin of the single chip microcomputer U5 can change the duty ratio of the driving signal until the output power p1=450W, if the single chip microcomputer detects that the output power P1 is less than the target power P2, the power does not need to be reduced, and the single chip microcomputer U5 maintains the duty ratio of the original driving signal;
⑪ The invention has the advantages that: by the structure, high-precision output load limiting control can be realized, and high-power output is avoided when the input voltage is reduced, or low-power output is avoided when the input voltage is increased.
Of course, the present application is not limited to the above-described embodiments, and those skilled in the art can make equivalent modifications and substitutions without departing from the spirit of the present application, and these equivalent modifications and substitutions are included in the scope of the present application as defined in the appended claims.
Claims (13)
1. High accuracy limit for load control circuit based on load derate curve, its characterized in that: the device comprises a power supply main circuit (10), a front-stage sampling circuit (20), a singlechip circuit (30), an output current detection circuit (40), a rear-stage sampling circuit (50), a feedback regulation loop (60), a dimming circuit (70) and a load derating curve selection circuit (80);
the front-stage sampling circuit (20) is connected among one end of an alternating current power supply, the input end of the power supply main circuit (10) and the singlechip circuit (30) and is used for acquiring the input voltage of the alternating current power supply;
The output current detection circuit (40) is connected among the output end of the power supply main circuit (10), the singlechip circuit (30) and one end of the LED lamp and is used for detecting the current output to the LED lamp;
The rear-stage sampling circuit (50) is connected among the output end of the power supply main circuit (10), the feedback regulation loop (60), the singlechip circuit (30) and the other end of the LED lamp and is used for detecting the voltage output to the LED lamp;
the load derating curve selection circuit (80) is connected with the singlechip circuit (30) and is used for selecting a derating curve of the LED lamp;
the dimming circuit (70) is connected between the singlechip circuit (30) and one end of the LED lamp;
The singlechip circuit (30) can drive the dimming circuit (70) to adjust the power output to the LED lamp according to the input voltage and the selected derating curve of the LED lamp;
The rear-stage sampling circuit (50) comprises a resistor R40 and a resistor R41, one end of the resistor R40 is connected with the V+ end, the other end of the resistor R40 is respectively connected with the singlechip circuit (30) and one end of the resistor R41, and the other end of the resistor R41 is connected with the GNS end;
The output current detection circuit (40) comprises an operational amplifier U1, a resistor R4, a resistor R7 and a resistor R10, wherein the reverse input end of the operational amplifier U1 is respectively connected with one end of the resistor R4, one end of the resistor R7, one end of the resistor R10 and the power supply main circuit (10), the forward input end of the operational amplifier U1 is connected with the other end of the resistor R4 and a load, and the other end of the resistor R10 is respectively connected with the output end of the operational amplifier U1 and the singlechip circuit (30).
2. The load derating curve based high precision load limiting control circuit of claim 1, wherein: the load derating curve selection circuit (80) is arranged as a dimming signal processing circuit (81) which is respectively connected with the singlechip circuit (30) and the dimming system.
3. The load derating curve based high precision load limiting control circuit of claim 1, wherein: the load derating curve selection circuit (80) is arranged as an NFC circuit (82) connected with the singlechip circuit (30).
4. The load derating curve based high precision load limiting control circuit of claim 1, wherein: the load derating curve selection circuit (80) comprises a dimming signal processing circuit (81) and an NFC circuit (82), wherein the dimming signal processing circuit (81) is respectively connected with the singlechip circuit (30) and the dimming system, and the NFC circuit (82) is connected with the singlechip circuit (30).
5. The load derating curve based high precision load limiting control circuit of claim 1, wherein: the dimming circuit (70) comprises a driving circuit (71) and an MOS tube Q1, wherein the input end of the driving circuit (71) is connected with the single chip microcomputer circuit (30), the output end of the driving circuit is connected with the grid electrode of the MOS tube Q1, the source electrode of the MOS tube Q1 is connected with the output current detection circuit (40), and the drain electrode of the MOS tube Q1 is connected with one end of the LED lamp and used for PWM dimming the LED lamp.
6. The load derating curve based high precision load limiting control circuit of claim 5, wherein: the driving circuit (71) comprises a resistor R6, a resistor R8, a triode Q3-6, a resistor R19-20 and a resistor R27, wherein one end of the resistor R6 is connected with a source electrode of the MOS tube Q1, the other end of the resistor R6 is connected with a grid electrode of the MOS tube Q1 respectively, the resistor R8 is connected with an emitting electrode of the triode Q3 and an emitting electrode of the triode Q4 respectively, a collecting electrode of the triode Q3 is connected with a VDC end, one end of the resistor R19 and one end of the resistor R20 respectively, a base electrode of the triode Q3 is connected with the other end of the resistor R19, a collecting electrode of the triode Q5 and a base electrode of the triode Q4 respectively, the other end of the resistor R20 is connected with a base electrode of the triode Q5 and a collecting electrode of the triode Q6 respectively, and the base electrode of the triode Q6 is connected with the singlechip circuit (30), and the emitting electrode of the triode Q5 and the emitting electrode of the triode Q6 are connected with a GNS end.
7. The load derating curve based high precision load limiting control circuit of claim 1, wherein: the dimming circuit (70) comprises a control circuit (72) which is respectively connected with the singlechip circuit (30) and the feedback regulation loop (60) and is used for performing voltage dimming on the LED lamp.
8. The load derating curve based high precision load limiting control circuit of claim 7, wherein: the control circuit (72) comprises an operational amplifier U6, a resistor R8 and a capacitor C11, wherein the forward input end of the operational amplifier U6 is connected with the GNS end through the capacitor C11 and the singlechip circuit (30) through the resistor R8, the reverse input end of the operational amplifier U6 is respectively connected with one end of the resistor R6 and the output end of the operational amplifier U6, and the other end of the resistor R6 is connected with the feedback regulation loop (60).
9. The load derating curve based high precision load limiting control circuit of claim 1, wherein: the front-stage sampling circuit (20) comprises an electric energy metering chip U4, an optocoupler DU2-3, resistors R28-29, a resistor R33, a resistor R36 and a capacitor C9, wherein the input end of the electric energy metering chip U4 is connected with an alternating current power supply, one end of the optocoupler DU3 light emitter is connected with the electric energy metering chip U4 through the resistor R36, the other end of the optocoupler DU3 light emitter is respectively connected with the VSS end and one end of the capacitor C9, the other end of the capacitor C9 is connected with the electric energy metering chip U4, one end of an optocoupler DU3 light receiver is connected with a power supply VCC through the resistor R33 and is connected with the singlechip circuit (30), the other end of the optocoupler DU3 light receiver and one end of the optocoupler DU2 light emitter are connected with the singlechip circuit (30) through the resistor R29, one end of the optocoupler DU2 light receiver is respectively connected with one end of the resistor R28 and one end of the electric energy metering chip U4, and the other end of the resistor R28 is connected with the VAC end, and the other end of the optocoupler DU2 light receiver is connected with the VSS end.
10. The load derating curve based high precision load limiting control circuit of claim 9, wherein: the front-stage sampling circuit (20) further comprises a resistor R26, a resistor R31, resistors R34-35, a resistor R37 and a capacitor C8, one end of the resistor R26 is connected with one end of an alternating current power supply, the other end of the resistor R26 is respectively connected with one end of the resistor R37, one end of the capacitor C8 and an electric energy metering chip U4 through the resistor R31 and the resistors R34-35, and the other end of the resistor R37 is respectively connected with the other end of the alternating current power supply, the other end of the capacitor C8 and the VSS end.
11. The load derating curve based high precision load limiting control circuit of claim 1, wherein: the feedback regulation loop (60) comprises an operational amplifier U2A, an operational amplifier U2B, an optocoupler DU1, a resistor R14-17, a resistor R21-23, a resistor R30, a capacitor C3 and a diode D7-8, wherein the forward input end of the operational amplifier U2A is connected with the GNS end through the resistor R14 and the VCC end through the resistor R15, the reverse input end of the operational amplifier U2A is connected with the GNS end through the capacitor C3 and the resistor R16, the output end of the operational amplifier U2A is connected with the output current detection circuit (40) and a load, the output end of the operational amplifier U2A is respectively connected with one end of an optocoupler DU1 light emitter and the anode of the diode D8 through the diode D7, the other end of the optocoupler DU1 light emitter is connected with the VCC end through the resistor R17, one end of the optocoupler DU1 light receiver is grounded, the other end of the optocoupler DU1 light receiver is connected with the power supply main circuit (10), the cathode of the diode D8 is connected with the output end of the operational amplifier U2B, and the forward input end of the operational amplifier U2B is connected with the GNS end through the resistor R21 and the GNS end and the resistor V2 through the resistor R23 and the reverse end of the resistor D30.
12. The load derating curve based high precision load limiting control circuit of claim 11, wherein: the circuit further comprises a resistor R18, a resistor R32, a capacitor C4 and a capacitor C7, wherein the resistor R18 and the capacitor C4 are connected in series between the inverting input end of the operational amplifier U2B and the output end of the operational amplifier U2B, and the resistor R32 and the capacitor C7 are connected in series between the inverting input end of the operational amplifier U2A and the output end of the operational amplifier U2A.
13. A load limiting control method applied to the high-precision load limiting control circuit based on the load derating curve as claimed in any one of claims 1 to 12, and characterized by comprising the following steps:
S1, selecting a load derating curve;
S2, detecting the input voltage of a power supply;
s3, determining a derating percentage X according to the input voltage and a load derating curve;
S4, determining target power P2 according to the derating percentage X and the rated power P, wherein the target power P2=the rated power P X;
S5, detecting the output power P1 of the power supply, and comparing the output power P1 with the target power P2;
S6, adjusting the output driving signal so that the output power p1=the target power P2.
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| CN115802546A (en) * | 2022-12-08 | 2023-03-14 | 珠海市圣昌电子有限公司 | Dual-mode output dimming power supply |
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| JPH09251322A (en) * | 1996-03-18 | 1997-09-22 | Omron Corp | Power unit |
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| CN202008518U (en) * | 2010-12-27 | 2011-10-12 | 同方光电科技有限公司 | Measuring device for LED (light-emitting diode) derating curve |
| CN113597058B (en) * | 2021-08-04 | 2024-04-05 | 普诚创智（成都）科技有限公司 | LED protection circuit and driver with overheat current reduction and constant current functions |
| CN115734432B (en) * | 2022-11-21 | 2023-08-11 | 珠海市圣昌电子有限公司 | Multi-output dimming power supply capable of switching output modes and application method thereof |
| CN116321583B (en) * | 2023-03-21 | 2024-04-02 | 珠海市圣昌电子有限公司 | DALI constant voltage power supply containing D4i function |
| CN116963350A (en) * | 2023-07-06 | 2023-10-27 | 珠海市圣昌电子有限公司 | High-precision self-adaptive adjusting method of LED dimming power supply based on high-frequency PWM |
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| CN115009149A (en) * | 2022-06-30 | 2022-09-06 | 东风汽车有限公司东风日产乘用车公司 | Vehicle lamp system control method, vehicle, and storage medium |
| CN115802546A (en) * | 2022-12-08 | 2023-03-14 | 珠海市圣昌电子有限公司 | Dual-mode output dimming power supply |
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