CN117826488A - Display substrate, display panel and display device - Google Patents
Display substrate, display panel and display device Download PDFInfo
- Publication number
- CN117826488A CN117826488A CN202211185574.1A CN202211185574A CN117826488A CN 117826488 A CN117826488 A CN 117826488A CN 202211185574 A CN202211185574 A CN 202211185574A CN 117826488 A CN117826488 A CN 117826488A
- Authority
- CN
- China
- Prior art keywords
- substrate
- orthographic projection
- display
- light shielding
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 270
- 230000000149 penetrating effect Effects 0.000 claims abstract description 8
- 125000006850 spacer group Chemical group 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 21
- 230000008569 process Effects 0.000 claims description 18
- 239000011159 matrix material Substances 0.000 claims description 14
- 239000004973 liquid crystal related substance Substances 0.000 claims description 5
- 238000009413 insulation Methods 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 79
- 238000010586 diagram Methods 0.000 description 7
- 239000011229 interlayer Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 230000008859 change Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 3
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 3
- 239000011324 bead Substances 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- KYKLWYKWCAYAJY-UHFFFAOYSA-N oxotin;zinc Chemical compound [Zn].[Sn]=O KYKLWYKWCAYAJY-UHFFFAOYSA-N 0.000 description 2
- 238000006748 scratching Methods 0.000 description 2
- 230000002393 scratching effect Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- FFBHFFJDDLITSX-UHFFFAOYSA-N benzyl N-[2-hydroxy-4-(3-oxomorpholin-4-yl)phenyl]carbamate Chemical compound OC1=C(NC(=O)OCC2=CC=CC=C2)C=CC(=C1)N1CCOCC1=O FFBHFFJDDLITSX-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 1
- 229910001195 gallium oxide Inorganic materials 0.000 description 1
- 230000004313 glare Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
- 229910052727 yttrium Inorganic materials 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
- BNEMLSQAJOPTGK-UHFFFAOYSA-N zinc;dioxido(oxo)tin Chemical compound [Zn+2].[O-][Sn]([O-])=O BNEMLSQAJOPTGK-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The display substrate, the display panel and the display device provided by the disclosure comprise a substrate; the data line is positioned on one side of the substrate base plate and extends along the first direction; the transistor comprises an active layer and a first electrode, the local multiplexing of the data line is the first electrode, and the active layer is positioned between the layer where the data line is positioned and the substrate; the insulation layer is positioned between the layer where the data line is positioned and the active layer, and the first electrode and the active layer are electrically connected with the active layer through a first via hole penetrating through the insulation layer; the first shading structure is positioned between the active layer and the substrate, the first shading structure extends along a first direction, orthographic projection of the data line on the substrate is positioned in orthographic projection of the first shading structure on the substrate, and orthographic projection of the first via hole on the substrate is positioned in orthographic projection of the first shading structure on the substrate.
Description
Technical Field
The disclosure relates to the technical field of display, in particular to a display substrate, a display panel and a display device.
Background
The liquid crystal display device (Liquid Crystal Display, LCD) has advantages of light weight, low power consumption, high image quality, low radiation, and portability, and has gradually replaced the conventional cathode ray tube display device (Cathode Ray Tube display, CRT), and has been widely used in modern information devices such as Virtual Reality (VR) head-mounted display devices, notebook computers, televisions, mobile phones, digital products, and the like.
Disclosure of Invention
In view of the above, embodiments of the present disclosure provide a display substrate, a display panel and a display device for improving the pixel aperture ratio.
Therefore, the embodiment of the disclosure provides a display substrate, a display panel and a display device, and the specific scheme is as follows:
in one aspect, an embodiment of the present disclosure provides a display substrate, including:
a substrate base;
the data line is positioned on one side of the substrate base plate and extends along a first direction;
the transistor comprises an active layer and a first electrode, wherein the local multiplexing of the data line is the first electrode, and the active layer is positioned between the layer where the data line is positioned and the substrate;
the insulating layer is positioned between the layer where the data line is positioned and the active layer, and the first electrode and the active layer are electrically connected with the active layer through a first via hole penetrating through the insulating layer;
the first shading structure is located between the active layer and the substrate, the first shading structure extends along the first direction, orthographic projection of the data line on the substrate is located in orthographic projection of the first shading structure on the substrate, orthographic projection of the first via hole on the substrate is located in orthographic projection of the first shading structure on the substrate.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, the active layer includes a first lightly doped region, a first channel region, and a second lightly doped region disposed side by side in the first direction; wherein,
the orthographic projection of the first lightly doped region on the substrate is positioned in the orthographic projection of the first shading structure on the substrate;
the orthographic projection of the first channel region on the substrate is positioned in the orthographic projection of the first shading structure on the substrate;
the orthographic projection of the second lightly doped region on the substrate is positioned in the orthographic projection of the first shading structure on the substrate.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, the display substrate further includes a support structure located on a side of the layer where the data line is located away from the substrate, the support structure extends along the first direction, and an orthographic projection of the support structure on the substrate is located in an orthographic projection of the first light shielding structure on the substrate.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, the display substrate further includes a layer where a second electrode of the transistor is located, a flat layer, and a layer where a pixel electrode is located, where the layer where the data line is located faces to a side of the layer where the support structure is located, where the second electrode is electrically connected to the pixel electrode through a second via hole penetrating through the flat layer, and the support structure fills the second via hole;
in a second direction intersecting the first direction, a front projection boundary of the support structure on the substrate and a front projection edge of the first light shielding structure on the substrateThe distance between the boundaries is greater than a preset value a, which satisfies the relationship:wherein LS tol And/2 is the process fluctuation value of the first shading structure, PLN tol And/2 is the process fluctuation value of the second via hole, OL 1 And the first shading structure and the second via hole are the para-position deviation value.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, an orthographic projection shape of the active layer on the substrate is L-shaped or 1-shaped.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, a plurality of second light shielding structures are further included, wherein the second light shielding structures are located on one side of the first light shielding structure and are arranged side by side along the first direction;
the active layer further includes a third lightly doped region, a second channel region, and a fourth lightly doped region disposed side by side along the first direction on one side of the data line; wherein,
the orthographic projection of the third lightly doped region on the substrate is positioned in the orthographic projection of the second structure on the substrate;
the orthographic projection of the second channel region on the substrate is positioned in the orthographic projection of the integrated structure on the substrate;
the orthographic projection of the second lightly doped region on the substrate is located in the orthographic projection of the integrated structure on the substrate.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, a plurality of second light shielding structures are further included, wherein the second light shielding structures are located on one side of the first light shielding structure and are arranged side by side along the first direction;
the active layer further includes a third lightly doped region, a second channel region, and a fourth lightly doped region disposed side by side along the first direction on one side of the data line; wherein,
the orthographic projection of the third lightly doped region on the substrate is positioned in the orthographic projection of the second shading structure on the substrate;
the orthographic projection of the second channel region on the substrate is positioned in the orthographic projection of the second shading structure on the substrate;
the orthographic projection of the fourth lightly doped region on the substrate is positioned in the orthographic projection of the second shading structure on the substrate.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, the first light shielding structure includes a light shielding portion disposed side by side with the second light shielding structure, and the light shielding portion and the second light shielding structure form an integral structure;
the display substrate further comprises a support structure which is positioned on one side of the layer where the data line is positioned, far away from the substrate, the orthographic projection of the support structure on the substrate is overlapped with the orthographic projection of the shading part on the substrate, the orthographic projection of the support structure on the substrate is overlapped with the orthographic projection of the second shading structure on the substrate, and the orthographic projection of the support structure on the substrate is positioned in the orthographic projection of the integral structure on the substrate.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, a distance between a front projection boundary of the support structure on the substrate and a front projection boundary of the integrated structure on the substrate in the first direction and in a second direction where the first direction intersects is greater than a preset value a.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, an orthographic projection shape of the active layer on the substrate is a U-shape.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, a caliber of the first via hole gradually increases in a direction away from the substrate;
the width w of the first shading structure in the second direction intersecting the first direction is equal to the first width wThe maximum aperture d of the hole satisfies the relation:wherein LS tol And/2 is the process fluctuation value of the first shading structure, via tol And/2 is the process fluctuation value of the first via hole, OL 2 And the first shading structure and the first via hole are used as the para-position deviation value.
On the other hand, the embodiment of the disclosure provides a display panel, which comprises a display substrate and an opposite substrate which are opposite to each other, and a liquid crystal layer positioned between the display substrate and the opposite substrate, wherein the display substrate is the display substrate provided by the embodiment of the disclosure.
In some embodiments, in the display panel provided by the embodiments of the present disclosure, the display substrate includes a support structure, and an orthographic projection of the support structure on the substrate is located within an orthographic projection of the first light shielding structure on the substrate;
the opposite substrate comprises a spacer, the spacer extends along a second direction which is arranged in a crossing manner with the first direction, and orthographic projection of the spacer on the substrate is arranged in a crossing manner with orthographic projection of the supporting structure on the substrate.
In some embodiments, in the display panel provided by the embodiments of the present disclosure, the display substrate includes a support structure, and an orthographic projection of the support structure on the substrate is located within an orthographic projection of the integrated structure on the substrate;
the opposite substrate comprises a spacer, and the orthographic projection of the spacer on the substrate is positioned in the orthographic projection of the supporting structure on the substrate.
In some embodiments, in the above display panel provided in the embodiments of the present disclosure, the opposite substrate further includes a black matrix including only a third light shielding structure extending in a second direction disposed to intersect the first direction.
On the other hand, the embodiment of the disclosure also provides a display device, which comprises the display panel provided by the embodiment of the disclosure, and a backlight module positioned on the light incident side of the display panel.
The beneficial effects of the present disclosure are as follows:
the display substrate, the display panel and the display device provided by the embodiment of the disclosure comprise a substrate; the data line is positioned on one side of the substrate base plate and extends along the first direction; the transistor comprises an active layer and a first electrode, the local multiplexing of the data line is the first electrode, and the active layer is positioned between the layer where the data line is positioned and the substrate; the insulation layer is positioned between the layer where the data line is positioned and the active layer, and the first electrode and the active layer are electrically connected with the active layer through a first via hole penetrating through the insulation layer; the first shading structure is positioned between the active layer and the substrate, the first shading structure extends along a first direction, orthographic projection of the data line on the substrate is positioned in orthographic projection of the first shading structure on the substrate, and orthographic projection of the first via hole on the substrate is positioned in orthographic projection of the first shading structure on the substrate. The front projection of the data line on the substrate is arranged in the front projection of the first shading structure on the substrate, the front projection of the first via hole on the substrate is arranged in the front projection of the first shading structure on the substrate, the first shading structure extending along the first direction can shade light leakage, and the layer where the first shading structure is arranged at the lower layer of the layer where the first via hole and the data line are arranged, so that backlight provided by the backlight module is not diffracted, and the shading size of the first shading structure only needs to consider the line width of the data line, the caliber of the first via hole, the fluctuation value and the para-position deviation value of process equipment, and the required shading size of the first shading structure is smaller, thereby being beneficial to improving the pixel aperture ratio.
Drawings
Fig. 1 is a schematic diagram of a line width of a data line according to an embodiment of the disclosure;
FIG. 2 is a schematic diagram of diffraction light leakage at a via;
fig. 3 is a schematic structural diagram of a display substrate according to an embodiment of the disclosure;
FIG. 4 is a cross-sectional view taken along line I-II of FIG. 3;
FIG. 5 is a schematic diagram of light leakage prevention provided by an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of a display substrate according to an embodiment of the disclosure;
FIG. 7 is a cross-sectional view taken along line III-IV of FIG. 6;
FIG. 8 is a schematic view of a first light shielding structure, a supporting structure, and a spacer according to an embodiment of the disclosure;
fig. 9 is a schematic structural diagram of an active layer according to an embodiment of the disclosure;
fig. 10 is another schematic structural diagram of an active layer according to an embodiment of the present disclosure;
FIG. 11 is a schematic view of another structure of the first light shielding structure, the supporting structure, and the spacer according to the embodiments of the present disclosure;
fig. 12 is a schematic view of another structure of the first light shielding structure, the supporting structure, and the spacer according to the embodiment of the disclosure.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. It should be noted that the dimensions and shapes of the various figures in the drawings do not reflect true proportions, and are intended to illustrate the present disclosure only. And the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits detailed description of known functions and known components.
Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and the like in the description and in the claims, are not used for any order, quantity, or importance, but are used for distinguishing between different elements. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. "inner", "outer", "upper", "lower", etc. are used merely to denote relative positional relationships, which may also change accordingly when the absolute position of the object to be described changes.
In recent years, with the diversified expansion of VR application fields, VR product requirements are rapidly growing. The display panel is one of its core hardware, and needs more pixel views to restore the real scene, and the resolution (PPI) requirements are higher and higher.
As shown in fig. 1, in case that the Data Line (DL) crosses the Via hole (Via) for connecting the active layer of the transistor and the first electrode of the transistor, the line width of the Data Line (DL) at the Via hole (Via) may be different from other line widths, the width change is at an angle to the edge, and the Data Line (DL) is at the width change with the light transmission axis D of the Polarizer (POL) 1 、D 2 The included angle between the two light sources is not 0 degree or 90 degrees any more, so that the backlight provided by the backlight module (BLU) can be diffracted at the width change position, the direction of polarized light is changed, light leakage is generated, the display brightness of 0 gray scale (L0) is high, and the contrast ratio is abnormal.
In order to prevent the problems of high display brightness, low contrast, etc. of the 0 gray scale caused by light leakage, as shown in fig. 2, a Black Matrix (BM) with a larger size is used to shield light in the extending direction of the Data Line (DL) in the related art, so as to ensure high contrast. However, in a scene of high resolution display, the display pixels are smaller, the pixel aperture ratio is lower, if a larger black matrix is adopted for shielding, the aperture ratio is seriously reduced, and the transmittance is lower. In practical tests, the inventors found that after 1.8 μm Via (Via) diffraction, the light leakage range can reach 3 μm, for example, a black matrix is used for shielding, and considering that the deviation from the box is 1.5 μm, a black matrix with the width of at least 6 μm is needed for shielding. In a display product of 2000PPI, the display pixel size is 12 μm×12 μm, and in the extending direction of the Data Line (DL), a wider black matrix may decrease the pixel aperture ratio by 50%, the aperture loss is large, and the display brightness cannot be ensured.
In order to improve the above technical problems in the related art, an embodiment of the present disclosure provides a display substrate, as shown in fig. 3 and 4, including:
a substrate 101;
a data line 102 located at one side of the substrate 101, the data line 102 extending along a first direction Y; alternatively, the material of the data line 102 may include a metal, may have a single-layer or multi-layer structure formed of molybdenum, aluminum, titanium, copper, an alloy, etc., and illustratively, the data line 102 is a stacked structure of titanium metal layer/aluminum metal layer/titanium metal layer;
a transistor 103, the transistor 103 including an active layer 31 and a first electrode 32, the local multiplexing of the data line 102 being the first electrode 32, the active layer 31 being located between the layer where the data line 102 is located and the substrate 101; alternatively, the material of the active layer 31 may be Low Temperature Polysilicon (LTPS), a semiconductor Oxide (Oxide), etc., and the semiconductor Oxide may be any one or more of Indium Gallium Zinc Oxide (IGZO), amorphous or polycrystalline zinc Oxide (ZnO), indium Zinc Oxide (IZO), zinc Tin Oxide (ZTO), tin zinc Oxide (IZTO), gallium zinc tin Oxide (IGZTO), indium Gallium Oxide (IGO);
an insulating layer 104 disposed between the data line 102 and the active layer 31, and a first via V penetrating the insulating layer 104 is formed between the first electrode 32 and the active layer 31 1 Electrically connected to the active layer 31; optionally, the insulating layer 104 includes a gate insulating layer GI and a first interlayer dielectric layer ILD stacked 1 In some embodiments, the first inter-layer dielectric layer ILD and the gate insulating layer GI are simultaneously formed by a single patterning process 1 Is formed in the first via V 1 ;
A first light shielding structure 105 located between the active layer 31 and the substrate 101, the first light shielding structure 105 extending along a first direction Y, the front projection of the data line 102 on the substrate 101 being located within the front projection of the first light shielding structure 105 on the substrate 101, and a first via hole V 1 The orthographic projection on the substrate 101 is located within the orthographic projection of the first light shielding structure 105 on the substrate 101; optionally, the material of the first light shielding structure 105 is a light shielding metal (LS).
In the display substrate provided by the embodiment of the disclosure, by setting the data line102 on the substrate 101 is located in the front projection of the first light shielding structure 105 on the substrate 101, and the first via hole V 1 The front projection on the substrate 101 is located in the front projection of the first light shielding structure 105 on the substrate 101, so that the first light shielding structure 105 extending along the first direction Y can shield the light leakage (as shown in fig. 5), because the layer where the first light shielding structure 105 is located at the first via hole V 1 And the lower layer of the layer where the data line 102 is located, so that the backlight provided by the backlight module (BLU) is not diffracted, and therefore the light shielding dimension of the first light shielding structure 105 only needs to consider the line width of the data line 102 and the first via hole V 1 The first light shielding structure 105 has smaller light shielding dimension, thereby facilitating the improvement of the pixel aperture ratio.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, as shown in fig. 3 and fig. 4, a first via hole V 1 The caliber of (a) gradually increases in a direction Z away from the substrate 101; the width w of the first light shielding structure 105 in the second direction X intersecting the first direction Y is equal to the width of the first via V 1 The maximum caliber d of (2) satisfies the relation:wherein LS tol And/2 is the process fluctuation value of the first light shielding structure 105, via tol And/2 is a first via V 1 Process fluctuation value OL of (2) 2 Is the first light shielding structure 105 and the first via hole V 1 Is a para-offset value of (2).
In the related art, the process fluctuation value LS of the first light shielding structure 105 tol With a value of/2 of 0.5 μm, a first via V 1 Process fluctuation value PLN of (2) tol 2 is 0.5 μm, the first light shielding structure 105 and the first via V 1 Is of the para-offset value OL 1 The width w of the first light shielding structure 105 in the second direction X intersecting the first direction Y and the first via V can be obtained by combining the above formula with 0.3 μm 1 The maximum diameter d (i.e. w-d) of the first via V is about 0.46 μm or more, and the related art 1 The maximum aperture d of (2) is 1.8 μm, and therefore the first light shielding structure 105 crosses in the first direction YThe width w in the second direction X may be set to a minimum of 2.72 μm. Compared with the width of the black matrix 6 μm in the first direction Y in the related art, the width of the first light shielding structure 105 in the present disclosure is greatly reduced, and the pixel aperture ratio can be effectively improved.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, as shown in fig. 3 and 6, the active layer 31 includes first lightly doped regions LDD arranged side by side in the first direction Y 1 First channel region CR 1 And a second lightly doped region LDD 2 The method comprises the steps of carrying out a first treatment on the surface of the Wherein the first lightly doped region LDD 1 The orthographic projection on the substrate 101 is located within the orthographic projection of the first light shielding structure 105 on the substrate 101; first channel region CR 1 The orthographic projection on the substrate 101 is located within the orthographic projection of the first light shielding structure 105 on the substrate 101; second lightly doped region LDD 2 The orthographic projection on the substrate 101 is located within the orthographic projection of the first light shielding structure 105 on the substrate 101. Optionally, a first lightly doped region LDD 1 Orthographic projection on the substrate 101, first channel region CR 1 Orthographic projection on the substrate 101, and second lightly doped region LDD 2 The orthographic projections on the substrate 101 may all be located within the orthographic projections of the data lines 102 on the substrate 101.
First lightly doped region LDD 1 And a second lightly doped region LDD 2 The transistor 103 is a large resistance region, so that the on current of the transistor 103 can be effectively reduced, and the characteristics of the transistor 103 are ensured. By providing a first lightly doped region LDD 1 The orthographic projection on the substrate 101 is located within the orthographic projection of the first light shielding structure 105 on the substrate 101; first channel region CR 1 The orthographic projection on the substrate 101 is located within the orthographic projection of the first light shielding structure 105 on the substrate 101; second lightly doped region LDD 2 The front projection on the substrate 101 is located in the front projection of the first light shielding structure 105 on the substrate 101, so that the first light shielding structure 105 can shield the backlight to prevent the backlight from irradiating the first lightly doped region LDD 1 First channel region CR 1 LDD of second lightly doped region 2 Resulting in leakage currents that affect the performance of transistor 103. In addition, due to FIGS. 6 and 7Since only the first light shielding structure 105 is provided, the pixel aperture ratio can be increased to the limit while ensuring the performance of the transistor 103.
In some embodiments, in the foregoing display substrate provided by the embodiments of the present disclosure, as shown in fig. 6 and fig. 7, a support structure (hillow) 106 may be further included on a side of the layer where the data line 102 is located away from the substrate 101, where the support structure 106 extends along the first direction Y, and an orthographic projection of the support structure 106 on the substrate 101 is located within an orthographic projection of the first light shielding structure 105 on the substrate 101. In a high resolution display product, in order to prevent the spacer (PS) from scratching the alignment film (PI) to cause a light leakage phenomenon, a support structure (picllow) corresponding to the spacer is disposed on the display substrate to support the spacer. The orthographic projection of the support structure 106 on the substrate 101 is located in the orthographic projection of the first shading structure 105 on the substrate 101, so that the first shading structure 105 effectively shields backlight and light leakage is prevented.
In some embodiments, as shown in fig. 6, 7 and 8, the display substrate provided in the embodiments of the present disclosure may further include a layer where the second electrode 33 of the transistor 103, the flat layer 107 and the pixel electrode 108 are sequentially disposed on a side of the layer where the data line 102 is located facing the support structure 106, where the second electrode 33 passes through the second via hole V penetrating the flat layer 107 2 Electrically connected to the pixel electrode 108, the support structure 106 fills the second via V 2 The method comprises the steps of carrying out a first treatment on the surface of the To ensure that the first light shielding structure 105 completely shields the support structure 106 to prevent light leakage, the present disclosure may be disposed in a second direction X where the first direction Y is disposed across, a distance d between an orthographic projection boundary of the support structure 106 on the substrate 101 and an orthographic projection boundary of the first light shielding structure 105 on the substrate 101 1 Is larger than a preset value a, which satisfies the relation:wherein LS tol And/2 is the process fluctuation value, PLN, of the first light shielding structure 105 tol And/2 is a second via V 2 Process fluctuation value OL of (2) 1 Is the first light shielding structure 105 and the second via hole V 2 Is aligned with (a)Deviation value.
In the related art, the process fluctuation value LS of the first light shielding structure 105 tol 2 is 0.5 μm, and the second via hole V 2 Process fluctuation value PLN of (2) tol 2 is 1.2 μm, and the first light shielding structure 105 and the second via V 2 Is of the para-offset value OL 1 For 0.3 μm, a can be about 0.72 μm by combining the formula of the preset value a, so that the distance d between the orthographic projection boundary of the support structure 106 on the substrate 101 and the orthographic projection boundary of the first light shielding structure 105 on the substrate 101 in the present disclosure 1 May be greater than 0.72 μm, for example 0.75 μm.
In some embodiments, in the display substrate provided by the embodiments of the present disclosure, as shown in fig. 9 and fig. 10, the orthographic projection shape of the active layer 31 on the substrate 101 may be L-shaped or 1-shaped, so as to facilitate matching with the first light shielding structure 105 in a long strip shape, and improve the pixel aperture ratio of a high-resolution product.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, as shown in fig. 3, a plurality of second light shielding structures 105' located on one side of the first light shielding structure 105 and arranged side by side along the first direction Y may be further included; the active layer 31 may further include third lightly doped regions LDD disposed side by side along the extending direction of the data line 102 on one side of the data line 102 3 Second channel region CR 2 And a fourth lightly doped region LDD 4 The method comprises the steps of carrying out a first treatment on the surface of the Wherein the third lightly doped region LDD 3 The orthographic projection on the substrate 101 is located within the orthographic projection of the second light shielding structure 105' on the substrate 101; second channel region CR 2 The orthographic projection on the substrate 101 is located within the orthographic projection of the second light shielding structure 105' on the substrate 101; fourth lightly doped LDD region 4 The orthographic projection on the substrate 101 is located within the orthographic projection of the second light shielding structure 105' on the substrate 101.
First lightly doped region LDD 1 LDD of second lightly doped region 2 LDD of third lightly doped region 3 LDD of fourth lightly doped region 4 All are large resistance regions of the transistor 103, so that the on current of the transistor 103 can be effectively reduced, and the characteristics of the transistor 103 are ensured. By using the first light shielding structure 105First lightly doped region LDD 1 First channel region CR 1 And a second lightly doped region LDD 2 And the second light shielding structure 105' is used to shield the third lightly doped region LDD 3 Second channel region CR 2 And a fourth lightly doped region LDD 4 The backlight illumination of the first lightly doped region LDD can be effectively avoided 1 First channel region CR 1 LDD of second lightly doped region 2 LDD of third lightly doped region 3 Second channel region CR 2 And a fourth lightly doped region LDD 4 Resulting in leakage currents that affect the performance of transistor 103.
In some embodiments, in the above display substrate provided in the embodiments of the present disclosure, as shown in fig. 3 and 11, the first light shielding structure 105 includes a light shielding portion 105″ disposed side by side with the second light shielding structure 105', and the light shielding portion 105″ and the second light shielding structure 105' constitute an integral structure ls; the orthographic projection of the support structure 106 onto the substrate base plate 101 partially overlaps with the orthographic projection of the light shielding portion 105″ onto the substrate base plate 101, the orthographic projection of the support structure 106 onto the substrate base plate 101 partially overlaps with the orthographic projection of the second light shielding structure 105' onto the substrate base plate 101, and the orthographic projection of the support structure 106 onto the substrate base plate 101 is located within the orthographic projection of the integrated structure ls onto the substrate base plate 101. In a high resolution display product, in order to prevent the spacer (PS) from scratching the alignment film (PI) to cause a light leakage phenomenon, a support structure (picllow) corresponding to the spacer is disposed on the display substrate to support the spacer. The present disclosure is configured such that the orthographic projection of the support structure 106 on the substrate 101 is located within the orthographic projection of the integrated structure ls (composed of the light shielding portion 105″ and the second light shielding structure 105') on the substrate 101, so that the backlight can be effectively shielded by the integrated structure ls to prevent light leakage.
In some embodiments, in the above display substrate provided in the embodiments of the present disclosure, to ensure that the first light shielding structure 105 completely shields the support structure 106 to prevent light leakage, as shown in fig. 11, the present disclosure may be disposed in a first direction Y and in a second direction X where the first direction Y intersects, where an orthographic projection boundary of the support structure 106 on the substrate 101 and the integrated structure ls (formed by the light shielding portion 105″ and the second light shielding structure 105') are disposed on the substrateDistance d between orthographic projection boundaries on base substrate 101 2 The preset value a is greater than the preset value a, and the preset value a is the same as the preset value a, and specific reference is made to the above, and details are not repeated here.
In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as shown in fig. 3 and fig. 6, the orthographic projection shape of the active layer 31 on the substrate 101 may be approximately U-shaped, so as to increase the flow guiding channel of the transistor 103 and improve the performance of the transistor 103.
In some embodiments, as shown in fig. 4 and 7, the display substrate provided in the embodiments of the present disclosure may further include a buffer layer 109, a second interlayer dielectric layer 110, a passivation layer 111, a common electrode 112, a gate line 113, and the like, where the second electrode 33 of the transistor 103 may optionally pass through the second interlayer dielectric layer 110, the first interlayer dielectric layer ILD 1 And a third via V of the gate insulating layer GI 3 Electrically connected to the active layer 31, the transistor 103 may further include a gate 34, optionally with a corresponding first channel region CR in the gate line 113 1 And a second channel region CR 2 As part of gate 34. Other essential components of the display substrate will be understood by those of ordinary skill in the art, and are not described herein in detail, nor should they be considered as limiting the present disclosure.
Based on the same inventive concept, the embodiments of the present disclosure provide a display panel, which includes a display substrate and an opposite substrate that are opposite to each other, and a liquid crystal layer between the display substrate and the opposite substrate, where the display substrate is the display substrate provided by the embodiments of the present disclosure. Because the principle of solving the problem of the display panel is similar to that of the display substrate, the implementation of the display panel provided by the embodiment of the disclosure may refer to the implementation of the display substrate provided by the embodiment of the disclosure, and the repetition is omitted.
In some embodiments, in the above-described display panel provided in the embodiments of the present disclosure, as shown in fig. 8, in a case where the front projection of the support structure 106 of the display substrate onto the substrate 101 is located within the front projection of the first light shielding structure 105 onto the substrate 101; the spacers PS of the opposite substrate extend along a second direction X that is disposed to intersect the first direction Y, and an orthographic projection of the spacers PS on the substrate 101 intersects an orthographic projection of the support structure 106 on the substrate 101. In the process of aligning the display substrate and the opposite substrate, relative sliding of a certain distance can occur between the display substrate and the opposite substrate, under the condition that the spacer PS and the supporting structure 106 extend along the first direction Y, if relative sliding occurs, the spacer PS easily slides down the supporting structure 106, so that the alignment film (PI) is scratched, and display light leakage is caused.
In some embodiments, in the display panel provided in the embodiments of the present disclosure, as shown in fig. 11, in a case where the front projection of the support structure 106 of the display substrate on the substrate 101 is located within the front projection of the integrated structure ls (made up of the light shielding portion 105″ and the second light shielding structure 105') on the substrate 101, the front projection of the spacer PS of the opposite substrate on the substrate 101 may be located within the front projection of the support structure 106 on the substrate 101, so that the support structure 106 may effectively support the spacer PS, prevent the sliding of the spacer PS, and reduce the risk of light leakage. Alternatively, as shown in fig. 11 and 12, the orthographic projection shape of the support structure 106 on the substrate 101 may be square, and the orthographic projection shape of the spacer PS on the substrate 101 may be square, circular, etc., which is not limited herein.
In some embodiments, in the above display panel provided by the embodiments of the present disclosure, since the first light shielding structure 105 is used to realize the light shielding effect in the first direction Y, and the present disclosure may be applied to VR helmets or glasses, and no external ambient light is affected during use, the black matrix extending in the first direction Y on the opposite substrate may be saved in the present disclosure, in other words, the black matrix of the opposite substrate in the present disclosure may only include the third light shielding structure extending in the second direction X intersecting the first direction Y.
In some embodiments, the display panel provided in the embodiments of the present disclosure may further include a frame sealant, a polarizer, etc., which are all necessary components of the display panel for those skilled in the art, and the disclosure is not repeated herein.
Based on the same inventive concept, the embodiment of the disclosure provides a display device, which includes the display panel provided by the embodiment of the disclosure, and a backlight module located on a light incident side of the display panel. Because the principle of solving the problem of the display device is similar to that of the display panel, the implementation of the display device provided by the embodiment of the disclosure may refer to the implementation of the display panel provided by the embodiment of the disclosure, and the repetition is omitted.
In some embodiments, in the display device provided by the embodiments of the present disclosure, the backlight module may be a direct type backlight module or a side-in type backlight module. Alternatively, the side-entry backlight module may include a light bar, a reflective sheet, a light guide plate, a diffusion sheet, a prism group, and the like, which are stacked, and the light bar is located at one side of the light guide plate in the thickness direction of the light guide plate. The direct type backlight module can comprise a matrix light source, a reflecting sheet, a diffusion plate, a brightness enhancement film and the like, wherein the reflecting sheet, the diffusion plate, the brightness enhancement film and the like are arranged on the light emitting side of the matrix light source in a stacked mode, and the reflecting sheet comprises an opening which is opposite to the position of each lamp bead in the matrix light source. The beads in the light bar, the beads in the matrix light source may be Light Emitting Diodes (LEDs), such as Micro light emitting diodes (Mini LEDs, micro LEDs, etc.).
Micro light emitting diodes of the sub-millimeter order and even of the micrometer order are self-luminous devices as are Organic Light Emitting Diodes (OLEDs). As with organic light emitting diodes, it has a series of advantages of high brightness, ultra low delay, ultra large viewing angle, etc. And because the inorganic light-emitting diode emits light based on a metal semiconductor with more stable property and lower resistance, compared with the organic light-emitting diode which emits light based on an organic substance, the inorganic light-emitting diode has the advantages of lower power consumption, higher high temperature and low temperature resistance and longer service life. And when the miniature light-emitting diode is used as a backlight source, a more precise dynamic backlight effect can be realized, the glare phenomenon caused between the bright and dark areas of the screen by the traditional dynamic backlight can be solved while the brightness and the contrast of the screen are effectively improved, and the visual experience is optimized.
In some embodiments, the display device provided by the embodiments of the present disclosure may be: projectors, 3D printers, virtual reality devices, cell phones, tablet computers, televisions, displays, notebook computers, digital photo frames, navigators, smartwatches, fitness bracelets, personal digital assistants, and any other product or component having a display function. The display device includes, but is not limited to: the system comprises a radio frequency unit, a network module, an audio output and input unit, a sensor, a display unit, a user input unit, an interface unit, a control chip and the like. Optionally, the control chip is a central processing unit, a digital signal processor, a system on chip (SoC), or the like. For example, the control chip may further include a memory, a power module, and the like, and realize power supply and signal input/output functions through wires, signal lines, and the like that are additionally provided. For example, the control chip may also include hardware circuitry, computer-executable code, and the like. The hardware circuitry may include conventional Very Large Scale Integration (VLSI) circuits or gate arrays, off-the-shelf semiconductors such as logic chips, transistors, or other discrete components; the hardware circuitry may also include field programmable gate arrays, programmable array logic, programmable logic devices, or the like. In addition, it will be understood by those skilled in the art that the above structures do not constitute limitations of the above display device provided by the embodiments of the present disclosure, in other words, more or fewer components described above may be included in the above display device provided by the embodiments of the present disclosure, or certain components may be combined, or different arrangements of components may be provided.
Although the present disclosure has described preferred embodiments, it should be understood that various changes and modifications to the disclosed embodiments may be made by those skilled in the art without departing from the spirit and scope of the disclosed embodiments. Thus, given that such modifications and variations of the disclosed embodiments fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is also intended to encompass such modifications and variations.
Claims (15)
1. A display substrate, comprising:
a substrate base;
the data line is positioned on one side of the substrate base plate and extends along a first direction;
the transistor comprises an active layer and a first electrode, wherein the local multiplexing of the data line is the first electrode, and the active layer is positioned between the layer where the data line is positioned and the substrate;
the insulating layer is positioned between the layer where the data line is positioned and the active layer, and the first electrode and the active layer are electrically connected with the active layer through a first via hole penetrating through the insulating layer;
the first shading structure is located between the active layer and the substrate, the first shading structure extends along the first direction, orthographic projection of the data line on the substrate is located in orthographic projection of the first shading structure on the substrate, orthographic projection of the first via hole on the substrate is located in orthographic projection of the first shading structure on the substrate.
2. The display substrate of claim 1, wherein the active layer comprises a first lightly doped region, a first channel region, and a second lightly doped region disposed side by side in the first direction; wherein,
the orthographic projection of the first lightly doped region on the substrate is positioned in the orthographic projection of the first shading structure on the substrate;
the orthographic projection of the first channel region on the substrate is positioned in the orthographic projection of the first shading structure on the substrate;
the orthographic projection of the second lightly doped region on the substrate is positioned in the orthographic projection of the first shading structure on the substrate.
3. The display substrate of claim 2, further comprising a support structure on a side of the layer of data lines remote from the substrate, the support structure extending in the first direction, and an orthographic projection of the support structure on the substrate being within an orthographic projection of the first light shielding structure on the substrate.
4. The display substrate according to claim 3, further comprising a layer where a second electrode of the transistor, a flat layer, and a pixel electrode are sequentially disposed on a side of the layer where the data line faces the layer where the support structure is disposed, the second electrode being electrically connected to the pixel electrode through a second via penetrating the flat layer, the support structure filling the second via;
in a second direction in which the first direction is crossed, a distance between a front projection boundary of the support structure on the substrate and a front projection boundary of the first light shielding structure on the substrate is greater than a preset value a, and the preset value a satisfies a relation:wherein LS tol And/2 is the process fluctuation value of the first shading structure, PLN tol And/2 is the process fluctuation value of the second via hole, OL 1 And the first shading structure and the second via hole are the para-position deviation value.
5. The display substrate according to any one of claims 2 to 4, wherein the orthographic projection shape of the active layer on the substrate is L-shaped or 1-shaped.
6. The display substrate of claim 2, further comprising a plurality of second light shielding structures positioned side by side along the first direction on one side of the first light shielding structure;
the active layer further includes a third lightly doped region, a second channel region, and a fourth lightly doped region disposed side by side along the first direction on one side of the data line; wherein,
the orthographic projection of the third lightly doped region on the substrate is positioned in the orthographic projection of the second shading structure on the substrate;
the orthographic projection of the second channel region on the substrate is positioned in the orthographic projection of the second shading structure on the substrate;
the orthographic projection of the fourth lightly doped region on the substrate is positioned in the orthographic projection of the second shading structure on the substrate.
7. The display substrate according to claim 6, wherein the first light shielding structure includes a light shielding portion provided side by side with the second light shielding structure, the light shielding portion and the second light shielding structure constituting an integral structure;
the display substrate further comprises a support structure which is positioned on one side of the layer where the data line is positioned, far away from the substrate, the orthographic projection of the support structure on the substrate is overlapped with the orthographic projection of the shading part on the substrate, the orthographic projection of the support structure on the substrate is overlapped with the orthographic projection of the second shading structure on the substrate, and the orthographic projection of the support structure on the substrate is positioned in the orthographic projection of the integral structure on the substrate.
8. The display substrate of claim 7, wherein a distance between an orthographic projection boundary of the support structure on the substrate and an orthographic projection boundary of the unitary structure on the substrate in the first direction and in a second direction disposed crosswise to the first direction is greater than a preset value a.
9. The display substrate according to any one of claims 2 to 4 and 6 to 8, wherein the orthographic projection shape of the active layer on the substrate is a U-shape.
10. The display substrate according to any one of claims 1 to 4, 6 to 8, wherein the aperture of the first via hole gradually increases in a direction away from the substrate;
the width w of the first shading structure in the second direction which is arranged in a crossing manner in the first direction and the maximum caliber d of the first via hole meet the relation:wherein LS tol And/2 is the process fluctuation value of the first shading structure, via tol And/2 is the process fluctuation value of the first via hole, OL 2 And the first shading structure and the first via hole are used as the para-position deviation value.
11. A display panel comprising a display substrate and a counter substrate which are arranged opposite to each other, and a liquid crystal layer between the display substrate and the counter substrate, wherein the display substrate is a display substrate according to any one of claims 1 to 10.
12. The display panel of claim 11, wherein the display substrate includes a support structure, an orthographic projection of the support structure on the substrate being within an orthographic projection of the first light shielding structure on the substrate;
the opposite substrate comprises a spacer, the spacer extends along a second direction which is arranged in a crossing manner with the first direction, and orthographic projection of the spacer on the substrate is arranged in a crossing manner with orthographic projection of the supporting structure on the substrate.
13. The display panel of claim 11, wherein the display substrate includes a support structure, an orthographic projection of the support structure on the substrate being within an orthographic projection of a unitary structure on the substrate;
the opposite substrate comprises a spacer, and the orthographic projection of the spacer on the substrate is positioned in the orthographic projection of the supporting structure on the substrate.
14. The display panel according to any one of claims 11 to 13, wherein the counter substrate further includes a black matrix including only a third light shielding structure extending in a second direction disposed to intersect the first direction.
15. A display device comprising a display panel according to any one of claims 11 to 14 and a backlight module at the light entrance side of the display panel.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202211185574.1A CN117826488A (en) | 2022-09-27 | 2022-09-27 | Display substrate, display panel and display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202211185574.1A CN117826488A (en) | 2022-09-27 | 2022-09-27 | Display substrate, display panel and display device |
Publications (1)
Publication Number | Publication Date |
---|---|
CN117826488A true CN117826488A (en) | 2024-04-05 |
Family
ID=90506573
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202211185574.1A Pending CN117826488A (en) | 2022-09-27 | 2022-09-27 | Display substrate, display panel and display device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN117826488A (en) |
-
2022
- 2022-09-27 CN CN202211185574.1A patent/CN117826488A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US12175947B2 (en) | Display device | |
US10868047B2 (en) | Array substrate, display panel and display device | |
CN113359344A (en) | Array substrate, liquid crystal display panel and liquid crystal display device | |
US20250155762A1 (en) | Display substrate, display panel and display device | |
US20240355834A1 (en) | Display substrate, display panel, and display apparatus | |
CN105679773A (en) | Array substrate and preparation method thereof | |
CN117826488A (en) | Display substrate, display panel and display device | |
CN117608135A (en) | Array substrate, display panel and display device | |
US12349468B2 (en) | Array substrate and display apparatus | |
EP4589376A1 (en) | Array substrate, manufacturing method therefor and display apparatus | |
EP4589377A1 (en) | Array substrate and display apparatus | |
US20240363648A1 (en) | Display substrate and display apparatus | |
US20250224642A1 (en) | Display substrate and manufacturing method therefor, display panel and display device | |
EP4521901A1 (en) | Display substrate, display apparatus, and motherboard | |
US11221528B2 (en) | Electro-optical device and electronic apparatus | |
CN119960232A (en) | Array substrate, display panel and display device | |
CN120178563A (en) | Display panel and display device | |
WO2025082065A1 (en) | Array substrate, display panel, and display device | |
CN118556205A (en) | Array substrate, manufacturing method thereof and display device | |
CN120178562A (en) | Array substrate, display panel and display device | |
WO2025065534A1 (en) | Array substrate and display apparatus | |
CN118092007A (en) | Array substrate, opposite substrate, display panel and display device | |
CN119087719A (en) | Array substrate, manufacturing method thereof, display panel and display device | |
CN120255221A (en) | Array substrate, display panel and display device | |
CN120255223A (en) | Array substrate, display panel and display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |