CN117743017A - Fault root cause positioning method, device, equipment and storage medium - Google Patents
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Abstract
The embodiment provides a fault root cause positioning method, device, equipment and storage medium. The method comprises the following steps: constructing a software and hardware topological graph through a structural model; the structure model is used for standardizing the format of deployment data and providing a use interface for the outside; the deployment data comprises a plurality of vertexes and dependency relations among the vertexes; constructing an initial fault propagation diagram through an event model; the event model is used for standardizing the formats of all the events on each fault vertex and providing a use interface for the outside; correcting the initial fault propagation diagram based on the software and hardware topological diagram to obtain a target fault propagation diagram; and determining root nodes and root events according to the target fault propagation diagram. According to the method, the device and the system, the initial fault propagation diagram is determined through the event model, the initial fault propagation diagram is corrected through the software and hardware topological diagram determined through the structure model, the target fault propagation diagram is obtained, and the root cause node and the root cause event are determined according to the target fault propagation diagram, so that the accuracy of fault root cause positioning can be improved.
Description
Technical Field
The embodiment of the disclosure relates to the technical field of artificial intelligence, in particular to a fault root cause positioning method, device, equipment and storage medium.
Background
Under the background of the mobile internet, more and more traditional industries adopt a cloud native architecture in the processes of digital transformation and cloud loading, and original single applications are split into hundreds of micro-service applications, and each micro-service application is deployed on thousands of container examples. One micro-service application can provide services for a plurality of service links at the same time, so that a complex calling relationship exists between the micro-service applications. When an exception occurs to one micro-service application, it will affect multiple micro-service applications downstream of the call link, ultimately affecting the success rate of the entire service chain. Meanwhile, when the micro service is abnormal, the abnormality can be possibly spread to a plurality of micro service applications to form an alarm storm, the phenomenon is called fault spreading (Anomaly propagation), and the actual service is difficult to meet by simply relying on manual fault root positioning.
To meet the increasing demands of enterprises for digital and intelligent transformation, high-efficiency and low-cost intelligent operation and maintenance (Artificial Intelligence for IT Operations, AIOps) are generated. Based on an automatic operation and maintenance platform, big data and a machine learning method are fused by utilizing an artificial intelligence technology, and operation and maintenance scene knowledge is mainly learned and updated, so that decision support is provided for solving the operation and maintenance problem. The fault root cause analysis (Root cause analysis, RCA) realizes an efficient and intelligent fault investigation mode by introducing technologies such as machine learning and the like, and presumes the root cause fault of the system from a group of abnormal alarms, so that the problem of fault diffusion caused by micro-service abnormality can be well solved.
In a micro-service architecture, the data that can be used for root cause analysis includes monitoring data, which is divided into call chains (tracks), logs (Logs), metrics (Metrics), and deployment data, which is mainly data in a configuration management database (Configurationmanagement database, CMDB). At present, aiming at fault root cause positioning of micro services, most researches only perform fault root cause positioning based on single item or a few items of data in the data under the micro service architecture because of heterogeneous and massive data, so that the fault root cause positioning accuracy is low.
Disclosure of Invention
The embodiment of the disclosure provides a fault root cause positioning method, device, equipment and storage medium, which can improve the accuracy of fault root cause positioning.
In a first aspect, an embodiment of the present disclosure provides a fault root cause positioning method, including: constructing a software and hardware topological graph through a structural model; the structure model is used for standardizing the format of deployment data and providing a use interface for the outside; the deployment data comprises a plurality of vertexes and dependency relations among the vertexes; constructing an initial fault propagation diagram through an event model; the event model is used for standardizing the formats of all the events on each fault vertex and providing a use interface for the outside; correcting the initial fault propagation diagram based on the software and hardware topological diagram to obtain a target fault propagation diagram; and determining root cause nodes and root cause events according to the target fault propagation diagram.
In a second aspect, an embodiment of the present disclosure further provides a fault root cause positioning device, including: the software and hardware topological graph construction module is used for constructing a software and hardware topological graph through the structural model; the structure model is used for standardizing the format of deployment data and providing a use interface for the outside; the deployment data comprises a plurality of vertexes and dependency relations among the vertexes; the initial fault propagation graph building module is used for building an initial fault propagation graph through an event model; the event model is used for standardizing the formats of all the events on each fault vertex and providing a use interface for the outside; the correction module is used for correcting the initial fault propagation diagram based on the software and hardware topological diagram to obtain a target fault propagation diagram; and the fault root positioning module is used for determining root nodes and root events according to the target fault propagation diagram.
In a third aspect, embodiments of the present disclosure further provide an electronic device, including:
one or more processors;
storage means for storing one or more programs,
the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the fault root cause localization method as described in embodiments of the present disclosure.
In a fourth aspect, the disclosed embodiments also provide a storage medium containing computer-executable instructions, which when executed by a computer processor, are for performing the fault cause localization method as described in the disclosed embodiments.
According to the technical scheme disclosed by the embodiment, a software and hardware topological graph is constructed through a structural model; the structure model is used for standardizing the format of deployment data and providing a use interface for the outside; the deployment data comprises a plurality of vertexes and dependency relations among the vertexes; constructing an initial fault propagation diagram through an event model; the event model is used for standardizing the formats of all the events on each fault vertex and providing a use interface for the outside; correcting the initial fault propagation diagram based on the software and hardware topological diagram to obtain a target fault propagation diagram; and determining root cause nodes and root cause events according to the target fault propagation diagram. According to the embodiment of the disclosure, the initial fault propagation diagram is determined through the event model, the initial fault propagation diagram is corrected through the software and hardware topological diagram determined through the structure model, the target fault propagation diagram is obtained, and the root cause node and the root cause event are determined according to the target fault propagation diagram, so that the accuracy of fault root cause positioning can be improved.
Drawings
The above and other features, advantages, and aspects of embodiments of the present disclosure will become more apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings. The same or similar reference numbers will be used throughout the drawings to refer to the same or like elements. It should be understood that the figures are schematic and that elements and components are not necessarily drawn to scale.
FIG. 1 is a schematic flow chart of a fault root cause positioning method according to an embodiment of the present invention;
FIG. 2 is a software and hardware topology diagram provided by an embodiment of the present invention;
FIG. 3 is an initial fault propagation diagram provided by an embodiment of the present invention;
FIG. 4 is a target fault propagation diagram provided by an embodiment of the present invention;
FIG. 5 is a schematic diagram of a fault root cause positioning device according to an embodiment of the disclosure;
fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the disclosure.
Detailed Description
Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present disclosure have been shown in the accompanying drawings, it is to be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustration purposes only and are not intended to limit the scope of the present disclosure.
It should be understood that the various steps recited in the method embodiments of the present disclosure may be performed in a different order and/or performed in parallel. Furthermore, method embodiments may include additional steps and/or omit performing the illustrated steps. The scope of the present disclosure is not limited in this respect.
The term "including" and variations thereof as used herein are intended to be open-ended, i.e., including, but not limited to. The term "based on" is based at least in part on. The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments. Related definitions of other terms will be given in the description below.
It should be noted that the terms "first," "second," and the like in this disclosure are merely used to distinguish between different devices, modules, or units and are not used to define an order or interdependence of functions performed by the devices, modules, or units.
It should be noted that references to "one", "a plurality" and "a plurality" in this disclosure are intended to be illustrative rather than limiting, and those of ordinary skill in the art will appreciate that "one or more" is intended to be understood as "one or more" unless the context clearly indicates otherwise.
It will be appreciated that the data (including but not limited to the data itself, the acquisition or use of the data) involved in the present technical solution should comply with the corresponding legal regulations and the requirements of the relevant regulations.
FIG. 1 is a schematic flow chart of a fault root cause positioning method according to an embodiment of the present invention; the present embodiment is applicable to the case of locating root cause failure nodes (i.e. root cause nodes, i.e. root cause vertices) and root cause events in a micro-service architecture, and the method may be executed by a failure root cause locating device, and specifically includes the following steps:
s110, constructing a software and hardware topological graph through a structural model.
The structure model is used for standardizing the format of deployment data and providing a use interface for the outside; the deployment data includes a plurality of vertices and dependencies between the vertices.
Illustratively, the specific format of the single structural model is as follows:
{ "id" ("name" ("topology"), "tag": ")," vertical "(" vertex 1, vertex 2, vertex 3, … ")," edge "(" vertex 1, vertex 2), (vertex 1, vertex 3), … ], "update_time" ("2023-11-0819:35:24" })
Wherein name represents the name of the deployment data, plastics represents all vertices of the deployment data, and edges represent all dependencies of the deployment data.
Under each vertex, dividing a plurality of data again, indicating the content of the id, name, monitored index, trigger event and the like of the vertex, wherein the specific format of the single vertex is as follows:
{ "id" ("name" ("Mariadb"), "comment" ("attributes" ({ }), "related_metric_modules": [ index 1, index 2, … ], "related_event_modules": [ event 1, event 2, … ] }
In this embodiment, the deployment data may be called through the structural model, and a software-hardware topology map may be constructed through the deployment data, where the software-hardware topology map may be understood as a standard directed graph formed by all vertices and edges of the deployment data.
Optionally, constructing the software and hardware topological graph through the structural model includes: invoking deployment data through the structural model; and constructing a software and hardware topological graph based on the multiple vertexes in the deployment data and the dependency relationship among the vertexes.
In this embodiment, deployment data is called by the structural model, and the accuracy of software and hardware topology graph construction can be improved based on the manner that the software and hardware topology graph is constructed by a plurality of vertexes in the deployment data and the dependency relationship between the vertexes. Exemplary embodiments Based on the structural model, extracting all vertexes and side relations in json (JavaScript Object Notation) data, constructing a software and hardware topological graph, and outputting as follows: g top ＝(V,E)。
S120, constructing an initial fault propagation diagram through an event model.
The event model is used for standardizing the formats of all the events on each fault vertex and providing a use interface for the outside.
In this embodiment, according to the vertices in the event model, the event occurring on each failure vertex can be found. The specific format for one of the events is as follows: { "id" ("title": "nginx client access timeout" ("event_model_id" ("event_model_name":) nginx client access timeout "," data_source "(" data_source ":) nginx client time-out", "data_source_name": "nginx client time-out", "data_source_type": "meta_model": "2023-11-0814:03:00+08:00", "message": "the value ofevent model nginx client access timeout …", … })
Wherein event_model_name represents event name, data_source_type and data_source_name represent event source type and event source name, trigger_time represents occurrence time of event, and message represents details of event occurrence.
The event model can detect different indexes and logs, so that the multi-mode data generated by faults can be effectively utilized, and the subsequent event root positioning can be facilitated
In this embodiment, since the event model may obtain the corresponding event through the obtained anomaly log and/or anomaly index, and determine the node with the failure in combination with the structure model, all the events with the failure at each failure vertex may be obtained through the event model, and an initial failure propagation graph is constructed based on each failure vertex and the events with the failure at each failure vertex. An initial fault propagation graph may be understood as an initial directed graph consisting of fault vertices and directed relationships between the fault vertices.
Optionally, constructing the initial fault propagation graph through the event model includes: acquiring each fault vertex and an event occurring on each fault vertex through the event model; determining whether an association relationship exists between each failure vertex; converting the events occurring on each fault vertex into an event time sequence; if the association relation exists between every two fault vertexes, determining the hysteresis cross correlation of every two fault vertexes based on the event time sequence of every two fault vertexes; determining a directed relationship of the pairwise fault vertices based on the hysteresis cross-correlation; and constructing an initial fault propagation diagram based on the directed relation of the fault vertexes.
In this embodiment, each failure vertex and an event occurring on each failure vertex are obtained through the event model; an association term mining algorithm in an association rule algorithm Apriori can be used for dividing windows, then mining association relations among all fault vertexes, and generating an undirected graph based on all the fault vertexes and the association relations among the fault vertexes. After the undirected graph is obtained, converting the event occurring on each fault vertex into an event time sequence, and outputting the event time sequence as follows:
m i ＝{x 1 ,x 2 ,x 3 ,…,x n }；
wherein m is i Representing failure vertex V i Time series of events, x n Representing failure vertex V i At time n (e.g., n=1, indicating 1 st second), whether an event has occurred. If 0, it indicates that no event has occurred, and if 1, it indicates that an event has occurred.
Illustratively, the hysteresis cross-correlation is calculated as follows:
k＝(len(m i )-1)/2；
wherein k represents the bias,representing array elements that participate in the convolution.
Lay i,j ＝len(corr(m i ,m j ))MOD 2-argmax(corr(m i ,m j ))；
Wherein, lay i,j Indicating the lag cross-correlation, len () gives the length of the string.
If Lay i,j >0, representing vertex V i Leading ahead of V j According to the calling rule, V can be obtained j Dependent on V i . After the operation is carried out on every two fault peaks, an initial fault propagation graph G can be obtained fpd = (V, E). A value equal to 0 indicates that there is no hysteresis between the two vertices, which occurs simultaneously. If Lay i,j =0, which can be classified as Lay i,j <0。
Optionally, determining whether an association relationship exists between each failure vertex includes: dividing fault vertexes based on a set total duration window, a set window duration width and overlapping duration among windows to obtain a window set; the window of the set total duration comprises a plurality of windows, and the duration width of the set windows is the duration of each window; each window comprises a fault vertex which occurs in the duration width of the corresponding set window; taking the fault vertexes in the window set as candidate vertexes to obtain a candidate vertex set; determining the support degree of each candidate vertex in the candidate vertex set based on the number of times each candidate vertex appears in the window set and the length of the window set; determining a frequent item set based on the support degree of each candidate vertex and a set support degree threshold; converting the vertex pairwise combinations in the frequent item set into candidate item sets; determining the support degree of each candidate item in the candidate item set based on the occurrence times of each candidate item in the window set and the length of the window set; determining the confidence of each candidate item based on the support of each candidate item and the support of each candidate vertex; and determining whether an association relationship exists between every two fault vertexes in each candidate item based on the support degree of each candidate item and the confidence degree of each candidate item.
Specifically, the window duration can be set based on the set total duration windowDividing fault vertexes at different moments by the width and the overlapping time length between the windows to obtain a window set, setting the window time length width as width, the overlapping time length as interval, and setting data contained in each window as the fault vertexes occurring in the moment corresponding to the current window. Finally, window set item= [ item ] is obtained 1 ,item 2 ,item 3 ,…,item n ]. For example, the total duration window is set to 5 minutes, the duration width of the window is set to one minute, and the overlapping duration is 10 seconds, such as item 1 Window of 0-60 seconds, item 2 A window of 50 seconds to 110 seconds, and so on until a total duration of 5 minutes is reached.
Illustratively, the support threshold is set to a minimum support min_sup, the confidence threshold is set to a minimum confidence min_cof, and the number of items k is initially 1. When the term k=1, all the failure vertexes in the default window set are candidate vertexes, and a candidate vertex set C is obtained 1 . Based on this, the support degree Sup of a single failure vertex is calculated as follows:
wherein, sup (V) represents the support degree of the candidate vertex V, d (V) represents the number of times the candidate vertex V appears in the window set, and a single vertex has only two cases of 0 and 1 in a single window, 0 represents non-occurrence, and 1 represents occurrence. len (item) represents the length of the window set.
Judging whether the support degree of all candidate vertexes is larger than or equal to a set support degree threshold, if the support degree of the candidate vertexes is larger than or equal to the set support degree threshold, taking the corresponding candidate vertexes as frequent items to obtain a frequent item set L 1 。
When k=2, based on the frequent item set L 1 To collect frequent items L 1 The vertex two-by-two combination of the candidate set C 2 If candidate item C appears 2 (V a ,V b ) The support and confidence of this candidate is calculated as follows:
wherein d (V) a ,V b ) Representing the number of times two vertices in a candidate appear simultaneously in the window set, sup (V a ,V b ) Representing candidates (V) a ,V b ) Support of (C), cof (V) a ,V b ) Representing candidates (V) a ,V b ) Is the confidence level of Sup (V) a ) Representing the vertex V a Is a support of (1).
And determining whether an association relationship exists between every two fault vertexes in each candidate item according to the support degree of each candidate item, the set support degree threshold value, the confidence degree of each candidate item and the set confidence degree threshold value.
Optionally, determining whether an association exists between every two failure vertices in each candidate item based on the support degree of each candidate item and the confidence degree of each candidate item includes: for any one candidate item, if the support degree of the candidate item is greater than or equal to the set support degree threshold value, and the confidence degree of the candidate item is greater than or equal to the set confidence degree threshold value, the association relationship exists between every two fault vertexes in the candidate item.
Exemplary, if the candidate support Sup (V a ,V b ) Setting a support threshold value min_Sup more than or equal to V a ,V b Belonging to frequent item set L 2 If the candidate confidence Cof (V a ,V b ) Setting confidence threshold value min_cof to be equal to or greater than the preset confidence threshold value, and representing V a ,V b There is a strong association. Traversing frequent item set L 2 All frequent items L of (1) 2 And judging whether the confidence coefficient of the option is larger than or equal to a set confidence coefficient threshold value in the traversal process, and obtaining the association item set among different fault vertexes. Because only need to know whether there is any fault vertex between every two fault vertices in the root cause positioning processIn the association relationship, therefore, only the case where k=2 needs to be calculated.
S130, correcting the initial fault propagation diagram based on the software and hardware topological diagram to obtain a target fault propagation diagram.
In this embodiment, the directional relationship in the initial fault propagation diagram is corrected based on the software and hardware topological diagram, so as to obtain the target fault propagation diagram, and ensure the reliability of the target fault propagation diagram. The target fault propagation graph may be understood as a target directed graph consisting of fault vertices and directed relationships between the fault vertices. The target fault propagation map may be understood as a target directed map after correction of the initial fault propagation map.
And S140, determining a root node and a root event according to the target fault propagation diagram.
In this embodiment, the failed root node may be determined according to the target fault propagation graph and the random walk algorithm, and the failed root event may be obtained according to the event occurring on the root node.
Optionally, determining the root cause node and the root cause event according to the target fault propagation graph includes: constructing a transition probability matrix based on the target fault propagation graph; normalizing the transition probability matrix to obtain a target transition probability matrix; performing random walk based on the set walk number and the target transition probability matrix by the set number of walkers; determining a number of rovers at each fault vertex in the target fault propagation graph based on the result of the random walk; taking the fault vertex with the maximum number of roamers as a root cause node; and taking the event with the largest occurrence frequency in the root cause node as the root cause event.
Exemplary, target-based fault propagation graph G fpd = (V, E) initializing transition probability matrix W for directed edge E i,j E, respectively calculating forward transition probabilities W i,j Backward transition probability W j,i And dwell probability W i,i The calculation formula is as follows:
W i,j ＝S i,j ；
W j,i ＝ρS i,j ；
W i,i ＝max{[S m,i ,0.001]|m:e m,i ∈E}；
wherein S is i,j Representing the vertex V i And vertex V j Pearson correlation coefficient between, S i,j ∈[0,1]。ρ∈[0,1]Representing the magnitude of the discounting factor, ρ, limits the backward transition probability of the random walk algorithm to a different extent. In order to prevent all the migration probabilities of the vertices from being 0, the minimum migration probability of the vertices is set as the stay probability, and the minimum value is set to be 0.001.
After each fault vertex and each fault edge are traversed circularly, a transition probability matrix W can be constructed, and the transition probability matrix is normalized to obtain a target transition probability matrix, wherein the normalization method comprises the following steps:
the target transition probability matrix can be obtained according to the normalization method.
Obtaining a target transition probability matrixThen, the number of roamers is set as r, the number of walks is set as step, and the goal transition probability matrix is started to be +.>Carrying out random walk to obtain a random walk result, wherein the random walk result is that different numbers of walkers exist on each fault vertex in the target fault propagation diagram, counting the number of walkers on all fault vertices, sequencing from large to small, and outputting a vertex list R= [ V ] a ,V b ,V c ,…,V n ]Wherein V is a To stay at the vertex with the greatest number of roamers. Vertex list based on acquisition R, select the first vertex V a And taking the event as a root node, counting the event content occurring on the root node, and finally selecting the event with the largest occurrence number as the root event.
Rca_Event＝max{Event i |i:Event i ∈V a }；
Wherein, rca_Event represents the last output root cause Event, event i Representing the vertex V a A type of fault event that occurs in the system.
Optionally, the specific process of performing random walk by the set number of walkers based on the set number of walks and the target transition probability matrix is as follows: each rover randomly selects an initial fault vertex in the target fault propagation diagram, transfers according to the target transfer probability matrix, and the set number of steps of the rover is subtracted by 1 every transfer step; when the set number of walks is 0 or a stay condition occurs for the first time, the number of walkers is increased by 1 on the corresponding fault vertex.
The following is an exemplary process for positioning root nodes and root events according to the embodiment of the present invention:
for example: fault occurrence time: 2023-11-0814:03:00-2023-11-0814:07:00
The root cause of the fault is as follows: the Mariadb mirror image pulls the bug, the page performs some request operations, and returns an error.
Step one: data preparation phase
Firstly, normalized multi-mode data, namely deployment data, index data and log data, are obtained by calling interfaces of a structure model and an event model.
And step two, constructing a software and hardware topological graph based on the structural model. As shown in fig. 2, fig. 2 is a software and hardware topology diagram provided in an embodiment of the present invention. FIG. 2 shows only a partial topology, with vertices exemplified by web-portal, sharemgnt, mariadb, webservice and oauth-ui.
And thirdly, constructing an initial fault propagation diagram based on the event model.
Illustratively, the following parameter values are set in the process of constructing the initial fault propagation map:
table 1 association study parameter value setting table
Based on the data of the event model, an initial fault propagation diagram is constructed by using a correlation item mining algorithm and hysteresis correlation, as shown in fig. 3, fig. 3 is the initial fault propagation diagram provided by the embodiment of the invention, and fig. 3 only shows three fault vertices.
And step four, correcting the initial fault propagation diagram to obtain a target fault propagation diagram. Combining the software and hardware topological graph and the initial fault propagation graph, a target fault propagation graph can be constructed: as shown in fig. 4, fig. 4 is a target fault propagation diagram provided by an embodiment of the present invention, where the directional relationship of the edges in fig. 3 is corrected to obtain fig. 4.
Step five: a transition probability matrix is calculated. Based on the constructed target fault propagation diagram, the transfer probability matrix W of the target fault propagation diagram is calculated by using the Pearson correlation coefficient and normalized. Taking the failure vertex web-portal and Mariadb as examples, the transition probability calculation process is demonstrated:
suppose G fpd ＝(V,E)，V＝[V web ,V Mariadb ]，E＝[(V web ,V Mariadb )]
Initializing a transition probability matrix as
The event time sequence of the web-portal vertices is:
m web ＝[0,1,0,0,1,0,0,1,1,1,0,0,0,0]
the event time sequence of the mariadib vertex is:
m Mariadb ＝[1,0,1,1,0,1,1,0,0,0,0,0,0,0]
then
Setting ρ=0.1, based on S web,Mariadb Can calculate W web,Mariadb ，W Mariadb,web ，W web,web ，W Mariadb,Mariadb 。
W web,Mariadb ＝S web,Mariadb ＝0.556
W Mariadb,web ＝ρS web,Mariadb ＝0.0556
W web,web ＝max(W Mariadb,web ,0.001)＝0.0556
W Mariadb,Mariadb ＝max(W web,Mariadb ,0.001)＝0.556
And then normalizing the transfer matrix to obtain:
and calculating the content of the fault according to the calculation method, wherein the final normalized transition probability matrix is shown in the following table: (take web-portal, sharemgnt and Mariadb failure vertices as examples)
Table 2 normalized transition probability matrix
Step six: and calculating a random walk result. Setting the number r of the roamers as 100, setting the step number of the roamers as 3, and ending the roamer walk when the walk stop condition is that the step number is set as 0 or the stay condition occurs for the first time.
TABLE 3 fault vertex root cause location results table
And obtaining a result, wherein the Mariadb fault vertex is the most likely root cause vertex, and subsequent root cause event positioning is performed based on the Mariadb fault vertex.
Step seven: root cause event localization
And carrying out statistical analysis on the events on the fault vertex Mariadb, finding out the event with the largest occurrence frequency as a root cause event and outputting the event.
Table 4 root cause event statistics table
The last output event with earliest occurrence time in the root cause event category is:
TABLE 5 root cause event results Table
Table 5 shows an event of the event type Error:ImagePullBackoff and takes this event as a root event, and specifically shows the details of the root event.
According to the technical scheme disclosed by the embodiment, a software and hardware topological graph is constructed through a structural model; the structure model is used for standardizing the format of deployment data and providing a use interface for the outside; the deployment data comprises a plurality of vertexes and dependency relations among the vertexes; constructing an initial fault propagation diagram through an event model; the event model is used for standardizing the formats of all the events on each fault vertex and providing a use interface for the outside; correcting the initial fault propagation diagram based on the software and hardware topological diagram to obtain a target fault propagation diagram; and determining root cause nodes and root cause events according to the target fault propagation diagram. According to the embodiment of the disclosure, the initial fault propagation diagram is determined through the event model, the initial fault propagation diagram is corrected through the software and hardware topological diagram determined through the structure model, the target fault propagation diagram is obtained, and the root cause node and the root cause event are determined according to the target fault propagation diagram, so that the accuracy of fault root cause positioning can be improved.
Compared with the traditional root cause positioning method, the structure model and the event model in the embodiment of the invention can unify the standard use of multi-mode data (namely deployment data, index data and log data), wherein the event model can well solve the heterogeneous situation of the index data and the log data. Further analysis and research on root cause events are carried out after the random walk algorithm, and root cause granularity is deepened.
Fig. 5 is a schematic structural diagram of a fault root cause positioning device according to an embodiment of the present disclosure, as shown in fig. 5, where the device includes: the system comprises a software and hardware topological graph construction module 510, an initial fault propagation construction module 520, a correction module 530 and a fault root cause positioning module 540;
the software and hardware topological graph construction module 510 is used for constructing a software and hardware topological graph through a structural model; the structure model is used for standardizing the format of deployment data and providing a use interface for the outside; the deployment data comprises a plurality of vertexes and dependency relations among the vertexes;
an initial fault propagation map building module 520, configured to build an initial fault propagation map through the event model; the event model is used for standardizing the formats of all the events on each fault vertex and providing a use interface for the outside;
The correction module 530 is configured to correct the initial fault propagation diagram based on the software and hardware topological diagram, so as to obtain a target fault propagation diagram;
the fault root positioning module 540 is configured to determine a root node and a root event according to the target fault propagation graph.
According to the technical scheme disclosed by the embodiment, a software and hardware topological graph construction module constructs a software and hardware topological graph through a structural model; the structure model is used for standardizing the format of deployment data and providing a use interface for the outside; the deployment data comprises a plurality of vertexes and dependency relations among the vertexes; the initial fault propagation diagram modeling block builds an initial fault propagation diagram through an event model; the event model is used for standardizing the formats of all the events on each fault vertex and providing a use interface for the outside; correcting the initial fault propagation diagram based on the software and hardware topological diagram through a correction module to obtain a target fault propagation diagram; and determining root nodes and root events according to the target fault propagation diagram through a fault root positioning module. According to the embodiment of the disclosure, the initial fault propagation diagram is determined through the event model, the initial fault propagation diagram is corrected through the software and hardware topological diagram determined through the structure model, the target fault propagation diagram is obtained, and the root cause node and the root cause event are determined according to the target fault propagation diagram, so that the accuracy of fault root cause positioning can be improved.
Optionally, the software and hardware topological graph construction module is specifically configured to: invoking deployment data through the structural model; and constructing a software and hardware topological graph based on the multiple vertexes in the deployment data and the dependency relationship among the vertexes.
Optionally, the initial fault propagation map modeling block is specifically configured to: acquiring each fault vertex and an event occurring on each fault vertex through the event model; determining whether an association relationship exists between each failure vertex; converting the events occurring on each fault vertex into an event time sequence; if the association relation exists between every two fault vertexes, determining the hysteresis cross correlation of every two fault vertexes based on the event time sequence of every two fault vertexes; determining a directed relationship of the pairwise fault vertices based on the hysteresis cross-correlation; and constructing an initial fault propagation diagram based on the directed relation of the fault vertexes.
Optionally, the initial fault propagation mapping module is further configured to: dividing fault vertexes based on a set total duration window, a set window duration width and overlapping duration among windows to obtain a window set; the window of the set total duration comprises a plurality of windows, and the duration width of the set windows is the duration of each window; each window comprises a fault vertex which occurs in the duration width of the corresponding set window; taking the fault vertexes in the window set as candidate vertexes to obtain a candidate vertex set; determining the support degree of each candidate vertex in the candidate vertex set based on the number of times each candidate vertex appears in the window set and the length of the window set; determining a frequent item set based on the support degree of each candidate vertex and a set support degree threshold; converting the vertex pairwise combinations in the frequent item set into candidate item sets; determining the support degree of each candidate item in the candidate item set based on the occurrence times of each candidate item in the window set and the length of the window set; determining the confidence of each candidate item based on the support of each candidate item and the support of each candidate vertex; and determining whether an association relationship exists between every two fault vertexes in each candidate item based on the support degree of each candidate item and the confidence degree of each candidate item.
Optionally, the initial fault propagation mapping module is further configured to: for any one candidate item, if the support degree of the candidate item is greater than or equal to the set support degree threshold value, and the confidence degree of the candidate item is greater than or equal to the set confidence degree threshold value, the association relationship exists between every two fault vertexes in the candidate item.
Optionally, the fault root cause positioning module is specifically configured to: constructing a transition probability matrix based on the target fault propagation graph; normalizing the transition probability matrix to obtain a target transition probability matrix; performing random walk based on the set walk number and the target transition probability matrix by the set number of walkers; determining a number of rovers at each fault vertex in the target fault propagation graph based on the result of the random walk; taking the fault vertex with the maximum number of roamers as a root cause node; and taking the event with the largest occurrence frequency in the root cause node as the root cause event.
Optionally, the fault root cause positioning module is further configured to: each rover randomly selects an initial fault vertex in the target fault propagation diagram, transfers according to the target transfer probability matrix, and the set number of steps of the rover is subtracted by 1 every transfer step; when the set number of walks is 0 or a stay condition occurs for the first time, the number of walkers is increased by 1 on the corresponding fault vertex.
The fault root positioning device provided by the embodiment of the disclosure can execute the fault root positioning method provided by any embodiment of the disclosure, and has the corresponding functional modules and beneficial effects of the execution method.
It should be noted that each unit and module included in the above apparatus are only divided according to the functional logic, but not limited to the above division, so long as the corresponding functions can be implemented; in addition, the specific names of the functional units are also only for convenience of distinguishing from each other, and are not used to limit the protection scope of the embodiments of the present disclosure.
Fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the disclosure. Referring now to fig. 6, a schematic diagram of an electronic device (e.g., a terminal device or server in fig. 6) 600 suitable for use in implementing embodiments of the present disclosure is shown. The terminal devices in the embodiments of the present disclosure may include, but are not limited to, mobile terminals such as mobile phones, notebook computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and the like, and stationary terminals such as digital TVs, desktop computers, and the like. The electronic device shown in fig. 6 is merely an example and should not be construed to limit the functionality and scope of use of the disclosed embodiments.
As shown in fig. 6, the electronic device 600 may include a processing means (e.g., a central processing unit, a graphics processor, etc.) 601, which may perform various appropriate actions and processes according to a program stored in a Read Only Memory (ROM) 602 or a program loaded from a storage means 608 into a Random Access Memory (RAM) 603. In the RAM 603, various programs and data required for the operation of the electronic apparatus 600 are also stored. The processing device 601, the ROM 602, and the RAM 603 are connected to each other through a bus 604. An edit/output (I/O) interface 605 is also connected to bus 604.
In general, the following devices may be connected to the I/O interface 605: input devices 606 including, for example, a touch screen, touchpad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, and the like; an output device 607 including, for example, a Liquid Crystal Display (LCD), a speaker, a vibrator, and the like; storage 608 including, for example, magnetic tape, hard disk, etc.; and a communication device 609. The communication means 609 may allow the electronic device 600 to communicate with other devices wirelessly or by wire to exchange data. While fig. 6 shows an electronic device 600 having various means, it is to be understood that not all of the illustrated means are required to be implemented or provided. More or fewer devices may be implemented or provided instead.
In particular, according to embodiments of the present disclosure, the processes described above with reference to flowcharts may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program embodied on a non-transitory computer readable medium, the computer program comprising program code for performing the method shown in the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network via communication means 609, or from storage means 608, or from ROM 602. The above-described functions defined in the methods of the embodiments of the present disclosure are performed when the computer program is executed by the processing device 601.
The names of messages or information interacted between the various devices in the embodiments of the present disclosure are for illustrative purposes only and are not intended to limit the scope of such messages or information.
The electronic device provided in the embodiment of the present disclosure and the fault root locating method provided in the foregoing embodiment belong to the same inventive concept, and technical details not described in detail in the present embodiment may be referred to the foregoing embodiment, and the present embodiment has the same beneficial effects as the foregoing embodiment.
The embodiment of the present disclosure provides a computer storage medium having stored thereon a computer program which, when executed by a processor, implements the fault cause localization method provided by the above embodiment.
It should be noted that the computer readable medium described in the present disclosure may be a computer readable signal medium or a computer readable storage medium, or any combination of the two. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this disclosure, a computer-readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In the present disclosure, however, the computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, with the computer-readable program code embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: electrical wires, fiber optic cables, RF (radio frequency), and the like, or any suitable combination of the foregoing.
In some implementations, the clients, servers may communicate using any currently known or future developed network protocol, such as HTTP (HyperText Transfer Protocol ), and may be interconnected with any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), the internet (e.g., the internet), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks), as well as any currently known or future developed networks.
The computer readable medium may be contained in the electronic device; or may exist alone without being incorporated into the electronic device.
The computer readable medium carries one or more programs which, when executed by the electronic device, cause the electronic device to: constructing a software and hardware topological graph through a structural model; the structure model is used for standardizing the format of deployment data and providing a use interface for the outside; the deployment data comprises a plurality of vertexes and dependency relations among the vertexes; constructing an initial fault propagation diagram through an event model; the event model is used for standardizing the formats of all the events on each fault vertex and providing a use interface for the outside; correcting the initial fault propagation diagram based on the software and hardware topological diagram to obtain a target fault propagation diagram; and determining root cause nodes and root cause events according to the target fault propagation diagram.
Computer program code for carrying out operations of the present disclosure may be written in one or more programming languages, including, but not limited to, an object oriented programming language such as Java, smalltalk, C ++ and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider).
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units involved in the embodiments of the present disclosure may be implemented by means of software, or may be implemented by means of hardware. The name of the unit does not in any way constitute a limitation of the unit itself, for example the first acquisition unit may also be described as "unit acquiring at least two internet protocol addresses".
The functions described above herein may be performed, at least in part, by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), an Application Specific Standard Product (ASSP), a system on a chip (SOC), a Complex Programmable Logic Device (CPLD), and the like.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The foregoing description is only of the preferred embodiments of the present disclosure and description of the principles of the technology being employed. It will be appreciated by persons skilled in the art that the scope of the disclosure referred to in this disclosure is not limited to the specific combinations of features described above, but also covers other embodiments which may be formed by any combination of features described above or equivalents thereof without departing from the spirit of the disclosure. Such as those described above, are mutually substituted with the technical features having similar functions disclosed in the present disclosure (but not limited thereto).
Moreover, although operations are depicted in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order. In certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of the present disclosure. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are example forms of implementing the claims.
Claims (10)
1. A method for locating a root cause of a fault, comprising:
constructing a software and hardware topological graph through a structural model; the structure model is used for standardizing the format of deployment data and providing a use interface for the outside; the deployment data comprises a plurality of vertexes and dependency relations among the vertexes;
constructing an initial fault propagation diagram through an event model; the event model is used for standardizing the formats of all the events on each fault vertex and providing a use interface for the outside;
correcting the initial fault propagation diagram based on the software and hardware topological diagram to obtain a target fault propagation diagram;
and determining root cause nodes and root cause events according to the target fault propagation diagram.
2. The method of claim 1, wherein building a software and hardware topology map through a structural model comprises:
invoking deployment data through the structural model;
And constructing a software and hardware topological graph based on the multiple vertexes in the deployment data and the dependency relationship among the vertexes.
3. The method of claim 1, wherein constructing an initial fault propagation map through an event model comprises:
acquiring each fault vertex and an event occurring on each fault vertex through the event model;
determining whether an association relationship exists between each failure vertex;
converting the events occurring on each fault vertex into an event time sequence;
if the association relation exists between every two fault vertexes, determining the hysteresis cross correlation of every two fault vertexes based on the event time sequence of every two fault vertexes;
determining a directed relationship of the pairwise fault vertices based on the hysteresis cross-correlation;
and constructing an initial fault propagation diagram based on the directed relation of the fault vertexes.
4. A method according to claim 3, wherein determining whether there is an association between the failure vertices comprises:
dividing fault vertexes based on a set total duration window, a set window duration width and overlapping duration among windows to obtain a window set; the window of the set total duration comprises a plurality of windows, and the duration width of the set windows is the duration of each window; each window comprises a fault vertex which occurs in the duration width of the corresponding set window;
Taking the fault vertexes in the window set as candidate vertexes to obtain a candidate vertex set;
determining the support degree of each candidate vertex in the candidate vertex set based on the number of times each candidate vertex appears in the window set and the length of the window set;
determining a frequent item set based on the support degree of each candidate vertex and a set support degree threshold;
converting the vertex pairwise combinations in the frequent item set into candidate item sets;
determining the support degree of each candidate item in the candidate item set based on the occurrence times of each candidate item in the window set and the length of the window set;
determining the confidence of each candidate item based on the support of each candidate item and the support of each candidate vertex;
and determining whether an association relationship exists between every two fault vertexes in each candidate item based on the support degree of each candidate item and the confidence degree of each candidate item.
5. The method of claim 4, wherein determining whether an association exists between the failure vertices within each candidate item based on the support of each candidate item and the confidence of each candidate item comprises:
For any one candidate item, if the support degree of the candidate item is greater than or equal to the set support degree threshold value, and the confidence degree of the candidate item is greater than or equal to the set confidence degree threshold value, the association relationship exists between every two fault vertexes in the candidate item.
6. The method of claim 1, wherein determining root nodes and root events from the target fault propagation graph comprises:
constructing a transition probability matrix based on the target fault propagation graph;
normalizing the transition probability matrix to obtain a target transition probability matrix;
performing random walk based on the set walk number and the target transition probability matrix by the set number of walkers;
determining a number of rovers at each fault vertex in the target fault propagation graph based on the result of the random walk;
taking the fault vertex with the maximum number of roamers as a root cause node;
and taking the event with the largest occurrence frequency in the root cause node as the root cause event.
7. The method of claim 6, wherein performing random walk based on the set number of walks and the target transition probability matrix by the set number of walks comprises:
Each rover randomly selects an initial fault vertex in the target fault propagation diagram, transfers according to the target transfer probability matrix, and the set number of steps of the rover is subtracted by 1 every transfer step;
when the set number of walks is 0 or a stay condition occurs for the first time, the number of walkers is increased by 1 on the corresponding fault vertex.
8. A fault root cause locating device, comprising:
the software and hardware topological graph construction module is used for constructing a software and hardware topological graph through the structural model; the structure model is used for standardizing the format of deployment data and providing a use interface for the outside; the deployment data comprises a plurality of vertexes and dependency relations among the vertexes;
the initial fault propagation graph building module is used for building an initial fault propagation graph through an event model; the event model is used for standardizing the formats of all the events on each fault vertex and providing a use interface for the outside;
the correction module is used for correcting the initial fault propagation diagram based on the software and hardware topological diagram to obtain a target fault propagation diagram;
and the fault root positioning module is used for determining root nodes and root events according to the target fault propagation diagram.
9. An electronic device, the electronic device comprising:
one or more processors;
storage means for storing one or more programs,
when executed by the one or more processors, cause the one or more processors to implement the fault root localization method of any one of claims 1-7.
10. A storage medium containing computer executable instructions which, when executed by a computer processor, are for performing the fault cause localization method of any one of claims 1-7.
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