CN117200791A - Analog-to-digital conversion circuit, analog-to-digital conversion method, chip and electronic equipment - Google Patents

Abstract

The embodiment of the application provides an analog-to-digital conversion circuit, an analog-to-digital conversion method, a chip and electronic equipment. The temperature detection module in the analog-to-digital conversion circuit is connected with the reset module, the reset module is connected with the A/D conversion module, the temperature of the A/D conversion module is detected through the temperature detection module, when the temperature value detected by the temperature detection module meets the trigger condition, the reset module is controlled to carry out reset operation, so that the A/D conversion module outputs offset voltage generated due to temperature change under the reset state of the reset module, offset calibration is further carried out on an input signal of the whole analog-to-digital conversion circuit based on the offset voltage, the influence of temperature change on the output precision of the analog-to-digital converter can be effectively eliminated, and the output precision of the analog-to-digital converter is effectively improved.

Description

Analog-to-digital conversion circuit, analog-to-digital conversion method, chip and electronic equipment

Technical Field

The present application relates to the field of electronic circuits, and in particular, to an analog-to-digital conversion circuit, an analog-to-digital conversion method, a chip, and an electronic device.

Background

In the field of electronic circuit technology, particularly in signal processing systems, analog-to-digital conversion circuits (Analog to Digital Converter, ADC) are often used to convert an input analog signal into a digital signal for output. Thus, the accuracy of the analog-to-digital conversion circuit determines the accuracy of the processing result output by the overall signal processing system.

However, environmental changes, especially temperature changes, are liable to greatly affect the output accuracy of the analog-to-digital converter circuit, and how to reduce the influence of temperature changes on the accuracy of the analog-to-digital converter is a technical problem to be solved.

Disclosure of Invention

In view of the above problems, embodiments of the present application provide an analog-to-digital conversion circuit, a method, a chip, and an electronic device, so as to improve output accuracy of the analog-to-digital conversion circuit.

In a first aspect, an embodiment of the present application provides an analog-to-digital conversion circuit, including:

the temperature detection module is connected with the resetting module, and the resetting module is connected with the A/D conversion module;

the temperature detection module is used for detecting the temperature of the A/D conversion module;

the reset module is used for resetting when the temperature value detected by the temperature detection module meets the triggering condition;

the A/D conversion module is used for outputting offset voltage and calibrating an input signal based on the offset voltage when the reset module performs reset operation.

In a second aspect, an embodiment of the present application further provides an analog-to-digital conversion method, where the method is applied to an analog-to-digital conversion circuit, and the analog-to-digital conversion circuit includes: the temperature detection module is connected with the reset module, the reset module is linked with the A/D conversion module, and the method comprises the following steps:

acquiring the temperature of the A/D conversion module detected by the temperature detection module;

when the temperature value detected by the temperature detection module meets a trigger condition, controlling the reset module to perform reset operation;

and when the reset module performs reset operation, controlling the A/D conversion module to output offset voltage, and performing offset calibration on an input signal based on the offset voltage.

In a third aspect, an embodiment of the present application further provides a chip including the above-mentioned analog-to-digital conversion circuit.

In a fourth aspect, an embodiment of the present application further provides an electronic device, including the above chip or the analog-to-digital conversion circuit.

The embodiment of the application provides an analog-to-digital conversion circuit, an analog-to-digital conversion method, a chip and electronic equipment. The temperature detection module in the analog-to-digital conversion circuit is connected with the reset module, and the reset module is connected with the A/D conversion module. The temperature of the A/D conversion module is detected by the temperature detection module, when the temperature value detected by the temperature detection module meets the trigger condition, the reset module is controlled to carry out reset operation, so that the A/D conversion module outputs offset voltage generated by temperature change under the reset state of the reset module, and offset calibration is further carried out on the input signal of the whole analog-digital conversion circuit based on the offset voltage, thereby effectively eliminating the influence of temperature change on the output precision of the analog-digital converter and effectively improving the output precision of the analog-digital converter.

These and other aspects of the application will be more readily apparent from the following description of the embodiments.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 shows a schematic structural diagram of an analog-to-digital conversion circuit according to an embodiment of the present application;

fig. 2 is a schematic diagram of another structure of an analog-to-digital conversion circuit according to an embodiment of the present application;

fig. 3a shows another schematic structural diagram of an analog-to-digital conversion circuit according to an embodiment of the present application;

fig. 3b shows a schematic circuit diagram of a gain adjustment module according to an embodiment of the application;

fig. 4 shows an application schematic diagram of an analog-to-digital conversion circuit according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a temperature interval and a jump threshold according to an embodiment of the present application;

fig. 6 shows a schematic flow chart of an analog-to-digital conversion method according to an embodiment of the present application:

fig. 7 shows a schematic diagram of a misalignment calibration procedure provided by an embodiment of the application.

Detailed Description

Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for explaining the present application and are not to be construed as limiting the present application.

In order to enable those skilled in the art to better understand the solution of the present application, the following description will make clear and complete descriptions of the technical solution of the present application in the embodiments of the present application with reference to the accompanying drawings. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

In the embodiments of the present application, it should be noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.

Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

In describing embodiments of the present application, words such as "exemplary" or "such as" are used to mean illustrated, described, or described. Any embodiment or design described as "exemplary" or "such as" in an embodiment of the application is not necessarily to be construed as preferred or advantageous over another embodiment or design. The use of words such as "example" or "such as" is intended to present relative concepts in a clear manner.

In addition, the term "plurality" in the embodiments of the present application means two or more, and in view of this, the term "plurality" may be understood as "at least two" in the embodiments of the present application. "at least one" may be understood as one or more, for example as one, two or more. For example, including at least one means including one, two or more, and not limiting what is included, e.g., including at least one of A, B and C, then A, B, C, A and B, A and C, B and C, or A and B and C, may be included.

It should be noted that in embodiments of the present application, "connected" may be understood as electrically connected, and two electrical components may be connected directly or indirectly between the two electrical components. For example, a may be directly connected to B, or indirectly connected to B via one or more other electrical components.

In the technical field of electronic circuits, particularly in signal processing systems, an analog-to-digital conversion circuit ADC is generally used to convert an analog signal generated in nature into a binary digital signal that is convenient for computer computation. Therefore, the higher the conversion accuracy of the ADC, the closer the converted binary digital signal is to the input analog signal, and it can be seen that the accuracy of the analog-to-digital conversion circuit determines the accuracy of the processing result output by the whole signal processing system.

However, from the perspective of microstructure, an ADC is an electronic device formed by combining a plurality of elements and wires connecting the elements, and includes components such as an operational amplifier (herein abbreviated as op amp), a comparator, a resistor, a capacitor, an inductor, a transistor, etc., and the elements and wires included therein generate power consumption due to operation, thereby generating heat to cause the temperature of the ADC itself and the temperature of the environment in which the ADC is located to change. In combination with temperature changes caused by external factors, the ADC is often in different temperature environments.

Therefore, environmental changes, especially temperature changes, can cause the parameter values of the internal components to deviate, and further cause a large error between the digital signal converted by the ADC according to the original component parameters and the digital signal converted by the ADC according to the actual component parameters, that is, the temperature changes have a great influence on the output accuracy of the analog-to-digital conversion circuit. Therefore, how to reduce the influence of temperature variation on the accuracy of the analog-to-digital converter is a technical problem to be solved.

In the related art, the input signal is compensated by using a preset fixed offset voltage when the ADC outputs a result by adopting the technologies of chopping, auto-zero and the like in a preset offset voltage mode, so that the calibration of the input voltage is realized. However, this method relies on a fixed offset voltage that is set in advance according to practical experience, and the fixed offset voltage cannot be applied to error calibration of the analog-to-digital converter under different temperature environments.

In view of this, in a first aspect, an embodiment of the present application provides an analog-to-digital conversion circuit, where, as shown in fig. 1, the analog-to-digital conversion circuit provided by the present application includes the following parts:

the temperature detection module 11, the reset module 12 and the A/D conversion module 13, wherein the temperature detection module 11 is connected with the reset module 12, and the reset module 12 is connected with the A/D conversion module 13. Wherein:

a temperature detection module 11 for detecting the temperature of the a/D conversion module 13.

A reset module 12, configured to perform a reset operation when the temperature value detected by the temperature detection module 11 satisfies a trigger condition.

The a/D conversion module 13 is configured to output an offset voltage and perform offset calibration on the input signal based on the output offset voltage when the reset module 12 performs a reset operation.

According to the embodiment of the application, the temperature of the A/D conversion module is detected in real time through the temperature detection module, when the temperature value detected by the temperature detection module meets the triggering condition, the temperature is indicated to have larger change, the resetting module is triggered to carry out resetting operation, the A/D conversion module outputs offset voltage in the resetting state of the resetting module, and the input signal of the analog-to-digital conversion circuit is calibrated based on the offset voltage, so that the influence of temperature change on the output precision of the analog-to-digital converter can be effectively eliminated, and the output precision of the analog-to-digital converter is effectively improved.

The following will describe each part of the analog-to-digital conversion circuit provided in the embodiment of the present application in detail:

in some embodiments, the temperature detection module may be any component or assembly with a temperature detection function, which is not described herein.

In some embodiments, the reset module is any component or assembly having a circuit reset function. As an embodiment, the reset module may be a switch, and when the switch is closed, the reset module performs a reset operation, and the reset module starts to be in a reset state. When the switch is opened, the reset module ends the reset operation, namely ends the reset state.

As an implementation manner, when the temperature detection module detects the temperature change, the temperature detection module triggers a time sequence control signal, and after the time sequence control signal is input to the reset module, the reset module is triggered to perform a reset operation. As an example, taking the reset module as a switch, when the temperature detection module detects that the temperature value changes, the temperature detection module triggers a time sequence control signal, and the time sequence control signal triggers the switch to be closed so as to complete the reset operation of the reset module.

As an implementation manner, when the reset module is a switch, in order not to affect the normal working circuit of the object measured by the analog-to-digital conversion circuit, the reset module may be disposed between the positive and negative signals input by the analog-to-digital conversion circuit. When the reset module is a switch and the switch is closed, the anode and the cathode of the input signal are short-circuited, which means that the test object measured by the analog-to-digital conversion circuit is not connected with the analog-to-digital conversion circuit any more, the self circuit of the tested object is still a complete path, and the short-term normal work can not be caused by the offset calibration of the analog-to-digital conversion circuit.

The specific type or model of the reset module can be flexibly selected according to actual operation, and will not be described in detail herein.

In some embodiments, the a/D conversion module is any circuit, component or assembly that converts an analog signal to a digital signal. As an embodiment, the a/D conversion module may be any type of conventional ADC, including but not limited to a successive approximation ADC (SAR-ADC), a sigma-delta ADC, a flash ADC, a dual slope ADC, etc.

In some embodiments, the analog-to-digital conversion circuit provided by the present application may be as shown in fig. 2, and further includes:

and a gain adjustment module 14, wherein the gain adjustment module is connected with the A/D conversion module 13. The gain adjustment module 14 is configured to adjust the gain of the a/D conversion module 13 so that the gain thereof changes from the first gain coefficient to the second gain coefficient.

The A/D conversion module is also used for outputting an offset voltage based on the second gain coefficient and then performing offset calibration based on the offset voltage.

In the embodiment of the application, the size, shape, model, installation position and the like of each module can be flexibly selected according to practical application, and the application is not strictly limited. In one embodiment, the temperature detection module may be disposed near the a/D conversion module to ensure temperature measurement accuracy.

In some embodiments, after the a/D conversion module outputs the offset voltage, the reset module 12 ends the reset and the gain adjustment module 14 adjusts the gain of the a/D conversion module back to the first gain factor. And recovering the normal function of the analog signal to digital signal of the whole analog-digital conversion circuit.

In some embodiments, as shown in fig. 3a, the analog-to-digital conversion circuit provided by the present application is used for measuring a certain parameter in a circuit of a test object. As an embodiment, as shown in fig. 3a, the reset module 12 is a switch S0 connected to the a/D conversion module for inputting positive and negative signals. When the temperature value detected by the temperature detection module 11 meets the triggering condition, the switch S0 is triggered to be closed. When the switch S0 is closed, the input signal of the whole analog-to-digital conversion circuit is short-circuited, the circuit loop of the internal circuit of the test object normally operates, and the whole analog-to-digital conversion circuit enters a reset state.

In some embodiments, as shown in fig. 3a, the a/D conversion module is composed of a modulation integration unit, a quantization unit, a digital filtering unit, a digital storage unit, and a D/a conversion feedback unit.

As an embodiment, the digital filtering unit may be two independent units with the digital storage unit. As another embodiment, the digital filtering unit and the digital storage unit may be two sub-units under one digital signal processing unit. The digital memory unit may be any type of digital register, and the specific application is not strictly required.

As one implementation, the digital storage unit is used for storing the output offset voltage, the A/D conversion module is specifically used for performing analog-to-digital conversion on the input signal of the whole analog-to-digital conversion circuit to obtain a first conversion result, and performing offset calibration on the first conversion result based on the offset voltage stored in the digital storage unit to obtain a calibrated output result Dout [0:K ].

When the resetting module performs resetting operation, the gain adjustment module 14 adjusts the gain of the a/D conversion module 13 from the first gain coefficient to the second gain coefficient, the a/D conversion module 13 outputs the charge, which is changed due to temperature, inside the whole circuit as an offset voltage based on the second gain coefficient, the offset voltage is stored by the digital storage unit, and offset calibration is performed on the input signal of the whole analog-digital conversion circuit based on the offset voltage.

In some embodiments, gain refers to the amplification of an analog signal input to the analog-to-digital conversion circuit before it is transmitted to the analog-to-digital conversion circuit. The gain may increase the amplitude of the signal, such that the input signal can be properly captured and converted to a digital signal by the analog-to-digital conversion circuit, typically implemented by an amplifier circuit. The gain change may be a change of a scaling factor of the input signal, may be N times of amplification, or may be N times of reduction.

As an example, the function of the gain adjustment module 14 may be implemented by a circuit structure as in fig. 3 b. The gain adjustment module 14 specifically comprises a reference unit and a 1/N multiple adjustment unit, and the gain conversion module 14 is connected with a D/a conversion feedback unit in the a/D conversion module.

The reference unit comprises a band-gap reference voltage source and an operational amplifier _。 The band gap reference voltage source is connected with the positive phase end of the operational amplifier, and the negative end of the operational amplifier is connected with the output end of the operational amplifier. The 1/N multiple adjusting unit is connected with the output end of the operational amplifier, and the 1/N multiple adjusting unit comprises a variable resistor R and a switch array SFA [0]]、SFB[0]And a capacitive array.

The reference unit outputs a reference voltage Vref, and the switch selects the corresponding capacitance number to realize 1/N multiple adjustment through variable resistor voltage division. The principle by which the gain adjustment module 14 functions can be implemented in particular with respect to fig. 3b is described below:

when the temperature detected by the temperature detection module is unchanged or the temperature interval in which the current detected temperature value is located is the same as the temperature interval in which the temperature value detected at the previous time is located, namely the A/D conversion module works normally, the A/D conversion module does not need to be subjected to offset calibration. The A/D conversion module works normally, outputs VREF voltage according to a normal gain coefficient, and all capacitors on the right side are used. Wherein the capacitance comprises a capacitance on the positive side of the integrator modulated by the a/D conversion module. At this time, the feedback process is divided into two phases, and the value of the digital codeword D after quantization processing is performed according to the quantization unit:

1) In the feedback sampling stage, when D=0, SFA [0] is opened, SFB [0] is closed; when d=1, SFA [0] is closed and SFB [0] is open.

2) During the feedback integration phase, when d=0, sfa [0] is closed, SFB [0] is open; when d=1, SFA [0] is open and SFB [0] is closed.

When the temperature detected by the temperature detection module changes or the temperature interval in which the current detected temperature value is located is different from the temperature interval in which the temperature value detected in the previous time is located, the A/D conversion module needs to be subjected to offset calibration.

In the offset output stage, the resistance value of the variable resistor is 1/N1 of the total resistance value, namely the number of resistors in a solid line frame in the figure, and at the moment, the output voltage after resistor voltage division is VREF/N1. The number of the accessed capacitors is 1/N2 of the total capacitance of the capacitor array, namely the number of the capacitors in the solid line frame, and the capacitance access condition in the solid line frame is as follows:

1) In the feedback sampling stage, when D=0, the corresponding SFA [0] is opened, and the corresponding SFB [0] is closed; when d=1, the corresponding SFA [0] is closed and the corresponding SFB [0] is open.

2) During the feedback integration phase, when d=0, the corresponding SFA [0] is closed and the corresponding SFB [0] is opened; when d=1, the corresponding SFA [0] is open and the corresponding SFB [0] is closed.

And in the offset output stage, the non-connected capacitor, i.e. SFA 0 corresponding to the capacitor in the dashed line frame is opened, and SFB 0 is closed.

Through the above process, the reference value can be scaled by 1/N, where n=n1×n2, so as to adjust the gain of the a/D conversion module. Wherein, as an implementation manner, the gain adjustment module adjusts the gain of the a/D conversion module: when the resetting module performs resetting operation, the first datum reference value in the datum reference unit is scaled according to the adjustment multiple n=n1×n2 in the 1/N-time adjustment unit, so that the second datum reference value n=n1×n2 can be obtained.

As an example, taking the reference voltage Vref of the a/D conversion module as the reference unit, the gain adjustment module adjusts the gain of the a/D conversion module by scaling the reference voltage Vref by a multiple N in the 1/N multiple adjustment unit. Thus, if the adjusted reference voltage vref_new of the a/D conversion module is Vref/N of the reference voltage before conversion, vref_new=vref/N.

When N is an integer, scaling the reference voltage Vref of the a/D conversion module by N times is equivalent to amplifying the gain of the a/D conversion module by N times. The value of N times can be determined according to practical experience or historical measurement data, and when the value of N is selected, factors such as the amplitude of an input signal, the dynamic range and resolution of an ADC, noise and the like should be comprehensively considered, and the specific value is not limited by the application.

By adopting the embodiment of the application, the offset voltage is amplified by N times under the condition of gain adjustment and amplification, the amplitude of the signal is increased, the signal-to-noise ratio is improved, and the sampling and measuring time is accelerated. Therefore, the A/D conversion module outputs offset voltage based on the changed gain, so that the sampling detection time can be greatly prolonged, and the error calibration efficiency of the analog-to-digital converter caused by temperature change can be effectively improved.

As an implementation manner combined with practical application scenarios, the test object in the above example may be a lithium battery unit in the left frame as shown in fig. 4, and the electric quantity of the lithium battery is monitored through an analog-to-digital conversion circuit in the right frame. And the electric signals SRP and SRN in the circuit of the lithium battery are connected into the analog-to-digital conversion circuit, namely, the voltage between the SRP and the SRN is the input signal of the analog-to-digital conversion circuit.

Wherein, the A/D conversion module in the analog-to-digital conversion circuit in the right frame is realized based on the traditional incremental sigma-delta ADC. Specifically, the temperature of the a/D conversion module is monitored in real time by using the temperature detection module 11, when the detected temperature value meets the triggering condition, the switch S0 in the reset module 12 is closed, the SRP and the SRN are in short circuit, the lithium battery normally operates, and the analog-to-digital conversion circuit performs reset offset calibration. The gain adjustment module 14 performs 1/N scaling on the reference voltage, which is equivalent to N times of the whole gain amplification of the a/D conversion module, i.e. the offset voltage is output after integrating and quantizing the amplified residual charge of the circuit due to temperature change.

In some embodiments, after the a/D conversion module outputs the offset voltage, the reset module ends the reset operation (i.e. the switch S0 in fig. 3a is turned off), the input signal normally enters the analog-to-digital conversion circuit, and the analog-to-digital conversion circuit performs offset calibration on the input signal based on the offset voltage.

In some embodiments, the reset module 12 is specifically configured to perform a reset operation when a current temperature interval in which the temperature value currently detected by the temperature detection module 11 is located is different from a previous temperature interval in which the temperature value previously detected by the temperature detection module 11 is located.

According to the embodiment of the application, the detectable temperature values of the A/D conversion module are divided according to different temperature intervals, so that frequent resetting operation of the resetting module caused by frequent change of the temperature values can be effectively reduced, and the stability of the whole analog-to-digital conversion circuit can be guaranteed.

As an embodiment, the temperature interval may be an interval of equal range width. As another embodiment, the temperature interval may be an interval of unequal range width.

As an example, assume that the actual usage environment temperature range of the analog-to-digital converter is: if the temperature range of the practical environment is divided into the range of-55 ℃ to +125 ℃ according to the interval width of 10 ℃, the temperature range of-55 ℃ to +125 ℃ can be divided into 18 temperature intervals with equal range width.

As another example, the-55℃to +125℃may be divided according to the actual use ambient temperature frequency. For example, the temperature range of-10 ℃ to +40 ℃ is the temperature range in which the equipment is frequently located, the rest of-55 ℃ to-11 ℃ and +41 ℃ to +125 ℃ are the temperature ranges in which the equipment is not frequently located, and the range width of the temperature range in which the equipment is frequently located can be set smaller than the range width of the temperature range in which the equipment is not frequently located. Wherein the range width of the temperature range in which the equipment is frequently located can be 5 ℃, and the range width of the temperature range in which the equipment is not frequently located can be 8 ℃, 10 ℃ or even 20 ℃.

As an implementation manner, the divided temperature intervals may be stored in a register, the temperature value detected by the temperature detection module may be stored in the register, and the upper and lower limit thresholds of the temperature intervals stored in the register are compared with the temperature value detected by the temperature detection module by setting a comparator, so as to determine the temperature interval in which the currently detected temperature value is located.

In some embodiments, the temperature values are divided into n consecutive temperature intervals in order from low to high, where the current temperature interval is the nth temperature interval, the previous temperature interval is the n-1 th temperature interval, and the temperature value currently detected by the temperature detection module 11 is greater than the first jump threshold, and the reset module 12 performs a reset operation.

Or the current temperature interval is the nth-1 temperature interval, the temperature interval is the nth temperature interval, the temperature value currently detected by the temperature detection module 11 is smaller than the second jump threshold, and the reset module 12 performs the reset operation. Wherein the first transition threshold is greater than the second transition threshold.

As an example, as shown in figure 5, the temperature value is gradually increased from left to right and is divided into a temperature interval 1, a temperature interval 2. Temperature interval n and a temperature interval n+1. In order to avoid the temperature value jumping repeatedly around the upper and lower limit values of the temperature interval, the temperature interval in which the temperature value is judged to be located jumps. In the embodiment of the application, a jump threshold is set, wherein the first jump threshold is larger than the lower limit temperature threshold of a high temperature interval in two adjacent temperature intervals. The second jump threshold is smaller than the upper temperature threshold of the low temperature interval in the two connected temperature intervals.

For example, in two adjacent temperature intervals: for example, temperature interval 1 and temperature interval 2, the first transition threshold is Tr 1, and the second transition threshold is Tf 1. When the temperature detection module 11 detects that the previous temperature interval in which the temperature value detected previously is located is the n-1 th temperature interval and the current temperature interval in which the temperature value detected currently is located is the n-th temperature interval, the temperature value is indicated to jump from the low temperature interval to the high temperature interval adjacent to the low temperature interval. At this time, the first jump threshold is selected as a judgment criterion, and if the currently detected temperature value is greater than the first jump threshold, the reset module 12 performs a reset operation.

When the temperature detection module 11 detects that the previous temperature interval in which the temperature value detected previously is located is the nth temperature interval and the current temperature interval in which the temperature value detected currently is located is the nth-1 temperature interval, the temperature value is indicated to jump from the high temperature interval to the low temperature interval adjacent to the high temperature interval. At this time, the second jump threshold is selected as a judgment criterion, and if the currently detected temperature value is smaller than the second jump threshold, the reset module 12 performs a reset operation.

The second jump threshold is smaller than the first jump threshold, namely Tf [ i ] < Tr [ i ], hysteresis effect can be generated, namely frequent output offset voltage caused by repeated jump of the temperature value near the common boundary value of two adjacent temperature intervals can be effectively avoided, normal analog-digital conversion function of the analog-digital conversion circuit is affected, and stability of the analog-digital conversion circuit function is guaranteed.

In some embodiments, the output offset voltage of the a/D conversion module may be based on the adjusted second gain factor, and the input signal is sampled to output the offset voltage. As an example, taking the adjusted second gain coefficient as Vref/N as an example, the offset voltage Voffset may be calculated by the following formula:

the PGA is the gain of the gain amplifier, vref is the reference voltage, PGA (N) is the N-th gain of the gain amplifier, N is the multiple of the control gain variation, dk is the code word outputted by the modulation integrator, k is the code word number, N is the code word number, and E N is the noise error of the analog-digital conversion circuit.

After outputting the offset voltage, the reset module 12 ends the reset, and the gain adjustment module 14 adjusts the gain coefficient of the a/D conversion module from the second gain coefficient back to the first gain coefficient. At this time, the input signal is normally input to the analog-to-digital conversion circuit, and the a/D conversion module converts the input signal according to the reference voltage Vref, so as to obtain a first conversion result Vin:

wherein, voffset and Vin are analog equivalent values. As one implementation, voffset and Vin may both be stored in digital storage units within the a/D conversion module. Wherein Voffset and Vin are stored in digital memory units in the form of digital signals, such as: voffset corresponds to the value stored in the digital storage unit as Doffset, and the first conversion result Vin corresponds to the value stored in the digital storage unit as Din. Wherein, doffset and Din can be obtained by the following formula conversion:

where n1 is the number of measurement clocks of the offset and n2 is the number of clocks of the analog-to-digital conversion.

In some embodiments, the a/D conversion module calibrates the input signal based on the offset voltage stored in the digital memory cell. Wherein:

as an implementation manner, after the reset module finishes resetting, the a/D conversion module performs analog-to-digital conversion on the input signal to obtain a first output result Vin, further obtains a digital signal Din corresponding to the first output result Vin, and then compensates Din based on Doffset stored in the digital storage unit, which may specifically be addition or subtraction, so as to obtain a target output result Dout.

As one example, the target output result Doutput after offset calibration may be calculated based on the following formula:

Doutput＝Din-Doffset

by adopting the embodiment of the application, the offset calibration is rapidly performed based on the offset voltage stored in the digital storage unit while the conversion precision of the analog-to-digital conversion circuit is effectively ensured.

In a second aspect, the present application provides an analog-to-digital conversion method, which is applied to an analog-to-digital conversion circuit, where the analog-to-digital conversion circuit includes a temperature detection module, a reset module, and an a/D conversion module, where the temperature detection module is connected to the reset module, and the reset module is connected to the a/D conversion module, as shown in fig. 6, the analog-to-digital conversion method includes the following steps:

s11, acquiring the temperature of the A/D conversion module detected by the temperature detection module;

s12, when the temperature detected by the temperature detection module meets the trigger condition, controlling the reset module to perform reset operation;

and S13, when the reset module performs reset operation, controlling the A/D conversion module to output offset voltage, and performing offset calibration on the input signal based on the offset voltage.

In some embodiments, when the temperature value detected by the temperature detection module meets the trigger condition, controlling the reset module to perform a reset operation includes:

when the current temperature interval where the temperature value currently detected by the temperature detection module is different from the previous temperature interval where the temperature value previously detected by the temperature detection module is, controlling the reset module to perform reset operation.

In some embodiments, the temperature values are divided into n consecutive temperature intervals in order from low to high, and when the temperature value detected by the temperature detection module meets the trigger condition, the reset module is controlled to perform a reset operation, which specifically includes:

if the current temperature interval is the nth temperature interval, the previous temperature interval is the nth-1 temperature interval, and the current temperature value detected by the temperature detection module is larger than the first jump threshold value, the reset module is controlled to perform reset operation; or,

if the current temperature interval is the (n-1) th temperature interval, the previous temperature interval is the (n) th temperature interval, and the current temperature value detected by the temperature detection module is smaller than the second jump threshold value, controlling the reset module to perform reset operation;

wherein the second transition threshold is less than the first transition threshold.

As an implementation manner, based on the analog-to-digital conversion method provided by the embodiment of the application, offset voltage Doffset [ i ] output by the A/D conversion module in each temperature interval can be measured, and offset voltages Doffset [ i ] corresponding to different temperature intervals i are stored in the digital storage unit. In the actual application, especially when the temperature detection module detects that the temperature interval where the temperature value is located is migrated to the temperature interval i again, the timing sequence shown in fig. 7 is executed, the corresponding offset voltage Doffset [ i ] is directly read from the digital memory cell, and then the offset of the analog circuit is switched to the corresponding Doffset [ i ], so that the final target output result doutput=din-Doffset [ i ] is changed.

As another implementation manner, before the analog-to-digital conversion circuit leaves the factory, the offset voltages corresponding to different temperature intervals i can be measured by personnel in the factory to obtain different Doffset [ i ], when the analog-to-digital conversion circuit is actually applied, if the analog-to-digital conversion circuit shifts or jumps in the temperature intervals, the timing sequence shown in fig. 7 can be executed, the offset of the analog-to-digital conversion circuit is switched to Doffset [ i ] corresponding to the current temperature interval i, and then the finally calculated doutput=din-Doffset [ i ] is changed. Therefore, the offset calibration of the analog-to-digital conversion circuit can be realized without resetting the analog-to-digital conversion circuit, the complexity of the offset calibration is reduced, and the normal operation of the analog-to-digital conversion circuit is guaranteed.

In a third aspect, an embodiment of the present application further provides a chip, where the chip includes the above-mentioned analog-to-digital conversion circuit. The Chip (Integrated Circuit, IC) is also referred to as a Chip, which may be, but is not limited to, a SOC (System on Chip) Chip, a SIP (System in package) Chip. The chip can solve the technical problem that the temperature change affects the accuracy of the analog-to-digital conversion circuit by the technical means of the analog-to-digital conversion circuit.

In a fourth aspect, an embodiment of the present application further provides an electronic device, where the electronic device includes a device main body and a chip as described above disposed in a device theme. The electronic device may be, but is not limited to, a weight scale, a body fat scale, a nutritional scale, an infrared electronic thermometer, a pulse oximeter, a body composition analyzer, a mobile power supply, a wireless charger, a quick charger, an on-board charger, an adapter, a display, a USB (Universal Serial Bus ) docking station, a stylus, a real wireless headset, an automotive center control screen, an automobile, an intelligent wearable device, a mobile terminal, an intelligent home device. The intelligent wearing equipment comprises, but is not limited to, an intelligent watch, an intelligent bracelet and a cervical vertebra massage instrument. Mobile terminals include, but are not limited to, smartphones, notebook computers, tablet computers, POS (point of sales terminal, point of sale terminal) machines. The intelligent household equipment comprises, but is not limited to, an intelligent socket, an intelligent electric cooker, an intelligent sweeper and an intelligent lamp. The electronic equipment can solve the technical problem that the detection precision is affected by temperature by the technical means of the analog-to-digital conversion circuit.

Although the present application has been described in terms of the preferred embodiments, it should be understood that the present application is not limited to the specific embodiments, but is capable of numerous modifications and equivalents, and alternative embodiments and modifications of the embodiments described above, without departing from the spirit and scope of the present application.

Claims (13)

1. An analog to digital conversion circuit, the circuit comprising:

the temperature detection module is connected with the reset module, and the reset module is connected with the A/D conversion module;

the temperature detection module is used for detecting the temperature of the A/D conversion module;

the reset module is used for resetting when the temperature value detected by the temperature detection module meets the triggering condition;

the A/D conversion module is used for outputting offset voltage and calibrating an input signal based on the offset voltage when the reset module performs reset operation.

2. The circuit of claim 1, wherein the circuit further comprises:

the gain adjustment module is connected with the A/D conversion module and is used for adjusting the gain of the A/D conversion module to change from a first gain coefficient to a second gain coefficient after the resetting module performs resetting operation;

the A/D conversion module is further configured to output the offset voltage based on the second gain coefficient.

3. The circuit of claim 1, wherein the reset module is configured to perform a reset operation when a current temperature interval in which the temperature value currently detected by the temperature detection module is located is different from a previous temperature interval in which the temperature value previously detected by the temperature detection module is located.

4. A circuit as claimed in claim 3, wherein the temperature values are divided into n consecutive temperature intervals in order from low to high;

the resetting module is used for resetting when the current temperature interval is an nth temperature interval, the previous temperature interval is an nth-1 temperature interval, and the temperature value currently detected by the temperature detection module is larger than a first jump threshold value; or,

when the current temperature interval is the (n-1) th temperature interval, the previous temperature interval is the (n) th temperature interval, and the temperature value currently detected by the temperature detection module is smaller than a second jump threshold value, resetting;

wherein the first transition threshold is greater than the second transition threshold.

5. The circuit of claim 1, wherein the reset module is further to:

and after the A/D conversion module outputs the offset voltage, ending the reset operation.

6. The circuit of claim 2, wherein the gain adjustment module is further configured to:

and after the A/D conversion module outputs the offset voltage, adjusting the gain of the A/D conversion module to change from the second gain coefficient to the first gain coefficient.

7. The circuit of claim 1, wherein the a/D conversion module comprises a digital storage unit for storing the offset voltage; the A/D conversion module is specifically used for:

and performing analog-to-digital conversion on the input signal, and performing offset calibration on the conversion result of the input signal based on the offset voltage stored in the digital storage unit.

8. The circuit of claim 2, wherein the gain adjustment module comprises: a base reference unit and a 1/N multiple adjustment unit; the base reference unit is used for generating a base reference voltage; the 1/N multiple adjusting unit is used for scaling the base reference voltage of the base reference unit.

9. An analog-to-digital conversion method, wherein the method is applied to an analog-to-digital conversion circuit, the analog-to-digital conversion circuit comprising: the temperature detection module is connected with the reset module, the reset module is linked with the A/D conversion module, and the method comprises the following steps:

acquiring the temperature of the A/D conversion module detected by the temperature detection module;

when the temperature value detected by the temperature detection module meets a trigger condition, controlling the reset module to perform reset operation;

and when the reset module performs reset operation, controlling the A/D conversion module to output offset voltage, and performing offset calibration on an input signal based on the offset voltage.

10. The method of claim 9, wherein controlling the reset module to perform the reset operation when the temperature value detected by the temperature detection module satisfies a trigger condition comprises:

and when the current temperature interval in which the temperature value currently detected by the temperature detection module is located is different from the previous temperature interval in which the temperature value previously detected by the temperature detection module is located, controlling the reset module to perform reset operation.

11. The method according to claim 10, wherein the temperature values are divided into n consecutive temperature intervals in order from low to high, and the controlling the reset module to perform the reset operation when the temperature value detected by the temperature detection module satisfies the trigger condition specifically includes:

when the current temperature interval is an nth temperature interval, the previous temperature interval is an nth-1 temperature interval, and the current temperature value detected by the temperature detection module is larger than a first jump threshold value, and the reset module is controlled to perform reset operation; or,

when the current temperature interval is the (n-1) th temperature interval, the previous temperature interval is the (n) th temperature interval, and the temperature value currently detected by the temperature detection module is smaller than a second jump threshold value, the reset module is controlled to perform reset operation;

wherein the second transition threshold is less than the first transition threshold.

12. An analog to digital conversion chip, characterized in that the chip comprises an analog to digital conversion circuit as claimed in any one of the claims 1 to 8.

13. An electronic device comprising a device body and the chip of claim 12 provided on the device body.