CN117153855B - Semiconductor structure of back-illuminated image sensor and manufacturing method thereof - Google Patents

Abstract

The invention discloses a semiconductor structure of a back-illuminated image sensor and a manufacturing method thereof, and belongs to the field of semiconductor technology. The semiconductor structure of the back-illuminated image sensor includes: a substrate; a plurality of deep trenches arranged in the substrate; a lining oxide layer arranged on the side walls and bottom of the deep trenches and the lining On the bottom; a high-dielectric dielectric layer is provided on the lining oxide layer; a first oxide layer is provided on the high-dielectric dielectric layer, and the first oxide layer is filled to the top of the deep trench , and the first oxide layer forms an air gap in the deep trench, and the top of the air gap is lower than the top of the deep trench; a second oxide layer is formed on the first oxide layer, The pressure type after the first oxide layer and the second oxide layer are combined is compressive stress. Through the semiconductor structure of a back-illuminated image sensor and its manufacturing method provided by the present invention, bubble defects on the surface of the substrate and film layer are improved.

Description

Semiconductor structure of a back-illuminated image sensor and its manufacturing method

Technical field

The invention belongs to the field of semiconductor technology, and in particular relates to a semiconductor structure of a back-illuminated image sensor and a manufacturing method thereof.

Background technique

As the integration level of internal components of integrated circuits continues to increase, the distance between adjacent components shortens, and the possibility of electronic interference between adjacent components also increases. Deep trench isolation technology has been adopted in today's semiconductor technology. The wider application allows various devices such as analog, digital and high voltage to be integrated without causing interference. For example, in back-illuminated image sensors, deep trench isolation structures are used to isolate pixel areas to obtain better imaging effects. However, in deep trench isolation technology, the problem of poor yield of deep trench isolation is prone to occur, resulting in low chip yield, which is not conducive to the development of semiconductor technology.

Contents of the invention

The purpose of the present invention is to provide a semiconductor structure of a back-illuminated image sensor and a manufacturing method thereof, which can reduce the generation of bubble defects during the formation of deep trenches and improve the yield rate of the semiconductor structure, thereby improving the performance and yield rate of semiconductor devices.

In order to solve the above technical problems, the present invention is implemented through the following technical solutions:

The invention also provides a semiconductor structure of a back-illuminated image sensor, which at least includes:

substrate;

A plurality of deep trenches are provided in the substrate;

A lining oxide layer is provided on the sidewalls and bottom of the deep trench and the substrate;

A high-dielectric dielectric layer disposed on the lining oxide layer;

A first oxide layer is disposed on the high dielectric layer, the first oxide layer is filled to the top of the deep trench, and the first oxide layer forms an air gap in the deep trench, The top of the air gap is lower than the top of the deep trench;

A second oxide layer is formed on the first oxide layer. The stress type of the second oxide layer and the first oxide layer are opposite. The stress type after the first oxide layer and the second oxide layer are combined is is compressive stress.

The stress type of the first oxide layer is tensile stress.

In an embodiment of the present invention, the stress type of the second oxide layer is compressive stress.

The invention also provides a method for manufacturing a semiconductor structure of a back-illuminated image sensor, which at least includes the following steps:

provide a substrate;

forming a plurality of deep trenches in the substrate;

forming a lining oxide layer on the sidewalls and bottom of the deep trench and the substrate;

A high dielectric dielectric layer is formed on the lining oxide layer.

A first oxide layer is formed on the high dielectric layer through a first deposition process, the first oxide layer is filled to the top of the deep trench, and the first oxide layer is within the deep trench Create air gaps;

Perform a baking process on the first oxide layer;

A second oxide layer is formed on the first oxide layer through a second deposition process. The stresses of the second oxide layer and the first oxide layer are opposite. The first oxide layer and the second oxide layer are combined. The post-stress type is compressive stress.

In an embodiment of the present invention, the first deposition process is a high aspect ratio process, and the reaction temperature of the first deposition process is 380°C~400°C.

In one embodiment of the present invention, the baking process includes: introducing a set flow rate of gas at a preset baking temperature, and completing the baking of the first oxide layer after reacting for a preset time. Process processing.

In an embodiment of the present invention, the baking temperature is 300°C to 350°C.

In an embodiment of the present invention, the gas includes helium, and the flow rate of the gas is 8000 sccm~10000 sccm.

In an embodiment of the present invention, the second deposition process is a plasma enhanced tetraethyl orthosilicate layer deposition process, and the reaction temperature of the second deposition process is 300°C to 350°C.

To sum up, the present invention provides a semiconductor structure of a back-illuminated image sensor and a manufacturing method thereof. The unexpected effect is that it can reduce the water and oxygen residues of the deposited film prepared by a high aspect ratio process, and improve the efficiency of the deposition film prepared by a high aspect ratio process. Improve the quality of the deposited film, avoid subsequent bubble defects, and improve the performance of subsequently prepared semiconductor devices. It can make the stress of the film layer appear as compressive stress, thereby avoiding the problem of poor adhesion between the film layer and the substrate surface due to tensile stress and reducing the occurrence of bubble defects in the film layer. The prepared deep trench isolation structure can improve the optical and electrical isolation between adjacent components, reduce dark current crosstalk and parasitic light pollution, and improve the reliability of the semiconductor structure. While better removing water and oxygen residues, it reduces the waste of resources, saves production time, and improves production efficiency.

Of course, any product implementing the present invention does not necessarily need to achieve all the above-mentioned advantages at the same time.

Description of drawings

In order to explain the technical solutions of the embodiments of the present invention more clearly, the drawings needed to describe the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without exerting creative efforts.

FIG. 1 is a schematic diagram of a substrate and a substrate oxide layer on the substrate in an embodiment of the present invention.

FIG. 2 is a schematic diagram of a photoresist layer and openings formed in an embodiment of the present invention.

FIG. 3 is a schematic diagram of a deep trench formed in an embodiment of the present invention.

FIG. 4 is a schematic diagram of removing the oxide layer of the substrate in an embodiment of the present invention.

FIG. 5 is a schematic diagram of forming a lining oxide layer in an embodiment of the present invention.

FIG. 6 is a schematic diagram of forming a high dielectric layer in an embodiment of the present invention.

FIG. 7 is a schematic diagram of forming a first oxide layer and an air gap in an embodiment of the present invention.

FIG. 8 is a schematic diagram of forming a second oxide layer in an embodiment of the present invention.

FIG. 9 is a schematic diagram of defects in the substrate after the first oxide layer is formed on the substrate only through the first deposition process.

Figure 10 is a bubble defect diagram of the substrate corresponding to the process in Figure 9.

FIG. 11 is a schematic diagram of substrate defects after forming a first oxide layer on the substrate through a first deposition process and directly forming a second oxide layer through a second deposition process.

Figure 12 is a bubble defect diagram of the substrate corresponding to the process in Figure 11.

13 is a schematic diagram of substrate defects produced by a method for manufacturing a semiconductor structure of a back-illuminated image sensor according to an embodiment of the present invention.

FIG. 14 is a bubble defect diagram corresponding to the substrate in FIG. 13 in an embodiment of the present invention.

Figure 15 is a line chart showing changes in stress after the first oxide layer and the second oxide layer are combined under different baking process conditions in different embodiments of the present invention.

Label description:

10. Substrate; 11. Substrate oxide layer; 12. Photoresist layer; 13. Opening; 20. Deep trench; 21. Lining oxide layer; 22. High dielectric layer; 23. First oxide layer ; 24. Air gap; 25. Second oxide layer.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

It should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. The drawings only show the components related to the present invention and do not follow the actual implementation of the component numbers, shapes and components. Dimension drawing, in actual implementation, the type, quantity and proportion of each component can be arbitrarily changed, and the component layout type may also be more complex.

In the present invention, it should be noted that if the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" etc. appear, , the orientation or positional relationship indicated is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation. Specific orientation construction and operation, therefore, should not be construed as limitations on this application. In addition, the terms "first" and "second", if they appear, are for descriptive and distinguishing purposes only and are not to be understood as indicating or implying relative importance.

Referring to Figures 1 to 8, the present invention provides a semiconductor structure of a back-illuminated image sensor and a manufacturing method thereof. The obtained semiconductor structure of the back-illuminated image sensor includes a substrate 10, a lining oxide layer 21, a high Dielectric layer 22, first oxide layer 23, second oxide layer 25, etc. The lining oxide layer 21 covers, for example, the sidewalls and bottom of the deep trench 20 and the substrate 10 , and the high-dielectric dielectric layer 22 is, for example, disposed on the lining oxide layer 21 . The first oxide layer 23 is, for example, disposed in the substrate 10 and the deep trench 20 to fill the deep trench 20. For example, an air gap 24 is disposed in the first oxide layer 23. The second oxide layer 25 covers the first oxide layer. 23, and the stresses of the first oxide layer 23 and the second oxide layer 25 are opposite, the film bubble defects in the deep trench isolation structure are reduced. The invention provides a semiconductor structure of a back-illuminated image sensor and its manufacturing method. The high-quality semiconductor structure obtained can improve the performance of semiconductor devices and can be widely used in different types of chips to improve the manufacturing yield of the chips. .

Please refer to FIG. 1 . In one embodiment of the present invention, multiple semiconductor devices are provided on a substrate 10 . The present invention does not limit the types of semiconductor devices. Semiconductor devices are, for example, Field Effect Transistor (FET), Metal-Oxide-Semiconductor Field-EffectTransistor (MOSFET), Complementary Metal Oxide Semiconductor (CMOS), Insulation Insulated Gate Bipolar Transistor (IGBT), Thyristor (Thyristor), Charge Coupled Device (CCD Image Sensor), Constant Voltage Diode, High Frequency Diode, Light-Emitting Diode (LED) , Gate Turn off Thyristor (GTO), Digital Signal Processor (DSP), High-speed Recovery Diode (FRD), High-speed and High-efficiency Rectifier Diode (Fight Efficiency Diode, HED), Light Trigger One or more semiconductor devices such as thyristor (Light Triggered Thyristor, LTT), photo relay (Photo Relay) or microprocessor (Micro Processor) can be selected during the production process. In this embodiment, the semiconductor device is, for example, a CMOS image sensor, and the photosensitive area in the CMOS image sensor is isolated by a deep trench isolation structure.

Please refer to FIG. 1 . In one embodiment of the present invention, a substrate 10 is provided. The material of the substrate 10 can be any material suitable for forming a CMOS image sensor. The material of the substrate 10 is, for example, silicon carbide (SiC). , indium phosphide (InP), gallium arsenide (GaAs), gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), silicon germanium (GeSi), sapphire, silicon wafer or other III/ Semiconductor materials formed of V compounds also include stacked structures composed of these semiconductor materials, or silicon on insulators, stacked silicon on insulators, silicon germanium on insulators, germanium on insulators, etc. The present invention does not limit the type, shape and thickness of the substrate 10, which can be flexibly set according to needs, and the substrate 10 is set, for example, according to the type of semiconductor device and actual production conditions. In this embodiment, the substrate 10 is, for example, a doped epitaxial layer silicon wafer, and the doping type may be P type or N type.

Please refer to Figure 1. In an embodiment of the present invention, a substrate oxide layer 11 is formed on the substrate 10. The substrate oxide layer 11 is, for example, dense silicon oxide and other materials. In this embodiment, the substrate oxide layer 11 is formed on the substrate 10. 10 is put into, for example, a selective decoupled plasma oxidation process (Decoupled Plasma Oxidation, DPO) to form the substrate oxide layer 11. Specifically, for example, the substrate 10 is put into a temperature of, for example, 300°C to 400°C, and a pressure of, for example, 10mT to 100mT. , and oxygen is introduced into a reaction chamber with a radio frequency power of, for example, 1KW to 3KW, and the flow rate of oxygen is, for example, 120mL/min to 330mL/min. The surface of the substrate 10 reacts with the formed oxygen radicals to form a decoupled plasma oxide, that is, the oxygen radicals react with silicon to form the silicon dioxide substrate oxide layer 11 . The thickness of the substrate oxide layer 11 is, for example, 10 nm to 50 nm, specifically, 12 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm or 40 nm, etc. By forming the substrate oxide layer 11 on the substrate 10 , it serves as a protective structure for the substrate 10 and prevents the substrate 10 from being damaged during subsequent removal or etching operations.

Please refer to FIGS. 1 to 3 . In one embodiment of the present invention, after the substrate oxide layer 11 is formed, a photoresist layer 12 is formed on the substrate oxide layer 11 . The photoresist layer 12 is, for example, by a spin coating method. Or formed by methods such as automatic spraying. After exposure and development processes, multiple openings 13 are formed on the photoresist layer 12 , and the openings 13 are used to locate the positions of the deep trenches 20 . The substrate 10 is then etched, for example, by selecting a dry etching process, a wet etching process, or a combination of a dry etching process and a wet etching process. In this embodiment, for example, one-step etching is used to etch the substrate 10 and the substrate oxide layer 11 , and the photoresist layer 12 is used as a mask to etch the substrate oxide layer 11 . After the etching is completed, the substrate 10 is etched by changing the etching gas or wet etching liquid. After the etching is completed, the photoresist layer 12 is removed to form a deep trench 20. The depth-to-width ratio of the deep trench 20 is, for example, (2~30):1. The specific aspect ratio of the deep trench 20 is based on actual production conditions. set up.

Please refer to FIGS. 2 to 4 . In one embodiment of the present invention, after forming the deep trench 20 , the photoresist layer 12 is removed, and the substrate oxide layer 11 is also removed, for example, through a dry etching process or a wet process. Removed by etching process. In this embodiment, for example, a wet etching process is selected for removal. The etching liquid is, for example, phosphoric acid, hydrofluoric acid, buffer etchant, aluminum etchant or nitric acid. For example, a dilute hydrofluoric acid etching liquid is selected. , etching for a preset time to remove the substrate oxide layer 11. In other embodiments, the substrate oxide layer 11 is removed by selective dry etching. After the substrate oxide layer 11 is removed, the substrate 10 is cleaned with a cleaning agent. The cleaning agent is, for example, a sulfuric acid cleaning agent. The sulfuric acid cleaning agent is a mixture of sulfuric acid and hydrogen peroxide, where the ratio of sulfuric acid and hydrogen peroxide is, for example, 5:1. The substrate 10 is reacted at a temperature of, for example, 125° C. for a preset time to remove the remaining photoresist or organic matter on the surface of the substrate 10 .

Please refer to FIGS. 4 to 5 . In one embodiment of the present invention, after the substrate oxide layer 11 is removed, a lining oxide layer 21 is formed on the sidewalls and top of the deep trench 20 and the substrate 10 . The layer 21 is made of materials such as silicon oxide, for example. In this embodiment, for example, the lining oxide layer 21 is formed by a selective decoupling plasma oxidation process. Specifically, for example, the substrate 10 is placed in a temperature of, for example, 300° C. to 400° C. and a pressure of 300° C. to 400° C. For example, oxygen is introduced into a reaction chamber with a radio frequency power of, for example, 10 mT to 100 mT and a radio frequency power of, for example, 1 KW to 3 KW. The flow rate of oxygen is, for example, 120 mL/min to 330 mL/min. The surface of the substrate 10 and the deep trench 20 reacts with the formed oxygen radicals to form a decoupling plasma oxide, that is, the oxygen radicals react with silicon to form a silicon dioxide lining oxide layer 21. This method can form a purer Oxygen radicals are generated, and the quality of the generated lining oxide layer 21 is better, and the defects on the surface of the deep trench 20 are repaired. The thickness of the lining oxide layer 21 is set according to specific production conditions, for example. By forming a lining oxide layer 21 on the sidewalls and top of the deep trench 20 and the substrate 10 , defects caused by etching when the deep trench 20 is formed on the substrate 10 are repaired and the performance of subsequent semiconductor devices is improved.

Please refer to FIGS. 5 and 6 . In one embodiment of the present invention, after the lining oxide layer 21 is formed, a high dielectric layer 22 is formed on the lining oxide layer 21 . The high dielectric layer 22 is, for example, It is a high-K dielectric material such as hafnium oxide, zirconium oxide, hafnium silicon oxide, titanium oxide, tantalum oxide, barium strontium titanium oxide, barium titanium oxide, strontium titanium oxide or oxide. In this embodiment, the material of the high dielectric layer 22 is selected to be tantalum oxide material, for example. The present invention does not limit the formation method of the high dielectric layer 22. In this embodiment, for example, atomic deposition (Atomic Layer Deposition, ALD), metal organic vapor deposition (Metal-Oraganic Vapor Deposition, MOCVD) or chemical vapor deposition are selected. Deposition method (Chemical VaporDeposition, CVD). The thickness of the high dielectric layer 22 is, for example, 30Ř150Å, specifically, it is 30Å, 60Å, 90Å, 120Å or 150Å. By forming the high dielectric layer 22 on the lining oxide layer 21 , positive charges can be accumulated on the surface of the semiconductor substrate 10 and the bottom and sidewalls of the deep trench 20 , creating a potential barrier, so that the semiconductor substrate 10 The free electrons on the surface and the bottom and side walls of the deep trench 20 are adsorbed and cannot move or recombine, thereby reducing the generation of dark current and protecting the side walls of the deep trench 20 .

Please refer to FIGS. 6 to 7 . In one embodiment of the present invention, after the high dielectric layer 22 is formed, the substrate 10 is processed to form a first oxide layer 23 on the high dielectric layer 22 . . For example, the first oxide layer 23 covers the surface of the substrate 10 and the sidewalls and bottom of the deep trench 20, fills the deep trench 20, forms a seal at one end of the deep trench 20 close to the surface of the substrate 10, and the first oxide layer 23 creates an air gap 24 within the deep trench 20. The sealing of the air gap 24 is, for example, lower than the height of the deep trench 20 , that is, the top of the air gap 24 is lower than the top of the deep trench 20 to avoid reducing the isolation effect of the deep trench 20 or reducing the stability of the isolation structure. The thickness of the first oxide layer 23 is, for example, 1200Ř1800Å, and the stress of the deposited first oxide layer 23 is, for example, tensile stress, and the tensile stress is, for example, 20MPa˜40MPa. By filling the first oxide layer 23 with the air gap 24 in the deep trench 20, the electrical and optical isolation between adjacent components is enhanced and the performance of the semiconductor device is improved. In this embodiment, the first oxide layer 23 is formed, for example, through a first deposition process. The first deposition process is, for example, a high aspect ratio process (HARP), that is, a thermochemical process using ozone and tetraethoxysilane. The reaction forms an oxide film. Specifically, under a preset process temperature and a preset pressure, reactant gas is introduced, and the first oxide layer 23 is formed on the high dielectric layer 22 through a high aspect ratio process. The preset process temperature is, for example, 380°C~400°C, and the preset pressure is, for example, 20MPa~40MPa.

Please refer to FIG. 7 . In one embodiment of the present invention, after the first oxide layer 23 is formed, a baking process is performed on the first oxide layer 23 . Through the baking process, the first oxide layer deposited by a high aspect ratio process is removed. The water and oxygen residue generated in the oxide layer 23 increases the density of the first oxide layer 23 and prevents the water and oxygen residue from being difficult to remove after subsequent annealing treatment, thereby causing the water and oxygen residue to cause bubble defects in subsequent processes. Specifically, the substrate 10 is introduced into the substrate 10 at a preset temperature and a preset flow rate within a preset time to complete the baking process. The baking temperature is, for example, 300°C to 350°C, the helium flow rate is, for example, 8000sccm to 10000sccm, and the baking time is, for example, 300s to 400s. In the embodiment of the present invention, by changing the helium flow rate and baking time of the baking process within a set range, the purpose of better removing water and oxygen residues in the first oxide layer 23 is achieved, and the water and oxygen residues are avoided to cause bubble defects.

Please refer to FIGS. 7 to 8 . In one embodiment of the present invention, after the first oxide layer 23 is subjected to a baking process, the second oxide layer 25 is continued to be deposited on the first oxide layer 23 . 25, for example, covers the first oxide layer 23, that is, covers the substrate 10 and the deep trench 20, forming a deep trench isolation structure. The thickness of the second oxide layer 25 is, for example, 1000Ř1200Å, and the stress of the deposited second oxide layer 25 is, for example, compressive stress, and the magnitude of the compressive stress is, for example, -150MPa˜-250MPa. The second oxide layer 25 is formed, for example, through a second deposition process. In this embodiment, the second deposition process is, for example, a plasma enhanced deposition process of ethylorthosilicate layer (PETEOS) process. For example, in a device The second oxide layer 25 is formed under a certain temperature and pressure. Specifically, the reaction temperature is, for example, 300°C to 350°C, and the reaction pressure is, for example, 20MPa to 40MPa. In this embodiment, during the deposition of the second oxide layer 25 , for example, the stresses of the first oxide layer 23 and the second oxide layer 25 are optimally matched, so that the first oxide layer 23 and the second oxide layer 25 The stress expressed after bonding is compressive stress, and the compressive stress is, for example, -110MPa~-230MPa. By depositing the second oxide layer 25 on the first oxide layer 23, the isolation performance and stability of the deep trench isolation structure are enhanced. At the same time, by optimally matching the stresses of the first oxide layer 23 and the second oxide layer 25, the film The entire layer exhibits compressive stress, thereby avoiding the problem of poor adhesion between the silicon and the film layer surface caused by tensile stress, and overall improving the problem of bubble defects.

Please refer to FIGS. 8 to 14 . In one embodiment of the present invention, FIGS. 9 and 10 show the performance of bubble defects on the substrate 10 after only depositing the first oxide layer 23 through a high aspect ratio process. Figures 11 and 12 show that after the first oxide layer 23 is deposited through a high aspect ratio process, the second oxide layer 25 is deposited directly on the first oxide layer 23 through a plasma enhanced tetraethyl orthosilicate layer deposition process. Performance of bubble defects. Figures 13 and 14 show that after the first oxide layer 23 is deposited through a high aspect ratio process, the second oxide layer is deposited on the first oxide layer 23 through a plasma enhanced tetraethyl orthosilicate layer deposition process after a baking process. After 25 seconds, the performance of bubble defects on the substrate 10 is shown. It can be seen from Figures 9 to 14 that there are many bubble defects in the first oxide layer 23 deposited through a high aspect ratio process. The first oxide layer 23 is deposited through a plasma enhanced tetraethyl orthosilicate layer deposition process. After the oxide layer 25 is formed, the bubble defects on the substrate 10 are reduced, but there are still many bubble defects. As for the film layer structure formed by the preparation method of the semiconductor structure of the back-illuminated image sensor provided by the present invention, that is, before the second oxide layer 25 is formed, the first oxide layer 23 is subjected to a baking process, and the substrate 10 and the film are Bubble defects between layers are greatly reduced, greatly improving the bubble defect problem and improving the performance of semiconductor devices.

Please refer to Figures 8 and 15. In one embodiment of the present invention, the film stress of the first oxide layer 23 formed by the first deposition process is 20MPa~40MPa, and the film stress of the second oxide layer 25 formed by the second deposition process is 20MPa~40MPa. The layer stress is -150MPa~-250MPa. During the baking process, the stress performance of the first oxide layer 23 and the second oxide layer 25 after combining is also different under different baking conditions. Figure 15 shows different implementations. In this example, the stress behavior after the first oxide layer 23 and the second oxide layer 25 are combined under different baking conditions. Specifically, for example, the flow rate of helium gas and the baking time are changed. The flow rate of helium gas is, for example, 7000 sccm or 8000 sccm, and the baking time is, for example, 270s, 300s, or 330s. It can be seen from the figure that after baking, as the flow rate of helium gas increases and the baking time increases, the magnitude of the compressive stress exhibited by the first oxide layer 23 and the second oxide layer 25 gradually decreases and tends to to stability. It can be found that during the baking process, controlling the flow rate of helium gas to, for example, 8000 sccm, and the baking time to, for example, 300 s, can effectively remove the water and oxygen residues in the first oxide layer 23 deposited by the high aspect ratio process. . Moreover, the method for forming the deep trench isolation structure in the present invention can also be applied to the preparation of other semiconductor structures to improve the quality of the manufactured semiconductor devices.

To sum up, the present invention provides a semiconductor structure of a back-illuminated image sensor and a manufacturing method thereof. The first oxide layer deposited by a high aspect ratio process is processed through a baking process. The unexpected effect is to remove the first oxide layer. Water and oxygen residues to avoid subsequent bubble defects. A second oxide layer is formed on the first oxide layer, and through a stress matching optimization process, the stress of the film layer appears as compressive stress, thereby avoiding the problem of poor adhesion between the film layer and the substrate surface due to tensile stress. At the same time, by selecting the deposition method and preparation conditions of the film layer, the waste of resources is reduced, production time is saved, and production efficiency is improved.

The embodiments of the present invention disclosed above are only used to help explain the present invention. The embodiments do not exhaustively describe all details, nor do they limit the invention to the specific implementations described. Obviously, many modifications and variations are possible in light of the contents of this specification. These embodiments are selected and described in detail in this specification to better explain the principles and practical applications of the present invention, so that those skilled in the art can better understand and utilize the present invention. The invention is limited only by the claims and their full scope and equivalents.

Claims (6)

1. A method for fabricating a semiconductor structure of a backside illuminated image sensor, comprising at least the steps of:

providing a substrate;

forming a plurality of deep trenches within the substrate;

forming a liner oxide layer on the side wall and the bottom of the deep trench and the substrate;

forming a high dielectric medium layer on the lining oxide layer;

forming a first oxide layer on the high dielectric medium layer through a first deposition process, wherein the first oxide layer is filled to the top of the deep trench, and an air gap is formed in the deep trench by the first oxide layer;

baking the first oxide layer;

forming a second oxide layer on the first oxide layer through a second deposition process, wherein the stress of the second oxide layer is opposite to that of the first oxide layer, and the pressure type after the first oxide layer and the second oxide layer are combined is compressive stress;

wherein, the baking process comprises the following steps: introducing a gas with a set flow rate at a preset baking temperature, and completing the baking process treatment of the first oxide layer after reacting for a preset time;

the gas comprises helium, and the flow rate of the gas is 8000-10000 sccm.

2. The method of claim 1, wherein the stress type of the first oxide layer is tensile stress.

3. The method of claim 1, wherein the second oxide layer has a compressive stress.

4. The method of claim 1, wherein the first deposition process is a high aspect ratio process and the reaction temperature of the first deposition process is 380 ℃ to 400 ℃.

5. The method for fabricating a semiconductor structure of a backside illuminated image sensor according to claim 1, wherein the baking temperature is 300 ℃ to 350 ℃.

6. The method of claim 1, wherein the second deposition process is a plasma enhanced ethyl orthosilicate layer deposition process, and the reaction temperature of the second deposition process is 300-350 ℃.