CN116845153A - High-light-efficiency light-emitting diode epitaxial wafer, preparation method and LED - Google Patents

Abstract

The application provides a high-light-efficiency light-emitting diode epitaxial wafer, a preparation method and an LED, wherein the high-light-efficiency light-emitting diode epitaxial wafer comprises a substrate, and a buffer layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer which are sequentially deposited on the substrate; the active layer comprises a plurality of alternately laminated quantum well layers and a composite quantum barrier layer, wherein the composite quantum barrier layer comprises a first quantum barrier strain compensation sublayer, a second quantum barrier strain compensation sublayer and a third quantum barrier strain compensation sublayer, the first quantum barrier strain compensation sublayer is an InGaN/GaN superlattice layer, the second quantum barrier strain compensation sublayer is an AlInGaN layer, the third quantum barrier strain compensation sublayer is a BInGaN layer, and the InGaN/GaN superlattice layer comprises a plurality of alternately laminated InGaN layers and GaN layers, so that the quantum polarization effect is reduced.

Description

A high-light-efficiency light-emitting diode epitaxial wafer, preparation method and LED

Technical field

The invention belongs to the field of semiconductor technology, and specifically relates to a high-light-efficiency light-emitting diode epitaxial wafer, a preparation method and an LED.

Background technique

In recent years, with the advancement of LED material epitaxy and device preparation technology, high-brightness GaN-based LED devices have developed rapidly. The external quantum efficiency of blue LEDs using patterned sapphire substrates and indium tin oxide p-electrodes has reached 60% at a forward current of 20mA. At the same time, LED devices are superior to traditional light sources in terms of light efficiency, lifespan, and energy saving. However, the development of III-nitride LED technology based on heteroepitaxial growth still faces many problems, especially the polarization effect existing in the quantum wells in the active region of the LED structure.

The piezoelectric polarization caused by lattice mismatch in the quantum well structure of GaN-based LED devices has a very negative impact on the luminous performance of the device, especially leading to a shift in the luminous wavelength of the LED device and a reduction in luminous efficiency. In recent years, researchers have been focusing on reducing the piezoelectric polarization effect of quantum well structures through strain compensation methods and reducing the polarization electric field in quantum wells by preparing polarization-matched InGaN/GaN quantum well structures.

Existing methods reduce the polarization electric field effect in the quantum well by preparing a polarization-matched InGaN/GaN quantum well structure to release the compressive stress of the quantum well layer and the GaN epitaxial layer before growing the quantum well, but the quantum well/quantum barrier itself The piezoelectric polarization effect caused by lattice mismatch is not improved.

Contents of the invention

In order to solve the above technical problems, the present invention provides a high-efficiency light-emitting diode epitaxial wafer, a preparation method and an LED, which are used to solve the technical problem of the piezoelectric polarization effect caused by the lattice mismatch of the quantum well/quantum barrier itself.

On the one hand, the invention provides the following technical solution, a high-light-efficiency light-emitting diode epitaxial wafer, including a substrate and a buffer layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer sequentially deposited on the substrate. GaN layer;

The active layer includes a plurality of alternately stacked quantum well layers and a composite quantum barrier layer. The composite quantum barrier layer includes a first quantum barrier strain compensation sub-layer, a second quantum barrier strain compensation sub-layer and a third quantum barrier strain. Compensation sublayer, wherein the first quantum barrier strain compensation sublayer is an InGaN/GaN superlattice layer, the second quantum barrier strain compensation sublayer is an AlInGaN layer, and the third quantum barrier strain compensation sublayer is BInGaN layer, the InGaN/GaN superlattice layer includes a plurality of alternately stacked InGaN layers and GaN layers.

Compared with the existing technology, the beneficial effects of the present invention are: by depositing the first quantum barrier strain compensation sub-layer as an InGaN superlattice layer and a GaN superlattice layer, lower changes in tensile/compressive strain are introduced to release quantum The compressive stress of the well layer reduces the quantum polarization effect. The second quantum barrier strain compensation sub-layer is deposited as an AlInGaN layer. By adjusting the composition ratio of Al and In elements in the AlInGaN material, the AlInGaN material as a quantum barrier material can achieve lattice matching and eliminate the piezoelectric polarization effect in the quantum well. At the same time, the band gap width of the AlInGaN material is increased, thereby enhancing the barrier's ability to restrict injected carriers, preventing the occurrence of electron overflow, and effectively suppressing the droop effect of LED efficiency. The deposited third quantum barrier strain compensation sub-layer is a BInGaN layer that can also adjust the B and In element composition ratio, so that the BInGaN material as a quantum barrier material can achieve lattice matching and eliminate the piezoelectric polarization effect in the quantum well, and as a The thermal protection layer inhibits the generation of non-radiative recombination centers caused by thermal damage during the growth process. Therefore, first of all, the composite quantum barrier layer contains multiple quantum barrier strain compensation sub-layers, which can effectively reduce the quantum well polarization effect, increase the overlap of electron-hole wave functions, improve the radiation recombination efficiency of the quantum well, and reduce the quantum well energy band tilt and The quantum confinement Stark effect improves the light efficiency of long-wavelength LED devices such as green light and yellow light. Secondly, reducing the band tilt increases the effective width of the quantum well, reduces the carrier density of the quantum well, and reduces the probability of Auger nonradiative recombination. Finally, the quantum barrier strain compensation layer increases the effective barrier height and reduces carrier leakage when the LED device operates in forward bias.

Further, the thickness range of the composite quantum barrier layer is 5 nm to 50 nm, and the thickness ratio range of the first quantum barrier strain compensation sub-layer, the second quantum barrier strain compensation sub-layer and the third quantum barrier strain compensation sub-layer is 1: 1:1～1:10:10.

Further, the In component in the InGaN superlattice layer is lower than the In component in the quantum well layer, the Al component in the AlInGaN layer ranges from 0.01 to 0.5, and the In component ranges from 0.01 to 0.5. 0.1, the B component in the BInGaN layer ranges from 0.01 to 0.5, and the In component ranges from 0.01 to 0.1.

Further, the quantum well layer is an InGaN layer, with a thickness ranging from 1 nm to 10 nm, and an In composition ranging from 0.05 to 0.5.

Furthermore, the number of alternating stacking cycles of the InGaN/GaN superlattice layer ranges from 1 to 20, and the range of the number of alternating stacking cycles of the active layer ranges from 1 to 20.

On the other hand, the present invention also proposes a method for preparing a high-efficiency light-emitting diode epitaxial wafer. The preparation method includes the following steps:

provide a substrate;

depositing a buffer layer on the substrate, and preprocessing the substrate on which the buffer layer has been deposited;

depositing a GaN layer on the buffer layer;

Quantum well layers and composite quantum barrier layers are alternately stacked on the GaN layer to form an active layer. The composite quantum barrier layer includes a first quantum barrier strain compensation sub-layer, a second quantum barrier strain compensation sub-layer and a third quantum barrier strain compensation sub-layer. Quantum barrier strain compensation sub-layer, wherein the first quantum barrier strain compensation sub-layer is a plurality of alternately stacked InGaN superlattice layers and GaN superlattice layers, and the second quantum barrier strain compensation sub-layer is an AlInGaN layer . The third quantum barrier strain compensation sub-layer is a BInGaN layer;

depositing an electron blocking layer on the active layer;

A P-type GaN layer is deposited on the electron blocking layer.

Further, the quantum well layer is an InGaN layer, the growth temperature ranges from 700°C to 850°C, the N2/NH3 ratio of the growth atmosphere ranges from 1:1 to 1:10, and the growth pressure ranges from 50torr to 300torr.

Further, the growth atmosphere N2/H2/NH3 ratio of the composite quantum barrier layer ranges from 1:1:1 to 5:1:10, the growth temperature ranges from 800°C to 1000°C, and the growth pressure ranges from 50torr. ~300torr.

Further, the growth temperature range of the N-type GaN layer is 1050℃~1200℃, the growth pressure range is 100~600torr, the thickness range is 2um~3um, and the Si doping concentration range is 1E19atoms/cm3~5E19 atoms/cm3.

In a third aspect, embodiments of the present invention also provide the following technical solution, an LED including the above-mentioned high-efficiency light-emitting diode epitaxial wafer.

Description of the drawings

FIG. 1 is a schematic structural diagram of a high-efficiency light-emitting diode epitaxial wafer in the first embodiment of the present invention.

FIG. 2 is a flow chart of a method for preparing a high-efficiency light-emitting diode epitaxial wafer in the second embodiment of the present invention.

Description of main component symbols: 100: substrate, 200: buffer layer, 300: non-doped GaN layer, 400: N-type GaN layer, 500: active layer, 510: quantum well layer, 520: composite quantum barrier layer, 600 : Electron blocking layer, 700: P-type GaN layer.

The following specific embodiments will further illustrate the present invention in conjunction with the above-mentioned drawings.

Detailed ways

In order to facilitate understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the invention are shown in the drawings. However, the invention may be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

It should be noted that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is said to be "connected" to another element, it can be directly connected to the other element or there may also be intervening elements present. The terms "vertical," "horizontal," "left," "right" and similar expressions are used herein for illustrative purposes only.

Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which the invention belongs. The terminology used herein in the description of the invention is for the purpose of describing specific embodiments only and is not intended to limit the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

Please refer to Figure 1, which shows a high-efficiency light-emitting diode epitaxial wafer in the first embodiment of the present invention, including a substrate 100, a buffer layer 200, an undoped GaN layer 300, and N GaN layer 400, active layer 500, electron blocking layer 600 and P-type GaN layer 700;

The active layer 400 includes a plurality of alternately stacked quantum well layers 510 and a composite quantum barrier layer 520. The composite quantum barrier layer 520 includes a first quantum barrier strain compensation sub-layer and a second quantum barrier strain compensation sub-layer. And a third quantum barrier strain compensation sub-layer, wherein the first quantum barrier strain compensation sub-layer is an InGaN/GaN superlattice layer, the second quantum barrier strain compensation sub-layer is an AlInGaN layer, and the third quantum barrier strain compensation sub-layer is an AlInGaN layer. The barrier strain compensation sub-layer is a BInGaN layer, and the InGaN/GaN superlattice layer includes a plurality of alternately stacked InGaN layers and GaN layers.

Further, the thickness range of the composite quantum barrier layer is 5 nm to 50 nm, and the thickness ratio range of the first quantum barrier strain compensation sub-layer, the second quantum barrier strain compensation sub-layer and the third quantum barrier strain compensation sub-layer is 1: 1:1～1:10:10. For example, the thickness of the composite quantum barrier layer is 5 nm, or 8 nm, or 12 nm, or 15 nm, or 30 nm, or 50 nm. For example, the thickness ratio of the first quantum barrier strain compensation sub-layer, the second quantum barrier strain compensation sub-layer and the third quantum barrier strain compensation sub-layer is 1:1:1, or 1:2:3, or 1:3 :2, or 1:10:10.

Further, the In component in the InGaN superlattice layer is lower than the In component in the quantum well layer, the Al component in the AlInGaN layer ranges from 0.01 to 0.5, and the In component ranges from 0.01 to 0.5. 0.1, the B component in the BInGaN layer ranges from 0.01 to 0.5, and the In component ranges from 0.01 to 0.1. For example, the Al composition in the AlInGaN superlattice layer is 0.01, or 0.05, or 0.1, or 0.2, or 0.5, the In composition is 0.01 or 0.03, or 0.05, or 0.08, or 0.1, and the BInGaN The B component in the layer is 0.01, or 0.05, 0.1, or 0.2, or 0.5, and the In component is 0.01, or 0.03, or 0.04, or 0.08, or 0.1.

Further, the quantum well layer is an InGaN layer, with a thickness ranging from 1 nm to 10 nm, and an In composition ranging from 0.05 to 0.5. For example, the thickness of the InGaN layer is 1 nm, or 3.5 nm, or 5 nm, or 10 nm, and the In composition is 0.05, or 0.15, or 0.3, or 0.5.

Further, the number of alternating stacking cycles of the InGaN superlattice layer and the GaN superlattice layer ranges from 1 to 20, and the range of the number of alternating stacking cycles of the quantum well layer and the composite quantum barrier layer ranges from 1 to 20. For example, the number of alternating stacking cycles of the InGaN superlattice layer and the GaN superlattice layer is 1, or 5, or 10, or 15, or 20. For example, the quantum well layer and the composite quantum layer The number of alternating stacking cycles of barrier layers is 1, or 5, or 11, or 16, or 20.

Specifically, in this embodiment, the thickness of the quantum barrier layer is 12 nm, and the thickness ratio of the first/second/third quantum barrier strain compensation sub-layer is 1:3:2. The In composition of the InGaN layer of the first quantum barrier strain compensation sub-layer is lower than the In composition of the quantum well. The second quantum barrier strain compensation sub-layer is an AlInGaN layer with an Al composition of 0.1 and an In composition of 0.05. The third quantum barrier strain compensator is The layer is BInGaN layer with B component 0.1 and In component 0.04. The first quantum barrier strain compensation sublayer is an InGaN/GaN superlattice layer with 10 overlapping periods, and the growth pressure of the composite quantum barrier layer is 200torr. The quantum well layer and composite quantum barrier layer of the active layer are alternately stacked for 11 cycles. The quantum well layer is an InGaN layer with a thickness of 3.5nm and an In composition of 0.15.

In order to facilitate subsequent photoelectric testing and ease of understanding, experimental group one, experimental group two, experimental group three, experimental group four, experimental group five, experimental group six, experimental group seven, experimental group eight, and experimental group nine are introduced in this application and control group;

Among them, Experimental Group 1, Experimental Group 2, Experimental Group 3, Experimental Group 4, Experimental Group 5, Experimental Group 6, Experimental Group 7, Experimental Group 8, and Experimental Group 9 all adopt a high light efficiency method as described in Embodiment 1. The light-emitting diode epitaxial wafers all include the composite quantum barrier layer in Embodiment 1, while the control group uses the light-emitting diode epitaxial wafer in the prior art. Its structure is the same as that of Embodiment 1, but the differences are as follows: the control group uses 10 nm , an AlGaN quantum barrier layer with an Al component ratio of 0.1, and a Ga component ratio of 0.9 instead of the composite quantum barrier layer in Embodiment 1.

Specifically, the thickness of the quantum barrier layer in experimental group 1 is 12nm, the thickness ratio of the first/second/third quantum barrier strain compensation sublayer is 1:3:2, and the Al composition of the second quantum barrier strain compensation sublayer is 0.1, The In component is 0.05, the B component of the third quantum barrier strain compensation sublayer is 0.1, and the In component is 0.04. The number of overlapping periods of the first quantum barrier strain compensation sublayer (InGaN superlattice layer and GaN superlattice layer Number of alternating stacks)10.

The thickness of the quantum barrier layer in experimental group 2 is 8nm, the thickness ratio of the first/second/third quantum barrier strain compensation sublayer is 1:3:2, and the second quantum barrier strain compensation sublayer has an Al composition of 0.1 and an In composition. is 0.05, the B component of the third quantum barrier strain compensation sub-layer is 0.1, the In component is 0.04, the number of overlapping periods of the first quantum barrier strain compensation sub-layer (the number of alternating stacking cycles of InGaN superlattice layer and GaN superlattice layer )10.

The thickness of the quantum barrier layer in experimental group 3 is 15nm, the thickness ratio of the first/second/third quantum barrier strain compensation sublayer is 1:3:2, and the Al composition of the second quantum barrier strain compensation sublayer is 0.1 and In composition. is 0.05, the B component of the third quantum barrier strain compensation sub-layer is 0.1, the In component is 0.04, the number of overlapping periods of the first quantum barrier strain compensation sub-layer (the number of alternating stacking cycles of InGaN superlattice layer and GaN superlattice layer )10.

The thickness of the quantum barrier layer in experimental group 4 is 12nm, the thickness ratio of the first/second/third quantum barrier strain compensation sublayer is 1:10:10, and the Al composition of the second quantum barrier strain compensation sublayer is 0.1 and In composition. is 0.05, the B component of the third quantum barrier strain compensation sub-layer is 0.1, the In component is 0.04, the number of overlapping periods of the first quantum barrier strain compensation sub-layer (the number of alternating stacking cycles of InGaN superlattice layer and GaN superlattice layer )10.

The thickness of the quantum barrier layer in experimental group 5 is 12nm, the thickness ratio of the first/second/third quantum barrier strain compensation sublayer is 1:1:1, and the Al composition of the second quantum barrier strain compensation sublayer is 0.1 and In composition. is 0.05, the B component of the third quantum barrier strain compensation sub-layer is 0.1, the In component is 0.04, the number of overlapping periods of the first quantum barrier strain compensation sub-layer (the number of alternating stacking cycles of InGaN superlattice layer and GaN superlattice layer )10.

The thickness of the quantum barrier layer in experimental group 6 is 12nm, the thickness ratio of the first/second/third quantum barrier strain compensation sublayer is 1:3:2, and the Al composition of the second quantum barrier strain compensation sublayer is 0.2 and In composition. is 0.08, the B component of the third quantum barrier strain compensation sub-layer is 0.2, the In component is 0.08, the number of overlapping periods of the first quantum barrier strain compensation sub-layer (the number of alternating stacks of InGaN superlattice layers and GaN superlattice layers )10.

The thickness of the quantum barrier layer in experimental group 7 is 12nm, the thickness ratio of the first/second/third quantum barrier strain compensation sublayer is 1:3:2, and the Al composition of the second quantum barrier strain compensation sublayer is 0.05 and In composition. The B component of the third quantum barrier strain compensation sub-layer is 0.05 and the In component is 0.03. The number of overlapping periods of the first quantum barrier strain compensation sub-layer (the number of alternating stacks of InGaN superlattice layer and GaN superlattice layer) is 0.05. )10.

The thickness of the quantum barrier layer in experimental group 8 is 12nm, the thickness ratio of the first/second/third quantum barrier strain compensation sublayer is 1:3:2, and the Al composition of the second quantum barrier strain compensation sublayer is 0.1 and In composition. is 0.05, the B component of the third quantum barrier strain compensation sub-layer is 0.1, the In component is 0.04, the number of overlapping periods of the first quantum barrier strain compensation sub-layer (the number of alternating stacking cycles of InGaN superlattice layer and GaN superlattice layer )15.

The thickness of the quantum barrier layer in experimental group 9 is 12nm, the thickness ratio of the first/second/third quantum barrier strain compensation sublayer is 1:3:2, and the Al composition of the second quantum barrier strain compensation sublayer is 0.1 and In composition. is 0.05, the B component of the third quantum barrier strain compensation sub-layer is 0.1, the In component is 0.04, the number of overlapping periods of the first quantum barrier strain compensation sub-layer (the number of alternating stacking cycles of InGaN superlattice layer and GaN superlattice layer )5.

The high-efficiency light-emitting diode epitaxial wafers in the above experimental groups one, two, three, four, five, six, seven, eight, nine and the control group were subjected to photoelectric testing. Test, the test results are shown in Table 1:

As can be seen from Table 1, the light efficiency of the high-efficiency light-emitting diode epitaxial wafers provided by the control group is used as the benchmark, so the light efficiency improvement is 0%, while the light efficiency of the experimental group 1 is increased by 5% compared with the control group. Compared with the control group, the light efficiency of group two increased by 3.5%. Compared with the control group, the light efficiency of experimental group three increased by 2.8%. Compared with the control group, the light efficiency of experimental group four increased by 3.2%. The light efficiency of experimental group five increased by 3.2%. Compared with the control group, its light efficiency increased by 2%. Compared with the control group, the light efficiency of experimental group six increased by 3.5%. Compared with the control group, the light efficiency of experimental group seven increased by 1.8%. Compared with the control group, experimental group eight The light efficiency of the control group increased by 3.5%, and the light efficiency of the experimental group nine increased by 1.8% compared with the control group.

Therefore, it can be seen that compared with the control group, the light efficiency of the high-light-efficiency light-emitting diode epitaxial wafers provided by the experimental group 1 has been increased the most, by 5%.

Embodiment 2

Please refer to Figure 2, which shows a method for preparing a high-efficiency light-emitting diode epitaxial wafer in a second embodiment of the present invention. The method includes the following steps:

S101. Provide a substrate 100.

Specifically, the substrate may be one of a sapphire substrate, a _SiO2 sapphire composite substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a zinc oxide substrate. However, in this embodiment, a sapphire substrate is selected as the substrate. Sapphire is currently the most commonly used GaN-based LED substrate material. The sapphire substrate has mature preparation technology, low price, easy cleaning and processing, and good performance at high temperatures. stability.

S102. Deposit the buffer layer 200 on the substrate 100, and preprocess the substrate 100 on which the buffer layer 200 has been deposited.

Optionally, the buffer layer 200 is an AlN buffer layer or a GaN buffer layer, with a thickness of 10 nm to 50 nm. Specifically, the AlN buffer layer is deposited in Applied Materials PVD, with a thickness of 15 nm. The AlN buffer layer is used to provide a lining. The nucleation center with the same bottom orientation releases the stress caused by the lattice mismatch between GaN and the substrate and the thermal stress caused by the thermal expansion coefficient mismatch. Further growth provides a flat nucleation surface and reduces its nucleation. The growing contact angle enables the island-shaped GaN grains to connect into planes within a smaller thickness and transform into two-dimensional epitaxial growth.

In this embodiment, Zhongwei A7 MOCVD (Metal-organic Chemical Vapor Deposition, referred to as MOCVD) equipment is used, high-purity H ₂ (hydrogen), high-purity N ₂ (nitrogen), high-purity H ₂ and high-purity One of the mixed gases of pure _N2 is used as the carrier gas, high-purity _NH3 is used as the N source, trimethylgallium (TMGa) and triethylgallium (TEGa) are used as the gallium source, and trimethylindium (TMIn) is used as the indium Source, trimethylaluminum (TMAl) is used as the aluminum source, silane (SiH ₄ ) is used as the N-type dopant, and magnocene (CP ₂ Mg) is used as the P-type dopant for epitaxial growth.

Preprocess the sapphire substrate on which the buffer layer has been deposited. Specifically, transfer the sapphire substrate on which the AlN buffer layer has been plated to MOCVD, and perform pretreatment in an _H2 atmosphere for 1 min to 10 min. The processing temperature is 1000°C to 1200°C. ℃, and then perform nitriding treatment on the sapphire substrate to improve the crystal quality of the AlN buffer layer and effectively improve the crystal quality of the subsequently deposited GaN epitaxial layer.

S103. Deposit an N-type GaN layer on the buffer layer 200;

Specifically, step S03 includes sequentially depositing a non-doped GaN layer 300 and an N-type GaN layer 400 on the composite buffer layer;

Therefore, it is first necessary to deposit the undoped GaN layer 300 on the composite buffer layer 2;

Specifically, the growth temperature of the non-doped GaN layer is 1100°C, the growth pressure is 150torr, and the growth thickness is 2um~3um. The growth temperature of the non-doped GaN layer is higher and the pressure is lower. The quality of the prepared GaN crystal is better, and the thickness increases with the growth temperature. As the thickness of GaN increases, compressive stress will be released through stacking faults, line defects will be reduced, crystal quality will be improved, and reverse leakage will be reduced. However, increasing the thickness of the GaN layer consumes a lot of Ga source material, which greatly increases the epitaxy cost of LEDs. Therefore, at present, LED epitaxial wafers usually grow undoped GaN to 2um~3um, which not only saves production costs, but also has high crystal quality of GaN material.

Then, deposit an N-type GaN layer 400 on the non-doped GaN layer 300;

Optionally, the growth temperature of the N-type GaN layer is 1050°C to 1200°C, the growth pressure torr is 100 to 600torr, the thickness is 2um to 3um, and the Si doping concentration is 1E19 atoms/cm3 to 5E19 atoms/cm3.

Specifically, the growth temperature of the N-type GaN layer is 1120°C, the growth pressure is 100torr, the growth thickness is 2um~3um, and the Si doping concentration is 2.5E19 atoms/cm3. First, the N-type GaN layer provides sufficient electrons for LED light emission, and secondly, the N-type GaN layer The resistivity of the GaN layer is higher than that of the transparent electrode on p-GaN. Therefore, sufficient Si doping can effectively reduce the resistivity of the N-type GaN layer. Finally, the n-type GaN is thick enough to effectively release the stress of the light-emitting diode. luminous efficiency.

S103. Alternately stack quantum well layers and composite quantum barrier layers on the GaN layer to form an active layer. The composite quantum barrier layer includes a first quantum barrier strain compensation sub-layer, a second quantum barrier strain compensation sub-layer and The third quantum barrier strain compensation sub-layer, wherein the first quantum barrier strain compensation sub-layer is an InGaN/GaN superlattice layer, the second quantum barrier strain compensation sub-layer is an AlInGaN layer, and the third quantum barrier The strain compensation sub-layer is a BInGaN layer, and the InGaN/GaN superlattice layer includes a plurality of alternately stacked InGaN layers and GaN layers;

The active layer includes a plurality of alternately stacked quantum well layers and a composite quantum barrier layer. The composite quantum barrier layer includes a first quantum barrier strain compensation sub-layer which is an InGaN superlattice layer and a GaN superlattice layer, and a second quantum barrier layer. The quantum barrier strain compensation sub-layer is an AlInGaN layer, and the third quantum barrier strain compensation sub-layer is a BInGaN layer.

Optionally, the thickness of the quantum barrier layer is 5 nm to 50 nm, and the thickness ratio of the first/second/third quantum barrier strain compensation sub-layer is 1:1:1~1:10:10.

Optionally, the In composition of the first quantum barrier strain compensation sub-layer InGaN layer is lower than the quantum well In composition, the second quantum barrier strain compensation sub-layer is an AlInGaN layer, and the Al composition range in the AlInGaN layer is 0.01 ~0.5, the In component range is 0.01~0.1, the B component range in the BInGaN layer is 0.01~0.5, and the In component range is 0.01~0.1.

Optionally, the first quantum barrier strain compensation sub-layer is an overlapping period number of 1 to 20 of the InGaN superlattice layer and the GaN superlattice layer.

Optionally, the N ₂ /H ₂ /NH ₃ ratio of the growth atmosphere of the composite quantum barrier layer ranges from 1:1:1 to 5:1:10.

Optionally, the growth temperature of the composite quantum barrier layer ranges from 800°C to 1000°C.

Optionally, the growth pressure of the composite quantum barrier layer ranges from 50 torr to 300 torr.

Optionally, the quantum well layer and the composite quantum barrier layer of the active layer are alternately stacked for 1 to 20 cycles.

Optionally, the quantum well layer 510 is an InGaN layer, the growth temperature is 700°C ~ 850°C, the thickness range is 1nm ~ 10nm, the growth pressure range is 50torr ~ 300torr, and the growth atmosphere N ₂ /NH ₃ ratio range is 1:1 ~ 1:10, In component range is 0.05~0.5.

Specifically, the active layer 500 includes a plurality of alternately stacked quantum well layers and a composite quantum barrier layer. The composite quantum barrier layer includes a plurality of quantum barrier strain compensation sub-layers, and the first quantum barrier strain compensation sub-layer is InGaN. The superlattice layer and GaN superlattice layer, the second quantum barrier strain compensation sub-layer is an AlInGaN layer, and the third quantum barrier strain compensation sub-layer is a BInGaN layer. The thickness of the quantum barrier layer is 12nm, and the thickness ratio of the first/second/third quantum barrier strain compensation sublayer is 1:3:2. The In composition of the InGaN layer of the first quantum barrier strain compensation sub-layer is lower than the In composition of the quantum well. The second quantum barrier strain compensation sub-layer is an AlInGaN layer with an Al composition of 0.1 and an In composition of 0.05. The third quantum barrier strain compensator is The layer is BInGaN layer with B component 0.1 and In component 0.04. The first quantum barrier strain compensation sublayer is 10 overlapping periods of the InGaN/GaN superlattice layer. The growth atmosphere of the composite quantum barrier layer has an N ₂ /H ₂ /NH ₃ ratio of 3:1:5. The growth temperature of the composite quantum barrier layer is 870°C. The growth pressure of the composite quantum barrier layer is 200torr. The quantum well layer and composite quantum barrier layer of the active layer are alternately stacked for 11 cycles. The quantum well layer is an InGaN layer, the growth temperature is 795°C, the thickness is 3.5nm, the growth pressure is 200torr, the growth atmosphere N ₂ /NH ₃ ratio is 2:3, and the In composition is 0.15.

S104. Deposit an electron blocking layer on the active layer;

Optionally, the electron blocking layer is AlInGaN with a thickness of 10nm~40nm, a growth temperature range of 900°C~1000°C, a growth pressure range of 100torr~300torr, where the Al component range is 0.005~0.1, and the In component concentration range is 0.01~ 0.2.

Specifically, the electron blocking layer is AlInGaN with a thickness of 15nm, in which the Al component concentration has a gradient from 0.01 to 0.05 in the growth direction of the epitaxial layer, the In component concentration is 0.01, the growth temperature is 965°C, and the growth pressure is 200torr, which can effectively limit electron overflow. The flow can also reduce the blocking of holes, improve the injection efficiency of holes into the quantum well, reduce the Auger recombination of carriers, and improve the luminous efficiency of the light-emitting diode.

S105. Deposit a P-type GaN layer on the electron blocking layer;

Optionally, the P-type GaN layer has a growth temperature of 900°C to 1050°C, a thickness of 100nm to 50nm, a growth pressure of 100torr to 600torr, and an Mg doping concentration of 1E+19atoms/cm3 to 1E+21atoms/cm3.

Specifically, the growth temperature of the P-type GaN layer is 985°C, the thickness is 15nm, the growth pressure is 200torr, and the Mg doping concentration is 2E+20atoms/cm3. Too high a Mg doping concentration will destroy the crystal quality, while a low doping concentration will affect the air quality. hole concentration. At the same time, for LED structures containing V-shaped pits, the higher growth temperature of the P-type GaN layer is also conducive to merging V-shaped pits and obtaining an LED epitaxial wafer with a smooth surface.

Sample A and sample B are prepared into 10mil*24mil chips using the same chip process conditions. Sample A is the chip currently produced in mass production, and sample B is the chip prepared by this plan. 300 LED chips are extracted from the two samples. When tested at 120mA/60mA current, the photoelectric efficiency increased by 1% to 2%, and other electrical properties were good.

Further, in other embodiments of the present invention, an LED is provided, including the high-efficiency light-emitting diode epitaxial wafer as described in Embodiment 1.

In summary, in the high-efficiency light-emitting diode epitaxial wafers and preparation methods in the above embodiments of the present invention, tensile/compressive strain is introduced by depositing the first quantum barrier strain compensation sub-layer as an InGaN superlattice layer and a GaN superlattice layer. Lower changes release the compressive stress of the quantum well layer and reduce the quantum polarization effect. The second quantum barrier strain compensation sub-layer is deposited as an AlInGaN layer. By adjusting the composition ratio of Al and In elements in the AlInGaN material, the AlInGaN material as a quantum barrier material can achieve lattice matching and eliminate the piezoelectric polarization effect in the quantum well. At the same time, the band gap width of the AlInGaN material is increased, thereby enhancing the barrier's ability to restrict injected carriers, preventing the occurrence of electron overflow, and effectively suppressing the droop effect of LED efficiency. The deposited third quantum barrier strain compensation sub-layer is a BInGaN layer that can also adjust the B and In element composition ratio, so that the BInGaN material as a quantum barrier material can achieve lattice matching and eliminate the piezoelectric polarization effect in the quantum well, and as a The thermal protection layer inhibits the generation of non-radiative recombination centers caused by thermal damage during the growth process. Therefore, first of all, the composite quantum barrier layer contains multiple quantum barrier strain compensation sub-layers, which can effectively reduce the quantum well polarization effect, increase the overlap of electron-hole wave functions, improve the radiation recombination efficiency of the quantum well, and reduce the quantum well energy band tilt and The quantum confinement Stark effect improves the light efficiency of long-wavelength LED devices such as green light and yellow light. Secondly, reducing the band tilt increases the effective width of the quantum well, reduces the carrier density of the quantum well, and reduces the probability of Auger nonradiative recombination. Finally, the quantum barrier strain compensation layer increases the effective barrier height and reduces carrier leakage when the LED device operates in forward bias.

In the description of this specification, reference to the terms "one embodiment," "some embodiments," "an example," "specific examples," or "some examples" or the like means that specific features are described in connection with the embodiment or example. , structures, materials or features are included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

The above-mentioned embodiments only express several implementation modes of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the patent scope of the present invention. It should be noted that, for those of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the scope of protection of the patent of the present invention should be determined by the appended claims.

Claims (10)

1. A high-light-efficiency light-emitting diode epitaxial wafer, characterized in that it includes a substrate and a buffer layer, an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer deposited on the substrate in sequence; The active layer includes a plurality of alternately stacked quantum well layers and a composite quantum barrier layer. The composite quantum barrier layer includes a first quantum barrier strain compensation sub-layer, a second quantum barrier strain compensation sub-layer and a third quantum barrier strain. Compensation sublayer, wherein the first quantum barrier strain compensation sublayer is an InGaN/GaN superlattice layer, the second quantum barrier strain compensation sublayer is an AlInGaN layer, and the third quantum barrier strain compensation sublayer is BInGaN layer, the InGaN/GaN superlattice layer includes a plurality of alternately stacked InGaN layers and GaN layers. 2. The high-light-efficiency light-emitting diode epitaxial wafer according to claim 1, characterized in that the thickness of the composite quantum barrier layer ranges from 5 nm to 50 nm, and the first quantum barrier strain compensation sub-layer and the second quantum barrier strain compensation sub-layer The thickness ratio of the sub-layer and the third quantum barrier strain compensation sub-layer ranges from 1:1:1 to 1:10:10. 3. The high-efficiency light-emitting diode epitaxial wafer according to claim 1, wherein the In component in the InGaN superlattice layer is lower than the In component in the quantum well layer, and the In component in the AlInGaN layer The Al component range is 0.01~0.5, the In component range is 0.01~0.1, the B component range of the BInGaN layer is 0.01~0.5, and the In component range is 0.01~0.1. 4. The high-efficiency light-emitting diode epitaxial wafer according to claim 1, characterized in that the quantum well layer is an InGaN layer, with a thickness ranging from 1 nm to 10 nm, and an In composition ranging from 0.05 to 0.5. 5. The high-efficiency light-emitting diode epitaxial wafer according to claim 1, wherein the number of alternating stacking cycles of the InGaN/GaN superlattice layer ranges from 1 to 20, and the number of alternating stacking cycles of the active layer ranges from 1 to 20. The range is 1~20. 6. A method for preparing a high-efficiency light-emitting diode epitaxial wafer according to any one of claims 1 to 5, characterized in that it includes the following steps: provide a substrate; depositing a buffer layer on the substrate, and preprocessing the substrate on which the buffer layer has been deposited; depositing an N-type GaN layer on the buffer layer; Quantum well layers and composite quantum barrier layers are alternately stacked on the GaN layer to form an active layer. The composite quantum barrier layer includes a first quantum barrier strain compensation sub-layer, a second quantum barrier strain compensation sub-layer and a third quantum barrier strain compensation sub-layer. Quantum barrier strain compensation sub-layer, wherein the first quantum barrier strain compensation sub-layer is an InGaN/GaN superlattice layer, the second quantum barrier strain compensation sub-layer is an AlInGaN layer, and the third quantum barrier strain compensation sub-layer is an AlInGaN layer. The sub-layer is a BInGaN layer, and the InGaN/GaN superlattice layer includes a plurality of alternately stacked InGaN layers and GaN layers; depositing an electron blocking layer on the active layer; A P-type GaN layer is deposited on the electron blocking layer. 7. The method for preparing a high-efficiency light-emitting diode epitaxial wafer according to claim 6, wherein the quantum well layer is an InGaN layer, the growth temperature ranges from 700°C to 850°C, and the growth atmosphere has an N ₂ /NH ₃ ratio. The range is 1:1～1:10, and the growth pressure range is 50torr～300torr. 8. The method for preparing high-efficiency light-emitting diode epitaxial wafers according to claim 6, characterized in that the growth atmosphere of the composite quantum barrier layer has an N ₂ /H ₂ /NH ₃ ratio ranging from 1:1:1 to 5. :1:10, the growth temperature range is 800℃~1000℃, and the growth pressure range is 50torr~300torr. 9. The method for preparing a high-efficiency light-emitting diode epitaxial wafer according to claim 6, characterized in that the growth temperature range of the N-type GaN layer is 1050°C ~ 1200°C, the growth pressure range is 100~600torr, and the thickness range is 2um ~3um, Si doping concentration range is 1E19 atoms/cm3 ~ 5E19 atoms/cm3. 10. An LED, characterized by comprising the high-efficiency light-emitting diode epitaxial wafer according to any one of claims 1-5.