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CN116154072B - LED epitaxial wafer for regulating and controlling quantum well carbon impurities and its preparation method, LED - Google Patents

LED epitaxial wafer for regulating and controlling quantum well carbon impurities and its preparation method, LED Download PDF

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CN116154072B
CN116154072B CN202310443584.9A CN202310443584A CN116154072B CN 116154072 B CN116154072 B CN 116154072B CN 202310443584 A CN202310443584 A CN 202310443584A CN 116154072 B CN116154072 B CN 116154072B
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quantum well
carbon impurity
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CN116154072A (en
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程龙
郑文杰
高虹
刘春杨
胡加辉
金从龙
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/822Materials of the light-emitting regions
    • H10H20/824Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
    • H10H20/825Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN
    • H10H20/8252Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN characterised by the dopants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/011Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0133Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
    • H10H20/01335Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/811Bodies having quantum effect structures or superlattices, e.g. tunnel junctions
    • H10H20/812Bodies having quantum effect structures or superlattices, e.g. tunnel junctions within the light-emitting regions, e.g. having quantum confinement structures
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

The invention provides an LED epitaxial wafer for regulating and controlling quantum well carbon impurities, a preparation method thereof and an LED, wherein the LED epitaxial wafer comprises a substrate, a first semiconductor layer, an active layer and a second semiconductor layer; the active layer comprises M composite quantum well layers and quantum barrier layers which are periodically and alternately arranged, the composite quantum well layers sequentially comprise a plurality of first carbon impurity regulating layers, quantum well layers and a plurality of second carbon impurity regulating layers which are stacked along the epitaxial direction, the carbon impurity content of the first carbon impurity regulating layers is decreased progressively along the epitaxial direction, the carbon impurity content of the second carbon impurity regulating layers is increased progressively along the epitaxial direction, and the carbon impurity concentrations of the first carbon impurity regulating layers and the second carbon impurity regulating layers are higher than the carbon impurity concentration of the quantum well layers.

Description

调控量子阱碳杂质的LED外延片及其制备方法、LEDLED epitaxial wafer for regulating quantum well carbon impurity and preparation method thereof, LED

技术领域technical field

本发明属于LED的技术领域,具体地涉及调控量子阱碳杂质的LED外延片及其制备方法、LED。The invention belongs to the technical field of LEDs, and in particular relates to LED epitaxial wafers for regulating quantum well carbon impurities, a preparation method thereof, and LEDs.

背景技术Background technique

GaN基为主的蓝光、绿光为代表的III-V族氮化物材料发光器件,具有亮度高、能耗低、寿命长、响应时间短、零辐射等突出优点,有极其广泛的市场。在制作LED(发光二极管)等半导体器件过程中,以GaN基为主的半导体中掺杂是至关重要的。这些极其微量的杂质会对半导体材料的化学性质以及物理性质起决定性的作用。当然,也将会严重影响着半导体的质量,这是因为杂质的存在,会破坏原本严格周期性排列的原子产生的势场,很有可能在禁带中引入能级(允许所具有的能量状态)。在生长氮化物半导体材料(如GaN、AlN等)的过程之中都必不可少的用到金属有机化合物(MO源)。有机化合物必然会含有C元素,伴随着的MOCVD高温生长,MO源必将发生热分解,这热分解的过程中会使得含C元素的杂质生长并入外延层中。目前降低C元素的杂质的主要的办法是将MO源TMGa(三甲基镓)换成三乙基镓(TEGa)。GaN-based blue light and green light-emitting devices represented by III-V nitride materials have outstanding advantages such as high brightness, low energy consumption, long life, short response time, and zero radiation, and have an extremely wide market. In the process of manufacturing semiconductor devices such as LEDs (light-emitting diodes), doping in GaN-based semiconductors is crucial. These extremely small amounts of impurities will play a decisive role in the chemical and physical properties of semiconductor materials. Of course, it will also seriously affect the quality of the semiconductor, because the existence of impurities will destroy the potential field generated by the atoms arranged in strict periodicity, and it is very likely to introduce energy levels in the forbidden band (allowing the energy state of ). Metal-organic compounds (MO sources) are indispensable in the process of growing nitride semiconductor materials (such as GaN, AlN, etc.). Organic compounds must contain C elements, and with the high-temperature growth of MOCVD, the MO source must undergo thermal decomposition. During the process of thermal decomposition, impurities containing C elements will grow and be incorporated into the epitaxial layer. At present, the main way to reduce the impurity of C element is to replace the MO source TMGa (trimethylgallium) with triethylgallium (TEGa).

更换TEGa之后,外延层中C杂质含量会下降,但是由于还是有机源,其必然还是存在C杂质进入外延层中,C杂质在GaN中主要以C替代Ga位形成产生施主能级,C替代N位形成、产生受主能级,载流子浓度下降,非辐射复合效率增加,导致LED发光效率下降。After replacing TEGa, the C impurity content in the epitaxial layer will decrease, but because it is still an organic source, there must still be C impurities entering the epitaxial layer. C impurities in GaN are mainly formed by replacing Ga sites with C to generate donor energy levels, and C replaces N. Bit formation, generation of acceptor energy level, decrease of carrier concentration, increase of non-radiative recombination efficiency, leading to decrease of LED luminous efficiency.

发明内容Contents of the invention

为了解决上述技术问题,本发明提供了调控量子阱碳杂质的LED外延片及其制备方法、LED,用于解决现有技术中的技术问题。In order to solve the above technical problems, the present invention provides an LED epitaxial wafer for regulating and controlling quantum well carbon impurities, a preparation method thereof, and an LED, which are used to solve the technical problems in the prior art.

第一方面,本发明实施例提供以下技术方案,一种调控量子阱碳杂质的LED外延片,包括衬底以及依次沉积在所述衬底上的第一半导体层、有源层以及第二半导体层;In the first aspect, the embodiments of the present invention provide the following technical solutions, an LED epitaxial wafer for regulating quantum well carbon impurities, including a substrate and a first semiconductor layer, an active layer, and a second semiconductor layer sequentially deposited on the substrate layer;

所述有源层包括M个周期性交替排布的复合量子阱层以及量子垒层,所述复合量子阱层沿着外延方向依次包括层叠的若干第一碳杂质调控层、量子阱层以及若干第二碳杂质调控层,若干所述第一碳杂质调控层的碳杂质含量沿外延方向递减,且若干所述第二碳杂质调控层的碳杂质含量沿外延方向递增,所述第一碳杂质调控层与所述第二碳杂质调控层的碳杂质浓度均高于所述量子阱层的碳杂质浓度。The active layer includes M periodically alternately arranged composite quantum well layers and quantum barrier layers, and the composite quantum well layer sequentially includes stacked first carbon impurity control layers, quantum well layers and several stacked layers along the epitaxial direction. For the second carbon impurity control layer, the carbon impurity content of some of the first carbon impurity control layers decreases along the epitaxial direction, and the carbon impurity content of some of the second carbon impurity control layers increases along the epitaxial direction, and the first carbon impurity Both the carbon impurity concentration of the control layer and the second carbon impurity control layer are higher than the carbon impurity concentration of the quantum well layer.

相比现有技术,本申请的有益效果为:本发明的量子阱中的C杂质原子的半径接近Ga原子或者N原子,以便产生替位原子,同时,还可避免杂质原子成为间隙原子时,使InGaN晶格发生畸变,影响InGaN材料的晶体质量下降,而沉积的复合量子阱层包含第一碳杂质调控层与第二碳杂质调控层,其在低压的条件下生长,高V/III比可以有效降低量子阱层的C杂质含量,提高量子阱层的晶体质量,其次,第一碳杂质调控层与第二碳杂质调控层还可以减少因以C替代Ga位形成产生施主能级,C替代N位形成、产生受主能级,导致载流子浓度下降以及非辐射复合效率增加,最后通过第一碳杂质调控层与第二碳杂质调控层调制C杂质浓度,降低量子阱的极化效应,提高电子与空穴发生的空穴波函数重叠,提高LED的发光效率。Compared with the prior art, the beneficial effect of the present application is: the radius of the C impurity atoms in the quantum well of the present invention is close to that of Ga atoms or N atoms, so as to generate replacement atoms, and at the same time, when the impurity atoms become interstitial atoms, The InGaN lattice is distorted, which affects the crystal quality of InGaN materials, and the deposited composite quantum well layer includes the first carbon impurity control layer and the second carbon impurity control layer, which are grown under low pressure conditions and have a high V/III ratio. It can effectively reduce the C impurity content of the quantum well layer and improve the crystal quality of the quantum well layer. Secondly, the first carbon impurity control layer and the second carbon impurity control layer can also reduce the donor level due to the formation of C instead of Ga sites. Substituting the formation of N sites and generating acceptor energy levels leads to a decrease in carrier concentration and an increase in non-radiative recombination efficiency. Finally, the C impurity concentration is modulated by the first carbon impurity control layer and the second carbon impurity control layer to reduce the polarization of the quantum well. Effect, improve the wave function overlap of electrons and holes, and improve the luminous efficiency of LED.

较佳的,所述第一碳杂质调控层与所述第二碳杂质调控层均为GaN层、AlGaN层、InGaN层、BGaN层中的一种。Preferably, the first carbon impurity control layer and the second carbon impurity control layer are both GaN layers, AlGaN layers, InGaN layers, and BGaN layers.

较佳的,所述量子阱层的碳杂质浓度小于1E17 atoms/cm3Preferably, the carbon impurity concentration of the quantum well layer is less than 1E17 atoms/cm 3 .

较佳的,所述复合量子阱层的厚度范围为1nm~10nm。Preferably, the composite quantum well layer has a thickness ranging from 1 nm to 10 nm.

较佳的,所述第一碳杂质调控层、所述量子阱层与所述第二碳杂质调控层之间的厚度比范围为1:1:1~1:10:1。Preferably, the thickness ratio of the first carbon impurity regulation layer, the quantum well layer and the second carbon impurity regulation layer ranges from 1:1:1 to 1:10:1.

较佳的,所述复合量子阱层和所述量子垒层交替排布的周期M取值范围为:1≤M≤20。Preferably, the value range of period M in which the composite quantum well layers and the quantum barrier layers are alternately arranged is: 1≤M≤20.

第二方面,本发明实施例还提供以下技术方案,一种调控量子阱碳杂质的LED外延片的制备方法,包括以下步骤:In the second aspect, the embodiments of the present invention also provide the following technical solutions, a method for preparing an LED epitaxial wafer that regulates quantum well carbon impurities, comprising the following steps:

提供一衬底;providing a substrate;

在所述衬底上沉积第一半导体层;depositing a first semiconductor layer on the substrate;

在所述第一半导体层上交替沉积M个周期的复合量子阱层和量子垒层,以形成有源层;Alternately depositing M periods of composite quantum well layers and quantum barrier layers on the first semiconductor layer to form an active layer;

在最后一个周期的所述量子垒层上沉积第二半导体层;depositing a second semiconductor layer on said quantum barrier layer of the last period;

其中,所述复合量子阱层沿着外延方向依次包括层叠的若干第一碳杂质调控层、量子阱层以及若干第二碳杂质调控层,若干所述第一碳杂质调控层的碳杂质含量沿外延方向递减,且若干所述第二碳杂质调控层的碳杂质含量沿外延方向递增,所述第一碳杂质调控层与所述第二碳杂质调控层的碳杂质浓度均高于所述量子阱层的碳杂质浓度。Wherein, the composite quantum well layer sequentially includes several first carbon impurity control layers, quantum well layers and several second carbon impurity control layers stacked along the epitaxial direction, and the carbon impurity content of the first carbon impurity control layers is along the The epitaxial direction decreases, and the carbon impurity content of several of the second carbon impurity control layers increases along the epitaxial direction, and the carbon impurity concentrations of the first carbon impurity control layer and the second carbon impurity control layer are higher than the quantum The carbon impurity concentration of the well layer.

较佳的,所述复合量子阱层的生长温度范围为700℃~1000℃,生长气氛N2/NH3比例范围为10:1~1:10,生长压力范围为50torr~300torr。Preferably, the growth temperature of the composite quantum well layer ranges from 700°C to 1000°C, the ratio of N 2 /NH 3 in the growth atmosphere ranges from 10:1 to 1:10, and the growth pressure ranges from 50 torr to 300 torr.

较佳的,所述量子垒层具体为AlGaN层,其生长温度范围为800℃~1000℃,厚度范围为1nm~50nm,生长压力范围为50torr ~300torr,Al组分范围为0.05~0.5。Preferably, the quantum barrier layer is specifically an AlGaN layer, its growth temperature ranges from 800° C. to 1000° C., its thickness ranges from 1 nm to 50 nm, its growth pressure ranges from 50 torr to 300 torr, and its Al composition ranges from 0.05 to 0.5.

第三方面,本发明实施例还提供以下技术方案,一种LED,包括上述的调控量子阱碳杂质的LED外延片。In the third aspect, the embodiment of the present invention also provides the following technical solution, an LED comprising the above-mentioned LED epitaxial wafer for regulating quantum well carbon impurities.

附图说明Description of drawings

为了更清楚地说明本发明实施例中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the accompanying drawings that need to be used in the descriptions of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only of the present invention. For some embodiments, those of ordinary skill in the art can also obtain other drawings based on these drawings without paying creative efforts.

图1为本发明实施例提供的调控量子阱碳杂质的LED外延片的结构图;Fig. 1 is the structural diagram of the LED epitaxial wafer of regulating quantum well carbon impurity that the embodiment of the present invention provides;

图2为本发明实施例提供的复合量子阱层的结构图;Fig. 2 is the structural diagram of the composite quantum well layer provided by the embodiment of the present invention;

图3为本发明实施例提供的调控量子阱碳杂质的LED外延片的制备方法的流程图。FIG. 3 is a flow chart of a method for preparing an LED epitaxial wafer for regulating quantum well carbon impurities provided by an embodiment of the present invention.

附图标记说明:Explanation of reference signs:

Figure SMS_1
Figure SMS_1

以下将结合说明书附图对本发明作进一步说明。The present invention will be further described below in conjunction with the accompanying drawings.

具体实施方式Detailed ways

下面详细描述本发明的实施例,所述实施例的示例在附图中示出,其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施例是示例性的,旨在用于解释本发明的实施例,而不能理解为对本发明的限制。Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary and are intended to explain the embodiments of the present invention and should not be construed as limitations of the present invention.

在本发明实施例的描述中,需要理解的是,术语“长度”、“宽度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明实施例和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。In the description of the embodiments of the present invention, it should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical ", "horizontal", "top", "bottom", "inner", "outer" and other indicated orientations or positional relationships are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the embodiments of the present invention and simplifying Describes, but does not indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and operate in a specific orientation, and therefore should not be construed as limiting the invention.

此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本发明实施例的描述中,“多个”的含义是两个或两个以上,除非另有明确具体的限定。In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features. Thus, a feature defined as "first" and "second" may explicitly or implicitly include one or more of these features. In the description of the embodiments of the present invention, "plurality" means two or more, unless otherwise specifically defined.

在本发明实施例中,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”、“固定”等术语应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或成一体;可以是机械连接,也可以是电连接;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本发明实施例中的具体含义。In the embodiments of the present invention, terms such as "installation", "connection", "connection" and "fixation" should be interpreted in a broad sense unless otherwise clearly specified and limited. Disassembled connection, or integration; it can be mechanical connection or electrical connection; it can be direct connection or indirect connection through an intermediary, and it can be the internal communication of two components or the interaction relationship between two components. Those of ordinary skill in the art can understand the specific meanings of the above terms in the embodiments of the present invention according to specific situations.

实施例一Embodiment one

如图1所示,本发明第一实施例提供了一种调控量子阱碳杂质的LED外延片,包括衬底1以及依次沉积在所述衬底1上的第一半导体层、有源层5以及第二半导体层;As shown in FIG. 1 , the first embodiment of the present invention provides an LED epitaxial wafer for regulating quantum well carbon impurities, including a substrate 1 and a first semiconductor layer and an active layer 5 sequentially deposited on the substrate 1 and a second semiconductor layer;

如图2所示,所述有源层5包括M个周期性交替排布的复合量子阱层51以及量子垒层52,所述复合量子阱层51沿着外延方向依次包括层叠的若干第一碳杂质调控层511、量子阱层512以及若干第二碳杂质调控层513,若干所述第一碳杂质调控层511的碳杂质含量沿外延方向递减,且若干所述第二碳杂质调控层513的碳杂质含量沿外延方向递增,所述第一碳杂质调控层511与所述第二碳杂质调控层513的碳杂质浓度均高于所述量子阱层512的碳杂质浓度。As shown in FIG. 2 , the active layer 5 includes M composite quantum well layers 51 and quantum barrier layers 52 that are periodically and alternately arranged, and the composite quantum well layer 51 sequentially includes several stacked first A carbon impurity control layer 511, a quantum well layer 512, and a plurality of second carbon impurity control layers 513, the carbon impurity content of the first carbon impurity control layers 511 decreases along the epitaxial direction, and some of the second carbon impurity control layers 513 The carbon impurity content of the carbon impurity increases along the epitaxial direction, and the carbon impurity concentrations of the first carbon impurity regulation layer 511 and the second carbon impurity regulation layer 513 are both higher than the carbon impurity concentration of the quantum well layer 512 .

具体的,本发明的量子阱中的C杂质原子的半径接近Ga原子或者N原子,以便产生替位原子,同时,还可避免杂质原子成为间隙原子时,使InGaN晶格发生畸变,影响InGaN材料的晶体质量下降,而沉积的复合量子阱层51包含第一碳杂质调控层511与第二碳杂质调控层513,其在低压的条件下生长,高V/III比可以有效降低量子阱层512的C杂质含量,提高量子阱层的晶体质量,其次,第一碳杂质调控层511与第二碳杂质调控层513还可以减少因以C替代Ga位形成产生施主能级,C替代N位形成、产生受主能级,导致载流子浓度下降,非辐射复合效率增加,最后通过第一碳杂质调控层511与第二碳杂质调控层513调制C杂质浓度,降低量子阱的极化效应,提高电子与空穴发生的空穴波函数重叠,提高LED的发光效率。Specifically, the radius of the C impurity atoms in the quantum well of the present invention is close to that of Ga atoms or N atoms, so as to generate substitution atoms. At the same time, it can also prevent the InGaN lattice from being distorted when the impurity atoms become interstitial atoms, which will affect the InGaN material. The crystal quality of the compound quantum well layer 51 deposited includes the first carbon impurity control layer 511 and the second carbon impurity control layer 513, which are grown under low pressure conditions, and the high V/III ratio can effectively reduce the quantum well layer 512. C impurity content, improve the crystal quality of the quantum well layer, secondly, the first carbon impurity control layer 511 and the second carbon impurity control layer 513 can also reduce the donor level due to the formation of C instead of Ga sites, and the formation of C instead of N sites 1. Generating an acceptor energy level, resulting in a decrease in carrier concentration and an increase in non-radiative recombination efficiency. Finally, the C impurity concentration is modulated by the first carbon impurity control layer 511 and the second carbon impurity control layer 513 to reduce the polarization effect of the quantum well. Improve the overlap of hole wave functions generated by electrons and holes, and improve the luminous efficiency of LEDs.

在本实施例中,所述第一碳杂质调控层511与所述第二碳杂质调控层513均为GaN层、AlGaN层、InGaN层、BGaN层中的一种。In this embodiment, both the first carbon impurity control layer 511 and the second carbon impurity control layer 513 are one of a GaN layer, an AlGaN layer, an InGaN layer, and a BGaN layer.

在本实施例中,所述量子阱层512的碳杂质浓度小于1E17 atoms/cm3In this embodiment, the carbon impurity concentration of the quantum well layer 512 is less than 1E17 atoms/cm 3 .

在本实施例中,所述复合量子阱层51的厚度范围为1nm~10nm。In this embodiment, the composite quantum well layer 51 has a thickness ranging from 1 nm to 10 nm.

在本实施例中,所述第一碳杂质调控层511、所述量子阱层512与所述第二碳杂质调控层513之间的厚度比范围为1:1:1~1:10:1。In this embodiment, the thickness ratio between the first carbon impurity control layer 511, the quantum well layer 512 and the second carbon impurity control layer 513 ranges from 1:1:1 to 1:10:1 .

在本实施例中,所述复合量子阱层51和所述量子垒层52交替排布的周期M取值范围为:1≤M≤20。In this embodiment, the value range of the period M in which the composite quantum well layers 51 and the quantum barrier layers 52 are alternately arranged is: 1≤M≤20.

在本实施例中,所述第一半导体层包括依次沉积在所述衬底1上的缓冲层2、非掺杂GaN层3、N型GaN层4,所述第二半导体层包括依次沉积于所述有源层5上的电子阻挡层6和P型GaN层7。In this embodiment, the first semiconductor layer includes a buffer layer 2, an undoped GaN layer 3, and an N-type GaN layer 4 sequentially deposited on the substrate 1, and the second semiconductor layer includes a buffer layer deposited on the substrate 1 in sequence. The electron blocking layer 6 and the P-type GaN layer 7 on the active layer 5 .

为了方便后续的光电测试以及便于理解,在本申请中引入若干实验组与对照组。In order to facilitate subsequent photoelectric tests and facilitate understanding, several experimental groups and control groups are introduced in this application.

其中,实验组包括实验组一、实验组二、实验组三、实验组四、实验组五、实验组六、实验组七、实验组八、实验组九,实验组一、实验组二、实验组三、实验组四、实验组五、实验组六、实验组七、实验组八、实验组九均采用如实施例一所述的一种调控量子阱碳杂质的LED外延片,且其均包括如实施例一所述的有源层5,对照组则采用现有技术中的LED外延片,其结构与实施一大致相同,但区别如下:对照组采用按M个周期性交替层叠的InGaN量子阱层与AlGaN量子垒层组成的有源层,且M为10,InGaN量子阱层的厚度为3.2nm,AlGaN量子垒层的厚度为9.5nm;Among them, the experimental groups include experimental group 1, experimental group 2, experimental group 3, experimental group 4, experimental group 5, experimental group 6, experimental group 7, experimental group 8, experimental group 9, experimental group 1, experimental group 2, experimental group Group three, experiment group four, experiment group five, experiment group six, experiment group seven, experiment group eight, and experiment group nine all adopted a kind of LED epitaxial wafer regulating quantum well carbon impurities as described in embodiment one, and all of them Including the active layer 5 as described in Embodiment 1, the control group uses LED epitaxial wafers in the prior art, and its structure is roughly the same as that of Embodiment 1, but the difference is as follows: the control group uses InGaN stacked alternately by M periods An active layer composed of a quantum well layer and an AlGaN quantum barrier layer, and M is 10, the thickness of the InGaN quantum well layer is 3.2nm, and the thickness of the AlGaN quantum barrier layer is 9.5nm;

具体的,实验组一中的复合量子阱层51的厚度为5nm,所述第一碳杂质调控层511、所述量子阱层512与所述第二碳杂质调控层513之间的厚度比为1:3:1,所述复合量子阱层51和所述量子垒层52交替排布的周期M为10,所述量子阱层512的碳杂质浓度为3.5E16atoms/cm3Specifically, the thickness of the composite quantum well layer 51 in the experimental group one is 5 nm, and the thickness ratio between the first carbon impurity control layer 511, the quantum well layer 512 and the second carbon impurity control layer 513 is 1:3:1, the period M in which the composite quantum well layer 51 and the quantum barrier layer 52 are alternately arranged is 10, and the carbon impurity concentration of the quantum well layer 512 is 3.5E16 atoms/cm 3 ;

实验组二中的复合量子阱层51的厚度为10nm,所述第一碳杂质调控层511、所述量子阱层512与所述第二碳杂质调控层513之间的厚度比为1:3:1,所述复合量子阱层51和所述量子垒层52交替排布的周期M为10,所述量子阱层512的碳杂质浓度为3.5E16atoms/cm3The thickness of the composite quantum well layer 51 in the experimental group two is 10nm, and the thickness ratio between the first carbon impurity control layer 511, the quantum well layer 512 and the second carbon impurity control layer 513 is 1:3 : 1, the period M of the alternate arrangement of the composite quantum well layer 51 and the quantum barrier layer 52 is 10, and the carbon impurity concentration of the quantum well layer 512 is 3.5E16 atoms/cm 3 ;

实验组三中的复合量子阱层51的厚度为1nm,所述第一碳杂质调控层511、所述量子阱层512与所述第二碳杂质调控层513之间的厚度比为1:3:1,所述复合量子阱层51和所述量子垒层52交替排布的周期M为10,所述量子阱层512的碳杂质浓度为3.5E16atoms/cm3The thickness of the composite quantum well layer 51 in the experimental group three is 1 nm, and the thickness ratio between the first carbon impurity control layer 511, the quantum well layer 512 and the second carbon impurity control layer 513 is 1:3 : 1, the period M of the alternate arrangement of the composite quantum well layer 51 and the quantum barrier layer 52 is 10, and the carbon impurity concentration of the quantum well layer 512 is 3.5E16 atoms/cm 3 ;

实验组四中的复合量子阱层51的厚度为5nm,所述第一碳杂质调控层511、所述量子阱层512与所述第二碳杂质调控层513之间的厚度比为1:10:1,所述复合量子阱层51和所述量子垒层52交替排布的周期M为10,所述量子阱层512的碳杂质浓度为3.5E16atoms/cm3The thickness of the composite quantum well layer 51 in the experimental group four is 5nm, and the thickness ratio between the first carbon impurity control layer 511, the quantum well layer 512 and the second carbon impurity control layer 513 is 1:10 : 1, the period M of the alternate arrangement of the composite quantum well layer 51 and the quantum barrier layer 52 is 10, and the carbon impurity concentration of the quantum well layer 512 is 3.5E16 atoms/cm 3 ;

实验组五中的复合量子阱层51的厚度为5nm,所述第一碳杂质调控层511、所述量子阱层512与所述第二碳杂质调控层513之间的厚度比为1:1:1,所述复合量子阱层51和所述量子垒层52交替排布的周期M为10,所述量子阱层512的碳杂质浓度为3.5E16atoms/cm3The thickness of the composite quantum well layer 51 in the experimental group five is 5nm, and the thickness ratio between the first carbon impurity control layer 511, the quantum well layer 512 and the second carbon impurity control layer 513 is 1:1 : 1, the period M of the alternate arrangement of the composite quantum well layer 51 and the quantum barrier layer 52 is 10, and the carbon impurity concentration of the quantum well layer 512 is 3.5E16 atoms/cm 3 ;

实验组六中的复合量子阱层51的厚度为5nm,所述第一碳杂质调控层511、所述量子阱层512与所述第二碳杂质调控层513之间的厚度比为1:3:1,所述复合量子阱层51和所述量子垒层52交替排布的周期M为20,所述量子阱层512的碳杂质浓度为3.5E16atoms/cm3The thickness of the composite quantum well layer 51 in experimental group six is 5 nm, and the thickness ratio between the first carbon impurity control layer 511, the quantum well layer 512 and the second carbon impurity control layer 513 is 1:3 : 1, the period M in which the composite quantum well layer 51 and the quantum barrier layer 52 are alternately arranged is 20, and the carbon impurity concentration of the quantum well layer 512 is 3.5E16 atoms/cm 3 ;

实验组七中的复合量子阱层51的厚度为5nm,所述第一碳杂质调控层511、所述量子阱层512与所述第二碳杂质调控层513之间的厚度比为1:3:1,所述复合量子阱层51和所述量子垒层52交替排布的周期M为1,所述量子阱层512的碳杂质浓度为3.5E16atoms/cm3The thickness of the composite quantum well layer 51 in the experimental group seven is 5nm, and the thickness ratio between the first carbon impurity control layer 511, the quantum well layer 512 and the second carbon impurity control layer 513 is 1:3 : 1, the period M in which the composite quantum well layer 51 and the quantum barrier layer 52 are alternately arranged is 1, and the carbon impurity concentration of the quantum well layer 512 is 3.5E16 atoms/cm 3 ;

实验组八中的复合量子阱层51的厚度为5nm,所述第一碳杂质调控层511、所述量子阱层512与所述第二碳杂质调控层513之间的厚度比为1:3:1,所述复合量子阱层51和所述量子垒层52交替排布的周期M为10,所述量子阱层512的碳杂质浓度为5.0E16atoms/cm3The thickness of the composite quantum well layer 51 in the experimental group eight is 5nm, and the thickness ratio between the first carbon impurity control layer 511, the quantum well layer 512 and the second carbon impurity control layer 513 is 1:3 : 1, the period M in which the composite quantum well layer 51 and the quantum barrier layer 52 are alternately arranged is 10, and the carbon impurity concentration of the quantum well layer 512 is 5.0E16 atoms/cm 3 ;

实验组九中的复合量子阱层51的厚度为5nm,所述第一碳杂质调控层511、所述量子阱层512与所述第二碳杂质调控层513之间的厚度比为1:3:1,所述复合量子阱层51和所述量子垒层52交替排布的周期M为10,所述量子阱层512的碳杂质浓度为1.0E17atoms/cm3The thickness of the composite quantum well layer 51 in the experimental group nine is 5nm, and the thickness ratio between the first carbon impurity control layer 511, the quantum well layer 512 and the second carbon impurity control layer 513 is 1:3 : 1, the period M in which the composite quantum well layer 51 and the quantum barrier layer 52 are alternately arranged is 10, and the carbon impurity concentration of the quantum well layer 512 is 1.0E17 atoms/cm 3 ;

将上述若干实验组以及对照组中的调控量子阱碳杂质的LED外延片制备为10×24mil尺寸的芯片,并在120 mA/ 60 mA电流下测试,测试结果表1所示。The LED epitaxial wafers in the above-mentioned several experimental groups and the control group with controlled quantum well carbon impurities were prepared into chips with a size of 10×24mil, and tested at a current of 120 mA/60 mA. The test results are shown in Table 1.

表1Table 1

Figure SMS_2
Figure SMS_2

将对照组所提供的LED外延片的光效作为基准,因此其提升光效为0%,而实验组一相比对照组,其光效提升了5%,实验组二相比对照组,其光效提升了2.5%,实验组三相比对照组,其光效提升了1.6%,实验组四相比对照组,其光效提升了3.2%,实验组五相比对照组,其光效提升了2%,实验组六相比对照组,其光效提升了3.1%,实验组七相比对照组,其光效提升了1.2%,实验组八相比对照组,其光效提升了3.5%,实验组九相比对照组,其光效提升了1.8%。The luminous efficiency of the LED epitaxial wafer provided by the control group is used as a benchmark, so its luminous efficiency is 0%, while the experimental group 1 has a 5% luminous effect compared with the control group, and the experimental group 2 is compared with the control group. The light efficiency increased by 2.5%. Compared with the control group, the light efficiency of the experimental group three increased by 1.6%. Compared with the control group, the light effect of the experimental group four increased by 3.2%. Compared with the control group, the light efficiency of the experimental group 6 increased by 3.1%, compared with the control group, the light efficiency of the experimental group 7 increased by 1.2%, and the light efficiency of the experimental group 8 increased by 1% compared with the control group. Compared with the control group, the light efficiency of the experimental group nine increased by 1.8%.

因此可知,实验组一所提供的高光效LED外延片相比对照组,其光效提升最大,提升了5%,且对应的,复合量子阱层51的厚度优选为5nm,所述第一碳杂质调控层511、所述量子阱层512与所述第二碳杂质调控层513之间的厚度比优选为1:3:1,所述复合量子阱层51和所述量子垒层52交替排布的周期M优选为10,所述量子阱层512的碳杂质浓度优选为3.5E16atoms/cm3Therefore, it can be seen that compared with the control group, the high luminous efficiency LED epitaxial wafer provided by the experimental group 1 has the largest luminous efficiency improvement of 5%, and correspondingly, the thickness of the composite quantum well layer 51 is preferably 5 nm, and the first carbon The thickness ratio between the impurity control layer 511, the quantum well layer 512 and the second carbon impurity control layer 513 is preferably 1:3:1, and the composite quantum well layer 51 and the quantum barrier layer 52 are alternately arranged The period M of the cloth is preferably 10, and the carbon impurity concentration of the quantum well layer 512 is preferably 3.5E16 atoms/cm 3 .

值得说明的是,在本发明的另一些实施例中,还提供以下方案,一种LED,包括如实施例一所述的调控量子阱碳杂质的LED外延片。It is worth noting that, in some other embodiments of the present invention, the following solution is also provided, an LED comprising the LED epitaxial wafer for controlling the carbon impurities in the quantum well as described in the first embodiment.

实施例二Embodiment two

如图3所示,本发明第二实施例提供了一种调控量子阱碳杂质的LED外延片的制备方法,包括以下步骤:As shown in Figure 3, the second embodiment of the present invention provides a method for preparing an LED epitaxial wafer that regulates quantum well carbon impurities, including the following steps:

S01、提供一衬底1;S01, providing a substrate 1;

其中,所述衬底1可选用蓝宝石衬底、SiO2蓝宝石复合衬底、硅衬底、碳化硅衬底、氮化镓衬底、氧化锌衬底中的一种;Wherein, the substrate 1 can be selected from one of a sapphire substrate, a SiO 2 sapphire composite substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a zinc oxide substrate;

具体的,在本实施例中衬底1选用蓝宝石衬底,蓝宝石是目前最常用的GaN基LED衬底材料,蓝宝石衬底具有制备工艺成熟、价格较低、易于清洗和处理,高温下有很好的稳定性。Specifically, in this embodiment, the substrate 1 is selected from a sapphire substrate. Sapphire is currently the most commonly used GaN-based LED substrate material. good stability.

在本实施例中,采用中微A7 MOCVD(Metal-organic Chemical Vapor Deposition金属有机气相沉积,简称MOCVD)设备,高纯H2(氢气)、高纯N2(氮气)、高纯H2和高纯N2的混合气体中的一种作为载气,高纯NH3作为N源,三甲基镓(TMGa)及三乙基镓(TEGa)作为镓源,三甲基铟(TMIn)作为铟源,三甲基铝(TMAl)作为铝源,硅烷(SiH4)作为N型掺杂剂,二茂镁(CP2Mg)作为P型掺杂剂进行外延生长。In this embodiment, Zhongwei A7 MOCVD (Metal-organic Chemical Vapor Deposition, MOCVD for short) equipment is used, high-purity H 2 (hydrogen), high-purity N 2 (nitrogen), high-purity H 2 and high-purity One of the mixed gases of pure N2 is used as carrier gas, high-purity NH3 is used as N source, trimethylgallium (TMGa) and triethylgallium (TEGa) are used as gallium source, and trimethylindium (TMIn) is used as indium source, trimethylaluminum (TMAl) as aluminum source, silane (SiH 4 ) as N-type dopant, and dimagnesium (CP 2 Mg) as P-type dopant for epitaxial growth.

S02、在所述衬底1上沉积第一半导体层;S02, depositing a first semiconductor layer on the substrate 1;

其中,在所述衬底1上依次沉积缓冲层2、非掺杂GaN层3、N型GaN层4,以形成所述第一半导体层。Wherein, a buffer layer 2 , a non-doped GaN layer 3 and an N-type GaN layer 4 are sequentially deposited on the substrate 1 to form the first semiconductor layer.

首先,在所述衬底1上沉积缓冲层2;First, depositing a buffer layer 2 on the substrate 1;

具体的,缓冲层2具体为AlN/GaN缓冲层,选用在应用材料PVD中沉积缓冲层,其厚度为15 nm,采用AlN/GaN缓冲层提供了与衬底1取向相同的成核中心,释放了GaN和衬底1之间的晶格失配产生的应力以及热膨胀系数失配所产生的热应力,进一步的生长提供了平整的成核表面,减少其成核生长的接触角使岛状生长的GaN晶粒在较小的厚度内能连成面,转变为二维外延生长。Specifically, the buffer layer 2 is an AlN/GaN buffer layer. The buffer layer is deposited in PVD of applied materials, and its thickness is 15 nm. The AlN/GaN buffer layer provides nucleation centers with the same orientation as the substrate 1, releasing The stress caused by the lattice mismatch between GaN and the substrate 1 and the thermal stress caused by the mismatch of thermal expansion coefficients are eliminated, and further growth provides a flat nucleation surface, reducing the contact angle for nucleation and growth to allow island growth GaN crystal grains can be connected into planes in a small thickness and transformed into two-dimensional epitaxial growth.

之后,需要对已沉积缓冲层2的衬底1进行预处理;Afterwards, the substrate 1 on which the buffer layer 2 has been deposited needs to be pretreated;

具体地,将已镀完缓冲层2的衬底1转入MOCVD中,在H2气氛进行预处理1min~10min,处理温度为1000℃~1200℃,再对衬底1进行氮化处理,提升缓冲层2的晶体质量,并且可以有效提高后续沉积GaN外延层的晶体质量。Specifically, transfer the substrate 1 that has been plated with the buffer layer 2 into MOCVD, perform pretreatment in H2 atmosphere for 1min~10min, and treat the substrate 1 at a temperature of 1000°C~1200°C, and then perform nitriding treatment on the substrate 1 to improve the The crystal quality of the buffer layer 2 can be effectively improved, and the crystal quality of the subsequently deposited GaN epitaxial layer can be effectively improved.

接着,在缓冲层2上沉积非掺杂GaN层3;Next, depositing a non-doped GaN layer 3 on the buffer layer 2;

其中,非掺杂GaN层3生长温度为1050℃~1200℃,压力100torr~600 torr,厚度为1um~5um;Wherein, the growth temperature of the non-doped GaN layer 3 is 1050°C~1200°C, the pressure is 100torr~600torr, and the thickness is 1um~5um;

具体的,非掺杂GaN层3生长温度1100℃,生长压力150 torr,生长厚度2um~3um,非掺杂GaN层3生长温度较高,压力较低,制备的到GaN的晶体质量较优,同时厚度随着GaN厚度的增加,压应力会通过堆垛层错释放,线缺陷减少,晶体质量提高,反向漏电降低,但提高GaN层厚度对Ga源材料消耗较大,大大提高了LED的外延成本,因此目前LED外延片通常非掺杂GaN层3生长2um~3um,不仅节约生产成本,而且GaN材料又具有较高的晶体质量。Specifically, the growth temperature of the non-doped GaN layer 3 is 1100° C., the growth pressure is 150 torr, and the growth thickness is 2 um to 3 um. The growth temperature of the non-doped GaN layer 3 is relatively high, and the pressure is low, and the quality of the prepared GaN crystal is better. At the same time, as the thickness of GaN increases, the compressive stress will be released through stacking faults, the line defects will be reduced, the crystal quality will be improved, and the reverse leakage will be reduced. However, increasing the GaN layer thickness consumes a lot of Ga source materials, which greatly improves the performance of LEDs. Epitaxial cost, so the current LED epitaxial wafer usually grows 2um~3um non-doped GaN layer 3, which not only saves production cost, but also has high crystal quality of GaN material.

最后,在非掺杂GaN层3上沉积N型GaN层4;Finally, an N-type GaN layer 4 is deposited on the non-doped GaN layer 3;

其中,N型GaN层4生长温度为1050℃~1200℃,压力100torr~600torr,厚度为2um~3um,Si掺杂浓度为1E19atoms/cm3~5E19 atoms/cm3Among them, the growth temperature of the N-type GaN layer 4 is 1050°C~1200°C, the pressure is 100torr~600torr, the thickness is 2um~3um, and the Si doping concentration is 1E19 atoms/cm 3 ~5E19 atoms/cm 3 ;

具体的,N型GaN层4生长温度为1120℃,生长压力100torr,生长厚度为2um~3um,Si掺杂浓度为2.5E19atoms/cm3,首先N型GaN层4为LED发光提供充足电子,其次N型GaN层4的电阻率要比P-GaN上的透明电极的电阻率高,因此足够的Si掺杂,可以有效的降低N型GaN层4的电阻率,最后N型GaN层4足够的厚度可以有效释放应力LED的发光效率。Specifically, the growth temperature of the N-type GaN layer 4 is 1120°C, the growth pressure is 100torr, the growth thickness is 2um~3um, and the Si doping concentration is 2.5E19atoms/cm 3 . First, the N-type GaN layer 4 provides enough electrons for the LED to emit light. The resistivity of the N-type GaN layer 4 is higher than the resistivity of the transparent electrode on the P-GaN, so sufficient Si doping can effectively reduce the resistivity of the N-type GaN layer 4, and finally the N-type GaN layer 4 is sufficient The thickness can effectively release the luminous efficiency of the stress LED.

S03、在所述第一半导体层上交替沉积M个周期的复合量子阱层51和量子垒层52,以形成有源层5;S03, alternately depositing M periods of composite quantum well layers 51 and quantum barrier layers 52 on the first semiconductor layer to form the active layer 5;

其中,所述复合量子阱层51沿着外延方向依次包括层叠的若干第一碳杂质调控层511、量子阱层512以及若干第二碳杂质调控层513,若干所述第一碳杂质调控层511的碳杂质含量沿外延方向递减,且若干所述第二碳杂质调控层513的碳杂质含量沿外延方向递增,所述第一碳杂质调控层511与所述第二碳杂质调控层513的碳杂质浓度均高于所述量子阱层512的碳杂质浓度;Wherein, the composite quantum well layer 51 includes stacked first carbon impurity control layers 511, quantum well layers 512, and second carbon impurity control layers 513 sequentially along the epitaxial direction, and several first carbon impurity control layers 511 The carbon impurity content of the second carbon impurity control layer 513 decreases along the epitaxial direction, and the carbon impurity content of the second carbon impurity control layer 513 increases along the epitaxial direction. The impurity concentrations are all higher than the carbon impurity concentrations of the quantum well layer 512;

具体的,所述第一碳杂质调控层511与所述第二碳杂质调控层513均为GaN层、AlGaN层、InGaN层、BGaN层中的一种,所述量子阱层512的碳杂质浓度小于1E17atoms/cm3,所述复合量子阱层51的厚度范围为1nm~10nm,所述第一碳杂质调控层511、所述量子阱层512与所述第二碳杂质调控层513之间的厚度比范围为1:1:1~1:10:1,所述复合量子阱层51和所述量子垒层52交替排布的周期M取值范围为:1≤M≤20。Specifically, the first carbon impurity control layer 511 and the second carbon impurity control layer 513 are both GaN layers, AlGaN layers, InGaN layers, and BGaN layers, and the carbon impurity concentration of the quantum well layer 512 is less than 1E17 atoms/cm 3 , the thickness of the composite quantum well layer 51 is in the range of 1 nm to 10 nm, and the thickness between the first carbon impurity control layer 511 , the quantum well layer 512 and the second carbon impurity control layer 513 The thickness ratio ranges from 1:1:1 to 1:10:1, and the period M in which the composite quantum well layers 51 and the quantum barrier layers 52 are alternately arranged ranges from: 1≤M≤20.

同时,复合量子阱层51的生长温度为700℃~1000℃,生长气氛N2/NH3比例为10:1~1:10,生长压力为50torr~300torr,所述量子垒层52具体为AlGaN层,其生长温度范围为800℃~1000℃,厚度范围为1nm~50nm,生长压力范围为50torr~300torr,Al组分范围为0.05~0.5。At the same time, the growth temperature of the composite quantum well layer 51 is 700°C~1000°C, the ratio of N 2 /NH 3 in the growth atmosphere is 10:1~1:10, and the growth pressure is 50torr~300torr. The quantum barrier layer 52 is specifically AlGaN layer, the growth temperature ranges from 800°C to 1000°C, the thickness ranges from 1nm to 50nm, the growth pressure ranges from 50torr to 300torr, and the Al composition ranges from 0.05 to 0.5.

S04、在最后一个周期的所述量子垒层52上沉积第二半导体层;S04, depositing a second semiconductor layer on the quantum barrier layer 52 in the last period;

其中,在最后一个周期的所述量子垒层52上依次沉积电子阻挡层6和P型GaN层7,以形成所述第二半导体层。Wherein, the electron blocking layer 6 and the P-type GaN layer 7 are sequentially deposited on the quantum barrier layer 52 in the last period to form the second semiconductor layer.

首先,在最后一个周期的所述量子垒层52上沉积电子阻挡层6;First, an electron blocking layer 6 is deposited on the quantum barrier layer 52 of the last period;

其中,电子阻挡层6为AlInGaN层,其厚度10nm~40nm,生长温度900℃~1000℃,压力100torr~300torr,其中Al组分0.005<x<0.1,In组分浓度为0.01<y<0.2;Wherein, the electron blocking layer 6 is an AlInGaN layer with a thickness of 10nm~40nm, a growth temperature of 900°C~1000°C, and a pressure of 100torr~300torr, wherein the Al composition is 0.005<x<0.1, and the In composition concentration is 0.01<y<0.2;

具体的,电子阻挡层6厚度15 nm,其中Al组分浓度延外延层生长方向由0.01渐变至0.05,In组分浓度为0.01,生长温度965℃,生长压力200torr,电子阻挡层6既可以有效地限制电子溢流,也可以减少对空穴的阻挡,提升空穴向量子阱的注入效率,减少载流子俄歇复合,提高LED的发光效率。Specifically, the electron blocking layer 6 has a thickness of 15 nm, wherein the concentration of the Al composition gradually changes from 0.01 to 0.05 in the growth direction of the epitaxial layer, the concentration of the In composition is 0.01, the growth temperature is 965°C, and the growth pressure is 200 torr, the electron blocking layer 6 can be effectively Limiting the overflow of electrons can also reduce the blocking of holes, improve the injection efficiency of holes into the quantum well, reduce the Auger recombination of carriers, and improve the luminous efficiency of LEDs.

最后,在所述电子阻挡层6上沉积P型GaN层7;Finally, depositing a P-type GaN layer 7 on the electron blocking layer 6;

其中,P型GaN层7生长温度900℃~1050℃,厚度10nm~50nm,生长压力100torr~600torr,Mg掺杂浓度1E19atoms/cm3~1E21atoms/cm3Among them, the growth temperature of the P-type GaN layer 7 is 900°C~1050°C, the thickness is 10nm~50nm, the growth pressure is 100torr~600torr, and the Mg doping concentration is 1E19atoms/cm 3 ~1E21atoms/cm 3 ;

具体的,P型GaN层7生长温度985℃,厚度15nm,生长压力200torr,Mg掺杂浓度2E20atoms/cm3,Mg掺杂浓度过高会破坏晶体质量,而掺杂浓度较低则会影响空穴浓度。同时,对于含V 形坑的LED结构来说,P型GaN层7较高的生长温度也有利于合并V形坑,得到表面光滑的LED外延片。Specifically, the growth temperature of the P-type GaN layer 7 is 985°C, the thickness is 15 nm, the growth pressure is 200 torr, and the Mg doping concentration is 2E20 atoms/cm 3 . If the Mg doping concentration is too high, the crystal quality will be damaged, and if the doping concentration is low, the space Hole concentration. At the same time, for the LED structure with V-shaped pits, the higher growth temperature of the P-type GaN layer 7 is also conducive to merging the V-shaped pits to obtain an LED epitaxial wafer with a smooth surface.

综上,本发明的量子阱中的C杂质原子的半径接近Ga原子或者N原子,以便产生替位原子,同时,还可避免杂质原子成为间隙原子时,使InGaN晶格发生畸变,影响InGaN材料的晶体质量下降,而沉积的复合量子阱层51包含第一碳杂质调控层511与第二碳杂质调控层513,其在低压的条件下生长,高V/III比可以有效降低量子阱层的C杂质含量,提高量子阱层512的晶体质量,其次,第一碳杂质调控层511与第二碳杂质调控层513还可以减少因以C替代Ga位形成产生施主能级,C替代N位形成、产生受主能级,导致的载流子浓度下降,非辐射复合效率增加,最后通过第一碳杂质调控层511与第二碳杂质调控层513调制C杂质浓度,降低量子阱的极化效应,提高电子与空穴发生的空穴波函数重叠,提高LED的发光效率。In summary, the radius of the C impurity atoms in the quantum well of the present invention is close to that of Ga atoms or N atoms, so as to generate substitution atoms, and at the same time, it can also prevent the InGaN lattice from being distorted when the impurity atoms become interstitial atoms, which affects the InGaN material. The crystal quality of the deposited composite quantum well layer 51 includes the first carbon impurity control layer 511 and the second carbon impurity control layer 513, which are grown under low pressure conditions, and the high V/III ratio can effectively reduce the quantum well layer. The C impurity content improves the crystal quality of the quantum well layer 512. Secondly, the first carbon impurity control layer 511 and the second carbon impurity control layer 513 can also reduce the donor level due to the formation of C instead of Ga sites, and the formation of C instead of N sites. 1. Generating an acceptor energy level, resulting in a decrease in carrier concentration and an increase in non-radiative recombination efficiency. Finally, the C impurity concentration is modulated by the first carbon impurity control layer 511 and the second carbon impurity control layer 513 to reduce the polarization effect of the quantum well , improve the wave function overlap of electrons and holes, and improve the luminous efficiency of LED.

以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention should be included in the protection of the present invention. within range.

Claims (7)

1. The LED epitaxial wafer for regulating and controlling the quantum well carbon impurities is characterized by comprising a substrate, and a first semiconductor layer, an active layer and a second semiconductor layer which are sequentially deposited on the substrate;
the active layer comprises M composite quantum well layers and quantum barrier layers which are periodically and alternately arranged, the composite quantum well layers sequentially comprise a plurality of first carbon impurity regulating layers, quantum well layers and a plurality of second carbon impurity regulating layers which are stacked along the epitaxial direction, the carbon impurity content of the first carbon impurity regulating layers decreases along the epitaxial direction, the carbon impurity content of the second carbon impurity regulating layers increases along the epitaxial direction, and the carbon impurity concentrations of the first carbon impurity regulating layers and the second carbon impurity regulating layers are higher than the carbon impurity concentration of the quantum well layers;
the carbon impurity concentration of the quantum well layer is less than 1E17atoms/cm 3 The thickness range of the composite quantum well layer is 1 nm-10 nm, and the thickness ratio of the first carbon impurity regulating layer to the second carbon impurity regulating layer is 1:1:1-1:10:1.
2. The LED epitaxial wafer of claim 1, wherein the thickness ratio between the first carbon impurity control layer, the quantum well layer and the second carbon impurity control layer is in the range of 1:1:1 to 1:10:1.
3. The LED epitaxial wafer of claim 1, wherein the period M of the alternating arrangement of the composite quantum well layers and the quantum barrier layers has a range of values: m is more than or equal to 1 and less than or equal to 20.
4. The preparation method of the LED epitaxial wafer for regulating and controlling the quantum well carbon impurities is characterized by comprising the following steps of:
providing a substrate;
depositing a first semiconductor layer on the substrate;
alternately depositing M periods of composite quantum well layers and quantum barrier layers on the first semiconductor layer to form an active layer;
depositing a second semiconductor layer on the quantum barrier layer of the last cycle;
the composite quantum well layer sequentially comprises a plurality of first carbon impurity regulating layers, a quantum well layer and a plurality of second carbon impurity regulating layers which are stacked along the epitaxial direction, wherein the carbon impurity content of the first carbon impurity regulating layers is gradually decreased along the epitaxial direction, the carbon impurity content of the second carbon impurity regulating layers is gradually increased along the epitaxial direction, and the carbon impurity concentrations of the first carbon impurity regulating layers and the second carbon impurity regulating layers are higher than those of the quantum well layer.
5. According to claimThe method for preparing the LED epitaxial wafer for regulating and controlling the carbon impurities of the quantum well according to claim 4, which is characterized in that the growth temperature range of the composite quantum well layer is 700-1000 ℃ and the growth atmosphere is N 2 /NH 3 The ratio range is 10:1-1:10, and the growth pressure range is 50-300 torr.
6. The method for preparing the LED epitaxial wafer for regulating and controlling carbon impurities of the quantum well according to claim 4, wherein the quantum barrier layer is specifically an AlGaN layer, the growth temperature range is 800-1000 ℃, the thickness range is 1-50 nm, the growth pressure range is 50-300 torr, and the Al component range is 0.05-0.5.
7. An LED, characterized by comprising an LED epitaxial wafer according to any one of claims 1 to 3 for controlling quantum well carbon impurities.
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