CN116312421A - Pixel circuit, driving method thereof and display panel - Google Patents
Pixel circuit, driving method thereof and display panel Download PDFInfo
- Publication number
- CN116312421A CN116312421A CN202310245885.0A CN202310245885A CN116312421A CN 116312421 A CN116312421 A CN 116312421A CN 202310245885 A CN202310245885 A CN 202310245885A CN 116312421 A CN116312421 A CN 116312421A
- Authority
- CN
- China
- Prior art keywords
- module
- writing
- transistor
- terminal
- pixel circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 23
- 239000003990 capacitor Substances 0.000 claims abstract description 84
- 238000004891 communication Methods 0.000 claims description 4
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 8
- 238000010586 diagram Methods 0.000 description 12
- 230000005540 biological transmission Effects 0.000 description 7
- 239000010409 thin film Substances 0.000 description 5
- 230000001960 triggered effect Effects 0.000 description 5
- 239000002131 composite material Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 238000004088 simulation Methods 0.000 description 3
- 208000032005 Spinocerebellar ataxia with axonal neuropathy type 2 Diseases 0.000 description 2
- 208000033361 autosomal recessive with axonal neuropathy 2 spinocerebellar ataxia Diseases 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
- G09G5/393—Arrangements for updating the contents of the bit-mapped memory
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2074—Display of intermediate tones using sub-pixels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
本申请公开了一种像素电路及其驱动方法、显示面板,该像素电路包括:驱动模块,其第一端连接第一电压源;存储电容模块,其第一端和第二端分别连接第一电压源和驱动模块的控制端;数据写入模块,其第二端和第三端分别连接驱动模块的第一端和第二扫描线;预写入模块,其第一端、第二端、第三端及第四端分别连接数据线、数据写入模块的第一端、第一扫描线及存储电容模块的第一端,以用于将数据线上的数据电压提供至数据写入模块的第一端和存储电容模块的第一端;发光模块,发光模块的第一端连接驱动模块的第二端,发光模块第二端连接第二电压源。通过上述方式,本申请的像素电路既保证了高刷新显示功能,又保证了很好的补偿效果。
The present application discloses a pixel circuit, a driving method thereof, and a display panel. The pixel circuit includes: a driving module, the first end of which is connected to a first voltage source; a storage capacitor module, whose first end and second end are respectively connected to the first The voltage source and the control terminal of the driving module; the data writing module, its second terminal and the third terminal are respectively connected to the first terminal and the second scanning line of the driving module; the pre-writing module, its first terminal, the second terminal, The third end and the fourth end are respectively connected to the data line, the first end of the data writing module, the first scanning line and the first end of the storage capacitor module, so as to provide the data voltage on the data line to the data writing module The first end of the light emitting module and the first end of the storage capacitor module; the light emitting module, the first end of the light emitting module is connected to the second end of the driving module, and the second end of the light emitting module is connected to the second voltage source. Through the above method, the pixel circuit of the present application not only ensures a high-refresh display function, but also ensures a good compensation effect.
Description
技术领域technical field
本申请涉及显示面板技术领域,特别是涉及一种像素电路及其驱动方法、显示面板。The present application relates to the technical field of display panels, in particular to a pixel circuit, a driving method thereof, and a display panel.
背景技术Background technique
现今,随着显示技术的不断发展,人们对提升屏体刷新率的需求也日益增加,但传统的显示面板中的像素电路通常采用的是7T1C(7个晶体管1个电容)电路,而由于该7T1C电路中的充电电容Cst容值通常是固定的,其充电时间存在限制,因此,在该7T1C电路进行Vdata(数据电压信号)写入补偿时,由于高刷新显示下行时间缩短,存在高频显示补偿不足的问题。Nowadays, with the continuous development of display technology, people's demand for improving the refresh rate of the screen is also increasing, but the pixel circuit in the traditional display panel usually uses a 7T1C (7 transistors and 1 capacitor) circuit, and because of this The charging capacitor Cst in the 7T1C circuit is usually fixed, and its charging time is limited. Therefore, when the 7T1C circuit performs Vdata (data voltage signal) writing compensation, the high-refresh display downlink time is shortened, and there is a high-frequency display The problem of undercompensation.
发明内容Contents of the invention
本申请主要解决的技术问题是提供一种像素电路及其驱动方法、显示面板,能够解决现有技术中的像素电路在高频显示时,存在补偿不足的问题。The main technical problem to be solved by the present application is to provide a pixel circuit and its driving method, and a display panel, which can solve the problem of insufficient compensation in the high-frequency display of the pixel circuit in the prior art.
为解决上述技术问题,本申请采用的一个技术方案是:提供一种像素电路,其中,该像素电路包括:驱动模块,驱动模块的第一端连接第一电压源;存储电容模块,存储电容模块的第一端连接第一电压源,存储电容模块的第二端连接驱动模块的控制端;数据写入模块,数据写入模块的第二端连接驱动模块的第一端,数据写入模块的第三端连接第二扫描线;预写入模块,预写入模块的第一端连接数据线,预写入模块的第二端连接数据写入模块的第一端,预写入模块的第三端连接第一扫描线,预写入模块的第四端连接存储电容模块的第一端,以用于将数据线上的数据电压提供至数据写入模块的第一端和存储电容模块的第一端;发光模块,发光模块的第一端连接驱动模块的第二端,发光模块第二端连接第二电压源。In order to solve the above technical problems, a technical solution adopted by the present application is to provide a pixel circuit, wherein the pixel circuit includes: a driving module, the first end of which is connected to the first voltage source; a storage capacitor module, the storage capacitor module The first end of the storage capacitor module is connected to the first voltage source, the second end of the storage capacitor module is connected to the control end of the drive module; the data write module, the second end of the data write module is connected to the first end of the drive module, and the data write module The third end is connected to the second scanning line; the pre-writing module, the first end of the pre-writing module is connected to the data line, the second end of the pre-writing module is connected to the first end of the data writing module, and the second end of the pre-writing module is connected to the first end of the data writing module. The three terminals are connected to the first scanning line, and the fourth terminal of the pre-writing module is connected to the first terminal of the storage capacitor module, so as to provide the data voltage on the data line to the first terminal of the data writing module and the first terminal of the storage capacitor module. The first end; the light emitting module, the first end of the light emitting module is connected to the second end of the driving module, and the second end of the light emitting module is connected to the second voltage source.
其中,预写入模块包括预写入晶体管和预写入电容,预写入晶体管的第一端连接数据线,预写入晶体管的第二端连接预写入电容的第一端和数据写入模块的第一端,预写入晶体管的第三端连接第一扫描线,预写入电容的第二端连接存储电容模块的第一端。Wherein, the pre-writing module includes a pre-writing transistor and a pre-writing capacitor, the first end of the pre-writing transistor is connected to the data line, and the second end of the pre-writing transistor is connected to the first end of the pre-writing capacitor and the data writing The first end of the module, the third end of the pre-writing transistor are connected to the first scan line, and the second end of the pre-writing capacitor is connected to the first end of the storage capacitor module.
其中,像素电路还包括补偿模块,补偿模块的第一端连接驱动模块的控制端,补偿模块的第二端连接驱动模块的第二端,补偿模块的第三端连接第二扫描线,用于控制驱动模块的控制端与驱动模块的第二端之间连通。Wherein, the pixel circuit further includes a compensation module, the first terminal of the compensation module is connected to the control terminal of the driving module, the second terminal of the compensation module is connected to the second terminal of the driving module, and the third terminal of the compensation module is connected to the second scanning line for The control terminal of the control drive module communicates with the second terminal of the drive module.
其中,补偿模块为双栅晶体管,包括第一补偿晶体管和第二补偿晶体管,第一补偿晶体管的第一端连接驱动模块的控制端,第一补偿晶体管的第二端连接第二补偿晶体管的第一端,第一补偿晶体管的第三端连接第二补偿晶体管的第三端和第二扫描线,第二补偿晶体管的第二端连接驱动模块的第二端。Wherein, the compensation module is a double-gate transistor, including a first compensation transistor and a second compensation transistor, the first terminal of the first compensation transistor is connected to the control terminal of the driving module, and the second terminal of the first compensation transistor is connected to the second terminal of the second compensation transistor. One terminal, the third terminal of the first compensation transistor is connected to the third terminal of the second compensation transistor and the second scan line, and the second terminal of the second compensation transistor is connected to the second terminal of the driving module.
其中,像素电路还包括第一初始化模块和第二初始化模块,第一初始化模块的第一端连接驱动模块的控制端,第一初始化模块的第二端连接第二初始化模块的第一端和基准电压线,第一初始化模块的第三端连接第一扫描线,第二初始化模块的第二端连接发光模块的第一端,第二初始化模块的第三端连接第一扫描线,以用于控制将初始电压写入存储电容模块的第二端和发光模块的第一端。Wherein, the pixel circuit also includes a first initialization module and a second initialization module, the first terminal of the first initialization module is connected to the control terminal of the driving module, and the second terminal of the first initialization module is connected to the first terminal of the second initialization module and the reference Voltage line, the third end of the first initialization module is connected to the first scan line, the second end of the second initialization module is connected to the first end of the light emitting module, and the third end of the second initialization module is connected to the first scan line, for The initial voltage is controlled to be written into the second terminal of the storage capacitor module and the first terminal of the light emitting module.
其中,第一初始化模块为双栅晶体管,包括第一初始化晶体管和第二初始化晶体管,第一初始化晶体管的第一端连接驱动模块的控制端,第一初始化晶体管的第二端连接第二初始化晶体管的第一端,第一初始化晶体管的第三端连接第二初始化晶体管的第三端和第一扫描线,第二初始化晶体管的第二端连接第二初始化模块的第一端和基准电压线。Wherein, the first initialization module is a double-gate transistor, including a first initialization transistor and a second initialization transistor, the first terminal of the first initialization transistor is connected to the control terminal of the driving module, and the second terminal of the first initialization transistor is connected to the second initialization transistor The first terminal of the first initialization transistor is connected to the third terminal of the second initialization transistor and the first scan line, and the second terminal of the second initialization transistor is connected to the first terminal of the second initialization module and the reference voltage line.
其中,像素电路还包括第一发光控制模块和第二发光控制模块,第一发光控制模块的第一端连接第一电压源,第一发光控制模块的第二端连接驱动模块的第一端,第一发光控制模块的第三端连接发射信号线,以用于控制第一电压源与驱动模块的第一端之间的连通;第二发光控制模块的第一端连接驱动模块的第二端,第二发光控制模块的第二端连接发光模块的第一端,第二发光控制模块的第三端连接发射信号线,以用于控制驱动模块的第二端与发光模块的第一端之间的连通。Wherein, the pixel circuit further includes a first light emission control module and a second light emission control module, the first end of the first light emission control module is connected to the first voltage source, the second end of the first light emission control module is connected to the first end of the driving module, The third terminal of the first lighting control module is connected to the emission signal line for controlling the connection between the first voltage source and the first terminal of the driving module; the first terminal of the second lighting control module is connected to the second terminal of the driving module , the second terminal of the second lighting control module is connected to the first terminal of the lighting module, and the third terminal of the second lighting control module is connected to the emission signal line, so as to control the connection between the second terminal of the driving module and the first terminal of the lighting module connection between.
为解决上述技术问题,本申请采用的又一个技术方案是:提供一种像素电路的驱动方法,应用如上所述的像素电路中,其中,该驱动方法包括:在数据写入阶段,控制预写入晶体管导通,以将数据电压传输至数据写入模块的第一端和预写入电容的第一端,预写入电容向存储电容模块的第一端耦合写入数据电压;在阈值补偿阶段,控制数据写入模块和补偿模块导通,对驱动模块的控制端充电,以补偿驱动模块的阈值电压;在显示周期内的发光阶段,控制第一发光控制模块和第二发光控制模块导通,以使驱动模块根据其控制端和第二端的电压驱动发光模块发光。In order to solve the above technical problems, another technical solution adopted by the present application is to provide a driving method of a pixel circuit, which is applied to the above-mentioned pixel circuit, wherein the driving method includes: in the data writing phase, controlling the pre-writing The input transistor is turned on to transmit the data voltage to the first end of the data writing module and the first end of the pre-writing capacitor, and the pre-writing capacitor is coupled to the first end of the storage capacitor module to write the data voltage; stage, control the data writing module and the compensation module to be turned on, and charge the control terminal of the driving module to compensate the threshold voltage of the driving module; connected, so that the driving module drives the light emitting module to emit light according to the voltages of the control terminal and the second terminal.
其中,在数据写入阶段还包括:控制第一初始化模块和第二初始化模块导通,以将初始电压写入存储电容模块的第二端和发光模块的第一端。Wherein, the data writing phase also includes: controlling the first initialization module and the second initialization module to be turned on, so as to write the initial voltage into the second terminal of the storage capacitor module and the first terminal of the light emitting module.
为解决上述技术问题,本申请采用的又一个技术方案是:提供一种显示面板,其中,该显示面板包括相连接的驱动电路和像素电路;其中,该像素电路为如上任一项所述的像素电路。In order to solve the above technical problems, another technical solution adopted by the present application is to provide a display panel, wherein the display panel includes a connected drive circuit and a pixel circuit; wherein the pixel circuit is as described in any one of the above pixel circuit.
本申请的有益效果是:区别于现有技术,本申请提供的像素电路中的驱动模块的第一端连接第一电压源,存储电容模块的第一端和第二端分别连接第一电压源和驱动模块的控制端,数据写入模块的第二端和第三端分别连接驱动模块的第一端和第二扫描线,而预写入模块的第一端、第二端、第三端及第四端分别连接数据线、数据写入模块的第一端、第一扫描线及存储电容模块的第一端,发光模块的第一端和第二端分别连接驱动模块的第二端和第二电压源,其中,该预写入模块用于将数据线上的数据电压提供至数据写入模块的第一端和存储电容模块的第一端,以将该数据电压的写入和驱动模块阈值电压的补偿阶段分开,从而能够有效提升补偿效果的同时,显著缩短行写入时间,以保证高刷新显示功能。The beneficial effects of the present application are: different from the prior art, the first terminal of the driving module in the pixel circuit provided by the present application is connected to the first voltage source, and the first terminal and the second terminal of the storage capacitor module are respectively connected to the first voltage source and the control terminal of the driving module, the second terminal and the third terminal of the data writing module are respectively connected to the first terminal and the second scanning line of the driving module, and the first terminal, the second terminal and the third terminal of the pre-writing module and the fourth terminal are respectively connected to the data line, the first terminal of the data writing module, the first scanning line and the first terminal of the storage capacitor module, and the first terminal and the second terminal of the light emitting module are respectively connected to the second terminal and the second terminal of the driving module. The second voltage source, wherein the pre-writing module is used to provide the data voltage on the data line to the first end of the data writing module and the first end of the storage capacitor module, so as to write and drive the data voltage The compensation stage of the threshold voltage of the module is separated, so that the compensation effect can be effectively improved, and the row writing time can be significantly shortened to ensure the high-refresh display function.
附图说明Description of drawings
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图,其中:In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative work, in which:
图1是本申请像素电路第一实施方式的结构示意图;FIG. 1 is a schematic structural diagram of the first embodiment of the pixel circuit of the present application;
图2是本申请像素电路第二实施方式的结构示意图;2 is a schematic structural diagram of the second embodiment of the pixel circuit of the present application;
图3是图2中像素电路的一具体实施例的结构示意图;FIG. 3 is a schematic structural diagram of a specific embodiment of the pixel circuit in FIG. 2;
图4是图3中的像素电路的驱动方法所对应的控制信号的时序示意图;FIG. 4 is a schematic timing diagram of control signals corresponding to the driving method of the pixel circuit in FIG. 3;
图5是图3中的像素电路灰阶展开仿真结果的示意图;Fig. 5 is a schematic diagram of the simulation results of the pixel circuit grayscale expansion in Fig. 3;
图6是本申请像素电路的驱动方法一实施方式的流程示意图;FIG. 6 is a schematic flowchart of an embodiment of a method for driving a pixel circuit of the present application;
图7是本申请显示面板一实施方式的结构示意图。FIG. 7 is a schematic structural diagram of an embodiment of a display panel of the present application.
具体实施方式Detailed ways
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅是本申请的一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.
本申请中的术语“第一”、“第二”、“第三”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”、“第三”的特征可以明示或者隐含地包括至少一个该特征。本申请的描述中,“多个”的含义是至少两个,例如两个,三个等,除非另有明确具体的限定。本申请实施例中所有方向性指示(诸如上、下、左、右、前、后……)仅用于解释在某一特定姿态(如附图所示)下各部件之间的相对位置关系、运动情况等,如果该特定姿态发生改变时,则该方向性指示也相应地随之改变。此外,术语“包括”和“具有”以及它们任何变形,意图在于覆盖不排他的包含。例如包含了一系列步骤或单元的过程、方法、系统、产品或设备没有限定于已列出的步骤或单元,而是可选地还包括没有列出的步骤或单元,或可选地还包括对于这些过程、方法、产品或设备固有的其它步骤或单元。The terms "first", "second", and "third" in this application are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features. Thus, features defined as "first", "second", and "third" may explicitly or implicitly include at least one of these features. In the description of the present application, "plurality" means at least two, such as two, three, etc., unless otherwise specifically defined. All directional indications (such as up, down, left, right, front, back...) in the embodiments of the present application are only used to explain the relative positional relationship between the various components in a certain posture (as shown in the drawings) , sports conditions, etc., if the specific posture changes, the directional indication also changes accordingly. Furthermore, the terms "include" and "have", as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but optionally also includes unlisted steps or units, or optionally further includes For other steps or units inherent in these processes, methods, products or apparatuses.
在本文中提及“实施例”意味着,结合实施例描述的特定特征、结构或特性可以包含在本申请的至少一个实施例中。在说明书中的各个位置出现该短语并不一定均是指相同的实施例,也不是与其它实施例互斥的独立的或备选的实施例。本领域技术人员显式地和隐式地理解的是,本文所描述的实施例可以与其它实施例相结合。Reference herein to an "embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The occurrences of this phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is understood explicitly and implicitly by those skilled in the art that the embodiments described herein can be combined with other embodiments.
下面结合附图和实施例对本申请进行详细的说明。The application will be described in detail below in conjunction with the accompanying drawings and embodiments.
请参阅图1,图1是本申请像素电路第一实施方式的结构示意图。在本实施方式中,该像素电路10包括:驱动模块11、存储电容模块12、数据写入模块13、预写入模块14以及发光模块15。Please refer to FIG. 1 . FIG. 1 is a schematic structural diagram of a first embodiment of a pixel circuit of the present application. In this embodiment, the
需说明的是,在显示技术领域,显示面板通常是通过其系统电源向像素电路10对应输出的一个恒流源给像素电路10中的发光模块15持续提供电流。其中,该电流的大小具体是受像素电路10中的驱动模块11的控制端电压调节控制,而该驱动模块11的控制端电压又由该显示面板的驱动电路向像素电路10对应提供的数据信号写入,以存储在像素电路10中的存储电容模块12中,从而保证该发光模块15能够在一个该驱动电路的扫描周期中持续发光,以实现相应的图像显示。It should be noted that, in the field of display technology, a display panel usually provides a constant current source correspondingly output from its system power supply to the
具体地,该驱动模块11的第一端对应连接于该系统电源提供的第一电压源101,且该第一电压源101具体为一恒流源。Specifically, the first end of the
而该存储电容模块12的第一端也对应连接于第一电压源,且存储电容模块12的第二端与驱动模块11的控制端相连接。The first terminal of the
进一步地,该数据写入模块13的第二端连接驱动模块11的第一端,而数据写入模块13的第三端连接相应显示面板中的第二扫描线203,以用于接收该第二扫描线203对应提供的第二扫描信号。Further, the second end of the
其中,该预写入模块14的第一端连接该显示面板中的数据线201,以用于接收该数据线201提供的数据电压,而预写入模块14的第二端又对应连接于数据写入模块13的第一端,预写入模块14的第四端连接存储电容模块12的第一端,且该预写入模块14的第三端连接第一扫描线202,以用于接收该第一扫描线202对应提供的第一扫描信号,并在该第一扫描信号的作用下触发导通时,将该数据线201上的数据电压提供至数据写入模块13的第一端和存储电容模块12的第一端。Wherein, the first end of the
又进一步地,该发光模块15的第一端具体与驱动模块11的第二端相连接,而发光模块15第二端又对应连接于该系统电源提供的第二电压源102,以在该驱动电路的一个扫描周期中,能够基于驱动模块11和第二电压源102对应提供的输出电压持续发光,以实现相应的图像显示。Still further, the first end of the
可理解的是,该第一扫描线202和第二扫描线203分别对应向预写入模块14和数据写入模块13提供的第一扫描信号和第二扫描信号具体可以在不同时段,如第一时段和第二时段分别触发预写入模块14和数据写入模块13导通;且具体可以是在时序靠前的第一时段由第一扫描信号触发预写入模块14导通,以将数据线201上的数据电压提供至数据写入模块13的第一端和存储电容模块12的第一端,进而通过该存储电容模块12将该数据电压耦合写入驱动模块11的控制端,以完成像素电路10中的数据电压的写入。It can be understood that the
且在第二时段将由第二扫描信号触发数据写入模块13导通,以将该数据电压写入驱动模块11的第一端,从而能够借助于时长相对较长的第二时段,完成对驱动模块11的阈值电压的补偿,以有效将该数据电压的写入和驱动模块11阈值电压的补偿阶段分开,从而在有效提升补偿效果的同时,显著缩短行写入时间,以同时保证高刷新显示功能。And in the second period, the second scanning signal will trigger the
请参阅图2,图2是本申请像素电路第二实施方式的结构示意图。本实施方式是在本申请提供的像素电路第一实施方式的基础上,该像素电路20中的预写入模块24具体还进一步包括预写入晶体管241和预写入电容242。Please refer to FIG. 2 . FIG. 2 is a schematic structural diagram of a second embodiment of a pixel circuit of the present application. This embodiment is based on the first embodiment of the pixel circuit provided in this application, and the
具体地,该预写入晶体管241的第一端连接于数据线201,以用于接收该数据线201对应提供的数据电压,而预写入晶体管241的第二端连接预写入电容242的第一端和数据写入模块23的第一端,预写入电容242的第二端连接存储电容模块22的第一端;且该预写入晶体管241的第三端连接第一扫描线202,以用于接收该第一扫描线202对应提供的第一扫描信号,并在该第一扫描信号的作用下触发导通时,将该数据线201上的数据电压提供至数据写入模块23的第一端和预写入电容242的第一端,并通过该预写入电容242将该数据电压耦合写入该存储电容模块22,进而通过该存储电容模块22将该数据电压耦合写入驱动模块21的控制端,以完成像素电路20中的数据电压的写入。Specifically, the first end of the
可理解的是,相较于传统的7T1C电路进行Vdata,也即该数据电压的写入需要经过4个晶体管,充电阻抗较大,以致在短时间内很难充电至预定值,在本实施例中,因该数据电压的写入仅经过一个预写入晶体管241即可,从而能够上述第一时段短时间将预写入电容242充满,此后便可拉长该第二时段,以进行阈值电压的补偿,从而能够有效将数据电压的写入和阈值电压的补偿阶段分开,以有效提升补偿效果的同时,显著缩短行写入时间。It is understandable that, compared to the traditional 7T1C circuit for Vdata, that is, the writing of the data voltage needs to go through 4 transistors, and the charging impedance is relatively large, so that it is difficult to charge to the predetermined value in a short time. In this embodiment Among them, because the writing of the data voltage only needs to pass through one
在一实施例中,该像素电路20具体还包括补偿模块26,该补偿模块26的第一端对应与驱动模块21的控制端相连接,补偿模块26的第二端连接驱动模块21的第二端,补偿模块26的第三端又对应连接于显示面板中的第二扫描线203,以用于接收该第二扫描线203对应提供给补偿模块26第三端的第二扫描信号,并在该第二扫描信号的作用下触发导通时,控制驱动模块21的控制端与驱动模块21第二端之间实现连通,以对驱动模块21的阈值电压进行补偿,避免因该阈值电压不稳定,而导致发光模块25的发光亮度变化,发光出现严重不均一的现象出现。In one embodiment, the
进一步地,在一具体的实施例中,该补偿模块26为双栅晶体管,包括第一补偿晶体管(图未示出)和第二补偿晶体管(图未示出),该第一补偿晶体管的第一端连接驱动模块21的控制端,第一补偿晶体管的第二端连接第二补偿晶体管的第一端,第一补偿晶体管的第三端连接第二补偿晶体管的第三端和第二扫描线203,第二补偿晶体管的第二端连接驱动模块21的第二端,以能够通过该第一补偿晶体管和第二补偿晶体管的复合连接,降低补偿模块26对驱动功率的要求,实现更稳定的补偿效果。Further, in a specific embodiment, the
在一实施例中,该像素电路20具体还包括第一初始化模块271和第二初始化模块272,且该第一初始化模块271的第一端连接驱动模块21的控制端,第一初始化模块271的第二端连接第二初始化模块272的第一端和显示面板中的基准电压线204,以使该第一初始化模块271和该第二初始化模块272能够接收该基准电压线204对应提供初始电压。In one embodiment, the
进一步地,该第一初始化模块271的第三端连接第一扫描线202,第二初始化模块272的第二端连接发光模块25的第一端,且第二初始化模块272的第三端也对应连接第一扫描线202,该第一初始化模块271和该第二初始化模块272用于接收该第一扫描线202对应提供的第一扫描信号,以在该第一扫描信号的作用下触发导通时,用于将基准电压线204对应提供的初始电压写入存储电容模块22的第二端和发光模块25的第一端,以同时对存储电容模块22和发光模块25进行初始化,也即使其复位,以清除上一阶段可能存在的信号残留。Further, the third end of the
又进一步地,在一具体的实施例中,该第一初始化模块271为双栅晶体管,包括第一初始化晶体管(图未示出)和第二初始化晶体管(图未示出),该第一初始化晶体管的第一端连接驱动模块21的控制端,第一初始化晶体管的第二端连接第二初始化晶体管的第一端,第一初始化晶体管的第三端连接第二初始化晶体管的第三端和第一扫描线202,第二初始化晶体管的第二端连接第二初始化模块272的第一端和基准电压线204,以能够通过该第一初始化晶体管和第二初始化晶体管的复合连接,降低第一初始化模块271对驱动功率的要求,实现更稳定的初始化效果。Further, in a specific embodiment, the
在一实施例中,像素电路20具体还包括第一发光控制模块281和第二发光控制模块282,该第一发光控制模块281的第一端连接系统电源对应提供的第一电压源101,第一发光控制模块281的第二端连接驱动模块21的第一端,且该第一发光控制模块281的第三端连接显示面板中的发射信号线205,以用于接收该发射信号线205对应提供的发射信号,并在该发射信号的作用下触发导通,以控制该第一电压源101与驱动模块21的第一端之间实现连通。In one embodiment, the
进一步地,该第二发光控制模块282的第一端连接驱动模块21的第二端,第二发光控制模块282的第二端连接发光模块25的第一端,且该第二发光控制模块282的第三端也对应连接该发射信号线205,以用于接收该发射信号线205对应提供的发射信号,并在该发射信号的作用下触发导通,以控制该驱动模块21的第二端与发光模块25的第一端之间实现连通,进而将存储在存储电容模块22中的该数据电压对应输出给发光模块25,以保证该发光模块25在一个扫描周期中持续发光。Further, the first end of the second
可选地,该驱动模块21、补偿模块26、数据写入模块23、预写入晶体管241、第一初始化模块271、第二初始化模块272、第一发光控制模块281以及第二发光控制模块282具体可以包括三极管、P型薄膜晶体管、N型薄膜晶体管以及场效应晶体管等任意合理的开关器件中的一种,本申请对此不做限定。Optionally, the
值得说明的是,为区分该驱动模块21除控制端之外的两端,将其中一极称为第一端,另一极称为第二端。当该驱动模块21为三极管时,该控制端具体可以为基极,而第一端为集电极,第二端为发射极;或者,该控制端具体还可以为基极,而第一端为发射极,第二端为集电极。It should be noted that, in order to distinguish the two ends of the driving
而当该驱动模块21为薄膜晶体管或场效应晶体管时,该控制端具体可以为栅极,第一端为漏极,第二端为源极;或者,该控制端具体还可以为栅极,而第一端为源极,第二端为漏极。And when the driving
且上述除驱动模块21之外的各模块的第一端、第二端、第三端分别与该驱动模块21的第一端、第二端以及控制端相对应。And the first terminal, the second terminal and the third terminal of each module except the driving
其中,在各模块为薄膜晶体管或场效应晶体管时,具体还可以复合晶体管或单体晶体管,本申请对此不做限定。Wherein, when each module is a thin film transistor or a field effect transistor, it may specifically be a composite transistor or a single transistor, which is not limited in this application.
为方便理解,以上述各模块具体为P型薄膜晶体管为例,则可知,请结合参阅图3和图4,其中,该图3是图2中像素电路的一具体实施例的结构示意图,图4是图3中的像素电路的驱动方法所对应的控制信号的时序示意图。For the convenience of understanding, taking the above-mentioned modules specifically as P-type thin film transistors as an example, it can be seen that please refer to FIG. 3 and FIG. 4 in conjunction, wherein, FIG. 3 is a schematic structural diagram of a specific embodiment of the pixel circuit in FIG. 4 is a timing diagram of control signals corresponding to the driving method of the pixel circuit in FIG. 3 .
可理解的是,在本实施例中,如图3所示,该驱动模块21、数据写入模块23、预写入晶体管241、补偿模块26、第一初始化模块271、第二初始化模块272、第一发光控制模块281以及第二发光控制模块282具体可以分别对应为第一晶体管T1、第二晶体管T2、第八晶体管T8、第三晶体管T3、第四晶体管T4、第七晶体管T7、第五晶体管T5以及第六晶体管T6;且该存储电容模块22对应为第一电容C1,预写入电容242对应为第二电容C2,发光模块25对应为发光器件LED;而第一扫描线202、第二扫描线203、数据线201、基准电压线204以及发射信号线205又分别对应为第一扫描线Scan1、第二扫描线Scan2、数据线Vdata、基准电压线Vref以及发射信号线EM;第一电压源101和第二电压源102则分别对应为第一电压源Vdd和第二电压源Vss;其中,该第三晶体管T3和第四晶体管T4具体可以是复合晶体管,以能够降低器件对驱动功率的要求,而相应的上述各元件的连接方式具体如图3所示,在此不再一一赘述。It can be understood that, in this embodiment, as shown in FIG. The first light
由此可知,如图4所示,在初始化及数据写入阶段,也即在t1阶段,该第一扫描线Scan1对应提供的第一扫描信号存在低电平状态,以能够对应控制第四晶体管T4、第七晶体管T7以及第八晶体管T8触发导通,从而将基准电压线Vref对应提供的初始电压分别写入第一电容C1和发光器件LED中,以同时对第一电容C1和发光器件LED进行初始化,也即使该第一电容C1和发光器件LED复位,以清除上一阶段可能存在的信号残留;且同时将数据线Vdata上的数据电压对应提供给第二电容C2的第一端和第二晶体管T2的第一端,并通过该第二电容C2将该数据电压耦合写入第一电容C1,进而通过该第一电容C1将该数据电压耦合写入第一晶体管T1的控制端,以完成像素电路20中的数据电压的写入。It can be seen from this that, as shown in FIG. 4, in the initialization and data writing stage, that is, in the t1 stage, the first scanning line Scan1 corresponds to the first scanning signal provided with a low level state, so as to be able to control the fourth transistor correspondingly. T4, the seventh transistor T7, and the eighth transistor T8 are turned on, so that the corresponding initial voltage provided by the reference voltage line Vref is respectively written into the first capacitor C1 and the light-emitting device LED, so as to control the first capacitor C1 and the light-emitting device LED at the same time. Initialize, that is, reset the first capacitor C1 and the light-emitting device LED to clear the signal residue that may exist in the previous stage; and at the same time, provide the data voltage on the data line Vdata to the first terminal of the second capacitor C2 and the first terminal of the second capacitor C2 correspondingly. the first terminal of the second transistor T2, and couple the data voltage into the first capacitor C1 through the second capacitor C2, and then couple the data voltage into the control terminal of the first transistor T1 through the first capacitor C1, so as to Writing of the data voltage in the
进一步地,在阈值补偿阶段,也即在t2阶段,该第二扫描线Scan2对应提供的第二扫描信号存在低电平状态,以能够对应控制第二晶体管T2和第三晶体管T3触发导通,以将第二晶体管T2的第一端的数据电压传输至第一晶体管T1的第一端;且同时该第三晶体管T3将对第一晶体管T1的控制端充电,以补偿第一晶体管T1的阈值电压。Further, in the threshold compensation phase, that is, in the phase t2, the second scan line Scan2 is in a low-level state corresponding to the second scan signal provided, so as to be able to correspondingly control the second transistor T2 and the third transistor T3 to be triggered and turned on, To transmit the data voltage of the first terminal of the second transistor T2 to the first terminal of the first transistor T1; and at the same time, the third transistor T3 will charge the control terminal of the first transistor T1 to compensate the threshold value of the first transistor T1 Voltage.
又进一步地,在显示周期内的发光阶段,也即在t3阶段,该发射信号线EM对应提供的发射信号存在低电平状态,以能够对应控制第五晶体管T5和第六晶体管T6触发导通,从而使第一晶体管T1根据其控制端和第二端的电压驱动发光器件LED发光。Still further, in the light-emitting phase of the display period, that is, in the t3 phase, the emission signal line EM is in a low-level state corresponding to the emission signal provided, so as to be able to correspondingly control the fifth transistor T5 and the sixth transistor T6 to trigger conduction , so that the first transistor T1 drives the light emitting device LED to emit light according to the voltages at the control terminal and the second terminal thereof.
可理解的是,相较于传统的7T1C电路进行Vdata,也即该数据电压的写入需要经过4个晶体管,充电阻抗较大,以致在短时间内很难充电至预定值,在本实施例中,通过第二电容C2和第八晶体管T8,因该数据电压的写入仅经过一个第八晶体管T8即可,从而能够该t1阶段短时间将第二电容C2充满,此后便可拉长t2阶段,以进行阈值电压的补偿,从而能够有效将数据电压的写入和阈值电压的补偿阶段分开,以有效提升补偿效果的同时,显著缩短行写入时间。It is understandable that, compared to the traditional 7T1C circuit for Vdata, that is, the writing of the data voltage needs to go through 4 transistors, and the charging impedance is relatively large, so that it is difficult to charge to the predetermined value in a short time. In this embodiment In this process, through the second capacitor C2 and the eighth transistor T8, because the writing of the data voltage only needs to pass through one eighth transistor T8, the second capacitor C2 can be fully charged in a short time during the t1 stage, and then the t2 can be lengthened stage to perform threshold voltage compensation, so that the data voltage writing and threshold voltage compensation stages can be effectively separated, so as to effectively improve the compensation effect and significantly shorten the row writing time.
进一步地,请继续参阅图5,图5是图3中的像素电路20灰阶展开仿真结果的示意图。Further, please continue to refer to FIG. 5 . FIG. 5 is a schematic diagram of the gray scale expansion simulation result of the
由此可知,根据仿真结果,本实施例中的像素电路20可以正常工作,且灰阶展开正常,在0~7V的vdata range(两个亮度水准对应的第一晶体管T1的源漏极电流Ids对应其栅极电压值Vgs的差值)内电流比值>1E6,满足发光器件LED的开关比要求。It can be seen that, according to the simulation results, the
本申请还提供了一种像素电路的驱动方法,请参阅图6,图6是本申请像素电路的驱动方法一实施方式的流程示意图。具体而言,可以包括如下步骤:The present application also provides a driving method of a pixel circuit, please refer to FIG. 6 , which is a schematic flowchart of an embodiment of a driving method of a pixel circuit of the present application. Specifically, the following steps may be included:
S31:在数据写入阶段,控制预写入晶体管导通,以将数据电压传输至数据写入模块的第一端和预写入电容的第一端,预写入电容向存储电容模块的第一端耦合写入数据电压。S31: In the data writing phase, control the pre-writing transistor to turn on, so as to transmit the data voltage to the first terminal of the data writing module and the first terminal of the pre-writing capacitor, and the pre-writing capacitor supplies the first terminal of the storage capacitor module One end is coupled to write data voltage.
可理解的是,本实施例中的驱动方法具体是相应显示面板中的驱动电路对如图2所示的像素电路进行驱动的方法,具体请结合参阅图2和图4及相关文字内容,在此不再赘述。It can be understood that the driving method in this embodiment is specifically a method in which the driving circuit in the corresponding display panel drives the pixel circuit shown in FIG. 2. For details, please refer to FIG. 2 and FIG. This will not be repeated here.
其中,如图4所示,在数据写入阶段,也即在t1阶段,该第一扫描线对应提供的第一扫描信号存在低电平状态,以能够对应控制预写入晶体管和补偿模块触发导通,以将数据线对应提供的数据电压传输至数据写入模块的第一端和预写入电容的第一端,预写入电容向存储电容模块的第一端耦合写入数据电压,而存储电容模块又将对应向驱动模块的控制端耦合写入该数据电压。Wherein, as shown in FIG. 4 , in the data writing stage, that is, in the t1 stage, the first scanning signal corresponding to the first scanning line has a low level state, so as to be able to control the triggering of the pre-writing transistor and the compensation module correspondingly. turn on, so as to transmit the data voltage provided by the data line to the first end of the data writing module and the first end of the pre-writing capacitor, and the pre-writing capacitor is coupled to the first end of the storage capacitor module to write the data voltage, The storage capacitor module will then couple to the control terminal of the drive module to write the data voltage.
S32:在阈值补偿阶段,控制数据写入模块和补偿模块导通,对驱动模块的控制端充电,以补偿驱动模块的阈值电压。S32: In the threshold compensation stage, the control data writing module and the compensation module are turned on, and the control terminal of the driving module is charged to compensate the threshold voltage of the driving module.
进一步地,在阈值补偿阶段,也即在t2阶段,该第二扫描线对应提供的第二扫描信号存在低电平状态,以能够对应控制数据写入模块和补偿模块导通,以将数据写入模块第一端的数据电压传输至驱动模块的第一端,且同时补偿模块将对驱动模块的控制端充电,以补偿驱动模块的阈值电压。Further, in the threshold compensation stage, that is, in the t2 stage, the second scanning signal corresponding to the second scanning line has a low level state, so as to be able to control the conduction of the data writing module and the compensation module correspondingly, so as to write the data The data voltage of the first terminal of the input module is transmitted to the first terminal of the driving module, and at the same time, the compensation module charges the control terminal of the driving module to compensate the threshold voltage of the driving module.
S33:在显示周期内的发光阶段,控制第一发光控制模块和第二发光控制模块导通,以使驱动模块根据其控制端和第二端的电压驱动发光模块发光。S33: In the light-emitting phase of the display period, control the first light-emitting control module and the second light-emitting control module to be turned on, so that the driving module drives the light-emitting module to emit light according to the voltages of its control terminal and second terminal.
又进一步地,在显示周期内的发光阶段,也即在t3阶段,该发射信号线对应提供的发射信号存在低电平状态,以能够对应控制第一发光控制模块和第二发光控制模块触发导通,从而使驱动模块根据其控制端和第二端的电压驱动发光模块发光。Still further, in the light-emitting phase of the display period, that is, in the t3 phase, the emission signal line corresponding to the provided emission signal has a low level state, so as to be able to correspondingly control the first light-emitting control module and the second light-emitting control module to trigger the conduction. so that the driving module drives the light-emitting module to emit light according to the voltages of the control terminal and the second terminal.
进一步地,在一实施例中,上述S31具体还可以包括:初始化阶段,也即在t1阶段,该第一扫描线对应提供的第一扫描信号存在低电平状态,以同时控制第一初始化模块和第二初始化模块导通,从而将基准电压线对应提供的初始电压分别写入存储电容模块的第二端和发光模块的第一端,以同时对可调电容模块和发光模块进行初始化,也即使该可调电容模块和发光模块复位,以清除上一阶段可能存在的信号残留。Further, in an embodiment, the above S31 may specifically include: the initialization phase, that is, in the t1 phase, the first scan line corresponding to the first scan signal provided has a low level state, so as to simultaneously control the first initialization module and the second initialization module, so that the initial voltage provided by the reference voltage line is respectively written into the second terminal of the storage capacitor module and the first terminal of the light-emitting module, so as to initialize the adjustable capacitor module and the light-emitting module at the same time, and also Even if the adjustable capacitor module and the light emitting module are reset, the residual signal that may exist in the previous stage is eliminated.
本申请还提供了一种显示面板,请参阅图7,图7是本申请显示面板一实施方式的结构示意图。在本实施方式中,该显示面板40包括相连接的驱动电路41和像素电路42。The present application also provides a display panel, please refer to FIG. 7 , which is a schematic structural diagram of an embodiment of the display panel of the present application. In this embodiment, the
需要说明的是,本实施例所阐述的像素电路42为上述实施例中任一项所阐述的像素电路10或像素电路20,具体请参阅图1-图5及相关文字内容,在此就不再赘述。It should be noted that the
本申请的有益效果是:区别于现有技术,本申请提供的像素电路中的驱动模块的第一端连接第一电压源,存储电容模块的第一端和第二端分别连接第一电压源和驱动模块的控制端,数据写入模块的第二端和第三端分别连接驱动模块的第一端和第二扫描线,而预写入模块的第一端、第二端、第三端及第四端分别连接数据线、数据写入模块的第一端、第一扫描线及存储电容模块的第一端,发光模块的第一端和第二端分别连接驱动模块的第二端和第二电压源,其中,该预写入模块用于将数据线上的数据电压提供至数据写入模块的第一端和存储电容模块的第一端,以将该数据电压的写入和驱动模块阈值电压的补偿阶段分开,从而能够有效提升补偿效果的同时,显著缩短行写入时间,以保证高刷新显示功能。The beneficial effects of the present application are: different from the prior art, the first terminal of the driving module in the pixel circuit provided by the present application is connected to the first voltage source, and the first terminal and the second terminal of the storage capacitor module are respectively connected to the first voltage source and the control terminal of the driving module, the second terminal and the third terminal of the data writing module are respectively connected to the first terminal and the second scanning line of the driving module, and the first terminal, the second terminal and the third terminal of the pre-writing module and the fourth terminal are respectively connected to the data line, the first terminal of the data writing module, the first scanning line and the first terminal of the storage capacitor module, and the first terminal and the second terminal of the light emitting module are respectively connected to the second terminal and the second terminal of the driving module. The second voltage source, wherein the pre-writing module is used to provide the data voltage on the data line to the first end of the data writing module and the first end of the storage capacitor module, so as to write and drive the data voltage The compensation stage of the threshold voltage of the module is separated, so that the compensation effect can be effectively improved, and the row writing time can be significantly shortened to ensure the high-refresh display function.
以上所述仅为本申请的实施方式,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。The above is only the implementation of the application, and does not limit the patent scope of the application. Any equivalent structure or equivalent process conversion made by using the specification and drawings of the application, or directly or indirectly used in other related technologies fields, are all included in the scope of patent protection of this application in the same way.
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310245885.0A CN116312421A (en) | 2023-03-09 | 2023-03-09 | Pixel circuit, driving method thereof and display panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310245885.0A CN116312421A (en) | 2023-03-09 | 2023-03-09 | Pixel circuit, driving method thereof and display panel |
Publications (1)
Publication Number | Publication Date |
---|---|
CN116312421A true CN116312421A (en) | 2023-06-23 |
Family
ID=86833804
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202310245885.0A Pending CN116312421A (en) | 2023-03-09 | 2023-03-09 | Pixel circuit, driving method thereof and display panel |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN116312421A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2024149101A1 (en) * | 2023-01-10 | 2024-07-18 | 京东方科技集团股份有限公司 | Pixel driving circuit, and display panel and control method therefor |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101123065A (en) * | 2006-08-09 | 2008-02-13 | 精工爱普生株式会社 | Active matrix light-emitting device, electronic device, and pixel driving method of the device |
CN110992886A (en) * | 2019-12-25 | 2020-04-10 | 昆山国显光电有限公司 | Pixel driving circuit and driving method thereof |
CN112992055A (en) * | 2021-04-27 | 2021-06-18 | 武汉华星光电半导体显示技术有限公司 | Pixel circuit and display panel |
CN113192461A (en) * | 2021-05-18 | 2021-07-30 | 云谷(固安)科技有限公司 | Pixel driving circuit, driving method of pixel driving circuit and display panel |
CN114023263A (en) * | 2021-11-25 | 2022-02-08 | 云谷(固安)科技有限公司 | Pixel circuit, driving method of pixel circuit and display panel |
US20220310016A1 (en) * | 2021-03-23 | 2022-09-29 | Wuhan Tianma Micro-Electronics Co., Ltd. | Pixel driving circuit, driving method, display panel and display device |
-
2023
- 2023-03-09 CN CN202310245885.0A patent/CN116312421A/en active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101123065A (en) * | 2006-08-09 | 2008-02-13 | 精工爱普生株式会社 | Active matrix light-emitting device, electronic device, and pixel driving method of the device |
CN110992886A (en) * | 2019-12-25 | 2020-04-10 | 昆山国显光电有限公司 | Pixel driving circuit and driving method thereof |
US20220310016A1 (en) * | 2021-03-23 | 2022-09-29 | Wuhan Tianma Micro-Electronics Co., Ltd. | Pixel driving circuit, driving method, display panel and display device |
CN112992055A (en) * | 2021-04-27 | 2021-06-18 | 武汉华星光电半导体显示技术有限公司 | Pixel circuit and display panel |
WO2022227231A1 (en) * | 2021-04-27 | 2022-11-03 | 武汉华星光电半导体显示技术有限公司 | Pixel circuit and display panel |
CN113192461A (en) * | 2021-05-18 | 2021-07-30 | 云谷(固安)科技有限公司 | Pixel driving circuit, driving method of pixel driving circuit and display panel |
CN114023263A (en) * | 2021-11-25 | 2022-02-08 | 云谷(固安)科技有限公司 | Pixel circuit, driving method of pixel circuit and display panel |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2024149101A1 (en) * | 2023-01-10 | 2024-07-18 | 京东方科技集团股份有限公司 | Pixel driving circuit, and display panel and control method therefor |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN113781964B (en) | Pixel circuit, driving method thereof and display panel | |
CN103778889B (en) | Organic light emitting diode circuit and driving method thereof | |
CN104715723B (en) | Display device and its image element circuit and driving method | |
CN111696473B (en) | Pixel driving circuit, driving method of pixel driving circuit and display panel | |
WO2020151657A1 (en) | Pixel circuit, pixel drive method, and display apparatus | |
WO2022062614A1 (en) | Pixel drive circuit, display panel, and display device | |
CN109509433A (en) | Pixel circuit, display device and image element driving method | |
CN113299230A (en) | Pixel driving circuit, driving method of pixel driving circuit and display panel | |
US12027114B2 (en) | Pixel driving circuit, method for driving the same and display device | |
CN114241993B (en) | Driving circuit, driving method thereof, and display panel | |
CN111243498B (en) | Pixel circuit, driving method thereof and display device | |
CN111754941B (en) | Pixel circuit, driving method thereof, display substrate and display device | |
WO2022226727A1 (en) | Pixel circuit, pixel driving method and display device | |
WO2024098778A1 (en) | Pixel driving circuit, driving method therefor, and display apparatus | |
CN114078430A (en) | Pixel circuit and display panel | |
CN112164375A (en) | Pixel compensation circuit, driving method thereof and display device | |
CN114241978A (en) | Pixel circuit and driving method thereof, and display panel | |
WO2023216823A1 (en) | Pixel driving circuit and driving method therefor, display panel, and display device | |
CN116312421A (en) | Pixel circuit, driving method thereof and display panel | |
CN117059014A (en) | Pixel circuit, driving method thereof and display panel | |
CN117437878A (en) | Display circuit, display panel and display device | |
CN115223499B (en) | Pixel circuit, display panel, display device and driving method | |
CN117095636A (en) | Pixel circuit and driving method thereof | |
WO2021139645A1 (en) | Pixel circuit, pixel drive method, and display device | |
CN115410529A (en) | Pixel compensation circuit and display panel |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |