CN116096223B

CN116096223B - Low-operation-voltage high-consistency memristor and preparation method thereof

Info

Publication number: CN116096223B
Application number: CN202310379304.2A
Authority: CN
Inventors: 杨玉超; 张腾; 杨振; 黄如; 贺晓东
Original assignee: North Ic Technology Innovation Center Beijing Co ltd; Peking University
Current assignee: North Ic Technology Innovation Center Beijing Co ltd; Peking University
Priority date: 2023-04-11
Filing date: 2023-04-11
Publication date: 2023-06-13
Anticipated expiration: 2043-04-11
Also published as: CN116096223A

Abstract

The invention discloses a memristor with low operating voltage and high consistency and a preparation method thereof. The memristor is provided with a nitrogen-doped defect layer and a functional layer between the upper and lower electrodes, and the composition of the nitrogen-doped defect layer is MO _x N _y , wherein M is selected from one or more of the following transition metal elements : Ta, Hf, Zn, Ni, Ti, W; 1≤x≤2.5, 0.01≤y≤0.5. The present invention adopts a nitrogen-doped defect layer with a relatively high oxygen content and slightly doped with nitrogen. By adjusting the thickness of the functional layer material and rationally controlling its composition, different resistance values and operating voltages can be realized, and finally a memristive device with low operating voltage is realized. . The low operating voltage characteristics of the memristor of the present invention and the advantage that the preparation process is compatible with the traditional CMOS process are of great significance for the final realization of in-memory computing hardware.

Description

Low-operation-voltage high-consistency memristor and preparation method thereof

Technical Field

The invention belongs to the technical field of Semiconductor (Semiconductor) and Complementary Metal Oxide Semiconductor (CMOS) hybrid integrated circuits, and particularly relates to a Memristor (Memristor) suitable for Embedded memories (Embedded memories) and In-Memory Computing (In-Memory Computing) and a preparation method thereof.

Background

With the rapid development of the integrated circuit industry, in-memory and near-memory computing of non-von neumann architectures is expected to replace traditional von neumann architecture-based computing modes in the future. The development of the in-memory computing technology can promote the generation of more powerful computing capacity, is hopeful to realize powerful parallel processing capacity, and has great advantages in the aspects of speed, power consumption and the like.

Devices in an in-memory computing system that have storage and computing capabilities are the most important components of the overall in-memory computing system. Memristors, or resistive-switching memory devices (RRAM), are well suited as memory devices in-memory computing systems. In addition, memristors have incomparable advantages over conventional CMOS devices in terms of size reduction and power consumption. Thus, the development of in-memory computing based on memristor-based non-von neumann architectures has attracted tremendous attention in the industry and academia.

Memristors rely on achieving approximately continuous resistance change under applied voltage excitation, reversible state conversion can be achieved between a high-resistance state (0 'state) and a low-resistance state (1' state), the resistance state can be maintained after voltage excitation is removed, non-volatile storage of data is achieved, the memristors are generally composed of simple metal-oxide-metal structures, and therefore ultra-large-scale and extremely-high-density memristor arrays can be achieved through simple crossbar structures. Corresponding output can be obtained at the other side of the array by controlling the input of the applied voltage, and the memristor array can be used for realizing the function of integration of calculation and storage.

In order to be better applicable to in-memory computing system hardware, memristors need to have a continuously adjustable resistance that is highly reproducible. The memristor design needs to consider the performances such as the dynamic adjustment range of resistance, speed, operating voltage and the like, and the characteristics play an important role in realizing the hardware realization of high-performance and high-energy-efficiency in-memory calculation. Although the materials and devices that implement memristors are diverse, memristors that meet the above requirements remain to be continuously studied.

Disclosure of Invention

The invention aims to provide a memristor with low operating voltage and high consistency and a preparation method thereof, so as to meet the hardware application of high-performance and high-energy-efficiency in-memory calculation.

The technical scheme adopted by the invention is as follows:

a memristor comprises a substrate and a bottom electrode-nitrogen-doped defect layer-functional layer-top electrode structure or a bottom electrode-functional layer-nitrogen-doped defect layer-top electrode structure on the substrate, wherein a nitrogen-doped defect layer and a functional layer are arranged between an upper electrode and a lower electrode, and is characterized in that the nitrogen-doped defect layer comprises MO _x N _y Wherein M is a specific transition metal element selected from one or more of the following transition metal elements: ta is a metal-oxide-semiconductor alloy,hf, zn, ni, ti, W; wherein the content ratio of oxygen is higher, and the electrical property of the layer is regulated and controlled by the component ratio of lightly doped nitrogen, wherein x is more than or equal to 1 and less than or equal to 2.5,0.01, and y is more than or equal to 0.5.

The nitrogen-doped defect layer can adopt MN at the bottom electrode _a On the basis of the above, the catalyst is directly obtained through an oxidation step, thereby reducing the process cost. Furthermore, if the functional layer is prepared by adopting a reactive sputtering mode, the oxidation step can be directly realized by controlling the oxygen flow in the early stage of the process, so that the process cost and the cost are further reduced.

In the memristor, the substrate may be a rigid substrate (such as a silicon substrate) or a flexible organic material substrate, or may be a substrate for completing a previous CMOS process.

Preferably, the bottom electrode material MN _a Is formed by doping a small amount of N into M metal material, wherein a is more than or equal to 0.01 and less than or equal to 0.7, and is realized by a semiconductor CMOS process. The thickness of the bottom electrode and the top electrode is generally 50-400 nm.

Further, the nitrogen-doped defect layer adopts MO _x N _y The thickness of the metal oxide lightly doped with nitrogen is 2-20 nm, wherein the value range of x and y is more than or equal to 1 and less than or equal to 2.5,0.01, and y is less than or equal to 0.5; preferably, x is more than or equal to 1 and less than or equal to 2, and y is more than or equal to 0.01 and less than or equal to 0.2.

Further, the functional layer may employ TaO _z 、TiO _z 、AlO _z 、SiO _z 、HfO _z The thickness of the metal oxide (z is more than or equal to 0.1 and less than or equal to 2) is 10-200 nm.

The invention also provides a preparation method of the memristor compatible CMOS back-end process, which comprises the following steps:

1) Depositing a metal layer on a substrate by adopting a Physical Vapor Deposition (PVD) method and the like, defining a pattern of lower metal on the photoresist by utilizing photoetching, and transferring the pattern onto the metal layer by etching;

2) Growing an insulating layer (silicon dioxide or silicon nitride) on the lower metal layer by adopting a Chemical Vapor Deposition (CVD) mode;

3) Forming a bottom through hole in the insulating layer grown in the step 2), filling the through hole and forming a bottom electrode;

4) Firstly preparing a nitrogen-doped defect layer on a bottom electrode by adopting oxidation, PVD (physical vapor deposition) or ALD (atomic layer deposition) and other modes, and then preparing a functional layer; or preparing a functional layer on the bottom electrode, and then preparing a nitrogen-doped defect layer;

5) Defining a pattern of the functional layer on the photoresist by utilizing photoetching, and transferring the pattern to the nitrogen-doped defect layer and the functional layer by etching;

6) Growing an insulating layer (silicon dioxide or silicon nitride) by adopting a CVD (chemical vapor deposition) mode;

7) And 6) forming a through hole in the insulating layer grown in the step 6), filling the through hole and forming an upper metal layer, so as to finish the preparation of the memristor.

Forming a bottom through hole in the insulating layer by adopting a photoetching-etching mode, and filling metal or a conductive medium in the through hole by adopting a PVD (physical vapor deposition) mode and a Chemical Mechanical Polishing (CMP) mode; then, a bottom electrode material, preferably N-doped M metal, is deposited by PVD or the like to form MN _a . Optionally, the step 3) may directly fill the through hole with N-doped M metal as the conductive medium.

Optionally, a step of depositing the top electrode metal by adopting a PVD mode is added between the steps 4) and 5), and then the pattern of the functional layer is simultaneously transferred to the top electrode metal layer and the lower medium in the step 5), so that the subsequent steps of manufacturing the through hole and filling the through hole are omitted.

Step 7) can adopt the Damascus process to form a through hole and an upper metal pattern in the insulating layer, and deposit metal in a PVD mode to fill the through hole and form an upper metal line at the same time; the bottom through hole is formed in the insulating layer in a photoetching-etching mode without adopting a Damascus process, metal or conductive medium is filled in the through hole in a PVD (physical vapor deposition) mode and a CMP (chemical vapor deposition) mode, and then the top electrode material is deposited in a PVD mode and the like.

As described above, the nitrogen-doped defect layer may be prepared by an oxidized micro-nano processing method. By being adopted in MN _a The preparation method of the upper oxidation has the function of adjusting the defect concentration equivalent to doping and simultaneously avoids the complexity required by dopingProcess conditions and possibly higher thermal budget. Compared with a binary medium layer device, the device with the nitrogen-doped defect layer has lower operating voltage, and the whole preparation process is compatible with the traditional CMOS process.

The invention adopts MO _x N _y The nitrogen-doped defect layer of (2) is used for preparing the memristive device with low operation voltage. Different resistance values and operation voltages can be realized by adjusting the thickness of the prepared functional layer material and reasonably controlling the components of the functional layer material, and finally the memristor with low operation voltage is realized. Meanwhile, the memristor has the advantages of low operation voltage and compatibility of a preparation process and a traditional CMOS process, and has important significance for final implementation of in-memory computing hardware.

Drawings

FIG. 1 is a schematic diagram of the inter-cycle characteristics of a memristor of the present disclosure.

FIG. 2 is a schematic diagram of the distribution of resistance values of the memristor of the present disclosure.

FIGS. 3-6 are diagrams illustrating steps performed to fabricate the memristor according to an embodiment of the present disclosure, wherein:

FIG. 3 is a diagram of a preparation step of an underlying metal;

FIG. 4 is a diagram of a preparation step of depositing an insulating layer and forming a bottom via and filling a metal dielectric;

FIG. 5 is a diagram showing steps for preparing the nitrogen-doped defective layer, the functional layer and the top electrode;

FIG. 6 is a diagram of a process for preparing a top via and an upper metal layer;

the marks in the figure are as follows: 1-lower layer metal; 2-a bottom electrode; 3-a nitrogen-doped defect layer; 4-a functional layer; 5-top electrode; 6-top via and upper metal.

Fig. 7 is a process flow diagram of an embodiment.

FIG. 8 is a TEM (transmission electron microscope) cross-sectional view of a memristive device obtained in an embodiment of the present disclosure.

FIG. 9 is a schematic diagram of a memristor as a comparative example (the nitrogen-doped defect layer is TaO _1.1 N _0.8 ) Is a graph of the inter-cycle characteristics of (c).

Detailed Description

The invention will be further described by means of specific embodiments with reference to the accompanying drawings.

The following examples use metal oxides of different types and ratios as functional layers to achieve the fabrication of memristive devices of the present invention, and provide materials used in key process steps.

1) The substrate material may be selected according to the application, where a substrate is selected that has completed the previous CMOS process and has deposited an insulating layer;

2) Depositing a layer of metal Cu by adopting a PVD method, defining a pattern of lower metal on the photoresist by utilizing photoetching, transferring the pattern onto the metal Cu by etching, and obtaining a lower metal 1 with a required pattern on a substrate, wherein the lower metal 1 is shown in figure 3; the material of the metal layer is not limited to Cu, and may be a metallic medium such as Ti, al, W, cu, tiN;

3) Growing an insulating layer silicon dioxide to cover the lower metal pattern by adopting a CVD (chemical vapor deposition) mode, wherein the insulating layer can also be an insulating medium such as silicon nitride (SiN), phosphosilicate glass (PSG), borophosphosilicate glass (BPSG) and the like;

4) Forming a through hole on the lower metal layer 1 by adopting a photoetching mode, and filling a metallic medium TaN in the through hole by adopting PVD and CMP modes _a As the bottom electrode 2, as shown in fig. 4;

5) TaO for preparing nitrogen-doped defect layer by adopting PVD (physical vapor deposition) early-stage oxygen oxidation mode _x N _y Argon flow is 30 sccm, oxygen flow is 2 sccm, power is 2000W, temperature is 370 ℃, deposition modes can be ALD, PLD (laser pulse deposition) and the like;

6) Depositing metal oxide of functional layer by PVD, wherein the functional layer can be TaO _z 、TiO _z 、AlO _z 、SiO _z 、HfO _z The deposition method of the metal oxide can be ALD, PLD and the like;

7) Depositing a top electrode metal by adopting a PVD mode, wherein the top electrode material can be Ti, al, W, cu, tiN, taN and the like;

8) Defining a pattern of the functional layer on the photoresist by utilizing photoetching, and transferring the pattern to the metal layer and the metal oxide dielectric layer prepared in the steps 6) to 7) through etching, so as to obtain a memristor structure of the bottom electrode 2-nitrogen-doped defect layer 3-functional layer 4-top electrode 5 as shown in fig. 5;

9) Growing an insulating layer silicon dioxide by adopting a CVD (chemical vapor deposition) mode, wherein the insulating layer can be an insulating medium such as silicon nitride (SiN), phosphosilicate glass (PSG), borophosphosilicate glass (BPSG) and the like;

10 The damascene process is adopted to form the through hole and the upper metal pattern, metal Cu is deposited by a PVD mode to fill the through hole and form the upper metal line at the same time, the damascene process is not adopted, the through hole and the upper metal 6 can be formed in a mode similar to the steps 3) -4), and the metal material can be a metal medium such as Ti, al, W, cu, tiN, as shown in figure 6.

The process flow of the above embodiment is shown in fig. 7, and a TEM cross section of the memristor fabricated on the silicon wafer after the previous process is completed by the above method is shown in fig. 8, where the part marked by the black dashed box is the memristor. The characteristics obtained by DC cycle test are shown in figure 1, and the prepared device adopts TaN _a /TaO _x N _y /TaO _z TiN structure, wherein a is 0.1, x is 1.5, y is 0.45, and z is 0.77.TaN _a The thickness of the layer and the TiN layer is 50 nm, taO _x N _y Layer thickness of 3 nm, taO _z The layer thickness was 40 nm. The device gradually changes from a high resistance state to a low resistance state under the excitation of positive voltage, and then shows slow change from the low resistance state to the high resistance state under the excitation of negative voltage. Under the forward voltage, the device can complete the conversion of the resistance value at about 1V; at negative voltage, the device completes the resistance transition within-1V. The device has smaller resistance transition voltage, and the high and low resistance distribution is more concentrated and better in consistency according with the characteristic requirements of embedded storage and in-memory calculation on the device as can be seen from the resistance distribution of fig. 2. Meanwhile, FIG. 9 shows TaO of another formulation _x N _y A device wherein a is 0.1, x is 1.1, y is 0.8, and z is 0.78.TaN _a The thickness of the layer and the TiN layer is 50 nm, taO _x N _y Layer thickness of 3 nm, taO _z The layer thickness was 40 nm. In this condition, the device exhibits due to the excessively high proportion of NRelatively large fluctuations and high operating voltages are exhibited.

The above embodiments are only for illustrating the technical solution of the present invention and not for limiting the same, and those skilled in the art may modify or substitute the technical solution of the present invention without departing from the spirit and scope of the present invention, and the protection scope of the present invention shall be subject to the claims.

Claims

1. A memristor, comprising a substrate, and a bottom electrode-nitrogen-doped defect layer-functional layer-top electrode structure or a bottom electrode-functional layer-nitrogen-doped defect layer-top electrode structure positioned on the substrate, that is, in A nitrogen-doped defect layer and a functional layer are arranged between the upper and lower electrodes, characterized in that the composition of the nitrogen-doped defect layer is MO _x N _y , where M is a specific transition metal element selected from one of the following transition metal elements or more: Ta, Hf, Zn, Ni, Ti, W; 1≤x≤2.5, 0.01≤y≤0.5; the functional layer uses metal oxides selected from TaO _z , TiO _z , AlO _z , SiO _z , one or more of HfO _z , 0.1≤z≤2.

2 . The memristor according to claim 1 , wherein the material of the bottom electrode is MN _a , 0.01≤a≤0.7; the nitrogen-doped defect layer is obtained on the basis of the bottom electrode through an oxidation step.

3. The memristor according to claim 1, wherein the thickness of the bottom electrode and the top electrode is 50-400nm.

4 . The memristor according to claim 1 , wherein the substrate is a rigid substrate or a flexible organic material substrate, or a substrate completed with a previous CMOS process.

5. The memristor according to claim 1, wherein the thickness of the nitrogen-doped defect layer is 2-20 nm.

6. The memristor according to claim 1, wherein the thickness of the functional layer is 10-200nm.

7. The preparation method of the arbitrary described memristor of claim 1～6, comprises the following steps:

1) Deposit a metal layer on the substrate, use photolithography to define the pattern of the underlying metal on the photoresist, and transfer the pattern to the metal layer by etching;

2) An insulating layer is grown on the underlying metal by chemical vapor deposition;

3) forming bottom via holes in the insulating layer grown in step 2), filling the via holes and forming bottom electrodes;

4) First prepare a nitrogen-doped defect layer on the bottom electrode, and then prepare a functional layer; or, prepare a functional layer on the bottom electrode, and then prepare a nitrogen-doped defect layer; the composition of the nitrogen-doped defect layer is MO _x N _y , where M is a specific transition metal element, selected from one or more of the following transition metal elements: Ta, Hf, Zn, Ni, Ti, W; 1≤x≤2.5, 0.01≤y≤0.5; the functional layer adopts Metal oxides, selected from one or more of _TaOz , _TiOz , _AlOz , _SiOz , _HfOz , 0.1≤z≤2;

5) Use photolithography to define the pattern of the functional layer on the photoresist, and transfer the pattern to the nitrogen-doped defect layer and the functional layer by etching;

6) The insulating layer is grown by chemical vapor deposition;

7) Form a via hole in the insulating layer grown in step 6), fill the via hole and form an upper layer metal, and complete the preparation of the memristor.

8. The preparation method according to claim 7, characterized in that, step 3) filling MN _a in the bottom through hole, 0.01≤a≤0.7, and depositing MN _a by physical vapor deposition to form the bottom electrode, and then In step 4) the nitrogen-doped defect layer is formed on the bottom electrode by oxidation.