CN115914142B - Message processing method, message forwarding method, device and equipment - Google Patents

Abstract

The present application relates to a message processing method, a message forwarding method, a device and an apparatus. The message processing method is applied to an inlet chip, and receives a first message, and determines the port number of the outlet for forwarding the first message and the editing information for editing the first message according to the destination MAC address of the first message; obtains the attribute information of the outlet according to the port number of the outlet; edits the packet header of the first message according to the attribute information and the editing information to obtain a second message; wherein the second message is forwarded by the inlet chip through the outlet to the outside of the device where the inlet chip is located. The present application enables all editing actions of the message to be completed on the inlet chip of the message, without the need to edit the message on the outlet chip of the message, so that there is no need to carry the message editing information obtained on the inlet chip to the outlet chip, thereby reducing the complexity of editing resource management, and can also greatly save the bandwidth of the chip interconnection port.

Description

Message processing method, message forwarding method, device and equipment

Technical Field

The present application relates to the field of network communication technology, and in particular to a message processing method, a message forwarding method, a device and equipment.

Background Art

Ethernet has different protocol messages, and the Ethernet switching chip needs to edit the original message to generate a new message during the message processing process.

In the message processing process, the switching chip first searches the message forwarding table through the IPE (Ingress Process Engine) module to obtain the forwarding destination and message editing information, and then stores and forwards the message through the BSR (Buffer Store Retrieve) module, and then edits the original message through the EPE (Egress Process Engine) module according to the editing information obtained by the IPE module. In the message editing process, the message needs to be edited or other actions need to be performed according to the attributes configured on the egress end.

In a single-chip application, the switching chip can easily obtain the attribute message configured on the egress end, and message editing is easy to implement.

In multi-chip scenario applications, such as stacking systems, multiple stacking member devices are virtualized into one network device, and the message needs to enter from the entry chip (that is, the chip where the message entry end is located), and send the message to the message exit chip (that is, the chip where the message exit end is located) through the interconnection port between chips. At the same time, the message editing information obtained from the entry chip is carried to the exit chip, and the attributes configured on the exit end and the edit information carried are obtained on the exit chip to edit the message. In this scenario application, editing resources must be globally allocated and managed on the exit chip, but this will make editing resource management more complicated; in addition, since the editing information needs to be carried to the exit chip when editing the message on the exit chip, this will also waste the bandwidth of the chip interconnection port and even cause the risk of network congestion.

Summary of the invention

The embodiments of the present application provide a message processing method, a message forwarding method, an apparatus and a device.

The technical solution of this application is implemented as follows:

In a first aspect, a message processing method is provided, which is applied to an ingress chip, and the method includes:

receiving a first message;

Determine, according to the destination MAC address of the first message, a port number of an egress port for forwarding the first message and editing information for editing the first message;

According to the port number of the export port, acquiring the attribute information of the export port;

According to the attribute information and the editing information, the header of the first message is edited to obtain a second message; wherein the second message is forwarded by the ingress chip through the egress port to the outside of the device where the ingress chip is located.

In the above technical solution, the method further comprises:

marking the second message;

The marked second message is sent to the egress chip included in the device where the ingress chip is located, wherein the marked second message is used for the egress chip to forward outward from the egress end without editing the message.

In the above technical solution, obtaining the attribute information of the outlet port according to the port number of the outlet port includes:

The port attribute table is queried according to the port number of the egress port to obtain the attribute information of the egress port.

In the above technical solution, obtaining the attribute information of the outlet port according to the port number of the outlet port includes:

According to the mapping relationship between the chip identifier and the index interval information in the preset index mapping table, the index interval information corresponding to the chip identifier of the egress chip where the egress end is located is obtained;

According to the index interval information, obtaining the index value of the port attribute table corresponding to the egress port;

The attribute information of the egress port is read from the port attribute table corresponding to the index value.

In the above technical solution, the index interval information corresponding to the chip identification of the egress chip includes: the base address of the port attribute table corresponding to the chip identification of the egress chip, the minimum port number and the maximum port number of the egress chip.

In the above technical solution, obtaining the index value of the port attribute table corresponding to the egress port according to the index interval information includes:

Determine the difference between the port number of the egress port and the minimum port number as an offset;

An index value of the port attribute table corresponding to the egress port is determined according to the offset and a base address of the port attribute table.

In the above technical solution, the step of editing the header of the first message to obtain the second message according to the attribute information and the editing information includes:

Editing the layer-3 header of the first message according to the editing information;

Edit the layer 2 header and/or layer 3 header of the first message according to the attribute information.

In the above technical solution, the method further comprises:

When the attribute information and the editing information conflict in editing operations on the layer-3 header of the first message, determining the priority of the attribute information;

When the priority of the attribute information is higher than the priority of the editing information, the layer-3 header of the first message is edited according to the attribute information; otherwise, the layer-3 header is edited according to the editing information.

In a second aspect, a message forwarding method is provided, which is applied to an egress chip, and the method includes:

Receive messages from the ingress chip;

Determine whether the message received from the entry chip is a second message, wherein the second message is: a message obtained by the entry chip editing a packet header of the first message;

When the message received from the ingress chip is the second message, the second message is forwarded outward through the egress port without editing the second message.

In the above technical solution, the step of determining whether the message is a second message obtained by editing the first message includes:

Determining whether the message received from the ingress chip carries an edited flag;

When the message received from the entry chip carries an edited mark, it is determined that the message received from the entry chip is the second message.

In the above technical solution, the method further comprises:

When the message received from the entry chip is not the second message, receiving editing information of the message from the entry chip and attribute information of the egress end of the message received from the entry chip;

Editing a packet header of a message received from the ingress chip according to the editing information and the attribute information;

The message with the edited packet header is forwarded through the egress port to the outside of the device where the egress chip is located.

In a third aspect, a message processing device is provided, which is applied to an ingress chip, and the device includes:

A receiving module, used for receiving a first message;

A determination module, used to determine the port number of the egress port for forwarding the first message and the editing information for editing the first message according to the destination MAC address of the first message;

An acquisition module, used for acquiring attribute information of the export port according to the port number of the export port;

An editing module is used to edit the packet header of the first message to obtain a second message according to the attribute information and the editing information; wherein the second message is forwarded by the ingress chip through the egress port to the outside of the device where the ingress chip is located.

In a fourth aspect, a message forwarding device is provided, which is applied to an egress chip, and the device includes:

A receiving module, used for receiving messages from an ingress chip;

A determination module, used to determine whether the message received from the entry chip is a second message, wherein the second message is: a message obtained by the entry chip editing the packet header of the first message;

A sending module is used for forwarding the second message outward through the egress port without editing the second message when the message received from the ingress chip is the second message.

In the fifth aspect, an electronic device is provided, comprising a memory and a processor, characterized in that a computer program is stored in the memory, and the processor is configured to run the computer program to execute the message processing method described in the first aspect; or, the processor is configured to run the computer program to execute the message forwarding method described in the second aspect.

In a sixth aspect, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the message processing method described in the first aspect when running; or, the processor is configured to run the computer program to execute the message forwarding method described in the second aspect.

The embodiment of the present application provides a message processing method, a message forwarding method, a device and an apparatus. The message processing method is applied to an inlet chip. By receiving a first message, the port number of the outlet for forwarding the first message and the editing information for editing the first message are determined according to the destination MAC address of the first message; the attribute information of the outlet is obtained according to the port number of the outlet; the packet header of the first message is edited according to the attribute information and the editing information to obtain a second message; wherein the second message is forwarded by the inlet chip through the outlet to the outside of the device where the inlet chip is located. As a result, all editing actions of the message can be completed on the inlet chip of the message without editing the message on the outlet chip of the message. In this way, it is not necessary to carry the message editing information obtained on the inlet chip to the outlet chip, thereby solving the problem of complex management of editing resources and wasting the bandwidth of the chip interconnection port caused by implementing message editing on the outlet chip in the related technology, reducing the complexity of editing resource management, and also greatly saving the bandwidth of the chip interconnection port.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a flow chart of a message processing method provided in an embodiment of the present application;

FIG2 is another flow chart of the message processing method provided in an embodiment of the present application;

3 is a flow chart of obtaining attribute information of an export terminal provided in an embodiment of the present application;

FIG4 is a flow chart of a message forwarding method provided in an embodiment of the present application;

FIG5 is another flow chart of the message forwarding method provided in an embodiment of the present application;

FIG6 is a flow chart of a method for message processing and message forwarding provided in an embodiment of the present application;

7 is a schematic diagram of a global port index mapping table and an egress attribute table provided in an embodiment of the present application;

FIG8 is a schematic diagram of the structure of a message processing device provided in an embodiment of the present application;

FIG9 is a schematic diagram of the structure of a message forwarding device provided in an embodiment of the present application;

FIG. 10 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

DETAILED DESCRIPTION

In order to make the purpose, technical scheme and advantages of the present application clearer, the technical scheme in the embodiment of the present application will be clearly and completely described below in conjunction with the drawings in the embodiment of the present application. Obviously, the described embodiment is only a part of the embodiment of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application. In the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other arbitrarily. The steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions. In addition, although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that here.

It should be noted that, unless the context clearly requires otherwise, words such as “include”, “including” and similar words throughout the specification and claims should be interpreted as including rather than exclusive or exhaustive; that is, the meaning is “including but not limited to”.

In addition, in the description of the present application, it should be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present application, unless otherwise specified, the meaning of "plurality" is two or more.

The embodiment of the present application provides a message processing method, which can be applied to the inlet chip of the message, and the chip can be an application-specific integrated circuit (ASIC) chip, or a field programmable gate array (FPGA) chip, or NP, etc., and can be adjusted accordingly according to actual conditions. Among them, the inlet chip includes: an inbound processing engine IPE, a storage and forwarding module BSR, and an outbound processing engine EPE.

As shown in FIG1 , an embodiment of the present application provides a message processing method, which is applied to an ingress chip. The method may include the following steps:

S11. Receive a first message.

Here, the first message refers to any received message.

Specifically, after the first message enters the ingress chip through the ingress port, the first message is received by the ingress processing engine module of the ingress chip.

S12: Determine, according to the destination MAC address of the first message, the port number of the egress port for forwarding the first message and the editing information for editing the first message.

The egress port is used to forward the message to a device outside the ingress chip. The message editing information includes editing operations on the message. The editing operations include but are not limited to: deletion, addition, modification and/or replacement.

Specifically, the IPE of the ingress chip can search the port number of the egress port corresponding to the destination MAC address in the forwarding table according to the destination MAC address in the first message, obtain the port number of the egress end for forwarding the first message, the chip identifier of the egress chip and the editing information index value of the first message, obtain the search result, and forward the search result and the first message to the EPE of the ingress chip through the BSR of the ingress chip.

Among them, the forwarding table contains two important information: the editing information index value and the export information. The editing information index value is used to index the corresponding forwarding next hop to obtain the editing information of the first message. The editing information index value can be represented by nexthopPtr (i.e., the next hop index value). NexthopPtr is used to index DsNextHop to obtain the message editing information. The export information includes the port number of the export port corresponding to the destination MAC address and the chip identifier of the export chip where the export port is located. Here, the chip identifier of the chip is a global identifier that can uniquely identify a chip.

The editing information may include layer 2 header editing information and/or layer 3 header editing information.

The layer 2 header editing information includes: editing information of at least one of a destination MAC address, a source MAC address, an inner VLAN (Virtual Local Area Network) header, and an outer VLAN header.

The layer 3 header editing information includes, but is not limited to, editing information of IPv4 (Internet Protocol Version 4), IPv6 (Internet Protocol Version 6) and ARP (Address Resolution Protocol) messages.

The edited information of the IPv4 message includes, but is not limited to: the edited information of the protocol field, TTL (Time To Live), ECN (Explicit Congestion Notification), DSCP (Differentiated Services Code Point), destination IP address and source IP address of the IPv4 message.

The edited information of the IPv6 message includes, but is not limited to, the edited information of the flow label, protocol field, TTL, ECN, DSCP, destination IP address, and source IP address of the IPv6 message.

The edited information of the ARP message includes, but is not limited to: the destination protocol address of the ARP message, the destination hardware address, the sender protocol address, the sender hardware address, the protocol type, and the hardware type.

S13. Obtain attribute information of the exit port according to the port number of the exit port.

Among them, the attribute information at the exit end includes layer 2 header editing information and/or layer 3 header editing information. The layer 2 header editing information is, for example: processing rules for vlan tags in the inner VLAN header and the outer VLAN header, which are used to edit the vlan tag carried by the first message accordingly. Here, the virtual LAN tag processing rules include insertion, deletion, change or replacement; for example, whether to strip off the virtual LAN vlan tag carried by the message, the default vlan value on the port, etc.; the layer 3 header editing information is, for example: editing information of DSCP, destination IP address and source IP address, etc.

Specifically, the EPE of the ingress chip receives the search result of the first message forwarded by the BSR, and indexes to the corresponding forwarding next hop according to the editing information index value in the search result to obtain the editing information of the first message.

S14. Edit the header of the first message to obtain a second message according to the attribute information and the editing information; wherein the second message is forwarded by the ingress chip through the egress port to the outside of the device where the ingress chip is located.

Specifically, the EPE of the ingress chip edits the header of the first message according to the attribute information and the editing information to obtain the second message.

The above-mentioned message processing method is applied to the inlet chip, by receiving the first message, and determining the port number of the outlet for forwarding the first message and the editing information for editing the first message according to the destination MAC address of the first message; obtaining the attribute information of the outlet according to the port number of the outlet; editing the packet header of the first message to obtain the second message according to the attribute information and the editing information; wherein the second message is forwarded by the inlet chip through the outlet to the outside of the device where the inlet chip is located. As a result, all editing actions of the message can be completed on the inlet chip of the message, without the need to edit the message on the outlet chip of the message, so that there is no need to carry the message editing information obtained on the inlet chip to the outlet chip, thereby solving the problem of complex management of editing resources and wasting the bandwidth of the chip interconnection port caused by implementing message editing on the outlet chip in the related technology, reducing the complexity of editing resource management, and at the same time can greatly save the bandwidth of the chip interconnection port.

In one embodiment, as shown in FIG. 2 , based on FIG. 1 , the method may further include:

S15. Mark the second message.

Specifically, the EPE of the ingress chip marks the second message with an edited mark, which can be a bypass nexthopPtr (next hop index value with a skip mark) to instruct the egress chip of the second message to skip executing the index to the corresponding forwarding next hop for the second message, that is, skip reading the message editing information.

S16. Send the marked second message to the egress chip included in the device where the ingress chip is located, wherein the marked second message is used for the egress chip to forward outward from the egress end without editing the message.

Here, the ingress chip of the message and the egress chip of the message are interconnected and can be virtually formed into a network device, and there is an interconnection port between the egress chip and the ingress chip.

Specifically, the EPE of the ingress chip sends the second message carrying the edited mark to the egress chip where the egress port is located through the chip interconnection port.

In this embodiment, the marked second message is sent to the egress chip. Since the marked second message is used for the egress chip to forward it outward from the egress end without editing the message, there is no need for the egress chip to edit the second message and the second message can be directly forwarded outward from the egress end. There is no need to carry the message editing information obtained from the ingress chip to the egress chip, thereby reducing the complexity of the egress chip's management of editing resources and greatly saving the bandwidth of the chip interconnection port.

In one embodiment, in step S13, the attribute information of the egress port is obtained according to the port number of the egress port. The process may include:

The port attribute table is queried according to the port number of the egress port to obtain the attribute information of the egress port.

The port attribute table is pre-stored on the ingress chip and records the attribute information of different ports.

In one example, the port number of the egress port may be a global identifier that can uniquely identify a port. For example, for chip A and chip B each having 10 ports, the ports of chip A may be identified as port 1 to port 10, and the ports of chip B may be identified as port 11 to port 20.

In a specific implementation, the port attribute table may be queried according to the global identifier of the egress port to obtain the attribute information of the egress port.

In another example, the port number of the egress port is used to uniquely identify the port on a chip.

In a specific implementation, the attribute information of the egress port can be obtained by querying the port attribute table of the egress chip according to the port number of the egress port and the chip identifier of the egress chip where the egress port is located.

In one embodiment, as shown in FIG3 , in step S13, the attribute information of the egress port is obtained according to the port number of the egress port. The process may include:

S131. According to the mapping relationship between the chip identifier and the index interval information in the preset index mapping table, obtain the index interval information corresponding to the chip identifier of the egress chip where the egress end is located.

The preset index mapping table may be a global port index mapping table pre-stored in the first chip, and different chip identifiers in the preset index mapping table may correspond to different index interval information.

Specifically, the preset index mapping table may be indexed based on the chip identifier of the egress chip to obtain index interval information corresponding to the chip identifier of the egress chip.

S132: Obtain an index value of the port attribute table corresponding to the egress port according to the index interval information.

The index interval information corresponding to the chip identifier of the egress chip may include: the base address of the port attribute table corresponding to the chip identifier of the egress chip, the minimum port number of the egress chip, and the maximum port number. Here, the port attribute table may be a global port attribute table pre-stored in the ingress chip, and the port attribute table stores port information related to message editing, such as whether to strip off the vlan tag, the default vlan tag value, and so on.

It can be understood that the index interval information corresponding to the chip identifier of the egress chip may also include index values corresponding to different ports of the egress chip, and the index value of the port may be used to obtain attribute information of the port.

In one example, the process may include:

The difference between the port number of the egress port and the minimum port number is determined as an offset, and the index value of the port attribute table corresponding to the egress port is determined according to the offset and the base address of the port attribute table.

Specifically, the index value of the global port attribute table corresponding to the egress port can be calculated according to the formula: index value=base address of the global port attribute table+egress port number-minimum port number.

After the index value is calculated, the attribute information of the egress port can be obtained based on the index value.

Optionally, before step S132, the method may further include:

According to the maximum port number and the minimum port number in the index interval information, determine whether the port number of the exit port is valid. If the port number is valid, execute step S132. If the port number is invalid, discard the first message, wherein the valid port number is between the minimum port number and the maximum port number.

S133. Read the attribute information of the egress port from the port attribute table corresponding to the index value.

In this embodiment, the index interval information corresponding to the chip identifier of the egress chip is obtained through a preset index mapping table, and based on the index interval information, the index value of the port attribute table corresponding to the egress port is obtained, and the attribute information of the egress port is read from the port attribute table corresponding to the index value, thereby achieving the acquisition of the attribute information of the egress port at the ingress chip, and being able to quickly acquire the attribute information of the egress port; in addition, since the egress attribute table is not fixedly allocated, but uses the global chip ID as an index to obtain the range of the egress attribute table, dynamic and flexible allocation of each chip can be achieved.

In one embodiment, in the above step S14, editing the header of the first message to obtain the second message according to the attribute information and the editing information may include:

The layer-3 header of the first message is edited according to the editing information, and the layer-2 header and/or layer-3 header of the first message is edited according to the attribute information.

Specifically, edit the layer 2 header of the first message according to the layer 2 header editing information in the editing information, edit the layer 3 header of the first message according to the layer 3 header editing information in the editing information, edit the layer 2 header of the first message according to the attribute information, and determine the edited first message as the second message.

In specific implementation, the layer 2 header of the first message can be edited according to the editing information of at least one of the destination MAC address, the source MAC address, the inner VLAN header, and the outer VLAN header; the layer 3 header of the first message can be edited according to the editing information of one of the IPv4, IPv6 and ARP messages; the layer 2 header of the first message can be edited according to the virtual LAN VLAN tag processing rules included in the attribute information, so that the edited first message has the virtual LAN tag of the outgoing port.

In one embodiment, the method may further include:

When the editing operations of the three-layer header of the first message by the attribute information and the editing information conflict, the priority of the attribute information is determined. When the priority of the attribute information is higher than the priority of the editing information, the three-layer header of the first message is edited according to the attribute information; otherwise, the three-layer header is edited according to the editing information.

Among them, corresponding priorities can be set for the editing operations of the attribute information and the editing information on the message according to actual application requirements. For example, the priority of the attribute information is set higher than the priority of the editing information. At this time, the second layer header of the first message is edited according to the attribute information, but the embodiments of the present application are not limited to this.

In this embodiment, there may be a situation where both the attribute information and the editing information perform editing operations on the third-layer header of the first message. By determining that the priority of the attribute information is higher than the priority of the editing information, the second-layer header of the first message is edited according to the priority of the attribute information, thereby ensuring that the first message can be edited normally.

Based on the message processing method provided in the above embodiment, the embodiment of the present application also provides a message forwarding method, which is applied to the egress chip of the message, which can be an application-specific integrated circuit (ASIC) chip, or a field programmable gate array (FPGA) chip, or NP, etc., which can be adjusted accordingly according to actual conditions. Among them, the egress chip includes: an inbound processing engine IPE, a storage and forwarding module BSR, and an outbound processing engine EPE.

As shown in FIG4 , an embodiment of the present application provides a message forwarding method, which is applied to an egress chip. The method may include the following steps:

S21. Receive a message from an ingress chip.

Specifically, the message is sent from the ingress chip to the egress chip through the chip interconnection port between the ingress chip and the egress chip. After the ingress message reaches the egress chip, the message is received by the ingress processing engine IPE of the egress chip and forwarded to the EPE of the egress chip through the BSR of the egress chip.

S22. Determine whether the message received from the ingress chip is a second message, wherein the second message is: a message obtained by the ingress chip editing the packet header of the first message.

Specifically, the EPE of the egress chip determines whether the message received from the ingress chip is the second message.

In one example, the process may include:

It may be determined whether the message received from the ingress chip carries an edited mark. When the message received from the ingress chip carries the edited mark, it is determined that the message received from the ingress chip is the second message.

S23: When the message received from the ingress chip is the second message, forward the second message outward through the egress port without editing the second message.

Specifically, when the EPE of the egress chip determines that the message is the second message, the message is directly forwarded outward through the egress port.

The above-mentioned message forwarding method is applied to the egress chip, and by receiving a message from the ingress chip, it is determined whether the message received from the ingress chip is a second message, wherein the second message is: a message obtained by editing the header of the first message by the ingress chip; when the message received from the ingress chip is the second message, the second message is forwarded outward through the egress port without editing the second message. Since all editing actions of the message can be completed on the ingress chip of the message, when the egress chip determines that the message received from the ingress chip is the second message obtained by editing the header of the first message by the ingress chip, the egress chip no longer needs to edit the message by obtaining the editing information from the ingress chip, but forwards the message to the outside of the device where the egress chip is located through the egress port, which solves the problem of complex management of editing resources and waste of bandwidth of chip interconnection ports caused by implementing message editing on the egress chip in the related technology, thereby reducing the complexity of editing resource management, and can also greatly save the bandwidth of chip interconnection ports.

In one embodiment, as shown in FIG5 , based on FIG4 , the method may further include:

S24. When the message received from the ingress chip is not the second message, edit information of the message received from the ingress chip and attribute information of the egress end of the message received from the ingress chip.

Specifically, the inbound processing engine IPE of the egress chip receives the editing information of the message and the attribute information of the egress end, and forwards the editing information and the attribute information to the EPE of the egress chip through the BSR of the egress chip.

S25. Edit the packet header of the message received from the ingress chip according to the editing information and the attribute information.

Specifically, the EPE of the egress chip edits the packet header of the message received from the ingress chip according to the editing information and the attribute information.

The implementation process of this step may refer to step S14 in the above embodiment, which will not be described in detail here.

S26. Forward the message with the edited packet header through the egress port to the outside of the device where the egress chip is located.

In this embodiment, when the message received from the ingress chip is not an edited message, the message editing operation can be performed on the egress chip according to the editing information of the message received from the ingress chip and the attribute information of the egress end of the message.

In conjunction with Figure 6, the stacking system is used as an example to illustrate the message processing process of the ingress chip and the message forwarding process of the egress chip. The stacking system includes stacked ingress chips and egress chips, and one of the two stacked chips is defined as an ingress chip, and the chip connected to it and located downstream thereof is correspondingly defined as an egress chip.

As shown in Figure 6, the message processing flow of the ingress chip is as follows:

1. After the message enters the ingress chip from the network port, the IPE module of the ingress chip obtains destPort and nexthopPtr by searching the forwarding table. Among them, destPort represents the destination egress information, which includes the CHIP ID and egress port number of the egress chip. NexthopPtr is used to index DsNextHop to obtain the message editing information.

2. The message is stored by the BSR module, and the message, destPort and nexthopPtr are sent to the EPE module for editing;

3. In the EPE module, the DsNexthop table is read through nexthopPtr to obtain the editing information of the message. When it is detected that the chip where the export port is located is not a local chip (that is, the export CHIP ID and the local CHIP ID are not equal), the global port index mapping table is obtained by indexing according to the CHIP ID in destPort. The global port index mapping table stores the base address of the global export attribute table as well as the maximum port number and the minimum port number; among them, the global port index mapping table and the export attribute table can be shown in reference to Figure 7.

4. Determine whether the port number is valid based on the egress port number and the maximum and minimum port numbers stored in the global port index mapping table. If the port number is valid, execute step 5. If the port number is invalid, discard the message. The valid port number should be between the minimum and maximum port numbers.

5. According to the base address, export port number and minimum port number of the global export attribute table in the global port index mapping table, the index value of the global port attribute table is calculated according to the following formula:

Index value = base address of global port attribute table + outgoing port number - minimum port number;

6. Get the global port attribute table according to the index value;

7. Edit the message accordingly according to the message editing information and the port attributes in the global port attribute table to complete all editing actions of the message.

8. Mark the edited message with a bypass nexthopPtr, and send the edited message carrying bypass nexthopPtr and destPort to the egress chip.

As shown in Figure 6, the message forwarding process of the egress chip is as follows:

1. After the edited message enters the egress chip, the IPE module of the egress chip skips the forwarding table search;

2. The message is forwarded to the EPE module through the BSR module;

3. The EPE module reads the DsNexthop table and finds that it is a bypass Nexthop. It skips reading DsDestPort and does not edit the message. It only forwards the message to the corresponding port.

From the above, it can be seen that the method provided in the embodiment of the present application can use the centralized CPU to reduce the message editing mode in the stacking system to a single chip, that is, the message entry chip, which is very simple to manage and can greatly save the bandwidth of the interconnection port.

As shown in FIG8 , an embodiment of the present application provides a message processing device, which is applied to an ingress chip. The device may include:

The receiving module 801 is used to receive a first message;

A determination module 802, configured to determine, according to a destination MAC address of the first message, a port number of an egress port for forwarding the first message and editing information for editing the first message;

The acquisition module 803 is used to acquire the attribute information of the export port according to the port number of the export port;

The editing module 804 is used to edit the header of the first message to obtain a second message according to the attribute information and the editing information; wherein the second message is forwarded by the ingress chip through the egress port to the outside of the device where the ingress chip is located.

In one embodiment, the apparatus further comprises:

A marking module, used for marking the second message;

The sending module is used to send the marked second message to the egress chip included in the device where the ingress chip is located, wherein the marked second message is used for the egress chip to forward outward from the egress end without editing the message.

In one embodiment, the acquisition module is specifically used for:

The port attribute table is queried according to the port number of the egress port to obtain the attribute information of the egress port.

In one embodiment, the acquisition module is specifically used for:

According to the mapping relationship between the chip identifier and the index interval information in the preset index mapping table, the index interval information corresponding to the chip identifier of the egress chip where the egress end is located is obtained;

According to the index interval information, obtain the index value of the port attribute table corresponding to the egress port;

Read the attribute information of the egress port from the port attribute table corresponding to the index value.

In one embodiment, the index interval information corresponding to the chip identification of the egress chip includes: a base address of the port attribute table corresponding to the chip identification of the egress chip, a minimum port number of the egress chip, and a maximum port number.

In one embodiment, the acquisition module is used to acquire the index value of the port attribute table corresponding to the egress port according to the index interval information, including:

The difference between the port number of the egress port and the minimum port number is determined as an offset;

According to the offset and the base address of the port attribute table, the index value of the port attribute table corresponding to the egress port is determined.

In one embodiment, the editing module is specifically used to:

Editing the layer 3 header of the first message according to the editing information;

The layer 2 header and/or layer 3 header of the first message is edited according to the attribute information.

In one embodiment, the editing module is further configured to:

When the attribute information and the editing information conflict in editing operations on the layer 3 header of the first message, determining the priority of the attribute information;

When the priority of the attribute information is higher than the priority of the editing information, the layer-3 header of the first message is edited according to the attribute information; otherwise, the layer-3 header is edited according to the editing information.

It should be noted that: when the message processing device provided in the above embodiment executes the message processing method, only the division of the above program modules is used as an example. In actual application, the above processing can be assigned to different program modules as needed, that is, the internal structure of the device is divided into different program modules to complete all or part of the processing described above. In addition, the message processing device provided in the above embodiment and the message processing method embodiment belong to the same concept, and the specific implementation process is detailed in the method embodiment, which will not be repeated here.

As shown in FIG9 , an embodiment of the present application provides a message forwarding device, which is applied to an egress chip. The device may include:

Receiving module 901, used to receive messages from the ingress chip;

The determination module 902 is used to determine whether the message received from the ingress chip is a second message, wherein the second message is: a message obtained by the ingress chip editing the packet header of the first message;

The sending module 903 is configured to forward the second message outward through the egress port without editing the second message when the message received from the ingress chip is the second message.

In one embodiment, the determination module is specifically used to:

Determine whether the message received from the ingress chip carries an edited flag;

When the message received from the ingress chip carries the edited mark, it is determined that the message received from the ingress chip is the second message.

In one embodiment, the apparatus further comprises an editing module:

The receiving module is further used for receiving the editing information of the message received from the inlet chip and the attribute information of the egress end of the message received from the inlet chip when the message received from the inlet chip is not the second message;

An editing module, used for editing a packet header of a message received from an ingress chip according to the editing information and the attribute information;

The sending module is also used to forward the message with the edited packet header through the egress port to the outside of the device where the egress chip is located.

It should be noted that: when the message forwarding device provided in the above embodiment executes the message forwarding method, only the division of the above program modules is used as an example. In actual application, the above processing can be assigned to different program modules as needed, that is, the internal structure of the device is divided into different program modules to complete all or part of the processing described above. In addition, the message forwarding device provided in the above embodiment and the message forwarding method embodiment belong to the same concept, and the specific implementation process is detailed in the method embodiment, which will not be repeated here.

The present application also provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein:

When the electronic device is applied to the message processing method, the processor implements the steps of any message processing method of the embodiment of the present application when executing the computer program;

When the electronic device is applied to the message forwarding method, the processor implements the steps of the message forwarding method of any embodiment of the present application when executing the computer program.

FIG10 shows a schematic diagram of the hardware structure of an electronic device according to an embodiment of the present application. The electronic device 1000 shown in FIG10 includes: at least one processor 1001, a memory 1002, and at least one network interface 1003. The various components in the electronic device 1000 are coupled together via a bus system 1004. It is understandable that the bus system 1004 is used to realize the connection and communication between these components. In addition to the data bus, the bus system 1004 also includes a power bus, a control bus, and a status signal bus. However, for the sake of clarity, various buses are labeled as bus systems 1004 in FIG10.

It can be understood that the memory 1002 can be a volatile memory or a non-volatile memory, and can also include both volatile and non-volatile memories.

The memory 1002 in the embodiment of the present application is used to store various types of data to support the operation of the electronic device 900. Examples of such data include: any computer program for operating on the electronic device 1000, such as the executable program 10021, and the program implementing the method of the embodiment of the present application may be included in the executable program 10021.

The embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored. When the computer-readable storage medium is applied to the message processing method, when the computer program is executed by the processor, the steps in any message processing method of the embodiment of the present application are implemented;

When the computer-readable storage medium is applied to the message forwarding method, when the computer program is executed by the processor, the steps of the message forwarding method in any of the above embodiments are implemented.

It should be noted that the storage medium of the embodiment of the present application can be implemented by any type of volatile or non-volatile storage device, or a combination thereof. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM); the magnetic surface memory can be a disk memory or a tape memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), direct memory bus random access memory (DRRAM). The storage medium described in the embodiments of the present application is intended to include but is not limited to these and any other suitable types of memory.

In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical, mechanical or other forms.

The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

In addition, all functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may be a separate unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

A person skilled in the art can understand that: all or part of the steps of implementing the above method embodiment can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above method embodiment; and the aforementioned storage medium includes: mobile storage devices, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), disks or optical disks, etc. Various media that can store program codes.

Alternatively, if the above-mentioned integrated unit of the present application is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including several instructions for an electronic device (which can be a personal computer, server, or network device, etc.) to execute all or part of the methods of each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROM, RAM, disks, or optical disks.

The methods disclosed in several method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.

The features disclosed in several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.

The features disclosed in several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.

The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims (15)

1. The message processing method is characterized by being applied to an entry chip in a multi-chip application scene, and comprises the following steps:

receiving a first message;

determining a port number of an outlet end of an outlet chip for forwarding the first message and editing information for editing the first message according to a destination MAC address of the first message;

acquiring attribute information of the outlet port according to the port number of the outlet port;

Editing the packet header of the first message according to the attribute information and the editing information to obtain a second message; and forwarding the second message from the inlet chip to the outside of the equipment where the inlet chip is located through the outlet end.

2. The method according to claim 1, wherein the method further comprises:

marking the second message;

And sending the marked second message to an outlet chip contained in the device where the inlet chip is located, wherein the marked second message is used for forwarding the outlet chip outwards under the condition that the outlet chip does not edit the message.

3. The method according to claim 1 or 2, wherein the obtaining attribute information of the egress port according to the port number of the egress port includes:

And inquiring a port attribute table according to the port number of the outlet end to obtain the attribute information of the outlet end.

4. The method according to claim 1 or 2, wherein the obtaining attribute information of the egress port according to the port number of the egress port includes:

acquiring index interval information corresponding to the chip identification of the outlet chip where the outlet end is positioned according to a mapping relation between the chip identification and the index interval information in a preset index mapping table;

acquiring an index value of a port attribute table corresponding to the outlet end according to the index interval information;

And reading the attribute information of the outlet end from the port attribute table corresponding to the index value.

5. The method of claim 4, wherein the index interval information corresponding to the chip identification of the egress chip includes: the chip identification of the outlet chip corresponds to the base address of the port attribute table, the minimum port number and the maximum port number of the outlet chip.

6. The method of claim 5, wherein the obtaining, according to the index interval information, the index value of the port attribute table corresponding to the outlet port includes:

Determining a difference between the port number of the outlet port and the minimum port number as an offset;

and determining an index value of the port attribute table corresponding to the outlet end according to the offset and the base address of the port attribute table.

7. The method of claim 1, wherein editing the header of the first message to obtain the second message according to the attribute information and the editing information comprises:

Editing a three-layer packet header of the first message according to the editing information;

and editing a two-layer packet header and/or a three-layer packet header of the first message according to the attribute information.

8. The method of claim 7, wherein the method further comprises:

When the attribute information and the editing information conflict with the editing operation of the three-layer packet header of the first message, determining the priority of the attribute information;

when the priority of the attribute information is higher than the priority of the editing information, editing the three-layer packet header of the first message according to the attribute information, otherwise, editing the three-layer packet header according to the editing information.

9. The message forwarding method is characterized by being applied to an outlet chip in a multi-chip application scene, and comprises the following steps:

Receiving a message from an ingress chip;

Determining whether a message received from the inlet chip is a second message, wherein the second message is: the entry chip edits a message obtained by a packet head of the first message based on editing information of the first message and attribute information of an exit end of the exit chip;

And when the message received from the inlet chip is the second message, forwarding the second message outwards through the outlet end under the condition that the second message is not edited.

10. The method of claim 9, wherein determining whether the message is a second message resulting from editing the first message comprises:

determining whether the message received from the entry chip carries an edited mark;

And when the message received from the entrance chip carries the edited mark, determining the message received from the entrance chip as the second message.

11. The method according to claim 9, wherein the method further comprises:

When the message received from the inlet chip is not the second message, receiving editing information of the message and attribute information of an outlet end of the message received from the inlet chip;

Editing a packet header of a message received from the entry chip according to the editing information and the attribute information;

And forwarding the message with the edited packet header to the outside of the equipment where the outlet chip is located through the outlet end.

12. A message processing apparatus, applied to an ingress chip in a multi-chip application scenario, the apparatus comprising:

The receiving module is used for receiving the first message;

The determining module is used for determining a port number of an outlet end of an outlet chip for forwarding the first message and editing information for editing the first message according to the destination MAC address of the first message;

the acquisition module is used for acquiring attribute information of the outlet port according to the port number of the outlet port;

The editing module is used for editing the packet header of the first message to obtain a second message according to the attribute information and the editing information; and forwarding the second message from the inlet chip to the outside of the equipment where the inlet chip is located through the outlet end.

13. A message forwarding device, which is applied to an egress chip in a multi-chip application scenario, the device comprising:

the receiving module is used for receiving the message from the inlet chip;

The determining module is configured to determine whether a packet received from the ingress chip is a second packet, where the second packet is: the entry chip edits a message obtained by a packet head of the first message based on editing information of the first message and attribute information of an exit end of the exit chip;

And the sending module is used for forwarding the second message outwards through the outlet end under the condition that the second message is not edited when the message received from the inlet chip is the second message.

14. An electronic device comprising a memory and a processor, wherein the memory has stored therein a computer program, the processor being arranged to run the computer program to perform the message processing method of any of claims 1 to 8; or the processor is arranged to run the computer program to perform the message forwarding method of any of the claims 9 to 11.

15. A computer readable storage medium, characterized in that the storage medium has stored therein a computer program, wherein the computer program is arranged to perform the message processing method of any of the claims 1 to 8 when run; or the computer program is arranged to run the computer program to perform the message forwarding method of any of the claims 9 to 11.