CN115706100A - Electronic device - Google Patents

Abstract

The disclosure provides an electronic device, including a substrate, a first semiconductor element, and a first protection structure. The first semiconductor element is disposed on the substrate and electrically connected to the substrate. The first semiconductor element has a first surface away from the substrate. The first protection structure covers at least part of the first surface.

Description

electronic device

technical field

The present disclosure relates to an electronic device, in particular to an electronic device with better structural reliability.

Background technique

When microelectronic components in the prior art (such as integrated circuits (Integrated Circuit) or light-emitting diodes (micro LED), etc.) use glass as a carrier, when the microelectronic components are cut, or the microelectronic components are bonded to The stress or impact force of the substrate (or circuit board) can cause cracks on the cutting edge or corner of the carrier or the circuit film layer on it, which will affect the quality and structural reliability of the product.

Contents of the invention

According to an embodiment of the present disclosure, an electronic device includes a substrate, a first semiconductor element, and a first protection structure. The first semiconductor element is disposed on the substrate and electrically connected to the substrate. The first semiconductor element has a first surface away from the substrate. The first protection structure covers at least part of the first surface.

Description of drawings

FIG. 1A is a schematic diagram of an electronic device according to an embodiment of the present disclosure;

FIG. 1B is a schematic top view of a first semiconductor element of the electronic device of FIG. 1A;

Fig. 1C is a schematic cross-sectional view along the line I-I of Fig. 1B;

FIG. 2 is a schematic diagram of an electronic device according to another embodiment of the present disclosure;

3 is a schematic cross-sectional view of a first semiconductor element according to another embodiment of the present disclosure;

FIG. 4A is a schematic side view of an electronic device according to another embodiment of the present disclosure;

FIG. 4B is a schematic top view of the electronic device of FIG. 4A;

FIG. 5 is a schematic diagram of an electronic device according to another embodiment of the present disclosure;

6 is a schematic side view of an electronic device according to another embodiment of the present disclosure;

7 is a schematic side view of an electronic device according to another embodiment of the present disclosure;

FIG. 8 is a schematic side view of an electronic device according to another embodiment of the present disclosure;

FIG. 9 is a schematic side view of an electronic device according to another embodiment of the present disclosure.

Explanation of reference signs

100a, 100b, 100c, 100d, 100e, 100f, 100g, 100h, 100i: electronic devices;

110: substrate;

113: base;

112: upper surface;

115: line layer;

117: conductive via;

122a, 124a, 122c, 124d, 124e, 124f, 124g, 124h, 124i: first semiconductor element;

123a, 123c, P: pads;

125a, 125c: carrier board;

126a, 126d, 126e, 126f, 126g, 126h, 126i: second semiconductor elements;

127a, 127c: chip body;

128a, 128e: the third semiconductor element;

129a, 129c: buffer layer;

130b, 130c, 130d, 130e, 130f, 130g, 130h, 130i: first protective structure;

132a, 132f, 132h: first protective layer;

134a, 134f, 134h: second protective layer;

140: material layer;

150: Partition wall structure;

160: optical diaphragm group;

170e, 170g, 170i: second protective structure;

S11, S12, S21, S31, S41, S51, S61, S71, S81, S91: the first surface;

S13, S42, S52, S62, S72, S82, S92: the second surface;

S14, S53: the third surface;

W1, W2, W3, W4, W5, W6, W7, W8: width;

L: Line up.

Detailed ways

The electronic device according to the embodiment of the present disclosure will be described in detail below. It should be understood that the following description provides many different embodiments for implementing different aspects of some embodiments of the present disclosure. The specific components and arrangements described below are only for simple and clear description of some embodiments of the present disclosure. Of course, these are only examples rather than limitations of the present disclosure. In addition, similar and/or corresponding reference numerals may be used in different embodiments to denote similar and/or corresponding elements to clearly describe the present disclosure. However, the use of these similar and/or corresponding symbols is only for simply and clearly describing some embodiments of the present disclosure, and does not mean that there is any relationship between the different embodiments and/or structures discussed.

It should be understood that relative terms such as "lower" or "bottom" or "higher" or "top" may be used in the embodiments to describe the relative relationship of one element to another element of the drawings. It will be understood that if the device of the figures is turned over so that it is upside down, elements described as being on the "lower" side would then become elements on the "higher" side. The embodiments of the present disclosure can be understood together with the drawings, and the drawings of the present disclosure are also regarded as a part of the disclosure description. It should be understood that the drawings of the present disclosure are not drawn to scale and, in fact, the dimensions of elements may be arbitrarily enlarged or reduced in order to clearly illustrate the features of the present disclosure.

Furthermore, when it is mentioned that a first material layer is located on or over a second material layer, it may include the situation that the first material layer is in direct contact with the second material layer or the situation between the first material layer and the second material layer There may be no direct contact, that is, one or more other material layers may be separated between the first material layer and the second material layer. However, if the first material layer is directly on the second material layer, it means that the first material layer is in direct contact with the second material layer.

In addition, it should be understood that the ordinal numbers used in the description and claims, such as "first", "second", etc., are used to modify elements, which do not imply and represent that the (or these) elements have Any preceding ordinal numbers do not denote the order of one element with another, or the order of manufacturing methods, but are used only to enable an element with a certain designation to be compatible with another element with the same designation. Make a clear distinction. The claims and the description may not use the same words, for example, a first element in the description may be a second element in the claim.

In some embodiments of the present disclosure, terms related to bonding and connection, such as "connection" and "interconnection", unless otherwise specified, may refer to two structures being in direct contact, or may also refer to two structures not in direct contact, There are other structures located between these two structures. In addition, the term "bonding" and "connection" may also include the case where both structures are movable, or both structures are fixed. In addition, the terms "electrically connected" or "electrically coupled" include any direct and indirect electrical connection means.

In the text, the terms "about" and "substantially" usually mean within 10%, or within 5%, or within 3%, or within 2%, or within 1%, of a given value or range. or within 0.5%. The given quantity here is an approximate quantity, that is, the meaning of "about" and "substantially" can still be implied if "about" and "substantially" are not specified. The term "a range between a first value and a second value" means that the range includes the first value, the second value and other values therebetween. Furthermore, any two values or directions used for comparison may have certain errors. If the first value is equal to the second value, it implies that there may be an error of about 10% between the first value and the second value; if the first direction is perpendicular to the second direction, the difference between the first direction and the second direction The angle between them may be between 80° and 100°; if the first direction is parallel to the second direction, the angle between the first direction and the second direction may be between 0° and 10°.

Certain terms will be used throughout the specification and claims that follow this disclosure to refer to particular elements. Those skilled in the art should understand that electronic device manufacturers may refer to the same element by different names. This document does not intend to distinguish between those elements that have the same function but have different names. In the following specification and scope of patent application, words such as "comprising", "containing", and "having" are open-ended words, so they should be interpreted as meaning "including but not limited to...". Therefore, when the terms "comprising", "comprising" and/or "having" are used in the description of the present disclosure, it specifies the existence of corresponding features, regions, steps, operations and/or elements, but does not exclude one or more The existence of a corresponding feature, region, step, operation and/or element.

It should be understood that, in the following embodiments, without departing from the spirit of the present disclosure, features in several different embodiments may be replaced, reorganized, and combined to complete other embodiments. As long as the features of the various embodiments do not violate the spirit of the invention or conflict, they can be used in any combination and collocation.

In addition, the electronic device disclosed in this disclosure may include a display device, a backlight device, an antenna device, a sensing device, a splicing device, a touch display, a curved display, or a non-rectangular electronic device (free shape display), but not limited thereto. The electronic device may include, for example, liquid crystal, light emitting diode, fluorescence, phosphor, other suitable display media, or combinations thereof, but is not limited thereto. The display device can be a non-self-luminous display device or a self-luminous display device. The antenna device can be a liquid crystal type antenna device or a non-liquid crystal type antenna device, and the sensing device can be a sensing device for sensing capacitance, light, thermal energy or ultrasonic waves, but not limited thereto. Electronic components may include passive components and active components, such as capacitors, resistors, inductors, diodes, transistors, and the like. The diodes may include light emitting diodes (light emitting diodes, LEDs) or photodiodes (photodiodes). The light emitting diodes may include, for example, organic light emitting diodes (OLEDs), submillimeter light emitting diodes (mini LEDs), micro LEDs (micro LEDs) or quantum dot light emitting diodes (quantum dot LEDs), but are not limited thereto. The splicing device may be, for example, a display splicing device or an antenna splicing device, but is not limited thereto. It should be noted that, the electronic device can be any permutation and combination mentioned above, but not limited thereto. In addition, the electronic device can be a bendable or flexible electronic device. It should be noted that, the electronic device can be any permutation and combination mentioned above, but not limited thereto. In addition, the shape of the electronic device may be rectangular, circular, polygonal, with curved edges, or other suitable shapes. The electronic device may have peripheral systems such as a drive system, a control system, a light source system, a shelf system, etc. to support a display device, an antenna device or a splicing device. For the convenience of description, the electronic device is used as the backlight device for description below, but the disclosure is not limited thereto.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It can be understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having meanings consistent with the background or context of the related technology and the present disclosure, and should not be interpreted in an idealized or overly formal manner, Unless otherwise specified in the disclosed embodiments.

Reference will now be made in detail to the exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in the drawings and description to refer to the same or like parts.

FIG. 1A is a schematic diagram of an electronic device according to an embodiment of the present disclosure. FIG. 1B is a schematic top view of a first semiconductor element of the electronic device in FIG. 1A . FIG. 1C is a schematic cross-sectional view along line I-I of FIG. 1B . For convenience of description, FIG. 1B is shown in a perspective manner, and some components are omitted.

Please refer to FIG. 1A first. In this embodiment, the electronic device 100a includes a substrate 110, a first semiconductor element 122a, a first semiconductor element 124a, and a first protection structure (such as a first protection structure 132a and a first protection structure 134a). The first semiconductor element 122 a and the first semiconductor element 124 a are disposed on the substrate 110 and electrically connected to the substrate 110 . The first semiconductor element 122 a has a first surface S11 away from the substrate 110 , and the first semiconductor element 124 a has a first surface S12 away from the substrate 110 . The first protection structure 130a covers at least part of the first surface S11 and the first surface S12.

In some embodiments, the electronic device 100a is, for example, a backlight module, and the substrate 110 is, for example, a circuit board, but not limited thereto. In some embodiments, the substrate 110 may include a base 113 and a wiring layer 115 , and the wiring layer 115 may be disposed on the base 113 . In some embodiments, the first semiconductor element 122 a and the first semiconductor element 124 a are located on opposite sides of the substrate 110 respectively, that is, the first semiconductor element 122 a and the first semiconductor element 124 a are located on different sides of the substrate 110 . The first semiconductor element 122a can be electrically connected to the circuit layer 115 through the conductive via 117 penetrating through the substrate 113 , but is not limited thereto. The first semiconductor element 124 a is disposed on the circuit layer 115 and electrically connected to the circuit layer 115 . As shown in FIG. 1A and FIG. 1C, the first protection structure 132a can be disposed on the side of the substrate 110 adjacent to the first semiconductor element 122a, and the first protection structure 134a can be disposed on the side of the substrate 110 adjacent to the first semiconductor element 124a. superior. In some embodiments, the first protection structure 134a can cover the first semiconductor device 124a. The material of the first protection structure (such as the first protection structure 132a and the first protection structure 134a) includes, for example, silicone, acrylic (Acrylic), polyurethane (Urethane) or epoxy resin (Epoxy), the first protection structure (such as The first protective structure 132a and the first protective structure 134a) can provide the first protective structure 130a by coating, spraying (jetting), dispensing (dispensing), printing (printing) or other appropriate methods, but not This is the limit.

Please refer to FIG. 1B and FIG. 1C at the same time. The first semiconductor element 122a of this embodiment may be, for example, an integrated circuit or a thin film transistor circuit. The first semiconductor element 122a includes a carrier 125a, and the material of the carrier 125a may include glass, poly imide, other suitable materials or combinations thereof, but not limited thereto. Furthermore, the first semiconductor device 122a may include a chip body 127a and/or a buffer layer 129a, wherein the chip body 127a may be disposed on one side of the carrier 125a, and the buffer layer 129a may be adjacent to or surround the chip body 127a. In some embodiments, the first semiconductor element 122a may include a plurality of pads 123a disposed between the buffer layer 129a (or carrier 125a) and the substrate 110, and the first semiconductor element 122a may be electrically connected to the substrate 110 through the pads 123a. sexual connection. The material of the pad 123a includes, for example, any suitable conductive material, such as tin, copper, gold, but not limited thereto.

The electronic device 100a of this embodiment further includes a material layer 140 disposed between the substrate 110 and the first semiconductor element 122a. The material layer 140 may contact the first protection structure 132a. In some embodiments, the material layer 140 can overlap the chip body 127a, and the material layer 140 can be used as a support, but not limited thereto. In other words, as shown in FIG. 1B , the orthographic projection of the material layer 140 on the substrate 110 overlaps the orthographic projection of the chip body 127 a of the first semiconductor device 122 a on the substrate 110 . In some embodiments, the orthographic projection of the material layer 140 on the substrate 110 does not overlap with the orthographic projection of the pad 123 a on the substrate 110 . In some embodiments, the pads 123 a can surround the periphery of the material layer 140 . In some embodiments, the material of the material layer 140 includes, for example, a non-conductive adhesive material, such as epoxy resin (Epoxy), but is not limited thereto. The first protection structure 132a can be disposed between the substrate 110 and the first semiconductor device 122a. The electronic device 100a of this embodiment may further include a partition wall structure 150 surrounding the first protection structure 132a. Here, the partition wall structure 150 may, for example, be used to limit the flow direction and/or the amount of the first protection structure 132a. In some embodiments, the material of the partition wall structure 150 includes ink, but is not limited thereto. In some embodiments, the first protection structure 132a includes, for example, an underfill, but is not limited thereto.

Please refer to FIG. 1A again. In this embodiment, the electronic device 100a may further include a second semiconductor element 126a adjacent to the first semiconductor element 124a. The second semiconductor element 126a has a second surface S13 away from the substrate 110, and the first protection The structure 130a may cover at least part of the second surface S13. The electronic device 100a of this embodiment may further include a third semiconductor element 128a adjacent to the second semiconductor element 126a, the third semiconductor element 128a has a third surface S14 away from the substrate 110, and the first protection structure 130a covers at least part of the third semiconductor element 126a. Surface S14. In some embodiments, the first protective structure 134a may, for example, cover the first semiconductor element 124a, the second semiconductor element 126a and/or the third semiconductor element 128a. The first protection structure 134 a includes, for example, a diffusion film, a diffusion glue, or a mold layer or glue layer mixed with diffusion particles, but is not limited thereto. In some embodiments, the first semiconductor element 124 a , the second semiconductor element 126 a and/or the third semiconductor element 128 a may be light emitting diodes emitting light of the same color or light emitting diodes emitting light of different colors, for example. In some embodiments, the first semiconductor element 124a, the second semiconductor element 126a and/or the third semiconductor element 128a are disposed on the substrate 110 in a chip (or die) direct package (Chip on Board) manner, but It is not limited to this. In one embodiment, when the first semiconductor element 124a, the second semiconductor element 126a and/or the third semiconductor element 128a are, for example, blue light emitting diodes, green light emitting diodes, and red light emitting diodes, respectively, the three can be regarded as one A light emitting unit, but not limited thereto. In some embodiments, the first semiconductor element 122a can control the first semiconductor element 124a , the second semiconductor element 126a and/or the third semiconductor element 128a through the conductive via 117 and the circuit layer 115 . In some embodiments, the first protection structure 134a can be used to increase the light emitting effect. In some embodiments, the electronic device 100a may further include an optical film set 160 disposed on the first protective structure 134a, which can effectively increase the Light efficiency.

Since the first protection structure 132a can cover at least part of the first surface S11 of the first semiconductor element 122a away from the substrate 110, and the first protection structure 134a can cover at least part of the first surface S12 of the first semiconductor element 124a away from the substrate 110, it can effectively The cracks generated on the first semiconductor element 122a and the first semiconductor element 124a due to stress or impact during the cutting or bonding process are greatly reduced. Alternatively, the first protection structure 132a and the first protection structure 134a can reduce the corrosion of the first semiconductor device 122a and/or the first semiconductor device 124a by water and oxygen, so as to improve the quality of the first semiconductor device 122a and/or the first semiconductor device 124a. Similarly, the first protection structure 134a may further cover at least part of the second surface S13 of the second semiconductor element 126a away from the substrate 110, or cover at least part of the third surface S14 of the third semiconductor element 128a away from the substrate 110, thereby achieving the above the advantages described. In some embodiments, the first protection structure 132g may be located between the plurality of pads 123a of the first semiconductor device 122a.

It should be noted here that the following embodiments use the component numbers and partial content of the previous embodiments, wherein the same numbers are used to denote the same or similar components, and descriptions of the same technical content are omitted. For the description of omitted parts, reference may be made to the foregoing embodiments, and the following embodiments will not be repeated.

FIG. 2 is a schematic diagram of an electronic device according to another embodiment of the present disclosure. Please refer to FIG. 1A and FIG. 2 at the same time. In this embodiment, the electronic device 100b is similar to the electronic device 100a in FIG. , the second semiconductor element 126 a and the third semiconductor element 128 a may be located on the same side of the substrate 110 , for example. The first semiconductor element 122b can control the first semiconductor element 124a , the second semiconductor element 126a and/or the third semiconductor element 128a through the circuit layer 115 . The first protection structure 130b covers at least part of the first surface S21 of the first semiconductor element 122b, which can effectively reduce the expansion of cracks generated on the first semiconductor element 122b due to stress or impact during the cutting or bonding process, and can also The corrosion of the first semiconductor element 122b by water and oxygen is reduced. In addition, in some embodiments (as shown in FIG. 2 ), the first protection structure 134 a in FIG. 1A can be selectively omitted or retained.

FIG. 3 is a schematic cross-sectional view of a first semiconductor device according to another embodiment of the present disclosure. Please refer to FIG. 1C and FIG. 3 at the same time. The difference between them is that the electronic device 100c of this embodiment does not have the partition wall structure 150 in FIG. 1C . The first protection structure 130c can be disposed between the substrate 110 and the first semiconductor device 122c. The first protection structure 130c can cover the pads 123c, the material layer 140, the surrounding surface of the carrier 125c and/or the surrounding surface of the buffer layer 129c, and extend to cover at least part of the first surface S31, which can be reduced during the cutting or bonding process. Cracks generated on the first semiconductor element 122c due to stress or impact are enlarged, and at the same time, water and oxygen can be reduced from corroding the first semiconductor element 122c.

FIG. 4A is a schematic side view of an electronic device according to another embodiment of the present disclosure. FIG. 4B is a schematic top view of the electronic device of FIG. 4A . Please refer to FIG. 1A, FIG. 4A and FIG. 4B at the same time. In this embodiment, the electronic device 100d is similar to the electronic device 100a in FIG. A second semiconductor element 126d of a semiconductor element 124d is electrically connected to the substrate 110 by way of bonding wires L. Referring to FIG. That is to say, the first semiconductor element 124d and the second semiconductor element 126d can be firstly fixed to the substrate 110 by an adhesive (such as glue), and then electrically connected to the substrate 110 by bonding wires L. The first semiconductor element 124d and the second semiconductor element 126d can be, for example, integrated circuits or light emitting diodes, and the material of the wires L can be, for example, gold or other suitable metal materials, but not limited thereto. The first protective structure 130d can cover at least part of the first surface S41 of the first semiconductor element 124d and/or the second surface S42 of the second semiconductor element 126d, thereby reducing damage caused by stress or impact during the cutting or bonding process. The enlargement of cracks generated on the first semiconductor element 124d and the second semiconductor element 126d may reduce the corrosion of the first semiconductor element 124d and the second semiconductor element 126d by water and oxygen. In one embodiment, in the first direction X (eg, perpendicular to the normal direction of the substrate 110 ), the width W1 of the portion of the first protection structure 130d on the first surface S41 is the same as the width W2 of the first semiconductor element 124d The ratio of may be, for example, 0.2 to 0.4 (ie, 0.2≦W1/W2≦0.4), but is not limited thereto.

In one embodiment, in the first direction X (for example, perpendicular to the normal direction of the substrate 110), the width W3 of the portion of the first protection structure 130d located on the second surface S42 is the width W4 of the second semiconductor element 126d The ratio may be, for example, 0.2 to 0.4 (ie, 0.2≦W3/W4≦0.4). Similarly, in one embodiment, in the first direction Y (eg, perpendicular to the normal direction of the substrate 110), the width W5 of the portion of the first protection structure 130d on the first surface S41 is the same as that of the first semiconductor element 124d The ratio of the width W6 may be, for example, 0.2 to 0.4 (ie, 0.2≦W5/W6≦0.4), but is not limited thereto. In one embodiment, in the first direction Y (for example, perpendicular to the normal direction of the substrate 110), the width W7 of the part of the first protection structure 130d on the second surface S42 is the width W8 of the second semiconductor element 126d The ratio may be, for example, 0.2 to 0.4 (ie, 0.2≦W7/W8≦0.4).

FIG. 5 is a schematic diagram of an electronic device according to another embodiment of the present disclosure. Please refer to FIG. 1A and FIG. 5 at the same time. In this embodiment, the electronic device 100e is similar to the electronic device 100a in FIG. Display, PID), but not limited to this. The electronic device 100e may include a second protection structure 170e, and the second protection structure 170e may cover at least part of the first protection structure 130e. As shown in FIG. 5 , the first semiconductor element 124 e , the second semiconductor element 126 e and/or the third semiconductor element 128 e may define one light emitting unit, and FIG. 5 shows two light emitting units, but not limited thereto. The two light emitting units can be respectively covered by the first protection structure 130e, which means that the first protection structure 130e can cover the first semiconductor element 124e, the second semiconductor element 126e and the third semiconductor element 128e in each light emitting unit, The second protection structure 170 e may, for example, simultaneously cover a plurality of light emitting units, or may, for example, simultaneously cover the first protection structure 130 e of a plurality of light emitting units and contact a part of the substrate 110 . In one embodiment, part of the first protection structure 130e may be located between any two of the first semiconductor device 124e, the second semiconductor device 126e and the third semiconductor device 128e. In one embodiment, part of the second protection structure 170e may be located between two adjacent first protection structures 130e. In one embodiment, the material of the first protection structure 130e and the material of the second protection structure 170e may include, for example, transparent silicone or epoxy resin, and the hardness of the second protection structure 170e may be, for example, harder than that of the first protection structure 130e. It should be hard to prevent external pressure, but it is not limited to this.

FIG. 6 is a schematic side view of an electronic device according to another embodiment of the present disclosure. Please refer to FIG. 1A and FIG. 6 at the same time. The electronic device 100f is similar to the electronic device 100a in FIG. disposed on the substrate 110 . The first protection structure 130f may include a first protection layer 132f and a second protection layer 134f. The first protective layer 130f can cover at least part of the side surface of the first semiconductor element 124f (or the second semiconductor element 126f), and the second protective layer 134f can cover the first protective layer 130f and the first semiconductor element 124f respectively. A surface S61 or the first surface S62 of the second semiconductor element 126f. The first protective layer 132f of the first protective structure 130f may contact or cover at least part of the side surface of the first semiconductor element 124f and/or the pad P, and the first protective layer 132f may contact or cover at least part of the second semiconductor element 126f The side surface and the pad P. In one embodiment, the first protection layer 132f may expose a portion of the side surface of the first semiconductor device 124f, or the first protection layer 132f may expose a portion of the side surface of the second semiconductor device 126f. In one embodiment, the second protection layer 134f of the first protection structure 130f may cover the first protection layer 132f, the side surface of the first semiconductor device 124f exposed by the first protection layer 132f and/or the first semiconductor device 124f The first surface S61 of . The second passivation layer 134f may cover the first passivation layer 132f, the side surface of the second semiconductor element 126f exposed by the first passivation layer 132f, and/or the second surface S62 of the second semiconductor element 126f. The first semiconductor element 124f and the second semiconductor element 126f can be respectively covered and protected by the first protection structure 130f. Here, the first protection structure 130f may expose a portion of the upper surface 112 of the substrate 110 . The first protective layer 132f can be made of a material with high hardness, and the second protective layer 134f can be made of a material with high water vapor or oxygen resistance, but not limited thereto.

FIG. 7 is a schematic side view of an electronic device according to another embodiment of the present disclosure. Please refer to FIG. 1A and FIG. 7 at the same time. In this embodiment, the electronic device 100g is similar to the electronic device 100f in FIG. For example, it is electrically connected to the substrate 110 by bonding wires L. FIG. The first protection structure 130g of the electronic device 100g of this embodiment may, for example, completely cover the side surface and the upper surface S71 of the first semiconductor element 124g. The first protection structure 130g can, for example, completely cover the side surface and the upper surface S72 of the second semiconductor device 126g. The first protection structure 130g can cover the bonding wires L further.

In addition, the second protection structure 170g can cover at least part of the first protection structure 130g. In addition, the first protection structure 130g and/or the second protection structure 170g may contact part of the substrate 110, and the first protection structure 130g and/or the second protection structure 170g may expose part of the upper surface 112 of the substrate 110, but not limited to this. That is to say, the first semiconductor element 124g and the second semiconductor element 126g can be covered and protected by the first protection structure 130g and the second protection structure 170g respectively. Here, the first protection structure 130g may be made of a material with high hardness, and the second protection structure 170g may be made of a material with high water and air resistance, but not limited thereto. In addition, the first protection structure 130g and/or the second protection structure 170g may have a curved upper surface.

FIG. 8 is a schematic side view of an electronic device according to another embodiment of the present disclosure. Please refer to FIG. 1A and FIG. 8 at the same time. In this embodiment, the electronic device 100h is similar to the electronic device 100a in FIG. The element 126h, but not limited thereto, that is, the second passivation layer 134h can cover a plurality of semiconductor elements. In some embodiments, the second protective layer 134h in the first protective structure 130h may, for example, be substantially flush with the sides of the substrate 110 . In other words, the second protection layer 134h in the first protection structure 130h may, for example, completely cover the upper surface of the substrate 110 . Here, the first protective layer 132h may be made of a material with high hardness, and the second protective layer 134h may be made of a material with high water and air resistance, but the invention is not limited thereto.

It is worth mentioning that when the first semiconductor element 124h and the second semiconductor element 126h are, for example, light-emitting diodes, the material of the second protective layer 134h may be a lens-like material, and the upper surface of the second protective layer 134h may be, for example, substantially flat. However, there may be some microstructures (not shown) designed to increase the light extraction efficiency of the electronic device 100h. Furthermore, if the electronic device is a spliced electronic device 100h, the second protective layer 134h may, for example, substantially fill up the splicing gap (not shown) of adjacent electronic devices, but not limited thereto. In addition, when the first semiconductor element 124h and the second semiconductor element 126h are, for example, integrated circuits, the shape of the first protective layer 132h may, for example, roughly follow the shape of the first semiconductor element 124h and/or the second semiconductor element due to no optical considerations. The shape of the 126h is undulating, and the shape of the second protection layer 134h may, for example, substantially follow the shape of the first protection layer 132h, but is not limited thereto.

FIG. 9 is a schematic side view of an electronic device according to another embodiment of the present disclosure. Please refer to FIG. 1A and FIG. 9 at the same time. In this embodiment, the electronic device 100i is similar to the electronic device 100g in FIG. Structure 130i. In some embodiments, the first protection structure 170i can expose part of the upper surface 112 of the substrate 110, the second protection structure 170i can be disposed on the substrate 110, and the second protection structure 170i can cover the first protection structure 170i and the first protection structure 170i. A portion of the upper surface 112 of the substrate 110 is exposed by the protection structure 170i. In some embodiments, the second protection structure 170i can cover multiple semiconductor devices (eg, the first semiconductor device 124i and the second semiconductor device 126i ) at the same time. That is to say, the first semiconductor element 124i and the second semiconductor element 126i are respectively covered and protected by the first protection structure 130i, and the respective first protection structures 130i are simultaneously covered and protected by the second protection structure 170g. Here, the first protection structure 130i can be made of a material with higher hardness, and the second protection structure 170i can be made of a material with high water and air resistance, but not limited thereto.

Based on the above, in the embodiments of the present disclosure, since the first protective structure covers at least part of the first surface of the first semiconductor element away from the substrate (or other semiconductor elements), it can effectively reduce the The crack (crack) produced on the first semiconductor element (or other semiconductor elements) due to stress or impact during the cutting or bonding process is enlarged, and it can also reduce the corrosion of the first semiconductor element (or other semiconductor elements) by water and oxygen, and The electronic device of the present disclosure has better structural reliability.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present invention, rather than limiting them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: It is still possible to modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the various embodiments of the present invention. scope.

Claims (10)

1. An electronic device, comprising:

a substrate;

the first semiconductor element is arranged on the substrate and is electrically connected with the substrate, and the first semiconductor element is provided with a first surface far away from the substrate; and

a first protective structure covering at least a portion of the first surface.

2. The electronic device of claim 1, wherein the first semiconductor element comprises a carrier, and a material of the carrier comprises glass or polyimide.

3. The electronic device of claim 1, wherein the first protection structure is disposed between the substrate and the first semiconductor element.

4. The electronic device of claim 3, further comprising:

and the material layer is arranged between the substrate and the first semiconductor element and is in contact with the first protection structure.

5. The electronic device of claim 1, further comprising:

a second protective structure covering at least a portion of the first protective structure.

6. The electronic device of claim 5, wherein the second protective structure contacts the substrate.

7. The electronic device of claim 1, further comprising:

a second semiconductor element adjacent to the first semiconductor element, wherein the second semiconductor element has a second surface remote from the substrate, and the first protection structure covers at least a portion of the second surface.

8. The electronic device of claim 7, further comprising:

a second protection structure disposed on the substrate, wherein the first protection structure exposes a portion of the upper surface of the substrate, and the second protection structure covers the first protection structure and the portion of the upper surface of the substrate exposed by the first protection structure.

9. The electronic device of claim 1, wherein the first protection structure comprises a first protection layer and a second protection layer, the first protection layer covers at least a portion of a side surface of the first semiconductor element, and the second protection layer covers the first protection layer and the first surface of the first semiconductor element.

10. The electronic device of claim 1, further comprising:

a partition wall structure surrounding the first protection structure.

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