CN115456186B - Sinusoidal and cosine signal generator and quantum computer control system - Google Patents

Abstract

The invention discloses a sine and cosine signal generator and a quantum computer control system. The sine and cosine signal generator comprises an address acquisition module and a second number of memories which are used for storing trigonometric function values of at least one quarter period, wherein the number of the trigonometric function values of one period is a first number; the address acquisition module is used for sequentially acquiring multiple paths of table-lookup addresses under the action of the working clock, respectively sending the multiple paths of table-lookup addresses into a second number of memories, wherein the table-lookup addresses of two adjacent paths at the same time differ by a preset phase increment, and the table-lookup addresses of two adjacent paths differ by a second number multiple of the preset phase increment; the memory is configured to output a current sine value and a current cosine value when a table lookup address is sent in, and a sine signal and a cosine signal of preset frequency are formed respectively; the preset phase increment is determined according to the preset frequency, the first quantity, the second quantity and the frequency of the working clock. The invention can generate sine and cosine signals with higher frequency in the FPGA, and can reduce resource consumption and cost.

Description

Sinusoidal and cosine signal generator and quantum computer control system

Technical Field

The present invention relates to the field of quantum computing, and in particular to a sine-cosine signal generator and a quantum computer control system.

Background technique

The main function of quantum computer control system is to control quantum computers, more specifically, quantum bits. The essence of controlling quantum bits is to apply various control signals to quantum bits, and most of the control signals are generated based on basic sine and cosine signals. Since the frequency of quantum bits is relatively high, the control signal needs to have a higher frequency, and the corresponding sine and cosine signals also need to have a higher frequency.

However, sine and cosine signals are generally generated by NCO (numerically controlled oscillator), which can be implemented in devices such as FPGA. The higher the frequency of the sine and cosine signal, the higher the sampling rate required, but the maximum operating frequency of most FPGAs is limited, so the frequency of the generated sine and cosine signals is relatively low. In order to increase the frequency of the sine and cosine signals, the existing practice is to generate lower-frequency sine and cosine signals in parallel through multiple FPGAs, and then synthesize the frequencies of these sine and cosine signals. However, this requires multiple FPGAs, which greatly increases resource consumption and costs.

Summary of the invention

The purpose of the present invention is to provide a sine-cosine signal generator, a memory and a quantum computer control system to solve the problem of low frequency of sine-cosine signals generated in FPGA in the prior art, and to generate higher frequency sine-cosine signals in FPGA.

To solve the above technical problems, the present invention provides a sine-cosine signal generator for FPGA, comprising an address acquisition module and a memory storing trigonometric function values of at least a quarter period, the number of trigonometric function values of one period is a first number, and the number of the memory is a second number;

The address acquisition module is used to sequentially acquire multiple table lookup addresses under the action of the working clock, and send them to the second number of memories respectively, the table lookup addresses of two adjacent paths at the same time differ by a preset phase increment, and the table lookup addresses of two adjacent paths on the same path differ by a second number multiple of the preset phase increment;

The memory is configured to output a current sine value and a current cosine value each time a table lookup address is input, so as to form a sine signal and a cosine signal of a preset frequency respectively;

The preset phase increment is determined according to the preset frequency, the first number, the second number and the frequency of the working clock.

Preferably, the trigonometric function values stored in the memory are sine values of at least a quarter period, cosine values of at least a quarter period, or sine values and cosine values of at least a quarter period.

Preferably, the memory is configured to check whether the current lookup address has a corresponding sine value or cosine value stored therein each time a lookup address is input; and when the corresponding sine value or cosine value is stored therein, output the stored current sine value and current cosine value to form a sine signal and a cosine signal of a preset frequency, respectively; and when the corresponding sine value or cosine value is not stored therein, calculate the corresponding sine value or cosine value according to the periodicity of the sine value or cosine value, output the calculated current sine value and current cosine value to form a sine signal and a cosine signal of a preset frequency, respectively.

Preferably, the memory provides a lookup table, the lookup table stores a quarter-cycle sine value, and the number of lookup address bits of the lookup table is a first number A, wherein 2 ^A is equal to the first number.

Preferably, the preset phase increment is:

Among them, N represents the first number, c represents the second number, f _out represents the preset frequency, f _S represents the frequency of the working clock, and Round() represents a rounding function.

Preferably, the sinusoidal signal is:

The cosine signal is:

Where n*PINC represents the value of the table lookup address sent to the memory, the value range of n is [0, 2 ^A -1], a represents the amplitude, represents the initial phase, and b represents the offset.

Preferably, the current sine value output by the memory is:

The current cosine value output by the memory is:

Wherein, m represents the value of the lookup address of the lookup table, and its value range is [0, 2 ^A -1].

Preferably, the sine signal and the cosine signal have the same amplitude, initial phase and offset.

Preferably, the address acquisition module includes a frequency word unit and a phase accumulator corresponding one-to-one to the second number of memories;

The frequency word unit is used to obtain multiple frequency words and send them to a second number of phase accumulators respectively, wherein the frequency words are a second number of multiples of a preset phase increment;

The phase accumulator is used to continuously accumulate the table lookup address in steps of the frequency word under the action of the working clock, and send it to the corresponding memory, wherein the table lookup addresses obtained by two adjacent phase accumulators at the same time differ by a preset phase increment.

In order to solve the above technical problems, the present invention also provides a quantum computer control system, comprising any one of the aforementioned sine and cosine signal generators.

Different from the prior art, the sine-cosine signal generator provided by the present invention sets a second number of memories, each memory stores at least a quarter period of trigonometric function values, and the memories are configured to output the current sine value and the current cosine value each time a lookup table address is input, so as to form a sine signal and a cosine signal of a preset frequency respectively, and the lookup table addresses of two adjacent paths at the same time differ by a preset phase increment, and the two adjacent lookup table addresses of the same path differ by a second number of multiples of the preset phase increment. Since the product of the frequency of the working clock and the second number is equivalent to the sampling frequency, according to the Nyquist sampling theorem, the preset frequency can theoretically reach half of the sampling frequency, so that a higher frequency sine-cosine signal can be generated in the FPGA, which can reduce resource consumption and cost.

The quantum computer control system provided by the present invention belongs to the same inventive concept as the sine-cosine signal generator, and therefore has the same beneficial effects, which will not be described in detail here.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of the structure of a sine-cosine signal generator provided in a first embodiment of the present invention.

FIG. 2 is a schematic diagram of the data structure of a lookup table provided by a memory of the sine-cosine signal generator in the first embodiment.

FIG3 is a schematic diagram of the structure of an address acquisition module of a sine-cosine signal generator provided in a second embodiment of the present invention.

Detailed ways

The specific implementation of the present invention will be described in more detail below in conjunction with the schematic diagram. The advantages and features of the present invention will become clearer from the following description and claims. It should be noted that the drawings are all in a very simplified form and are not in exact proportions, and are only used to facilitate and clearly assist in explaining the purpose of the embodiments of the present invention.

In the description of the present invention, it is necessary to understand that the terms "center", "up", "down", "left", "right", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the present invention.

In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

Please refer to Fig. 1, a first embodiment of the present invention provides a sine-cosine signal generator, which is used in FPGA and can generate a sine-cosine signal with a higher frequency in the FPGA. The sine-cosine signal generator includes an address acquisition module 10 and a memory 20 storing at least a quarter of a period of trigonometric function values, the number of trigonometric function values in one period is a first number, and the number of the memory 20 is a second number.

The address acquisition module 10 is used to sequentially acquire multiple lookup table addresses under the action of the working clock, and send them to the second number of memories 20 respectively. The lookup table addresses of two adjacent paths at the same time differ by a preset phase increment, and the lookup table addresses of two adjacent paths on the same path differ by a second number of multiples of the preset phase increment. If the preset phase increment is represented by PINC, the second number is represented by c, and the lookup table addresses of two adjacent paths at the same time differ by PINC, the smallest of the lookup table addresses acquired for the first time is preferably 0, and the lookup table addresses of the other paths are 1*PINC, 2*PINC, 3*PINC, 4*PINC, ..., respectively, and the lookup table addresses of two adjacent paths on the same path differ by c*PINC, for example, the lookup table addresses of the first path are 0, c*PINC, 2c*PINC, 3c*PINC, ..., respectively.

The memory 20 is configured to output the current sine value and the current cosine value each time a table lookup address is input, so as to form a sine signal and a cosine signal of a preset frequency respectively. The preset phase increment is determined according to the preset frequency, the first quantity, the second quantity and the frequency of the working clock.

The lookup table address corresponding to each trigonometric function value stored in the memory 20 increases by PINC from 0. For a certain memory 20, for example, the memory 20 corresponding to the first lookup table address, the lookup table addresses it receives are 0, c*PINC, 2c*PINC, 3c*PINC, ..., then the phases of the sine signal and cosine signal finally outputted increase by c*PINC, and the phase difference of the sine signal and cosine signal outputted by two adjacent memories 20 is PINC.

The preset frequency, the first number, the second number and the frequency of the working clock are set according to actual needs. The first number is the total number of trigonometric function values of a period, and the memory 20 needs to store at least the first quarter of the trigonometric function values of the first number. The frequency of the working clock should not exceed the maximum operating frequency of the FPGA. The frequency of the working clock and the value of the second number are related to the sampling rate, and the product of the two is equivalent to the sampling rate. For example, when the sampling rate is 1.6GHz, the frequency of the working clock is set to 200MHz, then the second number is 8, that is, 8 memories 20 are required. The sampling rate is determined by the control requirements of the quantum bit. According to the Nyquist sampling theorem, the ratio of the preset frequency to the sampling frequency is at most 1:2, that is, the preset frequency can theoretically reach 800MHz, thereby realizing a higher frequency sine and cosine signal in the FPGA.

Since trigonometric functions are periodic, as long as the trigonometric function values of the first quarter period are known, the trigonometric function values of the last three quarter periods can be calculated according to the periodicity. In this embodiment, the trigonometric function values stored in the memory 20 are the sine values of at least a quarter period, the cosine values of at least a quarter period, or the sine values and cosine values of at least a quarter period.

Furthermore, the memory 20 is configured to check whether the corresponding sine value or cosine value is stored in the current table lookup address each time a table lookup address is input, and when the corresponding sine value or cosine value is stored, output the stored current sine value and current cosine value to form a sine signal and a cosine signal of a preset frequency respectively, and when the corresponding sine value or cosine value is not stored, calculate the corresponding sine value or cosine value according to the periodicity of the sine value or cosine value, output the calculated current sine value and current cosine value to form a sine signal and a cosine signal of a preset frequency respectively.

If the memory 20 stores a period of sine values and a period of cosine values, and the number of sine values and cosine values is the first number, then each lookup address stores a corresponding sine value or cosine value, and the stored current sine value and current cosine value can be directly output. If the memory 20 only stores less than one period of sine values and/or less than one period of cosine values, then there are some lookup addresses that do not have corresponding sine values or cosine values. In this case, the sine values and cosine values corresponding to these lookup addresses can be calculated based on the periodicity of the sine values or cosine values combined with the stored sine values and/or cosine values.

Please refer to FIG. 2 , the memory 20 provides a lookup table LUT, the lookup table LUT stores a quarter period of sine value, and the number of lookup table address bits of the lookup table LUT is the first number A, where 2 ^A is equal to the first number. Only the data bits corresponding to the first 2 ^A /4 lookup table addresses respectively store sine values, and the data bits corresponding to the remaining lookup table addresses are empty.

In this embodiment, the preset phase increment is:

Wherein, N represents the first quantity, c represents the second quantity, f _out represents the preset frequency, f _S represents the frequency of the working clock, and Round() represents the rounding function.

Furthermore, the sinusoidal signal is:

The cosine signal is:

Where n*PINC represents the value of the table lookup address, the value range of n is [0, 2 ^A -1], and a represents the amplitude. represents the initial phase, and b represents the offset.

The current sine value output by memory 20 is:

The current cosine value output by memory 20 is:

Wherein, m represents the value of the lookup address of the lookup table, and its value range is [0, 2 ^A -1].

In order to facilitate signal processing, in this embodiment, the amplitude, initial phase and offset of the sine signal and the cosine signal are the same. For ease of understanding, a is 1, and b are 0.

As can be seen from Figure 2, the sine values stored in the first 2 ^A /4 data bits of the lookup table LUT are sin(0*2π/N), sin(1*2π/N), sin(2*2π/N), sin(3*2π/N), ..., The data stored in the remaining data bits is NULL, indicating that it is empty. It can be seen that each sine value stored in the lookup table LUT is related to the lookup table address of the lookup table. If the lookup table address is m, the sine value is sin(m*2π/N).

Then, through the periodicity of the sine function, the sine values corresponding to the remaining search addresses can be calculated as follows: ..., sin[(N-2)*2π/N], sin[(N-1)*2π/N].

Similarly, the cosine value can also be calculated based on the periodicity of the sine value.

Assuming the second number is 8, the process of generating a sine signal is as follows:

The lookup table addresses sent to the first memory 20 are 0*PINC, 8*PINC, 16*PINC, ... in sequence, and the lookup table addresses equal to 0*PINC, 8*PINC, 16*PINC, ... in the lookup table LUT are 0*PINC, 8*PINC, 16*PINC, ... in sequence, then the sinusoidal signals output by the first memory 20 are sin(0*2π*PINC/N), sin(8*2π*PINC/N), sin(16*2π*PINC/N), ...;

The lookup table addresses sent to the second memory 20 are 1*PINC, 9*PINC, 17*PINC, ... in sequence, and the lookup table addresses equal to 1*PINC, 9*PINC, 17*PINC, ... in the lookup table LUT are 1*PINC, 9*PINC, 17*PINC, ... in sequence, then the sinusoidal signals output by the second memory 20 are sin(1*2π*PINC/N), sin(9*2π*PINC/N), sin(17*2π*PINC/N), ...;

The lookup table addresses sent to the third memory 20 are 2*PINC, 10*PINC, 18*PINC, ... in sequence, and the lookup table addresses equal to 2*PINC, 10*PINC, 18*PINC, ... in the lookup table LUT are 2*PINC, 10*PINC, 18*PINC, ... in sequence, then the sinusoidal signals output by the third memory 20 are sin(2*2π*PINC/N), sin(10*2π*PINC/N), sin(18*2π*PINC/N), ...;

By analogy, the lookup addresses sent to the eighth memory 20 are 7*PINC, 15*PINC, 23*PINC, ..., and the lookup addresses equal to 7*PINC, 15*PINC, 23*PINC, ... in the lookup table LUT are 7*PINC, 15*PINC, 23*PINC, ..., then the sinusoidal signals output by the eighth memory 20 are sin(7*2π*PINC/N), sin(15*2π*PINC/N), sin(23*2π*PINC/N), ...

It can be seen that the phase of the sinusoidal signal output by the eight memories 20 increases by PINC each time, and the phase of the sinusoidal signal output by the same memory 20 increases by 8*PINC.

It should be noted that if the lookup address sent to the memory 20 exceeds the maximum value of the lookup address of the lookup table, the lookup address addressed by the memory 20 in the lookup table LUT is the modulo result of the lookup address sent to the memory 20 and the first number N.

Similarly, the eight memories 20 output cosine signals according to the above process. The cosine signals output by the first memory 20 are cos(0*2π*PINC/N), cos(8*2π*PINC/N), cos(16*2π*PINC/N), ...; the cosine signals output by the second memory 20 are cos(1*2π*PINC/N), cos(9*2π*PINC/N), cos(17*2π*PINC/N), ...; the cosine signals output by the third memory 20 are cos(2*2π*PINC/N), cos(10*2π*PINC/N), cos(18*2π*PINC/N), ...; ...; the cosine signals output by the eighth memory 20 are cos(7*2π*PINC/N), cos(15*2π*PINC/N), cos(23*2π*PINC/N), ....

Please refer to Figure 3. The second embodiment of the present invention provides a sine-cosine signal generator. The sine-cosine signal generator of this embodiment includes all the technical features of the first embodiment. On the basis of the first embodiment, the address acquisition module 10 includes a frequency word unit 11 and a phase accumulator 12 corresponding to the second number of memories 20.

The frequency word unit 11 is used to obtain multiple frequency words and send them to the second number of phase accumulators 12 respectively. The frequency words are second number multiples of the preset phase increment. The frequency words can be input from the outside or pre-stored or automatically generated by the frequency word unit 11.

The phase accumulator 12 is used to continuously accumulate the lookup address with the frequency word as the step under the action of the working clock, and send it to the corresponding memory 20, wherein the lookup address obtained by two adjacent phase accumulators 12 at the same time differs by a preset phase increment. Wherein, assuming that the preset phase increment is PINC, and the second number is 8, taking the first phase accumulator 12 as an example, when the phase accumulator 12 receives the first frequency word, it outputs a lookup address 0*PINC, and then accumulates 0*PINC and the frequency word to obtain the second lookup address 8*PINC, and continues to accumulate 8*PINC and the frequency word to obtain the third lookup address 16*PINC. In other words, each time the lookup address output by the phase accumulator 12 is accumulated with the frequency word as the lookup address outputted next time.

Through the above method, the sine and cosine signal generator of the embodiment of the present invention sets a second number of memories, each memory stores at least a quarter period of trigonometric function values, and the memory is configured to output the current sine value and the current cosine value each time a lookup table address is input, so as to form a sine signal and a cosine signal of a preset frequency respectively, and the lookup table addresses of two adjacent paths at the same time differ by a preset phase increment, and the two adjacent lookup table addresses of the same path differ by a second number of multiples of the preset phase increment. Since the product of the frequency of the working clock and the second number is equivalent to the sampling frequency, according to the Nyquist sampling theorem, the preset frequency can theoretically reach half of the sampling frequency, so that a higher frequency sine and cosine signal can be generated in the FPGA, which can reduce resource consumption and cost.

An embodiment of the present invention further provides a quantum computer control system, which includes the sine-cosine signal generator of the first embodiment or the second embodiment.

It should be noted that, in addition to being applied to quantum computer control systems, the sine and cosine generators provided in the aforementioned embodiments are also applicable to any other application scenarios that require sine and cosine signal generation, and the present invention is not limited to this.

In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example" or "specific example" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification.

The above is only a preferred embodiment of the present invention and does not limit the present invention in any way. Any technician in the relevant technical field, without departing from the scope of the technical solution of the present invention, makes any form of equivalent replacement or modification to the technical solution and technical content disclosed in the present invention, which does not depart from the content of the technical solution of the present invention and still falls within the protection scope of the present invention.

Claims (10)

1. A sine-cosine signal generator for FPGA, characterized in that it comprises an address acquisition module and a memory storing at least a quarter of a cycle of trigonometric function values, the number of trigonometric function values in one cycle is a first number, and the number of the memory is a second number; The address acquisition module is used to sequentially acquire multiple table lookup addresses under the action of the working clock, and send them to the second number of memories respectively, the table lookup addresses of two adjacent paths at the same time differ by a preset phase increment, and the table lookup addresses of two adjacent paths on the same path differ by a second number multiple of the preset phase increment; The memory is configured to output a current sine value and a current cosine value each time a table lookup address is input, so as to form a sine signal and a cosine signal of a preset frequency respectively; The preset phase increment is determined according to the product of the ratio of the preset frequency to the frequency of the working clock and the ratio of the first number to the second number. 2. The sine-cosine signal generator according to claim 1, characterized in that the trigonometric function values stored in the memory are sine values of at least a quarter period, cosine values of at least a quarter period, or sine values and cosine values of at least a quarter period. 3. The sine-cosine signal generator according to claim 2 is characterized in that the memory is configured to check whether the current table lookup address stores the corresponding sine value or cosine value each time a table lookup address is input, and when the corresponding sine value or cosine value is stored, output the stored current sine value and current cosine value to form a sine signal and a cosine signal of a preset frequency respectively, and when the corresponding sine value or cosine value is not stored, calculate the corresponding sine value or cosine value according to the periodicity of the sine value or cosine value, output the calculated current sine value and current cosine value to form a sine signal and a cosine signal of a preset frequency respectively. 4. The sine-cosine signal generator according to claim 3, characterized in that the memory provides a lookup table, the lookup table stores a quarter-cycle of sine values, and the number of lookup address bits of the lookup table is a first number A, wherein 2 ^A is equal to the first number. 5. The sine-cosine signal generator according to claim 4, characterized in that the preset phase increment is: Wherein, N represents the first number, c represents the second number, represents the preset frequency, /> represents the frequency of the working clock, /> Represents the rounding function. 6. The sine-cosine signal generator according to claim 5, characterized in that the sine signal is: The cosine signal is: in, represents the value of the table lookup address sent to the memory, the value range of n is [0, 2 ^A -1], a represents the amplitude, represents the initial phase, and b represents the offset. 7. The sine-cosine signal generator according to claim 6, wherein the current sine value output by the memory is: The current cosine value output by the memory is: Wherein, m represents the value of the lookup address of the lookup table, and its value range is [0, 2 ^A -1]. 8 . The sine-cosine signal generator according to claim 7 , wherein the sine signal and the cosine signal have the same amplitude, initial phase and offset. 9. The sine-cosine signal generator according to claim 1, characterized in that the address acquisition module comprises a frequency word unit and a phase accumulator corresponding one-to-one to the second number of memories; The frequency word unit is used to obtain multiple frequency words and send them to a second number of phase accumulators respectively, wherein the frequency words are a second number of multiples of a preset phase increment; The phase accumulator is used to continuously accumulate the table lookup address in steps of the frequency word under the action of the working clock, and send it to the corresponding memory, wherein the table lookup addresses obtained by two adjacent phase accumulators at the same time differ by a preset phase increment. 10. A quantum computer control system, characterized by comprising the sine-cosine signal generator according to any one of claims 1 to 9.