CN115453404A - Power supply voltage difference detection circuit, chip, electronic component and electronic equipment - Google Patents

Abstract

The application provides a mains voltage difference detection circuitry, chip, electronic parts and electronic equipment, mains voltage difference detection circuitry includes: the first follower circuit is connected with the first power supply and used for scaling a first voltage output by the first power supply according to a first coefficient to obtain a first target voltage; the second follower circuit is connected with the second power supply and used for scaling a second voltage output by the second power supply according to a second coefficient to obtain a second target voltage; and the first detection circuit is respectively connected with the signal output end of the first following circuit and the signal output end of the second following circuit and is used for outputting a first signal representing voltage difference abnormity when the absolute value of the difference value between the first target voltage and the second target voltage does not meet the preset threshold condition. The application can realize the detection of whether the pressure difference between different power supplies is normal or not, and makes up the defect that the conventional POR circuit can only detect whether the voltage of a single power supply is normal or not.

Description

Power supply voltage difference detection circuit, chip, electronic component and electronic equipment

technical field

The present application relates to the field of integrated circuits, in particular, to a power supply voltage difference detection circuit, a chip, electronic components and electronic equipment.

Background technique

With the improvement of process technology and the improvement of chip integration, a large number of different functional modules are integrated in one chip. The operating speed and power consumption requirements of these different modules are not consistent. power consumption, the power supply requirements of the chip are getting higher and higher, and the power supply has changed from a single power supply to a multi-power supply, and the power supply sequence between the power supplies has also changed from common power supply to sequential power supply. In order to ensure the normal operation of each module of the chip and avoid damage to the chip, the designer needs to ensure the power-on sequence between power supplies and the power-on interval between power supplies.

In the current chip design, a POR (Power On Reset, power-on reset) circuit is usually used to manage the power supply, and its function is shown in FIG. 1 . When the power supply voltage VDD rises to a certain voltage value (VPOR), the POR starts counting, and the POR ends the reset state (the PowerOK signal changes to VDD) after waiting T0 for a long time. The time T0 is the time required for the power supply to establish stability. If the power supply voltage drops below VPOR during the waiting T0 time, the POR will remain in the reset state (that is, the PowerOK signal will remain low), and will be re-detected until the next voltage rise. After the power supply is normal, in order to prevent the power supply voltage from being reset when the power supply voltage drops unexpectedly for a short period of time, which will cause system failure, POR generally sets a hysteresis voltage and a filter to filter out the corresponding pulses, unless the power supply voltage drops below VPOR and lasts longer than After T1, the POR outputs a reset signal (that is, the PowerOK signal becomes low level).

In some applications, multiple POR circuits will be placed in the chip to detect the power supply status of different power supply voltages respectively, so as to prevent the abnormal status of the working status.

However, POR can only detect the voltage of a single power supply. In a multi-power supply system, when the power supply of each power supply is higher than the VPOR of its corresponding POR, each POR ends the reset state, indicating that the system can work normally, but for the power supply The voltage difference sensitive module may be abnormal due to the excessive or small voltage difference between the power supplies. For this abnormality, the POR circuit cannot detect it.

Contents of the invention

The purpose of the embodiments of the present application is to provide a power supply voltage difference detection circuit, a chip, an electronic component, and an electronic device to solve the above problems.

An embodiment of the present application provides a unidirectional power supply voltage difference detection circuit, including: a first follower circuit, connected to the first power supply, for scaling the first voltage output by the first power supply according to a first coefficient, to obtain The first target voltage; the second follower circuit, connected to the second power supply, used to scale the second voltage output by the second power supply according to the second coefficient to obtain the second target voltage; between the first power supply and the second power supply When the second power supply is normal, the first target voltage and the second target voltage are in common mode; the first detection circuit is connected with the signal output terminal of the first follower circuit and the signal output terminal of the second follower circuit respectively The terminal is connected, and is used for outputting a first signal representing an abnormal voltage difference when the absolute value of the difference between the first target voltage and the second target voltage does not satisfy a preset threshold condition. When the absolute value of the difference between the first target voltage and the second target voltage satisfies a preset threshold condition, a second signal indicating that the voltage difference is normal is output.

In the above implementation process, the first voltage of the first power supply and the second voltage of the second power supply are converted into a common mode voltage through the first follower circuit and the second follower circuit, so that there is a voltage between the first power supply and the second power supply Comparability, and then compare the absolute value of the difference between the converted first target voltage and the second target voltage with the preset threshold condition, so that engineers only need to reasonably design the threshold condition according to the design requirements of the chip, that is It can detect whether the voltage difference between the first power supply and the second power supply is normal, and can realize the abnormal detection caused by the voltage difference between the power supplies being too large or too small for the sensitive module of the power supply voltage difference, which makes up for the existing The POR circuit can only detect whether the voltage of a single power supply is normal or not.

Further, the first detection circuit is specifically configured to: when the absolute value of the difference between the first target voltage and the second target voltage is greater than a preset first threshold voltage, the output characteristic voltage difference is always When the absolute value of the difference between the first target voltage and the second target voltage is less than or equal to the first threshold voltage, a second signal indicating that the voltage difference is normal is output.

Through the above implementation manner, the detection of excessive voltage difference can be realized. Once the absolute value of the difference between the first target voltage and the second target voltage is greater than the preset first threshold voltage, a first signal indicating that the voltage difference is abnormal is output.

Further, the first detection circuit is specifically configured to: when the absolute value of the difference between the first target voltage and the second target voltage is less than a preset second threshold voltage, the output characteristic voltage difference is always When the absolute value of the difference between the first target voltage and the second target voltage is greater than or equal to the second threshold voltage, a second signal indicating that the voltage difference is normal is output.

Through the above implementation manner, the detection of too small voltage difference can be realized. Once the absolute value of the difference between the first target voltage and the second target voltage is greater than the preset first threshold voltage, a first signal indicating that the voltage difference is abnormal is output.

Further, the first follower circuit includes: a plurality of first resistive elements connected in series between the first power supply and ground; the signal output terminals of the first follower circuit are set at the two first between a resistive element to divide the plurality of first resistive elements into two parts; wherein: between the total resistance value of the first target part and the total resistance value of the plurality of first resistive elements The ratio of is equal to the first coefficient; the first target portion is formed by each of the first resistive elements located between the output terminal of the first follower circuit and ground.

In the above implementation manner, the division of the first voltage can be realized through a plurality of first resistive elements, so that only the position of the output terminal of the first follower circuit and the resistance value of each first resistive element need to be designed according to the requirements, namely The required first coefficient can be easily realized on the circuit. The foregoing manner realizes a simple structure and facilitates deployment on a chip.

Further, the second follower circuit includes: a plurality of second resistive elements connected in series between the second power supply and ground; the signal output terminals of the second follower circuit are set at the two first between two resistive elements to divide the plurality of second resistive elements into two parts; wherein: between the total resistance value of the second target part and the total resistance value of the plurality of second resistive elements The ratio of is equal to the second coefficient; the second target portion is formed by each of the second resistive elements located between the output terminal of the second follower circuit and ground.

In the above implementation manner, the second voltage can be divided by a plurality of second resistive elements, so that only the position of the output terminal of the second follower circuit and the resistance value of each second resistive element need to be designed according to the requirements, namely The required second coefficient can be easily implemented on the circuit. The foregoing manner realizes a simple structure and facilitates deployment on a chip.

The embodiment of the present application also provides a bidirectional power supply voltage difference detection circuit, including: two aforementioned unidirectional power supply voltage difference detection circuits; connected to the output terminal of any one of the unidirectional power supply voltage difference detection circuits outputting the first signal representing the abnormal voltage difference, outputting the first signal, and outputting the first signal when both of the unidirectional power supply voltage difference detection circuits are output When representing a second signal with a normal voltage difference, outputting the second signal; wherein:

The first detection circuit of the first unidirectional power supply voltage difference detection circuit is configured to, when the absolute value of the difference between the first target voltage and the second target voltage is greater than a preset first threshold voltage, outputting the first signal, and outputting the second signal when the absolute value of the difference between the first target voltage and the second target voltage is less than or equal to the first threshold voltage;

The first detection circuit of the second unidirectional power supply voltage difference detection circuit is configured to, when the absolute value of the difference between the first target voltage and the second target voltage is less than a preset second threshold voltage, outputting the first signal, and outputting the second signal when the absolute value of the difference between the first target voltage and the second target voltage is greater than or equal to the second threshold voltage;

The second threshold voltage is less than the first threshold voltage.

In the above implementation structure, two unidirectional power supply voltage difference detection circuits are used to detect the excessive voltage difference and the small voltage difference respectively. Through the function of the first arbitration circuit, any unidirectional power supply voltage difference detection circuit detects When an abnormality occurs, a signal representing the abnormality will be output, so as to achieve the effect of two-way detection.

The embodiment of the present application also provides a unidirectional power supply voltage difference detection circuit, including:

The third follower circuit is connected to the third power supply, and is used to scale the third voltage output by the third power supply according to the third coefficient to obtain the third target voltage; the second detection circuit, the power supply terminal is connected to the fourth power supply, The signal input terminal is connected to the output terminal of the third follower circuit, and is used to output a characteristic voltage difference when the preset threshold condition is not satisfied between the third target voltage and the threshold voltage of the second detection circuit. When a preset threshold condition is satisfied between the third target voltage and the threshold voltage of the second detection circuit, a second signal representing a normal voltage difference is output; wherein:

The threshold voltage of the second detection circuit includes a third threshold voltage V+ and a fourth threshold voltage V-; the V+ is equal to the fourth voltage x1 times, and the V- is equal to the fourth voltage x2 times; the x1 is greater than The x2, and the fourth voltage is the voltage output by the fourth power supply; the third target voltage is in common mode with the median voltage of the second detection circuit, and the median voltage of the second detection circuit It is equal to the product of (x1+x2)/2 and the fourth voltage.

In the above implementation, through the function of the third follower circuit, the voltage of the third power supply can be adjusted to a common mode with the second detection circuit, and since the two threshold voltages of the second detection circuit follow the fourth voltage of the fourth power supply change, so that the detection of whether the voltage difference is normal can be realized based on the two threshold voltages of the second detection circuit. Therefore, engineers only need to reasonably design the threshold conditions according to the design requirements of the chip to realize whether the voltage difference between the third power supply and the fourth power supply is normal. The abnormal detection caused by too large or too small makes up for the deficiency that the existing POR circuit can only detect whether the voltage of a single power supply is normal. In addition, in the above implementation, by using V+ and V- with a certain difference, it is possible to avoid the second detection circuit frequently switching between the first signal and the second signal due to the glitches in the voltage signal itself, resulting in misjudgment .

Further, the second detection circuit is specifically configured to: when the third target voltage is greater than the V+, output a first signal representing an abnormal voltage difference; when the third target voltage is less than the V-, A second signal representing normal voltage difference is output.

Through the above implementation manner, the detection of excessive voltage difference can be realized. Once the voltage difference between the third power supply and the fourth power supply exceeds the design range, a first signal representing abnormal voltage difference will be output. In addition, in the above implementation, by using V+ and V- with a certain difference, when the third target voltage is less than V-, the second signal representing the normal voltage difference is output, so that the voltage signal itself can be avoided. The glitch causes the second detection circuit to frequently switch between the first signal and the second signal, resulting in misjudgment.

Further, the second detection circuit is specifically configured to: when the third target voltage is less than the V-, output a first signal representing an abnormal voltage difference; when the third target voltage is greater than the V+, A second signal representing normal voltage difference is output.

Through the above implementation manner, the detection of too small voltage difference can be realized. Once the voltage difference between the third power supply and the fourth power supply does not reach the design range, a first signal representing abnormal voltage difference will be output. In addition, in the above implementation, by using V+ and V- with a certain difference, when the third target voltage is greater than V+, the second signal representing the normal voltage difference is output, so that the glitch caused by the voltage signal itself can be avoided. As a result, the second detection circuit frequently switches between the first signal and the second signal, resulting in misjudgment.

Further, the third follower circuit includes: a plurality of third resistive elements connected in series between the third power supply and ground; the signal output terminals of the third follower circuit are set at the two first between the three resistive elements to divide the plurality of third resistive elements into two parts;

Wherein: the ratio between the total resistance value of the third target part and the total resistance value of the plurality of third resistive elements is equal to the third coefficient; the third target part is composed of the third follower circuit located in Each of said third resistive elements between the output terminal and ground constitutes.

In the above implementation manner, the division of the third voltage can be realized through a plurality of third resistive elements, so that only the position of the output terminal of the third follower circuit and the resistance value of each third resistive element need to be designed according to the requirements, namely The required third coefficient can be easily implemented on the circuit. The foregoing manner realizes a simple structure and facilitates deployment on a chip.

Further, the unidirectional power supply voltage difference detection circuit further includes: a buffer, the input end of which is connected to the output end of the second detection circuit.

In the above implementation manner, by connecting a buffer to the output end of the second detection circuit, the driving performance of the circuit can be enhanced through the buffer to ensure the stability of the final output first signal or second signal.

Further, the second detection circuit is a Schmitt trigger.

In the above implementation, due to the characteristics of the Schmitt trigger itself, it has two threshold voltages following the input signal at the power supply terminal, and can compare the input signal with the two thresholds, so the Schmitt trigger can be sampled As the second detection circuit, the circuit has a simple structure and is convenient for deployment in chips.

The embodiment of the present application also provides a bidirectional power supply voltage difference detection circuit, including: two aforementioned unidirectional power supply voltage difference detection circuits; connected to the output terminal of any one of the unidirectional power supply voltage difference detection circuits outputting the first signal representing the abnormal voltage difference, outputting the first signal, and outputting the first signal when both of the unidirectional power supply voltage difference detection circuits are output When representing a second signal with a normal voltage difference, outputting the second signal; wherein:

The second detection circuit of the first unidirectional power supply voltage difference detection circuit is used to output the first signal when the third target voltage is greater than V+ of the first unidirectional power supply voltage difference detection circuit, and outputting the second signal when the third target voltage is less than V- of the first unidirectional power supply voltage difference detection circuit;

The second detection circuit of the second unidirectional power supply voltage difference detection circuit is configured to output the first signal when the third target voltage is lower than V- of the second unidirectional power supply voltage difference detection circuit, outputting the second signal when the third target voltage is greater than V+ of the second unidirectional power supply voltage difference detection circuit;

V+ of the first unidirectional power supply voltage difference detection circuit is greater than V+ of the second unidirectional power supply voltage difference detection circuit, and V- of the first unidirectional power supply voltage difference detection circuit is greater than that of the first unidirectional power supply voltage difference detection circuit V- of the two unidirectional power supply voltage difference detection circuits.

In the above implementation structure, two unidirectional power supply voltage difference detection circuits are used to detect excessive voltage difference and too small voltage difference respectively. Through the function of the second arbitration circuit, any unidirectional power supply voltage difference detection circuit detects When an abnormality occurs, a signal representing the abnormality will be output, so that the effect of two-way detection can be achieved.

The embodiment of the present application also provides a chip, which includes any one of the aforementioned unidirectional power supply voltage difference detection circuits, or includes any of the aforementioned bidirectional power supply voltage difference detection circuits.

The embodiment of the present application also provides an electronic component, including the aforementioned chip.

The embodiment of the present application also provides an electronic device, including the aforementioned chip, or including the aforementioned electronic device.

Description of drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the accompanying drawings that need to be used in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application, so It should not be regarded as a limitation on the scope, and those skilled in the art can also obtain other related drawings according to these drawings without creative work.

FIG. 1 is a schematic diagram of signal timing when a POR circuit manages a power supply in the background technology;

FIG. 2 is a schematic structural diagram of a unidirectional power supply voltage difference detection circuit provided in Embodiment 1 of the present application;

FIG. 3 is a schematic structural diagram of a first follower circuit provided in an embodiment of the present application;

FIG. 4a is a schematic diagram of a first voltage signal and a second voltage signal provided in Embodiment 1 of the present application;

FIG. 4b is a schematic diagram of a first target voltage V1 and a second target voltage V2 provided by Embodiment 1 of the present application;

4c is a comparison diagram of the waveform relationship between a signal after the difference between V1 and V2 and the first threshold voltage VREF1 provided in Embodiment 1 of the present application, and a schematic diagram of the waveform of the output signal VO;

4d is a comparison diagram of the waveform relationship between another signal after the difference between V1 and V2 and the first threshold voltage VREF1 provided in Embodiment 1 of the present application, and a schematic diagram of the waveform of the output signal VO;

FIG. 5 is a schematic structural diagram of a bidirectional power supply voltage difference detection circuit provided in Embodiment 1 of the present application;

FIG. 6 is a schematic structural diagram of a unidirectional power supply voltage difference detection circuit provided in Embodiment 2 of the present application;

FIG. 7 is a schematic structural diagram of a specific unidirectional power supply voltage difference detection circuit provided in Embodiment 2 of the present application;

FIG. 8 is a schematic structural diagram of a more specific unidirectional power supply voltage difference detection circuit provided in Embodiment 2 of the present application;

FIG. 9a is a schematic diagram of a signal waveform provided in Embodiment 2 of the present application;

FIG. 9b is a schematic diagram of another signal waveform provided in Embodiment 2 of the present application;

FIG. 10 is a schematic structural diagram of a bidirectional power supply voltage difference detection circuit provided in Embodiment 2 of the present application.

detailed description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

Embodiment one:

In order to solve the current problem of being unable to detect abnormalities caused by too large or too small voltage differences between power supplies, an embodiment of the present application provides a unidirectional power supply voltage difference detection circuit. Please refer to FIG. 2 , which is a schematic structural diagram of a unidirectional power supply voltage difference detection circuit provided in Embodiment 1 of the present application, including: a first follower circuit, a second follower circuit and a first detection circuit. in:

The first follower circuit is connected to the first power supply, and is used for scaling the first voltage VDD1 output by the first power supply according to the first coefficient A to obtain the first target voltage V1.

The second follower circuit is connected to the second power supply, and is used for scaling the second voltage VDD2 output by the second power supply according to the second coefficient B to obtain the second target voltage V2.

It should be understood that in practical applications, the voltage signals output by different power supplies may have different phases and amplitudes, so they cannot be directly compared. Therefore, the voltage signals output by the two power supplies need to be converted into common-mode signals first. In order to convert the voltage signals output by the first power supply and the second voltage into common mode signals, the first coefficient A and the second coefficient B should satisfy the following relationship: A*VDD1 (ideal)=B*VDD2 (ideal)=VCM . Wherein, VCM is a common-mode voltage, VDD1 (ideal) refers to the voltage value output by the first power supply in an ideal state, and VDD2 (ideal) refers to a voltage value output by the second power supply in an ideal state. VDD1 (ideal) and VDD2 (ideal) can take the rated voltages of the first power supply and the second power supply respectively. In this way, when the first power supply and the second power supply are normal, the first target voltage V1 and the second target voltage V2 are in common mode, so they are comparable. Wherein, the specific values of the first coefficient A and the second coefficient B can be preset by engineers and realized through the circuit structure.

Exemplarily, the first follower circuit may include: a plurality of first resistive elements. The plurality of first resistive elements are connected in series between the first power supply and ground. The signal output terminal of the first follower circuit is arranged between the two first resistive elements to divide the plurality of first resistive elements into two parts. Wherein: the ratio between the total resistance value of the first target part and the total resistance value of a plurality of first resistive elements is equal to the first coefficient A; Each first resistive element is formed.

For example, taking the circuit shown in Figure 3 as an example, each small black block in the figure represents the first resistive element, the total resistance of each first resistive element is equal to (R1+R2+R3), and OUT represents the first follower circuit signal output terminal, then the first coefficient A is equal to (R2+R3)/(R1+R2+R3).

Similarly, the second follower circuit may include: a plurality of second resistive elements. The plurality of second resistive elements are connected in series between the second power supply and ground. The signal output terminal of the second follower circuit is arranged between the two second resistive elements to divide the plurality of second resistive elements into two parts. Wherein: the ratio between the total resistance value of the second target part and the total resistance value of a plurality of second resistive elements is equal to the second coefficient B; Each second resistive element constitutes.

It should be noted that, in the embodiment of the present application, the first resistive element and the second resistive element can be realized by pure resistance, MOS transistor (such as PMOS transistor, NMOS transistor, etc.), MOS transistor combined with diode, capacitor, etc. There is no limitation in this embodiment of the present application. It should be noted that when using a MOS transistor or a MOS transistor combined with a diode to realize the first resistive element or the second resistive element, it is necessary to connect the corresponding ground voltage VSS to the gate of the MOS transistor according to the conduction characteristics of the MOS transistor. Or connect the corresponding power supply voltage, for example, VDD1 or VDD2 can be connected.

It should be understood that the above circuit implementation structure is only a feasible implementation mode provided in the embodiment of the present application, and the design of the first coefficient A or the second coefficient B within the range of 0 to 1 can be realized, but it is not a limitation. For example, in the embodiment of the present application, the design of the first coefficient A greater than 1 can also be realized by setting an operational amplifier circuit between the first power supply and the output terminal of the first follower circuit. An operational amplifier circuit is set between the terminals to realize the design of the second coefficient B greater than 1.

It should also be noted that in the embodiment of the present application, if the first coefficient A is 1, the first follower circuit can be implemented directly using signal lines, so that the first voltage VDD1 of the first voltage output is directly connected to the first detection In the circuit, there is no need to design corresponding resistive elements for voltage division.

Similarly, if the second coefficient A is 1, the second follower circuit can also be implemented directly by using the signal line, so that the second voltage VDD2 output by the second voltage is directly connected to the first detection circuit, and there is no need to design a corresponding resistor Sexual elements for voltage division.

Still referring to FIG. 2 , in the embodiment of the present application, the first detection circuit is respectively connected to the signal output terminal of the first follower circuit and the signal output terminal of the second follower circuit, for the first target voltage V1 and the second When the absolute value of the difference between the target voltages V2 does not meet the preset threshold condition, outputting a first signal representing an abnormal voltage difference, the absolute value of the difference between the first target voltage and the second target voltage When the preset threshold condition is met, a second signal indicating that the voltage difference is normal is output.

In a feasible implementation manner of the embodiment of the present application, the first detection circuit may be specifically configured to: the absolute value of the difference between the first target voltage V1 and the second target voltage V2 is greater than a preset first threshold voltage When VREF1, output a first signal indicating that the voltage difference is normal, and output a second signal indicating that the voltage difference is normal when the absolute value of the difference between the first target voltage and the second target voltage is less than or equal to the first threshold voltage VREF1.

Exemplarily, the first signal may be a high level signal, and the second signal may be a low level signal. See Figures 4a to 4c, Figure 4a shows the voltage signals of VDD1 and VDD2, Figure 4b shows the voltage signals of V1 and V2, and Figure 4c shows the difference between the signal of V1 and V2 and the first The relationship between the waveforms of the threshold voltage VREF1, and the waveform diagram of the output signal VO of the first detection circuit at this time. It can be seen from FIG. 4c that when V1-V2 is located between -VREF1 and VREF1, a low-level signal is output, indicating that the voltage difference between the first power supply and the second power supply is normal. When V1-V2 is beyond -VREF1 and VREF1, a high-level signal is output, indicating that the voltage difference between the first power supply and the second power supply is normal. In this way, the excessive detection of the voltage difference is realized (that is, the absolute value of the voltage difference exceeds a certain threshold, that is, it is determined to be abnormal).

In another feasible implementation manner of the embodiment of the present application, the first detection circuit may be specifically configured to: the absolute value of the difference between the first target voltage V1 and the second target voltage V2 is smaller than a preset second threshold When the voltage is VREF2, the first signal representing the normal voltage difference is output, and when the absolute value of the difference between the first target voltage and the second target voltage is greater than or equal to the second threshold voltage VREF2, the second signal representing the normal voltage difference is output .

Exemplarily, the first signal may be a high level signal, and the second signal may be a low level signal. See Figure 4a, Figure 4b and Figure 4d. The content shown in Figure 4a and Figure 4b is as described above, and will not be repeated here. Figure 4d shows the signal diagram after the difference between V1 and V2 and the second The relationship between the waveforms of the threshold voltage VREF2, and the waveform diagram of the output signal VO of the first detection circuit at this time. It can be seen from FIG. 4c that when V1-V2 is beyond -VREF2 and VREF2, a low-level signal is output, indicating that the voltage difference between the first power supply and the second power supply is normal. When V1-V2 is between -VREF2 and VREF2, a high-level signal is output, indicating that the voltage difference between the first power supply and the second power supply is normal. In this way, too small detection of the voltage difference is realized (that is, the absolute value of the voltage difference is lower than a certain threshold, that is, it is determined to be abnormal).

Optionally, the first detection circuit in this embodiment may be implemented by signal circuits such as a subtractor and a comparator. Exemplarily, the inputs of the subtractor are respectively connected to V1 and V2, the output is connected to one input terminal of the comparator, and the other input terminal of the comparator is connected to a threshold voltage (ie VREF1 or VREF2) to realize the comparison function.

It should be understood that the above-mentioned unidirectional power supply voltage difference detection circuit can only realize the detection that the absolute value of the voltage difference between V1 and V2 is less than a certain threshold voltage, or can only realize that the absolute value of the voltage difference between V1 and V2 is greater than a certain threshold value For voltage detection, when the absolute value of the voltage difference between V1 and V2 is required to be less than a certain threshold voltage and also greater than another threshold voltage, the above-mentioned unidirectional power supply voltage difference detection circuit cannot realize the detection.

For this reason, this embodiment also provides a bidirectional power supply voltage difference detection circuit, as shown in FIG. 5 . The bidirectional power supply voltage difference detection circuit includes two unidirectional power supply voltage difference detection circuits with the structure shown above, and a first arbitration circuit.

Wherein, the two unidirectional power supply voltage difference detection circuits are connected to the first power supply and the second power supply respectively, and the first threshold voltage and the second threshold voltage are respectively set, and the second threshold voltage is lower than the first threshold voltage. And make the following configuration:

The first detection circuit of the first unidirectional power supply voltage difference detection circuit is used to: when the absolute value of the difference between V1 and V2 is greater than a preset first threshold voltage, output a first signal representing an abnormal voltage difference; When the absolute value of the difference between V1 and V2 is less than or equal to the first threshold voltage, a second signal indicating that the voltage difference is normal is output.

The first detection circuit of the second unidirectional power supply voltage difference detection circuit is used to: when the absolute value of the difference between V1 and V2 is smaller than the preset second threshold voltage, output a first signal representing an abnormal voltage difference; When the absolute value of the difference between V1 and V2 is greater than or equal to the second threshold voltage, a second signal indicating that the voltage difference is normal is output.

The input terminals of the first arbitration circuit are respectively connected to the output terminals of the two unidirectional power supply voltage difference detection circuits, and are used to output the first signal when any one of the unidirectional power supply voltage difference detection circuits outputs the first signal, and the two unidirectional power supply voltage difference detection circuits output the first signal. When the second signal representing normal voltage difference is output to the power supply voltage difference detection circuits, the second signal is output.

Exemplarily, when the first signal adopts a high-level signal and the second signal samples a low-level signal, the first arbitration circuit may be realized by an OR gate circuit. When the first signal adopts a low-level signal and the second signal samples a high-level signal, the first arbitration circuit can be realized by an AND gate circuit.

Through the one-way power supply voltage difference detection circuit and the two-way power supply voltage difference detection circuit provided in this embodiment, it is possible to detect whether the voltage difference between the first power supply and the second power supply is normal, and it is possible to realize the module sensitive to the power supply voltage difference. The abnormality detection caused by the voltage difference between the power sources is too large or too small makes up for the deficiency that the existing POR circuit can only detect whether the voltage of a single power source is normal.

Embodiment two:

In order to solve the current problem of being unable to detect abnormalities caused by too large or too small voltage differences between power supplies, another unidirectional power supply voltage difference detection circuit is provided in the embodiment of the present application. Please refer to FIG. 6 , which is a schematic structural diagram of a unidirectional power supply voltage difference detection circuit provided in Embodiment 2 of the present application, including: a third follower circuit and a second detection circuit. in:

The third follower circuit is connected to the third power supply, and is used for scaling the third voltage VDD3 output by the third power supply according to the third coefficient x0 to obtain the third target voltage N0.

The power supply terminal of the second detection circuit is connected to the fourth power supply, and the signal input terminal is connected to the output terminal of the third follower circuit, so that the preset threshold value is not satisfied between the third target voltage N0 and the threshold voltage of the second detection circuit. condition, output a first signal representing normal voltage difference, and output a second signal representing normal voltage difference when a preset threshold condition is satisfied between the third target voltage N0 and the threshold voltage of the second detection circuit. in:

The threshold voltages of the second detection circuit include a third threshold voltage V+ and a fourth threshold voltage V−. V+ is equal to x1 times the fourth voltage VDD4, V− is x2 times the fourth voltage VDD4, x1 is greater than x2, and the fourth voltage VDD4 is a voltage output by the fourth power supply. Among them, x0, x1 and x2 satisfy the following relationship: x0*VDD3 and [(x1+x2)/2]* are in common mode with VDD4. Among them, the specific values of x0, x1 and x2 can be preset by the engineer and realized through the circuit structure.

Exemplarily, the third follower circuit may include: a plurality of third resistive elements. The plurality of third resistive elements are connected in series between the third power supply and the ground. The signal output end of the third follower circuit is disposed between the two third resistive elements, so as to divide the plurality of third resistive elements into two parts. Wherein: the ratio between the total resistance value of the third target part and the total resistance value of a plurality of third resistive elements is equal to the third coefficient x0; Each third resistive element constitutes.

For example, still taking the circuit shown in Figure 3 as an example, each small black block in the figure represents the third resistive element, the total resistance of each third resistive element is equal to (R1+R2+R3), and OUT represents the third follower circuit The signal output terminal of the signal, then the third coefficient x0 is equal to (R2+R3)/(R1+R2+R3).

It should be understood that, in the embodiment of the present application, a fourth follower circuit may also be provided between the fourth power supply and the power supply terminal of the second detection circuit, so as to control the fourth voltage according to a certain coefficient (called the fourth coefficient). VDD4 for scaling.

Similar to the above, the fourth follower circuit may include: a plurality of fourth resistive elements. The plurality of fourth resistive elements are connected in series between the fourth power supply and the ground. The signal output terminal of the fourth follower circuit is arranged between the two fourth resistive elements to divide the plurality of fourth resistive elements into two parts. Wherein: the ratio between the total resistance value of the fourth target part and the total resistance value of a plurality of fourth resistive elements is equal to the fourth coefficient; A fourth resistive element is formed.

In the embodiment of the present application, the third resistive element or the fourth resistive element can also be realized by pure resistance, MOS transistor (such as PMOS transistor, NMOS transistor, etc.), MOS transistor combined with diode, capacitor, etc., for this embodiment of the present application There is no limit in . It should be noted that when using a MOS transistor or a MOS transistor combined with a diode to realize the first resistive element or the second resistive element, it is necessary to connect the corresponding ground voltage VSS to the gate of the MOS transistor according to the conduction characteristics of the MOS transistor. Or connect the corresponding power supply voltage, for example, VDD3 or VDD4 can be connected.

It should also be understood that the above circuit implementation structure is only a feasible implementation manner provided in the embodiment of the present application, and the design of the third coefficient or the fourth coefficient in the interval from 0 to 1 can be realized, but it is not limited. For example, in the embodiment of the present application, an operational amplifier circuit may be provided between the third power supply and the output terminal of the third follower circuit to realize the design of the third coefficient greater than 1.

It should be noted that, in a feasible implementation manner of this embodiment, the second detection circuit may be specifically configured to: when the third target voltage N0 is greater than V+, output a first signal representing an abnormal voltage difference; When the voltage N0 is less than V−, output a second signal indicating that the voltage difference is normal. In this way, once the voltage difference between the third power supply and the fourth power supply exceeds the design range, the first signal representing the abnormal voltage difference will be output, so as to realize the excessive detection of the voltage difference. And by using V+ and V- with a certain difference, when the third target voltage is less than V-, the second signal representing the normal voltage difference is output, so that the second detection circuit frequently caused by the burrs in the voltage signal itself can be avoided. Switching between the first signal and the second signal causes misjudgment.

It should be noted that, in another feasible implementation manner of this embodiment, the second detection circuit may also be used to: when the third target voltage N0 is less than V-, output a first signal representing an abnormal voltage difference, and at When the three-target voltage N0 is greater than V+, a second signal representing a normal voltage difference is output. In this way, once the voltage difference between the third power supply and the fourth power supply does not reach the design range, the first signal representing the abnormal voltage difference will be output, so as to realize the detection of the voltage difference being too small. And by using V+ and V- with a certain difference, when the third target voltage is greater than V+, the second signal representing the normal voltage difference is output, so that the second detection circuit frequently occurs due to the glitches in the voltage signal itself. Switching between the first signal and the second signal causes misjudgment.

In an optional implementation manner of the embodiment of the present application, as shown in FIG. 7 , the unidirectional power supply voltage difference detection circuit may further include a buffer. The input end of the buffer is connected to the output end of the second detection circuit, so that the drive performance of the circuit can be enhanced through the buffer, and the stability of the final output first signal or second signal can be ensured.

It should be noted that, in the embodiment of the present application, the second detection circuit may be implemented by using a Schmitt trigger. Due to the characteristics of the Schmitt trigger itself, it has two threshold voltages following the input signal at the power supply terminal, and can compare the input signal with the two thresholds, so the Schmitt trigger can be sampled as the second detection circuit , the circuit realizes a simple structure, and is favorable for deployment in a chip.

Certainly, in this embodiment of the present application, other circuits or devices may also be used to implement the second detection circuit, for example, it may be implemented by a sampling comparator, but this is not a limitation.

In the following, to facilitate understanding of the solution of this embodiment, the unidirectional power supply voltage difference detection circuit shown in FIG. 8 is taken as an example for illustration.

Referring to FIG. 8, the unidirectional power supply voltage difference detection circuit includes a third follower circuit composed of three PMOS transistors (PM0, PM1 and PM2), a Schmitt trigger I0 and a buffer I1.

The waveforms of VDD3, VDD4, N0, the output N1 of the Schmitt trigger I0 and the output Y of the buffer I1 are shown in Figure 9a or Figure 9b:

When the circuit is working, N0 is x0*VDD3, V+ and V- of the Schmitt trigger are x1*VDD4 and x2*VDD4 respectively.

Assuming that the circuit realizes the detection of excessive voltage difference, then:

When the circuit is working, as shown in Figure 9a, when VDD3 rises, N0 rises accordingly, or when VDD4 falls, both V+ and V- of the Schmitt trigger fall accordingly. When N0<V-, the final output Y=0; when the voltage of N0 is higher than V+, it is determined that the voltage difference between VDD4 and VDD3 exceeds the set range, then the output Y jumps to 1, indicating that the voltage difference is normal, until VDD4 and VDD3 The voltage difference of VDD3 decreases, so that after N0 is lower than the V- voltage of the Schmitt trigger, the output Y returns to 0, indicating that the voltage difference is in the normal range.

Assuming that the circuit realizes the detection of too small voltage difference, then:

When the circuit is working, as shown in Figure 9b, when VDD3 rises, N0 rises accordingly, or when VDD4 falls, both V+ and V- of the Schmitt trigger fall accordingly. When N0>V+, the final output Y=0; when the voltage of N0 is less than V-, it is determined that the voltage difference between VDD4 and VDD3 is lower than the set range, then the output Y jumps to 1, indicating that the voltage difference is normal, until VDD4 and VDD3 The voltage difference of VDD3 decreases so that after N0 is higher than the V+ voltage of the Schmitt trigger, the output Y returns to 0, indicating that the voltage difference is within the normal range.

It should be understood that the above-mentioned one-way power supply voltage difference detection circuit can only realize the detection of too large voltage difference, or can only realize the detection of too small voltage difference. While requiring the voltage difference between VDD4 and VDD3 to be less than a certain threshold voltage, it also needs to be greater than In the case of another threshold voltage, the above-mentioned unidirectional power supply voltage difference detection circuit cannot realize the detection.

For this reason, this embodiment also provides a bidirectional power supply voltage difference detection circuit, as shown in FIG. 10 . The bidirectional power supply voltage difference detection circuit includes two unidirectional power supply voltage difference detection circuits with the structure shown above, and a second arbitration circuit. The two unidirectional power supply voltage difference detection circuits are respectively connected to the third power supply and the fourth power supply. in:

The second detection circuit of the first unidirectional power supply voltage difference detection circuit is used to output the first signal representing abnormal voltage difference when the third target voltage N0 is greater than V+ of the first unidirectional power supply voltage difference detection circuit, When the third target voltage is lower than V− of the first unidirectional power supply voltage difference detection circuit, a second signal indicating that the voltage difference is normal is output.

The second detection circuit of the second unidirectional power supply voltage difference detection circuit is used to output the first signal representing abnormal voltage difference when the third target voltage N0 is less than V- of the second unidirectional power supply voltage difference detection circuit, When the third target voltage N0 is greater than V+ of the second unidirectional power supply voltage difference detection circuit, a second signal indicating that the voltage difference is normal is output.

Among them, the V+ of the first unidirectional power supply voltage difference detection circuit is greater than the V+ of the second unidirectional power supply voltage difference detection circuit, and the V- of the first unidirectional power supply voltage difference detection circuit is greater than the second unidirectional power supply voltage V- of the difference detection circuit. The V+ and V- of the two unidirectional power supply voltage difference detection circuits are set according to the required voltage difference range.

Continuing to refer to FIG. 10, the input terminals of the second arbitration circuit are respectively connected to the output terminals of the two unidirectional power supply voltage difference detection circuits, and are used to output the first signal representing the abnormal voltage difference in any one of the unidirectional power supply voltage difference detection circuits. , output the first signal, and output the second signal when the two unidirectional power supply voltage difference detection circuits both output the second signal indicating that the voltage difference is normal.

Exemplarily, when the first signal adopts a high-level signal and the second signal samples a low-level signal, the second arbitration circuit may be realized by an OR gate circuit. When the first signal adopts a low-level signal and the second signal samples a high-level signal, the second arbitration circuit can be realized by an AND gate circuit.

Through the above scheme, it is possible to detect abnormality caused by too large or too small voltage difference between power supplies for the sensitive module of power supply voltage difference, which makes up for the deficiency that the existing POR circuit can only detect whether the voltage of a single power supply is normal or not. . In addition, in the above implementation, by using V+ and V- with a certain difference, it is possible to avoid the second detection circuit frequently switching between the first signal and the second signal due to the glitches in the voltage signal itself, resulting in misjudgment .

Embodiment three:

Based on the same inventive concept, on the basis of Embodiment 1 and Embodiment 2, the embodiment of the present application also provides a chip, which may include the unidirectional power supply voltage difference detection circuit provided in Embodiment 1 or Embodiment 2, Or it may include the bidirectional power supply voltage difference detection circuit provided in Embodiment 1 or Embodiment 2.

Exemplarily, the chip provided by the embodiment of the present application may be a computer chip (such as GPU (Graphics Processing Unit, graphics processing unit), CPU (Central Processing Unit, central processing unit), MCU (Microcontroller Unit, micro control unit) and other chips) , can also be a memory chip (such as DRAM (Dynamic Random Access Memory, dynamic random access memory), SDRAM (Synchronous Dynamic Random Access Memory, synchronous dynamic random access memory), ROM (Read-Only Memory, read-only memory) and other chips) , can also be a communication chip (such as a bluetooth chip, a WiFi chip, etc.), but this is not a limitation.

Based on the same inventive concept, an embodiment of the present application further provides an electronic component, which includes the aforementioned chip.

Exemplarily, the electronic components provided in the embodiments of the present application may be communication modules, storage modules, data processing modules and other components that can be produced and sold separately, but this is not a limitation.

Based on the same inventive concept, an embodiment of the present application further provides an electronic device, which includes the aforementioned chip, or includes the aforementioned electronic component.

Exemplarily, the electronic device provided in the embodiment of the present application may be a terminal (such as a smart phone, a computer, a smart bracelet, etc.), a server, a relay device (such as a router, a switch, etc.), etc., but not limited thereto.

In the embodiments provided in this application, it should be understood that the disclosed device may be implemented in other ways, and the device embodiments described above are only illustrative. In another point, the shown or discussed mutual connections may be connected through some interfaces, and the connections may be in electrical, mechanical or other forms.

In this document, relational terms such as first and second etc. are used only to distinguish one entity or operation from another without necessarily requiring or implying any such relationship between these entities or operations. Actual relationship or sequence.

Herein, a plurality means two or more.

The above descriptions are only examples of the present application, and are not intended to limit the scope of protection of the present application. For those skilled in the art, various modifications and changes may be made to the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of this application shall be included within the protection scope of this application.

Claims (16)

1. A unidirectional power supply voltage difference detection circuit, comprising:

the first follower circuit is connected with the first power supply and used for scaling the first voltage output by the first power supply according to a first coefficient to obtain a first target voltage;

the second follower circuit is connected with the second power supply and used for scaling a second voltage output by the second power supply according to a second coefficient to obtain a second target voltage; when the first power supply and the second power supply are normal, the first target voltage and the second target voltage are in a common mode;

the first detection circuit is respectively connected with the signal output end of the first following circuit and the signal output end of the second following circuit, and is used for outputting a first signal representing abnormal voltage difference when the absolute value of the difference value between the first target voltage and the second target voltage does not meet a preset threshold condition, and outputting a second signal representing normal voltage difference when the absolute value of the difference value between the first target voltage and the second target voltage meets the preset threshold condition.

2. The unidirectional power supply voltage difference detection circuit of claim 1, wherein the first detection circuit is specifically configured to:

when the absolute value of the difference between the first target voltage and the second target voltage is larger than a preset first threshold voltage, outputting a first signal representing that the voltage difference is abnormal, and when the absolute value of the difference between the first target voltage and the second target voltage is smaller than or equal to the first threshold voltage, outputting a second signal representing that the voltage difference is normal.

3. The unidirectional power supply voltage difference detection circuit of claim 1, wherein the first detection circuit is specifically configured to:

when the absolute value of the difference between the first target voltage and the second target voltage is smaller than a preset second threshold voltage, outputting a first signal representing that the voltage difference is abnormal, and when the absolute value of the difference between the first target voltage and the second target voltage is larger than or equal to the second threshold voltage, outputting a second signal representing that the voltage difference is normal.

4. A unidirectional power supply voltage difference detection circuit as claimed in any one of claims 1 to 3 wherein said first follower circuit comprises:

a plurality of first resistive elements connected in series between the first power supply and ground;

a signal output end of the first follower circuit is arranged between the two first resistive elements so as to divide the plurality of first resistive elements into two parts;

wherein: a ratio between a total resistance value of the first target portion and a total resistance value of the plurality of first resistive elements is equal to the first coefficient;

the first target portion is formed by each of the first resistive elements between the output of the first follower circuit and ground.

5. A unidirectional power supply voltage difference detection circuit as claimed in any one of claims 1 to 3 wherein said second follower circuit comprises:

a plurality of second resistive elements connected in series between the second power supply and ground;

a signal output terminal of the second follower circuit is disposed between the two second resistive elements to divide the plurality of second resistive elements into two parts;

wherein: a ratio between a total resistance value of the second target portion and a total resistance value of the plurality of second resistive elements is equal to the second coefficient;

the second target portion is formed by each of the second resistive elements between the output of the second follower circuit and ground.

6. A bi-directional power supply voltage difference detection circuit, comprising:

two unidirectional power supply voltage difference detection circuits as claimed in claim 1;

the input end of the first arbitration circuit is respectively connected with the output ends of the two unidirectional power supply voltage difference detection circuits, and the first arbitration circuit is used for outputting a first signal when any one unidirectional power supply voltage difference detection circuit outputs a first signal representing abnormal voltage difference, and outputting a second signal when both the two unidirectional power supply voltage difference detection circuits output a second signal representing normal voltage difference; wherein:

the first detection circuit of the first unidirectional power supply voltage difference detection circuit is used for outputting the first signal when the absolute value of the difference value between the first target voltage and the second target voltage is greater than a preset first threshold voltage, and outputting the second signal when the absolute value of the difference value between the first target voltage and the second target voltage is less than or equal to the first threshold voltage;

the first detection circuit of the second unidirectional power supply voltage difference detection circuit is used for outputting the first signal when the absolute value of the difference between the first target voltage and the second target voltage is smaller than a preset second threshold voltage, and outputting the second signal when the absolute value of the difference between the first target voltage and the second target voltage is larger than or equal to the second threshold voltage;

the second threshold voltage is less than the first threshold voltage.

7. A unidirectional power supply voltage difference detection circuit, comprising:

the third follower circuit is connected with a third power supply and used for scaling a third voltage output by the third power supply according to a third coefficient to obtain a third target voltage;

a second detection circuit, wherein a power end is connected with a fourth power supply, a signal input end is connected with an output end of the third follower circuit, and the second detection circuit is used for outputting a first signal representing abnormal voltage difference when a preset threshold condition is not met between a third target voltage and a threshold voltage of the second detection circuit, and outputting a second signal representing normal voltage difference when the preset threshold condition is met between the third target voltage and the threshold voltage of the second detection circuit; wherein:

the threshold voltage of the second detection circuit comprises a third threshold voltage V + and a fourth threshold voltage V-; the V + is equal to x1 times the fourth voltage, and the V-is equal to x2 times the fourth voltage; the x1 is greater than the x2, and the fourth voltage is a voltage output by the fourth power supply; the third target voltage is common-mode with a median voltage of the second detection circuit, the median voltage of the second detection circuit being equal to a product of (x 1+ x 2)/2 and the fourth voltage.

8. The unidirectional power supply voltage difference detection circuit of claim 7,

the second detection circuit is specifically configured to:

and when the third target voltage is less than the V-, outputting a second signal representing that the voltage difference is normal.

9. The unidirectional power supply voltage difference detection circuit of claim 7,

the second detection circuit is specifically configured to:

when the third target voltage is smaller than the V < - >, outputting a first signal representing abnormal voltage difference, and when the third target voltage is larger than the V < + >, outputting a second signal representing normal voltage difference.

10. The unidirectional power supply voltage difference detection circuit of claim 7,

the third follower circuit includes:

a plurality of third resistive elements connected in series between the third power supply and ground;

a signal output terminal of the third follower circuit is disposed between the two third resistive elements to divide the plurality of third resistive elements into two parts;

wherein: a ratio between a total resistance value of the third target portion and a total resistance value of the plurality of third resistive elements is equal to the third coefficient;

the third target portion is formed by each of the third resistive elements between the output of the third follower circuit and ground.

11. A unidirectional supply voltage difference detection circuit as claimed in any one of claims 7 to 10 further comprising:

and the input end of the buffer is connected with the output end of the second detection circuit.

12. A unidirectional supply voltage difference detection circuit as claimed in any one of claims 7 to 11 wherein said second detection circuit is a schmitt trigger.

13. A bi-directional supply voltage difference detection circuit, comprising:

two unidirectional supply voltage difference detection circuits as claimed in claim 7;

the input end of the second arbitration circuit is respectively connected with the output ends of the two unidirectional power supply voltage difference detection circuits, and the second arbitration circuit is used for outputting a first signal when any one unidirectional power supply voltage difference detection circuit outputs a first signal representing abnormal voltage difference, and outputting a second signal when both the two unidirectional power supply voltage difference detection circuits output a second signal representing normal voltage difference; wherein:

the second detection circuit of the first unidirectional power supply voltage difference detection circuit is used for outputting the first signal when the third target voltage is greater than the V + of the first unidirectional power supply voltage difference detection circuit, and outputting the second signal when the third target voltage is less than the V-of the first unidirectional power supply voltage difference detection circuit;

the second detection circuit of the second unidirectional power supply voltage difference detection circuit is used for outputting the first signal when the third target voltage is less than the V-of the second unidirectional power supply voltage difference detection circuit, and outputting the second signal when the third target voltage is greater than the V + of the second unidirectional power supply voltage difference detection circuit;

the V + of the first unidirectional power supply voltage difference detection circuit is larger than the V + of the second unidirectional power supply voltage difference detection circuit, and the V-of the first unidirectional power supply voltage difference detection circuit is larger than the V-of the second unidirectional power supply voltage difference detection circuit.

14. A chip comprising a unidirectional supply voltage difference detection circuit according to any one of claims 1-5, 7-12, or comprising a bidirectional supply voltage difference detection circuit according to claim 6 or 13.

15. An electronic component comprising the chip of claim 14.

16. An electronic device comprising a chip as claimed in claim 14 or comprising an electronic device as claimed in claim 15.

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