CN115427193B - Double-sided grinding method - Google Patents
Double-sided grinding method Download PDFInfo
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- CN115427193B CN115427193B CN202180030308.9A CN202180030308A CN115427193B CN 115427193 B CN115427193 B CN 115427193B CN 202180030308 A CN202180030308 A CN 202180030308A CN 115427193 B CN115427193 B CN 115427193B
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- 238000000034 method Methods 0.000 title claims abstract description 41
- 235000012431 wafers Nutrition 0.000 claims abstract description 172
- 238000005498 polishing Methods 0.000 claims abstract description 112
- 239000000969 carrier Substances 0.000 claims abstract description 70
- 239000002002 slurry Substances 0.000 claims abstract description 67
- 230000003111 delayed effect Effects 0.000 claims description 4
- 230000000052 comparative effect Effects 0.000 description 11
- 238000003825 pressing Methods 0.000 description 7
- 238000009826 distribution Methods 0.000 description 5
- 239000002245 particle Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 239000007864 aqueous solution Substances 0.000 description 3
- 239000004744 fabric Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 239000008119 colloidal silica Substances 0.000 description 2
- 230000005484 gravity Effects 0.000 description 2
- 230000020169 heat generation Effects 0.000 description 2
- 238000005461 lubrication Methods 0.000 description 2
- 229920002635 polyurethane Polymers 0.000 description 2
- 239000004814 polyurethane Substances 0.000 description 2
- 239000002033 PVDF binder Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920002981 polyvinylidene fluoride Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
- B24B37/07—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
- B24B37/08—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/27—Work carriers
- B24B37/28—Work carriers for double side lapping of plane surfaces
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B57/00—Devices for feeding, applying, grading or recovering grinding, polishing or lapping agents
- B24B57/02—Devices for feeding, applying, grading or recovering grinding, polishing or lapping agents for feeding of fluid, sprayed, pulverised, or liquefied grinding, polishing or lapping agents
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
Landscapes
- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
The present invention relates to a double-sided polishing method, wherein a plurality of carriers are arranged between an upper platen and a lower platen of a rotary platen having a platen center, and each of the plurality of carriers holds 1 or more wafers, and the double sides of the wafers are polished while supplying slurry by a pressure feed method, wherein the wafers held by the plurality of carriers are arranged such that: the reference carrier is selected from a plurality of carriers, and 1 or 2 carriers having the largest angle alpha formed by the center of the platform and the reference carrier are used as symmetrical carriers by taking the center of the platform as an angle center, so that the difference between the average thickness A [ mu ] m of the wafer arranged on the reference carrier and the average thickness B [ mu ] m of the wafer arranged on the symmetrical carrier is less than 1.0 [ mu ] m, and the double-sided polishing of the wafer is performed. Thus, a slurry pressure feed method for a wafer set, which can reduce the variation in flatness after double-sided polishing, can be provided.
Description
Technical Field
The present invention relates to a double-sided polishing method.
Background
As one of typical methods for supplying slurry in double-sided polishing, there is a pressure-feed method in which slurry is fed to a polishing surface while applying pressure via a rotary joint.
In the case of the pressure feed method, for example, as shown in fig. 6, if the flow rate of slurry from the slurry supply hole 6a of the rotary table 10 is larger than the flow rate of slurry from the slurry supply hole 6b, the slurry supply hole 6a of the upper table 1a is set to float up, and the polishing pressure on the wafer 20a at that portion becomes smaller. On the other hand, since the upper deck 1a is rotatably disposed on the lower deck 2 around the deck center 5, if the side provided with the slurry supply hole 6a floats, the entire upper deck is inclined. Thereby, the slurry supply holes 6b of the upper platen 1a are displaced laterally downward, and the polishing pressure on the wafer 20b increases in this portion. As a result of this, a difference in polishing strength occurs between the wafer 20a and the wafer 20b, and the wafer 20a bulges, while the wafer 20b is recessed, so that the flatness of the wafer set after double-sided polishing is deviated.
For such a problem, for example, patent document 1 proposes: in the pressure feed system, the slurry flow rate distribution from the supply holes provided in the platen is uniformly maintained.
Patent document 2 discloses a non-revolving double-sided polishing method capable of reducing thickness variations of polished wafers.
Patent document 3 discloses a double-sided simultaneous polishing apparatus including a mechanism for rotating the positions of the rotation axes of the 1 st and 2 nd polishing tables in the same direction while the positions of the rotation axes of the flat plate-like workpiece held therebetween are different from each other so as to polish the workpiece on both sides with equal polishing efficiency.
Prior art literature
Patent literature
Patent document 1: japanese patent laid-open No. 2019-136837
Patent document 2: japanese patent application laid-open No. 2012-143839
Patent document 3: japanese patent publication No. 8-9140
Disclosure of Invention
First, the technical problem to be solved
In the conventional strategy, as disclosed in patent document 1, in particular, the variation in flatness of the wafer set processed in the press-feed system can be reduced. However, the inventors of the present invention have found that even in such a method, the flatness of the wafer set after double-sided polishing may be deviated.
For example, it is known that even if the slurry flow distribution from the slurry supply hole is uniform, if there is a large variation in the thickness distribution of the wafer to be input, the buoyancy of the pressure feed varies, the inclination of the platen becomes remarkable, and the flatness variation after double-sided polishing increases. With reference to fig. 7, a specific example will be described. Fig. 7 is a schematic cross-sectional view of a double-sided polishing apparatus 100 for double-sided polishing of wafers 20a and 20b according to the method disclosed in patent document 1. In the example shown in fig. 7, the thickness of the wafer 20a disposed on the slurry supply hole 6a side is much larger than the thickness of the wafer 20b disposed on the slurry supply hole 6b side. In this case, if the slurry is fed under pressure from the slurry supply holes 6a and 6b at the same flow rate, the flow of the slurry stagnates and is blocked by the thickness of the wafer 20a on the slurry supply hole 6a side, and the pressure becomes high. On the other hand, the slurry fed by pressure is likely to flow toward the slurry supply hole 6b, and the pressure is low. As a result, the portion of the upper deck 1a on the slurry supply hole 6a side is floated by receiving a larger buoyancy than the portion on the slurry supply hole 6b side. As a result, the upper deck 1a tilts itself as indicated by the broken line. If polishing is continued in this state, the polishing strength from the upper platen 1a changes between the slurry supply hole 6a side and the slurry supply hole 6b side. As a result, the flatness of the wafer set after double-sided polishing is deviated.
The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a slurry pressure-feed type double-sided polishing method capable of providing a wafer set in which variations in flatness after double-sided polishing are reduced.
(II) technical scheme
In order to solve the above problems, the present invention provides a double-sided polishing method for polishing both sides of a wafer while supplying slurry in a pressure feed manner by providing a plurality of carriers between an upper platen and a lower platen of a rotary platen having a platen center so that the plurality of carriers hold 1 or more wafers, respectively,
the arrangement of the wafers held by the multi-wafer carrier is such that:
selecting a reference carrier from the plurality of carriers,
taking the center of the platform as an angle center, taking 1 or 2 carriers with the largest angle alpha formed by the center of the platform and the reference carrier as symmetrical carriers,
the difference between the average thickness A [ mu ] m of the wafers arranged on the reference carrier and the average thickness B [ mu ] m of the wafers arranged on the symmetrical carrier is 1.0 [ mu ] m or less, and the double-sided polishing of the wafers is performed.
In particular, the present invention provides a double-sided polishing method for polishing both sides of a wafer while supplying slurry in a pressure feed manner by providing a plurality of carriers between an upper platen and a lower platen of a rotary platen having a platen center so that the plurality of carriers hold 1 or more wafers, respectively,
a plurality of wafers including at least one group of wafers having different thicknesses from each other are prepared,
the wafers are arranged in the order from the large thickness to the small thickness, and are numbered,
the arrangement of the wafers held by the multi-wafer carrier is such that:
selecting a reference carrier from the plurality of carriers,
taking the center of the platform as an angle center, taking 1 or 2 carriers with the largest angle alpha formed by the center of the platform and the reference carrier as symmetrical carriers,
the difference between the average thickness A [ mu ] m of the wafers arranged on the reference carrier and the average thickness B [ mu ] m of the wafers arranged on the symmetrical carrier is 1.0 [ mu ] m or less, and the double-sided polishing of the wafers is performed,
in the configuration of the wafer in question,
the plurality of wafers are arranged on the multi-wafer carrier in order from wafer 1 such that the difference between the average thickness A [ mu ] m and the average thickness B [ mu ] m is 1.0 [ mu ] m or less, and the arrangement is delayed for wafers in which the difference between the average thickness A [ mu ] m and the average thickness B [ mu ] m exceeds 1.0 [ mu ] m.
According to the double-sided polishing method of the present invention, the double-sided polishing of the wafer can be performed while preventing the platen from tilting due to the pressing of the slurry, and as a result, a wafer set with reduced variation in flatness after double-sided polishing can be provided.
Preferably, the plurality of carriers are 4 or more, and the 4 or more carriers are arranged at equal intervals along a circle centered on the center of the stage.
By providing the carrier in this way, the platform can be more effectively prevented from tilting due to the pressing of the slurry.
Preferably, the double-sided polishing of the wafer is performed while the slurry is being pressure-fed via a rotary joint, and the total flow rate of the pressure-fed slurry is set to 4l/min or more.
By pressing the slurry in this manner, the lubrication effect by the slurry can be utilized more effectively, and abnormal heat generation on the polishing surface can be prevented.
(III) beneficial effects
As described above, according to the double-sided polishing method of the present invention, a wafer set in which variations in flatness after double-sided polishing are reduced can be provided.
Drawings
Fig. 1 is a schematic cross-sectional view showing an example of a double-sided polishing apparatus in which the double-sided polishing method of the present invention can be implemented.
Fig. 2 is a schematic plan view for explaining an example of the arrangement of wafers according to the double-side polishing method of the present invention.
Fig. 3 is a schematic plan view for explaining another example of the arrangement of wafers by the double-side polishing method according to the present invention.
Fig. 4 is a schematic plan view for explaining still another example of the arrangement of wafers by the double-side polishing method according to the present invention.
Fig. 5 is a graph showing the flatness Range (GBIR Range) of the wafer group obtained by the respective double-sided polishing methods of the examples and the comparative examples.
Fig. 6 is a schematic cross-sectional view of a double-sided polishing apparatus for explaining an example of a conventional double-sided polishing method.
Fig. 7 is a schematic cross-sectional view of a double-sided polishing apparatus for explaining another example of a conventional double-sided polishing method.
Detailed Description
As described above, development of a double-sided polishing method capable of providing a wafer set in which variations in flatness after double-sided polishing are reduced has been demanded.
As a result of intensive studies, the inventors of the present invention have found that by loading a wafer into a carrier according to a predetermined rule, tilting of a platen can be suppressed and double-sided polishing can be performed, thereby completing the present invention.
That is, the present invention provides a double-sided polishing method for polishing both sides of a wafer while supplying slurry by a pressure feed method by providing a plurality of carriers between an upper platen and a lower platen of a rotary platen having a platen center so that the plurality of carriers hold 1 or more wafers, respectively,
the arrangement of the wafers held by the multi-wafer carrier is such that:
selecting a reference carrier from the plurality of carriers,
taking the center of the platform as an angle center, taking 1 or 2 carriers with the largest angle alpha formed by the center of the platform and the reference carrier as symmetrical carriers,
the difference between the average thickness A [ mu ] m of the wafers arranged on the reference carrier and the average thickness B [ mu ] m of the wafers arranged on the symmetrical carrier is 1.0 [ mu ] m or less, and the double-sided polishing of the wafers is performed.
In particular, the present invention provides a double-sided polishing method in which a plurality of carriers are provided between an upper platen and a lower platen of a rotary platen having a platen center, and each of the plurality of carriers holds 1 or more wafers, and both sides of the wafers are polished while supplying slurry by a pressure feed method,
a plurality of wafers including at least one group of wafers having different thicknesses from each other are prepared,
the wafers are arranged in the order from the large thickness to the small thickness, and are numbered,
the arrangement of the wafers held by the multi-wafer carrier is such that:
selecting a reference carrier from the plurality of carriers,
taking the center of the platform as an angle center, taking 1 or 2 carriers with the largest angle alpha formed by the center of the platform and the reference carrier as symmetrical carriers,
the difference between the average thickness A [ mu ] m of the wafers arranged on the reference carrier and the average thickness B [ mu ] m of the wafers arranged on the symmetrical carrier is 1.0 [ mu ] m or less, and the double-sided polishing of the wafers is performed,
in the configuration of the wafer in question,
the plurality of wafers are arranged on the multi-wafer carrier in order from wafer 1 such that the difference between the average thickness A [ mu ] m and the average thickness B [ mu ] m is 1.0 [ mu ] m or less, and the arrangement is delayed for wafers in which the difference between the average thickness A [ mu ] m and the average thickness B [ mu ] m exceeds 1.0 [ mu ] m.
The present invention will be described in detail below with reference to the drawings, but the present invention is not limited thereto.
(double-sided polishing apparatus)
First, a double-sided polishing apparatus capable of implementing an example of the double-sided polishing method of the present invention will be described with reference to fig. 1. However, the double-sided polishing method of the present invention may be implemented by a device other than the double-sided polishing device shown in fig. 1.
In fig. 1, the same components as those of the double-sided polishing apparatus 100 in fig. 6 and 7 are denoted by the same reference numerals.
The double-sided polishing apparatus 100 shown in fig. 1 includes a rotary platen 10.
The rotary table 10 includes an upper table 1 and a lower table 2 opposed to the upper table 1. A polishing cloth (pad) is attached to the surface of the upper platen 1 facing the lower platen 2. Similarly, a polishing cloth is attached to the surface of the lower platen 2 facing the upper platen 1. As the polishing cloth, for example, a foamed polyurethane pad can be used, but is not particularly limited.
The rotary table 10 has a table center 5 passing through the center of the upper table 1 and the center of the lower table 2. The upper platform 1 and the lower platform 2 are rotatable about the platform center 5 by being connected to respective driving units.
The upper and lower stages 1 and 2 define a processing space 4 therebetween. A plurality of carriers 3 are disposed in the processing space 4.
Preferably, the plurality of carriers 3 are arranged around the platform center 5 at the same distance from the platform center 5. In the present specification, the distance from the platform center 5 refers to a distance from the platform center 5 to the center of each carrier 3.
The number of sheets of the carrier 3 is not particularly limited. The number of sheets of the carrier 3 may be, for example, 2 to 7.
In particular, it is preferable to set the number of the plurality of carriers 3 to 4 or more, and to set the 4 or more carriers 3 at equal intervals along a circle centered on the platform center 5. By disposing the carrier 3 in this manner, the effect of suppressing the inclination of the stage at the time of pressing the slurry, which will be described in detail below, can be more reliably exhibited.
As the multi-sheet carrier 3, for example, a carrier made of metal can be used, but is not particularly limited.
The plurality of carriers 3 are each configured to hold 1 or more wafers 20. For example, the carrier 3 may be provided with a holding hole (work hole) into which the wafer 20 is inserted and held. Preferably, a resin insert material is provided in the inner peripheral portion of the holding hole.
A plurality of slurry supply holes 6 are provided on the upper stage 1. The slurry supply holes 6 may be provided in the lower stage 2 instead of the upper stage 1, or may be provided in both the upper stage 1 and the lower stage 2.
The slurry supply hole 6 is configured to supply slurry for polishing to the processing space 4. In the double-sided polishing apparatus 100 shown in fig. 1, the slurry is pumped into the processing space 4 through the slurry supply hole 6 and the rotary joint, for example, and the double-sided polishing of the wafer 20 is performed.
The double-sided polishing apparatus 100 shown in fig. 1 further includes: a sun gear 7 having an axis 7a arranged along the platform center 5; and an internal gear 8 having a base 8a located at a position surrounding the periphery of the lower platform 2.
The sun gear 7 and the internal gear 8 are rotatable about the platform center 5 by being connected to respective driving units.
The sun gear 7 further includes an engagement portion 7b protruding upward from the shaft 7 a. The internal gear 8 further includes an engagement portion 8b protruding upward from the base portion 8a. The engagement portion 7b of the sun gear 7 and the engagement portion 8b of the internal gear 8 are engaged with the plurality of carriers 3. These engagement may be performed by meshing gears, or may be performed without gears.
The plurality of carriers 3 are engaged with the sun gear 7 and the internal gear 8, and thus can be rotated by the rotation of the sun gear 7 and the internal gear 8.
In the double-sided polishing apparatus 100 shown in fig. 1, double-sided polishing of the wafer 20 held by the carrier 3 can be performed while the upper stage 1, the lower stage 2, the sun gear 7, and the internal gear 8 are driven and the slurry is pressure-fed into the processing space 4. That is, the double-sided polishing apparatus 100 shown in fig. 1 is a 4-way double-sided polishing apparatus including driving units of the upper platen 1, the lower platen 2, the sun gear 7, and the internal gear 8.
(configuration of wafer)
Next, the arrangement of the wafers in the double-sided polishing method of the present invention will be described.
The double-sided grinding method of the present invention is characterized in that,
the arrangement of the wafer held by the multi-wafer carrier is such that:
a reference carrier is selected from the plurality of carriers,
taking the center of the platform as an angle center, taking 1 or 2 carriers with the largest angle alpha formed by the center of the platform and the reference carrier as symmetrical carriers,
the difference between the average thickness A [ mu ] m of the wafer arranged on the reference carrier and the average thickness B [ mu ] m of the wafer arranged on the symmetrical carrier is 1.0 [ mu ] m or less, and the double-sided polishing of the wafer is performed.
Such an arrangement will be described with reference to fig. 2 to 4 and with specific examples.
In the example shown in fig. 2, 4 carriers 3a, 3b, 3x, and 3y are arranged at equal intervals along a circle centered on the stage center 5. Fig. 2 is a plan view of the rotary table 10 shown in fig. 1, when the upper table 1 is removed, as viewed from above. Thus, fig. 2 shows a case where 4 pieces of carriers 3a, 3b, 3x, and 3y are provided on the lower stage 2.
First, a reference vector is selected. Here, an example will be described in which the carrier 3a shown at the top in fig. 2 is selected as the reference carrier among the 4 carriers 3.
Next, from the other carriers 3b, 3x, and 3y except the reference carrier 3a, a symmetrical carrier having the largest angle α formed by the stage center 5 and the reference carrier 3a with the stage center 5 as the angular center is obtained. Here, the two straight lines forming the angle α are a straight line passing through the center 5 of the stage and the center 3ac of the reference carrier 3a, and a straight line passing through the center 5 of the stage and the center of the symmetrical carrier.
In the example shown in fig. 2, the angle α formed by the stage center 5, the center 3ac of the reference carrier 3a, and the center 3bc of the carrier 3b shown in the lowermost part of fig. 2 is 180 ° at the maximum angle. Therefore, in the example shown in fig. 2, the carrier 3b shown at the lowermost position, i.e., the carrier 3b located at a point symmetrical position with respect to the stage center 5 and the reference carrier 3a corresponds to a symmetrical carrier.
On the reference carrier 3a and the symmetrical carrier 3B selected in this way, wafers are arranged such that the difference between the average thickness a μm of the wafers arranged on the reference carrier 3a and the average thickness B μm of the wafers arranged on the symmetrical carrier 3B is 1.0 μm or less.
For example, when 1 wafer having an average thickness of a μm is arranged on the reference carrier 3a and 1 wafer having an average thickness of a 'μm is arranged on the symmetrical carrier 3B, a μm is set to an average thickness a and a' μm is set to an average thickness B. Alternatively, when 3 wafers having average thicknesses of a μm, B μm and c μm are arranged on the reference carrier 3a, and 3 wafers having average thicknesses of a 'μm, B' μm and c 'μm are arranged on the symmetrical carrier 3B, the average thickness A is { (a+b+c)/3 } } μm and the average thickness B is { (a' +b '+c')/3 } μm.
Fig. 3 shows another example of the arrangement of the carrier 3. In fig. 3, 6 pieces of carriers 3a, 3b, 3x, 3y, 3z, and 3w are arranged at equal intervals along a circle centered on the stage center 5. In the example shown in fig. 3, the symmetrical carrier is also 1 piece carrier 3b located at a point symmetrical position to the reference carrier 3a with respect to the platform center 5, as in the example of fig. 2.
In this way, when the carriers 3 are even-numbered and provided at equal intervals, the symmetrical carrier is 1-piece carrier 3b positioned in a point symmetrical position with respect to the stage center 5 and the reference carrier 3a, as in the example of fig. 2.
Next, a specific example in which the carrier 3 is an odd number of sheets will be described.
Fig. 4 shows an example in which 5 carriers 3a, 3c, 3d, 3e, and 3f are arranged at equal intervals along a circle centered on the platform center 5. Hereinafter, the case where the carrier 3a is used as a reference carrier will be described.
In the example shown in fig. 4, the angle α formed by the center 5 of the stage, the center 3ac of the reference carrier 3a, and the center 3cc of the carrier 3c positioned at the lower left in fig. 4 is maximized with the center 5 of the stage as the angle center. The angle α formed by the stage center 5, the center 3ac of the reference carrier 3a, and the center 3dc of the carrier 3d positioned right below in fig. 4 is the same maximum with the stage center 5 as the angle center. Thus, the symmetrical carriers with respect to the reference carrier 3a are the carriers 3c and 3d located at the lower left and lower right in fig. 4, respectively.
On the reference carrier 3a and the symmetrical carriers 3c and 3d selected in this way, wafers are arranged such that the difference between the average thickness a μm of the wafers arranged on the reference carrier and the average thickness B μm of the wafers arranged on the symmetrical carrier is 1.0 μm or less.
For example, when 1 wafer having an average thickness of a μm is arranged on the reference carrier 3a, 1 wafer having an average thickness of a 'μm is arranged on the symmetrical carrier 3c, and 1 wafer having an average thickness of B' μm is arranged on the symmetrical carrier 3d, a μm is set to an average thickness A, and { (a '+b')/2 } μm is set to an average thickness B. Alternatively, when 3 wafers having average thicknesses of a μm, B μm and c μm are arranged on the reference carrier 3a, 3 wafers having average thicknesses of a 'μm, B' μm and c 'μm are arranged on the symmetrical carrier 3c, and 3 wafers having average thicknesses of d' μm, e 'μm and f' μm are arranged on the symmetrical carrier 3d, the average thickness A of { (a+b+c)/3 } μm is set to the average thickness A, and the average thickness B of { (a '+b' +c '+d' +e '+f')/6 } μm is set to the average thickness B.
In this way, when the carriers 3 are odd-numbered and are arranged at equal intervals, the symmetrical carriers are 2-numbered carriers as in the example of fig. 4.
As described above, the wafers are placed on the carriers (the reference carrier 3a and the symmetrical carrier 3b, or the reference carrier 3a and the symmetrical carriers 3c and 3 d) and double-sided polishing of the wafers is performed, so that the variation in the thickness distribution of the wafers placed on the carriers can be reduced and double-sided polishing of the wafers can be performed, and therefore, tilting of the rotary table 10 (for example, the upper table 1) due to the pressing of the slurry can be prevented and double-sided polishing can be performed. As a result, according to the double-sided polishing method of the present invention, variations in polishing strength for a plurality of wafers can be suppressed, and thus, a wafer set with reduced variations in flatness after double-sided polishing can be provided.
The polishing is preferably performed such that the difference between the average thickness a μm and the average thickness B μm is not more than 0.8 μm on the carrier, and more preferably such that the difference is not more than 0.5 μm on the carrier. The smaller the difference is, the more wafers 20 are provided, in which the variation in flatness after double-sided polishing is further reduced. The smaller the difference is, the more preferable, and the lower limit value may be, for example, 0 μm.
Regardless of which of the plurality of carriers 3 provided in the double-sided polishing apparatus 100 is selected as the reference carrier, the wafers are preferably arranged such that the difference between the average thickness a μm and the average thickness B μm is 1.0 μm or less. By providing this, the variation in the thickness distribution of the wafer can be reduced or eliminated on all the carriers 3, and thus the inclination of the stage at the time of slurry pressure feeding can be further suppressed. As a result, according to this preferred embodiment, a wafer set in which the variation in flatness after double-sided polishing is further reduced can be provided.
Next, specific examples of the arrangement of the wafers will be described. Here, an example will be described in which the number of wafers required for a batch is 15, and 3 wafers are arranged on each of 5 carriers 3a, 3c, 3d, 3e, and 3f as shown in fig. 4.
In this case, for example, 15 wafers to be polished and 5 wafers for adjustment are prepared, and a total of 20 wafers are prepared. The thickness of these wafers was measured. As the thickness of the wafer, an average value of thicknesses measured in dots or lines may be used. The wafers for adjustment may not be 5 wafers.
The 20 wafers with measured thicknesses are arranged in the order of the thicknesses from the large to the small, and the numbers of 1, 2 and 3 … are marked. These are arranged in the order of carrier 3a, carrier 3c, carrier 3f, carrier 3e, carrier 3d, and carrier 3a … in the order of carrier 3a, carrier 3c, carrier 3d, 3e, and carrier 3f from the 1 st wafer so that the difference between the average thickness a μm and the average thickness B μm is 1.0 μm or less, and when this value is exceeded, a wafer to be arranged later is selected. Polishing the unconfigured wafers in another batch. This is merely an example of the arrangement.
In addition, although the example in which 3 wafers are arranged on 1 carrier is described above, the number of wafers arranged on 1 carrier is not particularly limited. For example, 1 to 4 wafers may be arranged on 1 carrier. In addition, the number of wafers arranged on the reference carrier is preferably the same as the number of wafers arranged on the symmetrical carrier. It is particularly preferable to arrange the same number of wafers for all carriers.
Next, a slurry that can be used in the double-sided polishing method of the present invention will be described.
The slurry used in the double-sided polishing method of the present invention is not particularly limited, and for example, an inorganic alkaline aqueous solution containing colloidal silica can be used. The particle size and concentration of the abrasive particles, the pH of the aqueous solution, and the base used are also not particularly limited.
More preferably, the slurry is fed under pressure through the rotary joint, and the wafer is polished on both sides so that the total flow rate of the fed slurry is 4l/min or more.
By pressing the slurry in this manner, the lubrication effect by the slurry can be utilized more effectively, and abnormal heat generation on the polishing surface can be prevented.
The total flow rate of the slurry supplied to the double-side polishing apparatus 100 may be, for example, 12l/min or less. The total flow rate of the slurry supplied to the double-side polishing apparatus 100 is more preferably 6l/min to 10 l/min.
In this case, it is preferable to perform double-sided polishing by making the slurry flow rate from the plurality of slurry supply holes uniform.
Examples
The present invention will be described specifically below with reference to examples and comparative examples, but the present invention is not limited to these examples.
Example 1
In example 1, double-sided polishing of the wafer 20 was performed using AC2000 of Lapmaster Wolters having the same configuration as the double-sided polishing apparatus 100 shown in fig. 1.
As the polishing pad, a foamed polyurethane pad having a shore a hardness of 80 was used.
The carrier 3 uses a DLC-coated material on a SUS substrate as a base material, and uses PVDF, which is a fluororesin, as an insert material for the workpiece hole. The number of work holes of each carrier 3 is 3, and the number of input carriers is 5.
These 5-piece carriers 3 are arranged on the lower platform 2 in the same configuration as shown in fig. 4.
The slurry used a KOH aqueous solution of pH10.5 containing colloidal silica having an average particle diameter of 35nm as abrasive particles at an abrasive particle concentration of 1.0% by weight. A rotary joint and a pump for slurry pressure feeding are connected to the slurry supply hole 6.
On the other hand, 20 wafers 20 of the object to be polished were prepared. As the wafer 20, a P-type single crystal silicon wafer having a diameter of 300mm was used.
The thickness of each wafer 20 was measured so as to be held by a capacitance type displacement meter. The data were distributed in 2 diameters per 1mm, and the average value of all the data was used as the thickness.
Next, the 20 wafers 20 whose thicknesses were measured were arranged in the order of the thickness from the larger one, and the numbers of 1, 2, and 3 … 20 were given. These are arranged in the order of carrier 3a, carrier 3c, carrier 3f, carrier 3e, carrier 3d, carrier 3a … shown in fig. 4 in the order of carrier 3a, carrier 3c, carrier 3d, carrier 3e, and carrier 3f from the 1 st wafer 20. In example 1, the carrier 3a, the carrier 3c, and the carrier 3f were used as reference carriers, respectively, so that the maximum value of the difference between the average thickness a μm and the average thickness B μm described above was not more than 1.0 μm, and a wafer placed at a delay was selected from among 20 wafers 20. Specifically, in example 1, the arrangement of the 5 th, 7 th, 14 th, 15 th, and 20 th wafers 20 was delayed, and a total of 15 th wafers 20 other than these were arranged and held on each of the 5 carriers 3a, 3c, 3d, 3e, and 3f, respectively. At this time, the maximum value of the difference between the average thickness A μm and the average thickness B μm was 0.22. Mu.m.
The wafer 20 thus arranged was subjected to double-sided polishing under the following conditions.
The total flow rate of the slurry supplied to the double-side polishing apparatus 100 was set to 8.0l/min.
The working load was set to 150gf/cm 2 。
The processing time is set by performing an inverse operation based on the polishing rate so that the batch average value of the center thickness of the wafer 20 converges to 775±0.3 μm.
The rotational speed of each driving unit is set as follows: and (3) an upper platform: 23.0rpm; the lower platform comprises: -20.0rpm; sun gear: -23.9rpm; internal gear: 7.7rpm.
Example 2 and 3
In examples 2 and 3, double-sided polishing of the wafer 20 was performed in the same manner as in example 1, except that the wafer 20 was disposed on the carrier 3 so that the maximum values of the differences between the average thickness a μm and the average thickness B μm described above were 0.73 μm and 0.95 μm, respectively.
Comparative example 1 and 2
In comparative examples 1 and 2, double-sided polishing of the wafer 20 was performed in the same manner as in example 1, except that the wafer 20 was disposed on the carrier 3 so that the maximum values of the differences between the average thickness a μm and the average thickness B μm described above were 1.08 μm and 1.24 μm, respectively.
Comparative example 3
In comparative example 3, double-sided polishing of the wafer 20 was performed in the same manner as in example 1, except that the wafers 20 of nos. 1 to 15 were each subjected to double-sided polishing by arranging 3 pieces of each of the carriers 3a, 3c, 3d, 3e and 3f in the order shown previously, regardless of the difference between the average thickness a μm and the average thickness B μm described previously. In comparative example 3, the maximum value of the difference between the average thickness a μm and the average thickness B μm described previously was 1.89 μm.
[ cleaning ]
All wafers subjected to double-sided polishing in examples 1 to 3 and comparative examples 1 to 3 were subjected to the condition NH 4 OH：H 2 O 2 ：H 2 O=1: 1: SC-1 washing was performed at 15.
[ evaluation ]
The flatness of all wafers 20 after cleaning was measured as GBIR (Global backside ideal range, overall backside ideal range) using Wafer Sight of KLA Tencor. The calculation of the GBIR value is carried out with 2mm E.E. set to M49 mode. Further, the difference between the maximum value and the minimum value of GBIR values of 15 wafers 20 (i.e., wafer groups in a lot) is referred to as GBIR Range, and is used as an index of the deviation.
Regarding each example and comparative example, the maximum value of the difference between the average thickness a μm and the average thickness B μm was set as the horizontal axis. The vertical axis is a numerical value obtained by dividing GBIR Range in the case of processing by the slurry supply method by GBIR Range in the case of processing by changing to a gravity falling type that does not generate buoyancy in the state of the same machine. Fig. 5 is a graph drawn with the horizontal axis and the vertical axis. In fig. 5, the results of examples 1 to 3 and comparative examples 1 to 3 are plotted in order from the left side to the right side.
As is clear from the results shown in fig. 5, according to the present invention, examples 1 to 3 in which wafers were arranged so that the difference between the average thickness a μm and the average thickness B μm was 1.0 μm or less and subjected to double-sided polishing, were able to achieve a variation in flatness after double-sided polishing equal to or less than that of the gravity drop method. The reason is considered that, in examples 1 to 3, by arranging the wafers so that the difference in thickness is 1.0 μm or less and performing double-sided polishing, tilting of the upper platen due to slurry pressure feed can be suppressed, and as a result, variation in polishing strength for 15 wafers can be suppressed, and thus variation in flatness after double-sided polishing can be reduced.
On the other hand, in comparative examples 1 to 3, the wafers were arranged so that the difference in thickness was not more than 1.0 μm, and double-sided polishing was performed, whereby the upper platen was inclined by slurry pressure feed, and as a result, it was considered that polishing strength was not uniform with respect to 15 wafers.
The present invention is not limited to the above embodiments. The above-described embodiments are examples, and any embodiments having substantially the same configuration and effects as the technical ideas described in the claims of the present invention are included in the technical scope of the present invention.
Claims (3)
1. A double-sided polishing method is characterized in that a plurality of carriers are arranged between an upper platform and a lower platform of a rotary platform with a platform center, so that more than 1 wafer is respectively held by the plurality of carriers, and the double sides of the wafer are polished while slurry is supplied in a pressure-feed mode,
a plurality of wafers including at least one group of wafers having different thicknesses from each other are prepared,
the wafers are arranged in the order from the large thickness to the small thickness, and are numbered,
the arrangement of the wafers held by the multi-wafer carrier is such that:
selecting a reference carrier from the plurality of carriers,
taking the center of the platform as an angle center, taking 1 or 2 carriers with the largest angle alpha formed by the center of the platform and the reference carrier as symmetrical carriers,
the difference between the average thickness A [ mu ] m of the wafers arranged on the reference carrier and the average thickness B [ mu ] m of the wafers arranged on the symmetrical carrier is 1.0 [ mu ] m or less, and the double-sided polishing of the wafers is performed,
in the configuration of the wafer in question,
the plurality of wafers are arranged on the multi-wafer carrier in order from wafer 1 such that the difference between the average thickness A [ mu ] m and the average thickness B [ mu ] m is 1.0 [ mu ] m or less, and the arrangement is delayed for wafers in which the difference between the average thickness A [ mu ] m and the average thickness B [ mu ] m exceeds 1.0 [ mu ] m.
2. The double-sided lapping method as claimed in claim 1, wherein,
the number of carriers is 4 or more, and the 4 or more carriers are arranged at equal intervals along a circle centered on the center of the stage.
3. The double-sided lapping method according to claim 1 or 2, wherein,
the slurry is conveyed under pressure through a rotary joint, and the double-sided polishing of the wafer is performed,
and (3) enabling the total flow rate of the slurry fed under pressure to be more than 4 l/min.
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| JP2020-084316 | 2020-05-13 | ||
| JP2020084316A JP6885492B1 (en) | 2020-05-13 | 2020-05-13 | Double-sided polishing method |
| PCT/JP2021/016109 WO2021230022A1 (en) | 2020-05-13 | 2021-04-21 | Double-sided polishing method |
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| KR (1) | KR102834543B1 (en) |
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Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5941759A (en) * | 1996-12-19 | 1999-08-24 | Shin-Etsu Handotai Co., Ltd. | Lapping method using upper and lower lapping turntables |
| JP2000216119A (en) * | 1999-01-26 | 2000-08-04 | Mitsubishi Materials Silicon Corp | Processing method of wafer of high flatness |
| JP2001121412A (en) * | 1999-10-21 | 2001-05-08 | Speedfam Co Ltd | Double side surface polisher |
| JP2002175961A (en) * | 2000-12-07 | 2002-06-21 | Rohm Co Ltd | Method of classifying product and method of manufacturing semiconductor wafer |
| JP2012033585A (en) * | 2010-07-29 | 2012-02-16 | Covalent Materials Corp | Polishing apparatus and polishing method |
| JP2012142050A (en) * | 2010-12-28 | 2012-07-26 | Konica Minolta Advanced Layers Inc | Manufacturing method of glass substrate for magnetic recording medium |
| JP2015069685A (en) * | 2013-09-30 | 2015-04-13 | Hoya株式会社 | Production method of magnetic disk glass substrate and magnetic disk |
| KR20150053049A (en) * | 2013-11-07 | 2015-05-15 | 주식회사 엘지실트론 | Double Side Polishing Method for Wafer |
| KR20170000067A (en) * | 2015-06-23 | 2017-01-02 | 주식회사 케이씨텍 | Chemical mechanical polishing apparatus |
| JP2017163018A (en) * | 2016-03-10 | 2017-09-14 | 株式会社東京精密 | Wafer processing apparatus and wafer processing method |
| JP2019107729A (en) * | 2017-12-18 | 2019-07-04 | 株式会社ディスコ | Holding table and polishing device provided with holding table |
| JP2019136837A (en) * | 2018-02-14 | 2019-08-22 | 信越半導体株式会社 | Double-sided polishing method |
| CN110418696A (en) * | 2017-04-20 | 2019-11-05 | 信越半导体株式会社 | The double-side grinding method and double-side polishing apparatus of wafer |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000015566A (en) | 1998-06-30 | 2000-01-18 | Mitsubishi Materials Silicon Corp | Both surface polishing device for semiconductor wafer |
| JP3791302B2 (en) * | 2000-05-31 | 2006-06-28 | 株式会社Ｓｕｍｃｏ | Semiconductor wafer polishing method using a double-side polishing apparatus |
| JP4241164B2 (en) * | 2003-04-23 | 2009-03-18 | 日立電線株式会社 | Semiconductor wafer polishing machine |
| DE102006032455A1 (en) * | 2006-07-13 | 2008-04-10 | Siltronic Ag | Method for simultaneous double-sided grinding of a plurality of semiconductor wafers and semiconductor wafer with excellent flatness |
| DE102006044367B4 (en) * | 2006-09-20 | 2011-07-14 | Siltronic AG, 81737 | A method of polishing a semiconductor wafer and a process-manufacturable polished semiconductor wafer |
| JP5301802B2 (en) * | 2007-09-25 | 2013-09-25 | Ｓｕｍｃｏ Ｔｅｃｈｘｉｖ株式会社 | Manufacturing method of semiconductor wafer |
| JP2012143839A (en) | 2011-01-12 | 2012-08-02 | Sumco Corp | Double-side polishing device and double-side polishing method using the same |
| JP6269450B2 (en) * | 2014-11-18 | 2018-01-31 | 信越半導体株式会社 | Workpiece processing equipment |
| JP6304132B2 (en) * | 2015-06-12 | 2018-04-04 | 信越半導体株式会社 | Workpiece processing equipment |
| JP6579056B2 (en) * | 2016-07-29 | 2019-09-25 | 株式会社Sumco | Wafer double-side polishing method |
-
2020
- 2020-05-13 JP JP2020084316A patent/JP6885492B1/en active Active
-
2021
- 2021-04-21 WO PCT/JP2021/016109 patent/WO2021230022A1/en active Application Filing
- 2021-04-21 CN CN202180030308.9A patent/CN115427193B/en active Active
- 2021-04-21 KR KR1020227037436A patent/KR102834543B1/en active Active
- 2021-04-26 TW TW110114831A patent/TWI853163B/en active
Patent Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5941759A (en) * | 1996-12-19 | 1999-08-24 | Shin-Etsu Handotai Co., Ltd. | Lapping method using upper and lower lapping turntables |
| JP2000216119A (en) * | 1999-01-26 | 2000-08-04 | Mitsubishi Materials Silicon Corp | Processing method of wafer of high flatness |
| JP2001121412A (en) * | 1999-10-21 | 2001-05-08 | Speedfam Co Ltd | Double side surface polisher |
| JP2002175961A (en) * | 2000-12-07 | 2002-06-21 | Rohm Co Ltd | Method of classifying product and method of manufacturing semiconductor wafer |
| JP2012033585A (en) * | 2010-07-29 | 2012-02-16 | Covalent Materials Corp | Polishing apparatus and polishing method |
| JP2012142050A (en) * | 2010-12-28 | 2012-07-26 | Konica Minolta Advanced Layers Inc | Manufacturing method of glass substrate for magnetic recording medium |
| JP2015069685A (en) * | 2013-09-30 | 2015-04-13 | Hoya株式会社 | Production method of magnetic disk glass substrate and magnetic disk |
| KR20150053049A (en) * | 2013-11-07 | 2015-05-15 | 주식회사 엘지실트론 | Double Side Polishing Method for Wafer |
| KR20170000067A (en) * | 2015-06-23 | 2017-01-02 | 주식회사 케이씨텍 | Chemical mechanical polishing apparatus |
| JP2017163018A (en) * | 2016-03-10 | 2017-09-14 | 株式会社東京精密 | Wafer processing apparatus and wafer processing method |
| CN110418696A (en) * | 2017-04-20 | 2019-11-05 | 信越半导体株式会社 | The double-side grinding method and double-side polishing apparatus of wafer |
| JP2019107729A (en) * | 2017-12-18 | 2019-07-04 | 株式会社ディスコ | Holding table and polishing device provided with holding table |
| JP2019136837A (en) * | 2018-02-14 | 2019-08-22 | 信越半導体株式会社 | Double-sided polishing method |
Non-Patent Citations (1)
| Title |
|---|
| 超薄钛酸锶电瓷基片研磨加工工艺优化;王威;阎秋生;潘继生;白振伟;;现代制造工程(12);第7-10页 * |
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| KR102834543B1 (en) | 2025-07-15 |
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| TW202147423A (en) | 2021-12-16 |
| WO2021230022A1 (en) | 2021-11-18 |
| TWI853163B (en) | 2024-08-21 |
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| JP6885492B1 (en) | 2021-06-16 |
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