CN115377062B - Chip unit, communication method, device, equipment and storage medium of chip unit - Google Patents
Chip unit, communication method, device, equipment and storage medium of chip unit Download PDFInfo
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- CN115377062B CN115377062B CN202211017977.5A CN202211017977A CN115377062B CN 115377062 B CN115377062 B CN 115377062B CN 202211017977 A CN202211017977 A CN 202211017977A CN 115377062 B CN115377062 B CN 115377062B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
- H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
- H04L69/322—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
- H04L69/323—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the physical layer [OSI layer 1]
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Abstract
The invention provides a chip unit, a communication method, a device, equipment and a storage medium of the chip unit, wherein the communication method of the chip unit is applied to any chip in the chip unit. The method can reduce the transmission delay and the power consumption when the communication interconnection is carried out between the chips.
Description
Technical Field
The disclosure relates to the technical field of semiconductors, and in particular relates to a chip unit, a communication method, a device and equipment of the chip unit, a storage medium, and a preparation method of the chip unit.
Background
With the development of semiconductor technology, the chip size tends to be miniaturized, and the development of technology makes the requirements on the data processing capability of the chip higher and higher.
Currently, in order to improve the data processing capability of a chip, a plurality of chips are generally packaged together through 2.5D, wherein 2.5D packaging refers to a manufacturing process of connecting a plurality of chips to an Interposer (TSV) through Wire Bonding (Wire Bonding), flip chip (Flip chip), or through silicon via (Through Silicon Via) after the individual chips are fabricated, without packaging the chips in parallel on the same Substrate (Substrate). Through the 2.5D packaging process, the packaging size area can be reduced, the distance between chip interconnections is reduced, and the electrical performance index of the chip is improved compared with the traditional packaging process.
However, in the chip particles packaged based on the above-described packaging process, interconnection between a plurality of chips still needs to be achieved through external pads, and there may be problems of transmission delay and increased power consumption.
Disclosure of Invention
The present disclosure provides a method for manufacturing a chip unit, a method for communicating a chip unit, a device, an apparatus, and a computer-readable storage medium.
In a first aspect, the present disclosure provides a method for manufacturing a chip unit, including:
Acquiring a wafer comprising a plurality of chips;
Preparing a re-wiring layer on the surface of the wafer, wherein the re-wiring layer interconnects at least part of the chips in the wafer, and rearranges the welding blocks of the chips according to a preset mode;
And cutting the wafer to obtain chip units, wherein each chip unit comprises a preset number of chips, and at least part of chips in each chip unit are interconnected.
In a second aspect, the present disclosure provides a chip unit comprising:
A wafer substrate;
a preset number of chips formed on the wafer substrate;
a rewiring layer is arranged on the chips with the preset number;
at least part of the chips in the preset number of chips are connected through the first connecting wires arranged in the rewiring layer.
In a third aspect, the present disclosure provides a communication method of a chip unit, applied to a chip, where the chip is any one of the chips in the chip unit in the second aspect, and the method includes:
Acquiring a communication instruction;
determining a current communication mode according to the communication instruction;
And according to the communication mode, selecting a corresponding communication PHY to establish communication connection with a receiving object to be communicated so as to carry out data communication with the receiving object, wherein the communication PHY is positioned in the chip.
In a fourth aspect, the present disclosure provides a communication device of a chip unit, applied to a chip, where the chip is any one of the chip units according to the first aspect, the device includes:
A communication controller and at least one communication PHY, each of the at least one communication PHY being coupled to the communication controller, each communication PHY corresponding to a communication mode;
The communication controller is used for acquiring a communication instruction, determining a current communication mode according to the communication instruction, and selecting a corresponding communication PHY from the at least one communication PHY to communicate with a receiving object to be communicated according to the communication instruction.
In a fifth aspect, the present disclosure provides an electronic device, which includes at least one chip unit according to the second aspect of the present disclosure, wherein a preset number of processing chips and/or memory chips are included in the chip unit, and at least one memory chip and/or processing chip is disposed corresponding to each chip unit, and the memory chips are bonded to the corresponding chip units through solder bumps.
In a sixth aspect, the present disclosure provides a computer readable storage medium having stored thereon a computer program, wherein the computer program, when executed by a processor, implements the communication method of the chip unit according to the third aspect of the present disclosure.
In the embodiment provided by the disclosure, after preparing a rewiring Layer (RDL, reDistribution Layer) on the surface of a wafer containing a plurality of chips to interconnect at least part of the chips in the wafer based on the rewiring Layer and rearranging the solder bumps (Pad) of the chips according to a preset manner, cutting the wafer to obtain chip units which comprise a preset number of chips and at least part of the chips in each chip unit are interconnected through the first connecting wires arranged in the rewiring Layer, when the chip units are obtained, the chips in the chip units can realize communication connection among the chips directly based on the first connecting wires in the chip units when the other chips are in the chip units without being realized based on external solder bumps when the chips need to communicate with other chips, therefore, in the embodiment provided by the disclosure, the chips in the chip units can determine the current communication mode according to the communication command, thereby selecting a PHY (physical Layer) corresponding to the current communication mode to establish communication connection with a receiving object and establishing the communication connection between the receiving object and carrying out communication between the chips based on the communication connection and the receiving object, and possible problems of data transmission delay and interconnection can be reduced when the chips are communicated between the receiving object.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the disclosure, nor is it intended to be used to limit the scope of the disclosure. Other features of the present disclosure will become apparent from the following specification.
Drawings
The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure, without limitation to the disclosure. The above and other features and advantages will become more readily apparent to those skilled in the art by describing in detail exemplary embodiments with reference to the attached drawings, in which:
Fig. 1 is a flowchart of a method for manufacturing a chip unit according to an embodiment of the disclosure;
fig. 2 is a schematic structural diagram of a chip unit according to an embodiment of the disclosure;
fig. 3 is a schematic diagram of chip unit dicing provided in an embodiment of the disclosure;
fig. 4 is a schematic structural diagram of schematic chip interconnection provided in an embodiment of the present disclosure;
fig. 5 is a flowchart of a communication method of a chip unit according to an embodiment of the disclosure;
FIG. 6 is a schematic flow chart of determining a communication mode according to an embodiment of the disclosure;
Fig. 7 is a schematic diagram of an on-chip communication circuit according to an embodiment of the disclosure;
FIG. 8 is a schematic diagram of another on-chip communication circuit provided by an embodiment of the present disclosure;
fig. 9 is a block diagram of a communication device of a chip unit according to an embodiment of the disclosure.
Detailed Description
For a better understanding of the technical solutions of the present disclosure, exemplary embodiments of the present disclosure will be described below with reference to the accompanying drawings, in which various details of the embodiments of the present disclosure are included to facilitate understanding, and they should be considered as merely exemplary. Accordingly, one of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the present disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.
Embodiments of the disclosure and features of embodiments may be combined with each other without conflict.
As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
In the related art, when chips are required to be manufactured, a plurality of isomorphic chips can be generally manufactured on a wafer, and then a conventional wafer packaging technology is used, that is, a finished wafer is cut into individual chips and then bonded and packaged, so that the manufacturing method has low packaging efficiency. With the progress of technology, a wafer level packaging technology is gradually developed, the technology is generally to package chips directly on a wafer, adhere a protective layer on the top or bottom of the wafer, connect a circuit outside the protective layer, and cut the wafer into single chips for use, although the packaging efficiency is improved by the preparation method of the chips, the data processing capability of the single chips is generally lower, and in order to improve the data processing capability of the chips obtained by cutting, a plurality of chips are generally packaged together based on 2.5D at present so as to obtain a chip unit containing a plurality of chips, and although the preparation method technology can reduce the packaging size area, the distance between the chips and improve the electrical performance index of the chips, the interconnection between the chips still needs to be realized through an external welding block in the chip unit obtained by the preparation method, so that the problem of increasing transmission delay and power consumption may exist.
In order to solve the above problems and improve the data processing capability of the chip obtained by cutting while improving the packaging efficiency, an embodiment of the disclosure provides a method for manufacturing a chip unit, please refer to fig. 1, which is a flowchart of the method for manufacturing a chip unit provided in the embodiment of the disclosure.
As shown in fig. 1, the method for manufacturing a chip unit according to the embodiment of the present disclosure may include the following steps S11 to S13.
In step S11, a wafer including a plurality of chips is obtained.
And S12, preparing a re-wiring layer on the surface of the wafer, wherein the re-wiring layer interconnects at least part of chips in the wafer and rearranges the welding blocks of the chips according to a preset mode, and S13, cutting the wafer to obtain chip units, wherein each chip unit comprises a preset number of chips, and at least part of chips in each chip unit are interconnected.
In the embodiment of the present disclosure, the preset number may be 2, or may also be a positive integer greater than 2, that is, a chip unit obtained based on the preparation method may include at least 2 chips that are internally interconnected.
That is, in the embodiments of the present disclosure, in order to improve the data processing capability of chips directly cut from a wafer while improving the packaging efficiency, when preparing the chips, a re-routing layer may be prepared on the surface of the wafer for the wafer containing a plurality of chips, so that all or part of the chips in the wafer are interconnected by metal wires disposed in the re-routing layer while the pads (Pad) of the chips are rearranged in a preset manner based on the re-routing layer, so that the chip units cut from the wafer and including a preset number of chips not only have a strong data processing capability, but also because part of the chips in the chip units are interconnected, the chips in the chip units can communicate directly inside without communicating based on external pads, so as to reduce transmission delay and power consumption, wherein the first metal wires in the re-routing layer for connecting at least part of the chips in the chip units are different from the second metal wires for rearranging the pads of the chips in the chip units in a preset manner.
For ease of understanding, please refer to fig. 2, which is a schematic structural diagram of a chip unit provided in an embodiment of the disclosure. As shown in fig. 2, the chip unit 200 provided in the embodiment of the disclosure includes a wafer substrate 210 and a preset number of chips, where the preset number of chips are formed on the wafer substrate 210, and the chips may be, for example, a chip 220, a chip 221 and a chip 222 shown in fig. 2, a redistribution layer 230 is disposed on the preset number of chips, and at least some of the chips in the preset number are connected through a first connection wire 240 disposed in the redistribution layer 230.
In addition, as shown in fig. 2, the solder bumps 250 of each chip in the chip unit according to the embodiment of the present disclosure are rearranged by the second connection wires 260 provided in the rewiring layer 230.
Wherein the first connection wire 240 and the second connection wire 260 may be formed in the re-wiring layer 230 through a patterning process to interconnect at least part of chips within the chip unit based on the first connection wire 240 and to connect each chip to a corresponding solder bump based on the second connection wire 260 to interconnect with an object outside the chip unit based on the solder bump, although only one implementation provided by an embodiment of the present disclosure is provided herein without being particularly limited thereto.
Please refer to fig. 3, which is a schematic diagram illustrating a chip unit dicing according to an embodiment of the disclosure. In the embodiment of the present invention, in preparing the chip unit shown in fig. 2, in the wafer including a plurality of chips, the scribe line groove 270 shown in fig. 2 may be prepared between every two adjacent chips of the plurality of chips, and in this embodiment, the dicing of the wafer in the step S13 may be performed to obtain the chip unit, by dicing the wafer based on the scribe line groove.
That is, in actual implementation, after the chips on the wafer are interconnected through the redistribution layer in the above step S12, the chip units including the preset number of chips may be obtained by dicing from the wafer based on the scribe line grooves between every two adjacent chips on the wafer, for example, as shown by the dashed line boxes in fig. 3, the chip units including 2,3, 4 or more chips may be obtained conveniently and accurately by dicing from the scribe line grooves 270 on the wafer where the package is completed, and the chip units of the interconnection between the chips and the interconnection with the external solder bumps may also exist, so that the chip units of the connection between the chips with strong data processing capability may be obtained conveniently while the packaging efficiency is improved.
It should be noted that, in some embodiments, after dicing the wafer to obtain the plurality of chip units based on the step S13, the method may further include bonding a first chip to a corresponding chip unit to interconnect the first chip with at least a portion of a second chip in the chip unit, where the first chip is a chip other than the chip unit.
That is, in order to further enhance the data processing capability, after a plurality of chip units are prepared, a single chip or at least one first chip in one chip unit may be interconnected with at least a portion of a second chip in another chip unit by bonding. For example, after preparing a chip unit 1 including a plurality of processing chips and a chip unit 2 including a plurality of memory chips, a part of the processing chips in the chip unit 1 and a part of the memory chips in the chip unit 2 may be connected in a bonding manner.
Please refer to fig. 4, which is a schematic diagram illustrating a chip interconnection structure provided in an embodiment of the disclosure. As shown in fig. 4, in some embodiments, a side of the solder bump 250 away from the wafer substrate 210 may be provided with a base layer 280 (substrate), and a side of the base layer away from the solder bump 250 may be provided with a plurality of Package balls 290 (Package balls), and the solder bump 250 and the plurality of Package balls 290 may be correspondingly connected by connection wires.
In order to improve the communication efficiency between the chip interiors and avoid the problem of increasing transmission delay and power consumption during communication between the chip interiors, the embodiments of the present disclosure further provide a communication method of a chip unit, please refer to fig. 5, which is a flowchart of the communication method of a chip unit provided in the embodiments of the present disclosure, where the method may be applied to a chip, which may be any one of the chip units obtained by the preparation method of a chip unit provided in the embodiments of the present disclosure, for example, may be the chip 220 in the chip unit 200 shown in fig. 2, and in some embodiments, the chip may be applied to an electronic device such as a terminal device or a server, where the terminal device may be a vehicle-mounted device, a User Equipment (UE), a mobile device, a User terminal, a cellular phone, a cordless phone, a Personal digital assistant (Personal DIGITAL ASSISTANT, PDA), a handheld device, a computing device, a vehicle-mounted device, a wearable device, or the like, which is not limited herein.
As shown in fig. 5, the communication method of the chip unit provided in the embodiment of the present disclosure may include the following steps S51 to S53, which are described in detail below.
Step S51, a communication instruction is acquired.
The communication instruction may be an instruction that instructs communication between the chip and the receiving object to interact data and further execute a computing task, where the communication instruction may be sent to the chip by an external object, or may also be obtained by the chip according to a preset instruction stored in a processing core of the chip, where the external object is not specifically limited, and the external object may be, for example, another chip in a chip unit where the chip is located, a chip in another chip unit other than the chip unit, or an external electronic device, and the receiving object may be another chip in a chip unit where the chip is located, a chip in another chip unit, or an external electronic device, and the like.
In addition, unless otherwise specified, the computing task performed by the chip in the chip unit described in the embodiments of the present disclosure may be any one of an image processing task, a voice processing task, a text processing task, and a video processing task. For example, in the face recognition scenario, in the case of obtaining the authorization of the user, the chip may perform face recognition processing for the obtained face image of the user and provide the recognition result.
Step S52, according to the communication instruction, determining the current communication mode.
In the related art, since the chips are all required to be realized based on external solder blocks during communication, the chips in the related art are all required to be realized based on a long-distance communication mode during communication, and in the long-distance communication mode, in order to ensure the stability and reliability of data transmission, according to different transmission channel quality, a more bit error correction mode is required to be correspondingly configured, and the requirements on the transmission frequency and the transmission voltage are also higher, so that the transmission delay and the power consumption are generally increased.
In the embodiment of the disclosure, at least part of chips in the chip unit obtained by the method for manufacturing the chip unit provided by the embodiment of the disclosure are interconnected with each other through the first connecting wire, that is, physical interconnection is realized, so that when the chips communicate with the receiving object, communication branches which can be selectively used by the chips are different according to different positions of the receiving object.
That is, in the embodiment of the present disclosure, when communication is performed between the chip interiors of the same chip unit, communication may not be performed by means of the communication branch of the external solder, as in the related art, but stable and reliable communication transmission may be performed based on the short-range communication mode by means of the communication branch constituted by the first connection wires directly interconnecting them, and when the chip of the chip unit needs to communicate with an external receiving object, communication transmission may be performed by means of the long-range communication mode.
Therefore, in order to reduce transmission delay and power consumption and enable the chips to flexibly and efficiently perform communication interconnection, in the embodiment of the disclosure, after the chips receive a communication instruction, a current communication mode may be determined according to the communication instruction, so as to flexibly select a corresponding communication branch to establish communication connection with a receiving object according to the communication mode, and perform data communication.
Please refer to fig. 6, which is a flowchart illustrating a communication mode determination process according to an embodiment of the present disclosure. As shown in fig. 6, in the embodiment of the disclosure, the determining the current communication mode according to the communication instruction may specifically include step S521 of acquiring, from the communication instruction, location information of the receiving object, step S522 of determining that the current communication mode is the first preset communication mode if the location information indicates that the receiving object is a chip other than the chip in the chip unit, and step S523 of determining that the current communication mode is the second preset communication mode if the location information indicates that the receiving object is an object other than the chip unit.
In the embodiment of the disclosure, for convenience of explanation, the communication mode of the chip includes a first preset communication mode and a second preset communication mode, where the first preset communication mode is a short-distance communication mode, that is, a mode in which the chips in the chip unit communicate with each other, and the second preset communication mode is a long-distance communication mode, that is, a mode in which the chips in the chip unit communicate with the object outside the chip unit, for example, the chips in other chip units. In practical implementation, a plurality of communication modes may be set as required, for example, a first preset communication mode is set as a short-range communication mode, a second preset communication mode is set as a medium-short-range communication mode, and a third preset communication mode is set as a long-range communication mode, which is not particularly limited herein.
After step S52, step S53 is performed, where a corresponding communication PHY is selected to establish a communication connection with the receiving object to be communicated according to the communication mode, so as to perform data communication with the receiving object, where the communication PHY is located in the chip.
Please refer to fig. 7, which is a schematic diagram of an on-chip communication circuit according to an embodiment of the disclosure. As shown in fig. 7, in the embodiment of the disclosure, the chip further includes a first communication controller 71 and a gating switch 72, where the gating switch 72 includes at least two switch elements, a first end of each switch element is connected to the first communication controller 71, and a second end of each switch element is respectively connected to a communication PHY corresponding to a different communication mode, where the communication PHYs of the different communication modes may be, for example, a first communication PHY73 and a second communication PHY74 shown in fig. 7, and the gating switch 72 may be a multi-path program-controlled switch, for example, where the communication modes include a first preset communication mode and a second preset communication mode, the gating switch 72 may be a two-path control switch.
In this embodiment, after determining the current communication mode according to the step S52, the selecting a corresponding communication PHY to establish a communication connection with the receiving object to be communicated according to the communication mode to perform data communication with the receiving object includes controlling a switch member of the gating switch to which the second end is connected to close the first communication PHY to establish a communication connection with the receiving object through the first communication controller and the first communication PHY, where the first communication PHY corresponds to the first preset communication mode, and/or controlling a switch member of the gating switch to which the second end is connected to close the second communication PHY to establish a communication connection with the receiving object through the first communication controller and the second communication PHY, where the communication mode includes the second preset communication mode.
In such an embodiment, the first communication controller may be a universal communication controller (CCU, communication Control Unit).
That is, it is possible to make the chip communicate with other chips in the chip unit based on the communication protocol corresponding to the short-range communication mode by controlling the switching element connected to the first communication PHY in the gating switch to be closed in the case where the current communication mode determined based on step S52 includes the first preset communication mode, such as the short-range communication mode, and make the chip communicate with other objects outside the chip unit, such as chips outside the chip unit or other external circuits, based on the communication protocol corresponding to the long-range communication mode and by means of the external corresponding solder bumps in the case where the current communication mode includes the second preset communication mode, such as the long-range communication mode, by controlling the switching element connected to the second communication PHY in the gating switch to be closed.
As can be seen from the above description, in this embodiment, by setting the gating switch and the communication PHY corresponding to different communication modes, the chip can adaptively and flexibly select a suitable communication branch and establish communication connection with the receiving object according to the different current communication modes, so as to reduce transmission delay and power consumption.
Please refer to fig. 8, which is a schematic diagram of another on-chip communication circuit according to an embodiment of the disclosure. As shown in fig. 8, in the embodiment of the present disclosure, the chip may further include a second communication controller 81, where the second communication controller 81 is connected to communication PHYs corresponding to different communication modes, and the communication PHYs of different communication modes may be, for example, a first communication PHY82 and a second communication PHY83 as shown in fig. 8.
In this embodiment, the selecting a corresponding communication PHY to establish a communication connection with a receiving object to be communicated according to a communication mode to perform data communication with the receiving object includes controlling a second communication controller to establish a communication connection with the receiving object based on a first communication PHY corresponding to a first preset communication mode if the communication mode includes the first preset communication mode, and/or controlling a second communication controller to establish a communication connection with the receiving object based on a second communication PHY corresponding to a second preset communication mode if the communication mode includes the second preset communication mode.
In this embodiment, the second communication controller 81 may be a configurable communication controller, and specifically may adaptively establish a communication connection with the receiving object based on a corresponding communication PHY connected thereto according to a current communication mode, so as to reduce transmission delay and power consumption.
In addition, in the embodiment of the present disclosure, in the process of executing the step S53, the method further includes configuring a communication protocol corresponding to the communication mode, and establishing a communication connection with the receiving object based on the communication protocol through the communication PHY.
That is, after determining the current communication mode, in the process of establishing the communication connection, an appropriate communication protocol can be adaptively selected according to the channel quality corresponding to different modes, so that the transmission delay and the power consumption can be reduced as much as possible on the basis of not affecting the data communication.
In an embodiment of the disclosure, configuring a communication protocol corresponding to a communication mode includes configuring communication parameters in the communication protocol according to the communication mode, wherein the communication parameters include at least one of an error correction mode, a transmission frequency, and a transmission voltage.
For example, in the embodiment shown in fig. 7 described above, after determining the current communication mode, parameters such as an error correction mode, a transmission frequency, and a transmission voltage in the communication protocol may be configured by a configuration circuit connected to the first communication PHY73 and the second communication PHY74, respectively, as shown in fig. 7, for example, in the short-range communication mode, error correction bits may be configured to be shorter or not configured, and in the long-range communication mode, error correction bits of more bits may be configured.
In addition, it should be noted that, in the embodiment of the present disclosure, after the communication method of the chip unit according to the embodiment of the present disclosure establishes a communication connection with the receiving object, the communication of the chip may use a high-speed data communication manner, for example, the high-speed data communication may be performed based on a high-speed serial computer expansion bus standard (PCIE, PERIPHERAL COMPONENT INTERCONNECT EXPRESS) interface, a parallel clock (Serdes) interface, or the like.
In summary, according to the communication method of the chip unit provided by the embodiment of the present disclosure, when a communication instruction is received by a chip in the chip unit obtained by the preparation method of the chip unit provided by the embodiment of the present disclosure, a current communication mode may be determined according to the communication instruction, so that a communication PHY corresponding to the current communication mode is selected to establish a communication connection with a receiving object, and data communication is performed between the communication connection and the receiving object based on the communication connection, so as to reduce problems of transmission delay and increased power consumption that may exist when the chip is interconnected.
It will be appreciated that the above-mentioned method embodiments of the present disclosure may be combined with each other to form a combined embodiment without departing from the principle logic, and are limited to the description of the present disclosure. It will be appreciated by those skilled in the art that in the above-described methods of the embodiments, the particular order of execution of the steps should be determined by their function and possible inherent logic.
In addition, the disclosure further provides a communication device, an electronic device and a computer readable storage medium of the chip unit, and the above may be used to implement any one of the communication methods of the chip unit provided in the disclosure, and corresponding technical schemes and descriptions and corresponding descriptions of method parts are omitted.
Fig. 9 is a block diagram of a communication device of a chip unit according to an embodiment of the disclosure.
Referring to fig. 9, an embodiment of the present disclosure provides a communication device of a chip unit, where the device 900 may be used for a chip, where the chip may be any one of the chip units obtained according to the method for preparing a chip unit in the embodiment of the present disclosure, and the device 900 includes a communication controller 910 and at least one communication PHY, where the at least one communication PHY may be, for example, a communication PHY920 and a communication PHY930 shown in fig. 9, and each of the at least one communication PHY is connected to the communication controller 910, and each of the communication PHYs corresponds to a communication mode, and the communication controller 910 is configured to obtain a communication instruction and determine a current communication mode according to the communication instruction, and select, according to the communication instruction, a corresponding communication PHY from the at least one communication PHY to communicate with a receiving object to be communicated.
In some embodiments, the communication controller 910 may be configured to, when determining the current communication mode according to the communication instruction, obtain location information of the receiving object from the communication instruction, determine that the current communication mode is a first preset communication mode if the location information indicates that the receiving object is a chip other than the chip in the chip unit, and determine that the current communication mode is a second preset communication mode if the location information indicates that the receiving object is an object other than the chip unit.
In some embodiments, the communication controller 910 may be the first communication controller 71 shown in fig. 7, in which implementation, the apparatus 900 may further include a gating switch, where the gating switch includes at least two switch elements, a first end of each switch element is connected to the first communication controller, and a second end of each switch element is connected to a communication PHY corresponding to a different communication mode, where the communication controller 910 selects a corresponding communication PHY to establish a communication connection with a receiving object to be communicated according to the communication mode, and when the communication mode includes a first preset communication mode, may be used to establish a communication connection with the receiving object by controlling the switch element, to which the first communication PHY is connected, in the gating switch, to establish a communication connection with the receiving object through the first communication controller and the first communication PHY, and/or, where the communication mode includes a second preset communication mode, to establish a communication connection with the second communication PHY through the switch element, to which the second communication PHY is connected, in the control switch element is connected to the second end, to establish a communication connection with the second communication PHY through the first communication controller and the second communication PHY.
In some embodiments, the communication controller 910 may be the second communication controller 81 shown in fig. 8, where the communication controller 910 may be configured to, when selecting a corresponding communication PHY to establish a communication connection with a receiving object to be communicated according to a communication mode to perform data communication with the receiving object, control the second communication controller to establish a communication connection with the receiving object based on the first communication PHY if the communication mode includes a first preset communication mode, where the first communication PHY corresponds to the first preset communication mode, and/or control the second communication controller to establish a communication connection with the receiving object based on the second communication PHY if the communication mode includes a second preset communication mode, where the second communication PHY corresponds to the second preset communication mode.
In some embodiments, the communication controller 910 may be further configured to configure a communication protocol corresponding to the communication mode, and the communication controller 910 may be further configured to establish a communication connection with the receiving object based on the communication protocol through the communication PHY in selecting the corresponding communication PHY to establish the communication connection with the receiving object according to the communication mode.
The embodiment of the disclosure provides electronic equipment, which comprises at least one chip unit, wherein the chip unit comprises a preset number of processing chips and/or memory chips, and one memory chip and/or processing chip is arranged corresponding to each chip unit, and the memory chips are bonded to the corresponding chip units through welding blocks.
In some embodiments, another chip unit is bonded to the chip unit.
The disclosed embodiments also provide a computer readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the communication method of the chip unit described above. The computer readable storage medium may be a volatile or nonvolatile computer readable storage medium.
The disclosed embodiments also provide a computer program product comprising computer readable code, or a non-transitory computer readable storage medium carrying computer readable code, which when run in a processor of an electronic device, performs the communication method of the chip unit described above.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, functional modules/units in the apparatus, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components, for example, one physical component may have a plurality of functions, or one function or step may be cooperatively performed by several physical components. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer-readable storage media, which may include computer storage media (or non-transitory media) and communication media (or transitory media).
The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable program instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, random Access Memory (RAM), read Only Memory (ROM), erasable Programmable Read Only Memory (EPROM), static Random Access Memory (SRAM), flash memory or other memory technology, portable compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical disc storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable program instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and may include any information delivery media.
The computer readable program instructions described herein may be downloaded from a computer readable storage medium to a respective computing/processing device or to an external computer or external storage device over a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmissions, wireless transmissions, routers, firewalls, switches, gateway computers and/or edge servers. The network interface card or network interface in each computing/processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium in the respective computing/processing device.
The computer program instructions for performing the operations of the present disclosure may be assembly instructions, instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including an object oriented programming language such as SMALLTALK, C ++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer readable program instructions may be executed entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, aspects of the present disclosure are implemented by personalizing electronic circuitry, such as programmable logic circuitry, field Programmable Gate Arrays (FPGAs), or Programmable Logic Arrays (PLAs), with state information of computer readable program instructions, which can execute the computer readable program instructions.
The computer program product described herein may be embodied in hardware, software, or a combination thereof. In an alternative embodiment, the computer program product is embodied as a computer storage medium, and in another alternative embodiment, the computer program product is embodied as a software product, such as a software development kit (Software Development Kit, SDK), or the like.
Various aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.
These computer readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer readable program instructions may also be stored in a computer readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer readable medium having the instructions stored therein includes an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer, other programmable apparatus or other devices implement the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted in a generic and descriptive sense only and not for purpose of limitation. In some instances, it will be apparent to one skilled in the art that features, characteristics, and/or elements described in connection with a particular embodiment may be used alone or in combination with other embodiments unless explicitly stated otherwise. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the disclosure as set forth in the appended claims.
Claims (10)
1. The communication method of the chip unit is characterized by being applied to a chip, wherein the chip is any chip in the chip unit, and the chip unit comprises a wafer substrate, a preset number of chips, a rewiring layer, a first connecting wire, a second connecting wire, a first connecting wire and a second connecting wire, wherein the preset number of chips are formed on the wafer substrate;
The method comprises the following steps:
Acquiring a communication instruction;
determining a current communication mode according to the communication instruction;
According to the communication mode, selecting a corresponding communication PHY to establish communication connection with a receiving object to be communicated so as to communicate with the receiving object, wherein the communication PHY is positioned in the chip;
wherein, according to the communication instruction, determining the current communication mode includes:
The method comprises the steps of obtaining position information of a receiving object from a communication instruction, determining that a current communication mode is a first preset communication mode when the position information indicates that the receiving object is a chip except the chip in a chip unit, and determining that the current communication mode is a second preset communication mode when the position information indicates that the receiving object is an object except the chip unit.
2. The method of claim 1, wherein the chip further comprises a first communication controller and a gating switch, the gating switch comprising at least two switching elements, a first end of each switching element being connected to the first communication controller, and a second end of each switching element being connected to a communication PHY corresponding to a different communication mode, respectively;
the selecting a corresponding communication PHY to establish communication connection with a receiving object to be communicated according to the communication mode, so as to communicate with the receiving object, includes:
In the case that the communication mode includes the first preset communication mode, a first communication PHY is connected to the receiving object through the first communication controller and the first communication PHY by controlling a switching element connected to a second end of the gating switch to be closed, wherein the first communication PHY corresponds to the first preset communication mode, and/or,
And under the condition that the communication mode comprises the second preset communication mode, a switch piece with a second communication PHY connected to a second end in the gating switch is controlled to be closed, so that communication connection is established between the second communication PHY and the receiving object through the first communication controller and the second communication PHY, wherein the second communication PHY corresponds to the second preset communication mode.
3. The method of claim 1, further comprising a second communication controller within the chip, the second communication controller being coupled to a communication PHY corresponding to a different communication mode;
the selecting a corresponding communication PHY to establish communication connection with a receiving object to be communicated according to the communication mode, so as to communicate with the receiving object, includes:
And controlling the second communication controller to establish a communication connection with the receiving object based on a first communication PHY corresponding to the first preset communication mode, and/or,
And controlling the second communication controller to establish communication connection with the receiving object based on a second communication PHY in the case that the communication mode includes the second preset communication mode, wherein the second communication PHY corresponds to the second preset communication mode.
4. The method according to claim 1, wherein in selecting a corresponding communication PHY to establish a communication connection with a receiving object to be communicated in accordance with the communication mode, the method further comprises:
configuring a communication protocol corresponding to the communication mode;
and establishing communication connection with the receiving object based on the communication protocol through the communication PHY.
5. The method of claim 4, wherein configuring a communication protocol corresponding to the communication mode comprises:
And configuring communication parameters in the communication protocol according to the communication mode, wherein the communication parameters comprise at least one of an error correction mode, a transmission frequency and a transmission voltage.
6. A chip unit, wherein any chip in the chip unit communicates using the communication method according to any one of claims 1 to 5, the chip unit comprising:
A wafer substrate;
a preset number of chips formed on the wafer substrate;
a rewiring layer is arranged on the chips with the preset number;
at least part of the chips in the preset number of chips are connected through the first connecting wires arranged in the rewiring layer.
7. The chip unit of claim 6, wherein the solder bumps of each of the chips are rearranged by a second connecting wire disposed in the rewiring layer.
8. The communication device of the chip unit is characterized by being applied to a chip, wherein the chip is any chip in the chip unit, and the chip unit comprises a wafer substrate, a preset number of chips, a rewiring layer, a first connecting wire, a second connecting wire, a first connecting wire and a second connecting wire, wherein the preset number of chips are formed on the wafer substrate;
The device comprises:
A communication controller and at least one communication PHY, each of the at least one communication PHY being coupled to the communication controller, each communication PHY corresponding to a communication mode;
The communication controller is used for acquiring a communication instruction, determining a current communication mode according to the communication instruction, and selecting a corresponding communication PHY from the at least one communication PHY to communicate with a receiving object to be communicated according to the communication instruction;
Wherein, when determining the current communication mode according to the communication instruction, the communication controller is configured to:
The method comprises the steps of obtaining position information of a receiving object from a communication instruction, determining that a current communication mode is a first preset communication mode when the position information indicates that the receiving object is a chip except the chip in a chip unit, and determining that the current communication mode is a second preset communication mode when the position information indicates that the receiving object is an object except the chip unit.
9. An electronic device, comprising:
At least one chip unit as claimed in claim 6 or 7, comprising a predetermined number of processing chips and/or memory chips, and
At least one memory chip and/or processing chip is provided corresponding to each of the chip units, and the memory chip is bonded to the corresponding chip unit by a solder bump.
10. The electronic device of claim 9, wherein the electronic device comprises a memory device,
And bonding another chip unit on the chip unit.
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| CN105957836A (en) * | 2016-06-01 | 2016-09-21 | 格科微电子（上海）有限公司 | Fan-out type wafer-level packaging method for semiconductor device |
| WO2020237706A1 (en) * | 2019-05-30 | 2020-12-03 | 上海新微技术研发中心有限公司 | Method for packaging silicon optical module, and silicon optical module |
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