CN115360241A - Gate and field plate structure of radio frequency VDMOS transistor and preparation method thereof - Google Patents

Abstract

The invention relates to a gate and field plate structure of a radio frequency VDMOS transistor and a preparation method thereof, comprising a silicon substrate, an epitaxial layer, wherein the epitaxial layer is located on the silicon substrate; an oxide layer, wherein the oxide layer A partial area on the surface of the epitaxial layer; a gate oxide layer, the gate oxide layer is located on the surface of the epitaxial layer other than the oxide layer; polysilicon, the polysilicon is located on the surface of the oxide layer and the surfaces of the gate oxide layer on both sides. The integrated structure of the grid and the field plate proposed by the present invention can transfer the grid alloy process to the field plate, without alloying fine grid bars, and reducing the manufacturing difficulty of the alloy process.

Description

Gate and field plate structure of a radio frequency VDMOS transistor and its preparation method

technical field

The invention belongs to the technical field of design and manufacture of semiconductor microelectronics, and in particular relates to a gate and field plate structure of a radio frequency VDMOS and a preparation method thereof.

Background technique

In the field of microwave technology, RF VDMOS (vertical double-diffused metal oxide semiconductor) transistors are widely used in power switches. The switching speed of the RF VDMOS transistor mainly depends on the charging and discharging of the internal capacitance of the device, and the withstand voltage of the device depends on the source-drain breakdown voltage of the device. In order to continuously improve the performance of the RF VDMOS, the design includes the following technical measures: 1) The field plate structure is adopted to increase the source-drain breakdown voltage of the device, thereby improving the withstand voltage of the device. 2) Reduce the gate length and improve the frequency performance of the device.

At present, VDMOS transistors usually adopt a structure in which the gate and field plates are separated. This structure can effectively reduce the parasitic gate-drain feedback capacitance and improve frequency performance. However, the symmetry of the gate and field plates is difficult to control, and it is easy to cause discretization of device parameters. For reducing the gate length, it is necessary to continuously improve the lithography accuracy of the lithography machine, which is highly dependent on the lithography equipment, and the difficulty of the alloy will increase after the gate length is continuously reduced.

Contents of the invention

The invention proposes a gate and field plate structure of a radio frequency VDMOS transistor and a preparation method thereof, the purpose of which is to improve the symmetry of the gate and field plate structure and improve the consistency of device parameters. Reduce the high dependence of the preparation process on the precision of the lithography machine, and reduce the difficulty of the manufacturing process.

Technical solution: In order to realize the above technical solution, the present invention provides a gate and field plate structure of a radio frequency VDMOS transistor, comprising a silicon substrate and an epitaxial layer, wherein the epitaxial layer is located on the silicon substrate; the oxide layer, Wherein the oxide layer is located in a part of the surface of the epitaxial layer; the gate oxide layer is located on the surface of the epitaxial layer other than the oxide layer; polysilicon, the polysilicon is located on the surface of the oxide layer and on both sides gate oxide surface.

The present invention further provides a preparation method of the gate and field plate structure of the above-mentioned radio frequency VDMOS transistor in detail, including the following steps:

Step 1, preparing an oxide layer on the surface of the epitaxial layer on the silicon substrate;

Step 2, selectively etching the oxide layer in a partial region of the surface of the epitaxial layer, terminating at the edge of the surface of the epitaxial layer;

Step 3, preparing a gate oxide layer on the surface of the epitaxial layer, and depositing polysilicon on the surface of the oxide layer and the gate oxide layer;

Step 4, selectively etching the polysilicon to terminate at the edge of the surface of the gate oxide layer to form a gate and field plate structure;

Step 5, using gate self-alignment technology to perform conventional doping of radio frequency VDMOS.

Wherein, the silicon substrate is an N+ type silicon substrate, and the epitaxial layer is an N− type epitaxial layer.

Preferably, in step 1, an oxide layer is formed by thermal growth, LPCVD or PECVD;

Preferably, in step 1, the thickness of the oxide layer is 1 μm to 3 μm;

Preferably, in step 3, a gate oxide layer is formed by thermal growth, and polysilicon is formed by LPCVD deposition;

所述多晶硅厚度为

Preferably, in step 3, the thickness of the gate oxide layer is

The polysilicon thickness is

The present application also provides an application of the gate and field plate structure of the radio frequency VDMOS transistor in the preparation of a microwave field effect power transistor device.

Beneficial effect:

(1) The integrated structure of the grid and the field plate proposed by the present invention can transfer the grid alloy process to the field plate, without alloying fine grid bars, which reduces the manufacturing difficulty of the alloy process;

(2) The grid and field plate structure proposed by the present invention are highly symmetrical, which improves the consistency of the breakdown voltage and parasitic capacitance of the device, thereby improving the microwave performance of the device;

(3) Through sidewall self-alignment etching, the length of the gate can be precisely controlled, and the requirements for lithography precision can be reduced, thereby reducing the difficulty of the manufacturing process;

(4) The fabrication process of the gate and the field plate is fully compatible with the conventional VDMOS process, and no additional process is added.

Description of drawings

Fig. 1 is on the silicon substrate epitaxial layer, forms the structural representation of oxide layer;

Fig. 2 is a schematic structural view of selectively etching the oxide layer on the surface of the epitaxial layer and terminating at the edge of the surface of the epitaxial layer;

3 is a schematic structural view of forming a gate oxide layer and depositing polysilicon on the surface of the epitaxial layer;

4 is a schematic structural view of selectively etching the polysilicon, terminating at the edge of the surface of the gate oxide layer, and forming a gate and field plate structure;

FIG. 5 is a schematic diagram of the structure of conventional doping of radio frequency VDMOS by adopting gate self-alignment technology.

Among them: 1 is a silicon substrate; 2 is an epitaxial layer; 3 is an oxide layer; 4 is a gate oxide layer; 5 is polysilicon, and 6 is conventional doping.

Detailed ways

Below in conjunction with specific embodiment, further illustrate the present invention, should be understood that these embodiments, are only used to illustrate the present invention and are not intended to limit the scope of the present invention, after reading the present invention, those skilled in the art will understand various equivalent forms of the present invention All modifications fall within the scope defined by the appended claims of the present application.

The present invention proposes a gate and field plate structure of a radio frequency VDMOS transistor, comprising a silicon substrate and an epitaxial layer, wherein the epitaxial layer is located on the silicon substrate; an oxide layer, wherein the oxide layer is located on the epitaxial layer A partial area of the surface of the layer; a gate oxide layer, the gate oxide layer is located on the surface of the epitaxial layer outside the oxide layer; polysilicon, the polysilicon is located on the surface of the oxide layer and the surfaces of the gate oxide layer on both sides.

栅氧化层、淀积

多晶硅；如图4所示，选择性刻蚀多晶硅，终止于栅氧化层表面的边缘，形成栅与场板结构；如图5所示，采用栅自对准技术，进行射频VDMOS的常规掺杂。Figures 1 to 5 show the process of preparing the gate and field plate structure of the above-mentioned RF VDMOS transistor. As shown in Figure 1, an oxide layer of 1 μm to 3 μm is formed on the N-type epitaxial layer of the N+ type silicon substrate; As shown in Figure 2, the oxide layer is selectively etched and terminated at the edge of the epitaxial layer surface; as shown in Figure 3, growth on the epitaxial layer surface

gate oxide, deposition

Polysilicon; as shown in Figure 4, polysilicon is selectively etched to terminate at the edge of the gate oxide layer surface to form a gate and field plate structure; as shown in Figure 5, the gate self-alignment technology is used for conventional doping of RF VDMOS .

The present invention will be described in detail below through specific examples.

Example 1

(1) On the N-type epitaxial layer of the N+ type silicon substrate, a 1 μm oxide layer is grown by thermal oxidation;

(2) Use a plasma etching machine to selectively etch the 1 μm oxide layer;

栅氧化层、LPCVD淀积

多晶硅；(3) On the surface of the epitaxial layer, thermal oxidation growth is used

Gate oxide, LPCVD deposition

Polysilicon;

多晶硅；(4) Using ICP etching machine, selective etching

Polysilicon;

(5) Using gate self-alignment technology, conventional doping of channel, source and drain of RF VDMOS is performed to form a field plate structure as shown in FIG. 5 .

Example 2

(1) On the N-type epitaxial layer of the N+ type silicon substrate, a 3 μm oxide layer is deposited and grown by LPCVD;

(2) using buffered hydrofluoric acid solution to selectively etch the 3 μm oxide layer;

栅氧化层、LPCVD淀积

多晶硅；(3) On the surface of the epitaxial layer, thermal oxidation growth is used

Gate oxide, LPCVD deposition

Polysilicon;

多晶硅；；(4) Using ICP etching machine, selective etching

polysilicon;

(5) Using gate self-alignment technology, conventional doping of channel, source and drain of RF VDMOS is performed to form a field plate structure as shown in FIG. 5 .

The above are only preferred embodiments of the present invention, and it should be pointed out that for those of ordinary skill in the art, without departing from the principles of the present invention, several improvements and modifications can also be made, and these improvements and modifications should also be made. It is regarded as the protection scope of the present invention.

Claims (8)

1. A gate and field plate structure of a radio frequency VDMOS transistor, characterized in that, comprising: silicon substrate, an epitaxial layer, wherein the epitaxial layer is located on the silicon substrate; an oxide layer, wherein the oxide layer is located in a partial area of the surface of the epitaxial layer; a gate oxide layer, the gate oxide layer is located on the surface of the epitaxial layer other than the oxide layer; polysilicon, the polysilicon is located on the surface of the oxide layer and the surfaces of the gate oxide layers on both sides. 2. the preparation method of the grid of radio frequency VDMOS transistor described in claim 1 and field plate structure is characterized in that, comprises the steps: Step 1, preparing an oxide layer on the surface of the epitaxial layer on the silicon substrate; Step 2, selectively etching the oxide layer in a partial region of the surface of the epitaxial layer, terminating at the edge of the surface of the epitaxial layer; Step 3, preparing a gate oxide layer on the surface of the epitaxial layer, and depositing polysilicon on the surface of the oxide layer and the gate oxide layer; Step 4, selectively etching the polysilicon to terminate at the edge of the surface of the gate oxide layer to form a gate and field plate structure; Step 5, using gate self-alignment technology to perform conventional doping of radio frequency VDMOS. 3. The method according to claim 2, wherein the silicon substrate is an N+ type silicon substrate, and the epitaxial layer is an N− type epitaxial layer. 4 . The method according to claim 2 , wherein, in the first step, the oxide layer is prepared by using thermal growth, LPCVD or PECVD to form the oxide layer. 5 . The method according to claim 2 , wherein in the first step, the oxide layer has a thickness of 1 μm˜3 μm. 6 . The method according to claim 2 , wherein in said step 3, said preparing a gate oxide layer is formed by thermal growth, and said depositing polysilicon is formed by LPCVD deposition. 7. The method according to claim 2, wherein in step 3, the thickness of the gate oxide layer is

The polysilicon thickness is

8. The application of the gate and field plate structure of the radio frequency VDMOS transistor according to claim 1 in the preparation of microwave field effect power transistor devices.

Images