[go: up one dir, main page]

CN115249696B - Electronic component and method of manufacturing the same - Google Patents

Electronic component and method of manufacturing the same Download PDF

Info

Publication number
CN115249696B
CN115249696B CN202110456678.0A CN202110456678A CN115249696B CN 115249696 B CN115249696 B CN 115249696B CN 202110456678 A CN202110456678 A CN 202110456678A CN 115249696 B CN115249696 B CN 115249696B
Authority
CN
China
Prior art keywords
semiconductor layer
lower electrode
upper electrode
electrode
electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110456678.0A
Other languages
Chinese (zh)
Other versions
CN115249696A (en
Inventor
张怡鸣
李竣杰
高睿志
邓乃维
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shangyin Technology Co ltd
POLYERA CORP
Original Assignee
Shangyin Technology Co ltd
POLYERA CORP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shangyin Technology Co ltd, POLYERA CORP filed Critical Shangyin Technology Co ltd
Priority to CN202110456678.0A priority Critical patent/CN115249696B/en
Publication of CN115249696A publication Critical patent/CN115249696A/en
Application granted granted Critical
Publication of CN115249696B publication Critical patent/CN115249696B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H10P34/42
    • H10W90/00

Landscapes

  • Electrodes Of Semiconductors (AREA)

Abstract

The invention provides an electronic component, which comprises a substrate, a plurality of electronic elements and a conductive material. The electronic element is arranged on the substrate and comprises a lower electrode, a semiconductor layer and an upper electrode, wherein the lower electrode, the semiconductor layer and the upper electrode are sequentially stacked on the substrate. The electronic component is a shared semiconductor layer, wherein the semiconductor layer forms a plurality of connection channels through the semiconductor layer. The connection channel is located between an upper electrode of a first electronic component of the electronic components and a lower electrode of a second electronic component of the electronic components. These connecting channels are machined with lasers of different powers. The conductive material is disposed in the connection channel so that the upper electrode of the first electronic component is electrically connected to the lower electrode of the second electronic component.

Description

Electronic component and method for manufacturing the same
Technical Field
The invention relates to an electronic component, which comprises a plurality of electronic elements electrically connected with each other, and a manufacturing method of the electronic component.
Background
The global warming is based on that climate change has become a challenge commonly faced by the international society. The kyoto protocol proposed by the united nations climate change schema convention (United Nations Framework Convention on CLIMATE CHANGE, UNFCCC) contract country in 1997 formally takes effect in 2005 with the aim of reducing carbon dioxide emissions. The development of renewable energy sources is emphasized in various countries to reduce the use of fossil fuels. Among them, the renewable energy source belongs to solar power generation equipment and is regarded as important because the sun provides energy to meet the present and future energy demands of people, and an electronic component for converting sunlight into electric energy in the solar power generation technology is the primary development standard.
In order to improve the photoelectric conversion efficiency of an electronic device, in addition to improving the material in the electronic device, the improvement of the process of the electronic device is also an important subject in order to exert the effect of the material to the greatest extent. Because the process is a large area process, it is easy to produce mass production and uneven process defects. For example, when a semiconductor layer material is deposited over a large area, the thickness of the semiconductor layer material in each region is inevitably different, and thus the subsequent laser ablation and serial-parallel connection are easily affected. Because the prior art uses laser with single power to ablate, when the laser with single power ablates on the semiconductor layer materials with different thickness, the problem of inconsistent laser ablation degree can occur, and the problem that the connection channel between electronic elements cannot conduct because of incomplete ablation or the lower electrode structure is damaged because of excessive ablation, thereby reducing the conduction efficiency of the lower electrode is easily caused. In this regard, it is currently a very important task to improve the effect of the subsequent laser ablation on the variation in the thickness of the semiconductor layer material.
Disclosure of Invention
In view of this, an aspect of the present invention is to provide an electronic assembly. The electronic component comprises a substrate, a plurality of electronic elements and conductive materials. The electronic element is arranged on the substrate and comprises a lower electrode, a semiconductor layer and an upper electrode, wherein the lower electrode, the semiconductor layer and the upper electrode are sequentially stacked on the substrate. The electronic component is a shared semiconductor layer, wherein the semiconductor layer forms a plurality of connection channels through the semiconductor layer. The connection channel is located between an upper electrode of a first electronic component of the electronic components and a lower electrode of a second electronic component of the electronic components. These connecting channels are machined with lasers of different powers. The conductive material is disposed in the connection channel so that the upper electrode of the first electronic component is electrically connected to the lower electrode of the second electronic component.
The connecting channel comprises a first channel penetrating the semiconductor layer and coupled with the surface of the upper electrode of the first electronic element and the surface of the lower electrode of the second electronic element according to different power of the processed laser.
The connecting channel also comprises at least one of a second channel and a third channel according to different power of the processed laser. The third channel penetrates through the semiconductor layer and is coupled with the concave part of the upper electrode of the first electronic element and the lower electrode of the second electronic element, and the concave part is formed by laser processing ablation.
Wherein the first channel containing the conductive material has a higher conductivity than the third channel containing the conductive material.
Wherein the electronic component includes at least one of a photovoltaic element, a photodiode, a light emitting diode, a capacitor, and a transistor.
The invention also provides a manufacturing method of the electronic component, which comprises the steps of providing a substrate, forming a first lower electrode and a second lower electrode on the substrate, forming a semiconductor layer on the first lower electrode, the second lower electrode and the insulating material, carrying out laser processing on the positions of the semiconductor layer corresponding to the second lower electrode by lasers with different powers for a plurality of times to form a plurality of vertical connecting channels, arranging a conductive material in the plurality of connecting channels, and arranging a first upper electrode and a second upper electrode on the semiconductor layer and the conductive material, wherein the first upper electrode covers the connecting channels and the conductive material. The first upper electrode, the first lower electrode and the semiconductor layer therebetween form a first electronic element. The second upper electrode, the second lower electrode and the semiconductor layer therebetween form a second electronic element. The first upper electrode of the first electronic element and the second lower electrode of the second electronic element are electrically connected through the connecting channels and the conductive material.
The laser power difference range of the multiple laser processing is 3% -20%.
The step of forming the vertical connecting channel by laser processing the semiconductor layer at the position corresponding to the second lower electrode for a plurality of times by laser with different powers further comprises the substep of laser processing the semiconductor layer with a first power to form a first channel. When the first power laser processing is performed, a part of the semiconductor layer on the first power laser path is removed to form a first channel penetrating the semiconductor layer and coupling the surface of the upper electrode of the first electronic element and the surface of the lower electrode of the second electronic element.
The step of forming the vertical connection channel by performing laser processing on the semiconductor layer at the position corresponding to the second lower electrode for multiple times by using lasers with different powers further comprises at least one sub-step of performing laser processing on the semiconductor layer with the second power to form a second channel and performing laser processing on the semiconductor layer with a third power to form a third channel. And removing part of the semiconductor layer on the second power laser path and leaving part of the semiconductor layer which is not ablated by the laser during the second power laser processing to form a second channel which does not penetrate through the semiconductor layer. During the third power laser processing, a portion of the semiconductor layer on the third power laser path is removed and a recess is formed in the second lower electrode to form a third channel penetrating the semiconductor layer and coupling the recesses on the first upper electrode and the second lower electrode.
The invention also provides a further manufacturing method of the electronic component, which comprises the steps of providing a substrate, forming a first lower electrode, a second lower electrode and a third lower electrode on the substrate, insulating materials are arranged between the first lower electrode and the second lower electrode and between the second lower electrode and the third lower electrode, forming a semiconductor layer on the first lower electrode, the second lower electrode, the third lower electrode and the insulating materials, laser processing the positions of the semiconductor layer corresponding to the second lower electrode and the positions of the semiconductor layer corresponding to the third lower electrode by lasers with different powers for a plurality of times to form a plurality of vertical connecting channels, arranging conductive materials in the plurality of connecting channels, and arranging a first upper electrode, a second upper electrode and the third upper electrode on the semiconductor layer and the conductive materials, wherein the first upper electrode covers the connecting channels relative to the second lower electrode and the conductive materials, and the second upper electrode covers the connecting channels relative to the third lower electrode and the conductive materials. The first upper electrode, the first lower electrode and the semiconductor layer therebetween form a first electronic element. The second upper electrode, the second lower electrode and the semiconductor layer therebetween form a second electronic element. The third upper electrode, the third lower electrode and the semiconductor layer therebetween form a third electronic element. The first upper electrode of the first electronic element and the second lower electrode of the second electronic element are electrically connected through the connecting channels and the conductive material. The second upper electrode of the second electronic element is electrically connected with the third lower electrode of the third electronic element through the connecting channels and the conductive material.
Compared with the prior art, the electronic component disclosed by the invention is processed on the semiconductor layer by means of multiple lasers with different powers, so that the problem of laser processing defects caused by the formation of semiconductor layers with different thicknesses due to uneven film deposition when the semiconductor layer is deposited on a large scale is solved.
Drawings
Fig. 1 is a schematic diagram showing a structure of a prior art electronic component.
FIG. 2 illustrates a prior art ablation process for applying a single power laser to semiconductor layers of different thicknesses.
Fig. 3A shows the results of an ablation test in which different power lasers are applied to a semiconductor layer having a thickness of about 350 nm.
Fig. 3B shows the ablation test results after removing the semiconductor layer of fig. 3A.
Fig. 3C shows the results of an ablation test in which different power lasers are applied to a semiconductor layer having a thickness of about 250 nm.
Fig. 3D shows the ablation test results after removing the semiconductor layer of fig. 3C.
Fig. 4A is a schematic diagram showing the thickness distribution of a semiconductor layer deposited over a large area as a film.
Fig. 4B is a schematic diagram showing a comparison of the design of laser ablation tracks in a single area of the present invention with the prior art.
Fig. 5A is a schematic diagram illustrating prior art laser ablation with single power applied.
FIG. 5B is a schematic diagram illustrating the application of multiple power laser ablation in accordance with the present technique.
Fig. 6 is a schematic structural diagram of an embodiment of the electronic component of the present invention.
FIG. 7 is a flowchart illustrating steps of a method for manufacturing an electronic device according to an embodiment of the invention.
Fig. 8A and 8B are schematic flow diagrams illustrating an embodiment of the electronic component of the present invention.
FIG. 9 is a flowchart illustrating further steps of an embodiment of a method for manufacturing an electronic device according to the present invention.
FIG. 10 is a flowchart illustrating steps of another embodiment of a method for manufacturing an electronic device according to the present invention.
Fig. 11A and 11B are flow diagrams illustrating another embodiment of the method for manufacturing an electronic device according to the present invention.
Detailed Description
In order that the advantages of the invention will be readily understood and readily put into practical effect, the spirit and features thereof will be described in detail and be more readily apparent from the following detailed description of the invention when taken in conjunction with the accompanying drawings. It is noted that these embodiments are merely representative examples of the present invention. It may be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
The terminology used in the various embodiments of the disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the various embodiments of the disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Unless otherwise defined, all terms (including technical and scientific terms) used in this specification have the same meaning as commonly understood by one of ordinary skill in the art to which various embodiments of the present disclosure belong. The above terms (such as those defined in a dictionary generally used) will be construed to have the same meaning as the context meaning in the same technical field and will not be construed to have an idealized meaning or overly formal meaning unless expressly so defined in the various embodiments of the disclosure.
In the description herein, reference to the term "one embodiment," "a particular embodiment," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments.
Referring to fig. 1, fig. 1 is a schematic diagram illustrating a structure of an electronic component P in the prior art. The structure of the electronic component P in the prior art is shown in fig. 1, and the electronic component P includes a substrate P1, a first electronic component P2, a second electronic component P3, and a conductive material P6. The first electronic component P2 and the second electronic component P3 are disposed on the substrate P1, and the first electronic component P2 includes a first lower electrode P20, a semiconductor layer P4, and a first upper electrode P21, the second electronic component P3 includes a second lower electrode P30, a semiconductor layer P4, and a second upper electrode P31, and the first lower electrode P20, the second lower electrode P30, the semiconductor layer P4, and the first upper electrode P21 and the second upper electrode P31 are sequentially stacked on the substrate P1. The first electronic component P2 and the second electronic component P3 share the semiconductor layer P4, wherein the semiconductor layer P4 forms a connection channel P5 penetrating the semiconductor layer P4. The connection path P5 is located between the first upper electrode P21 and the second lower electrode P30. The conductive material P6 is disposed in the connection channel P5, so that the first upper electrode P21 is electrically connected to the second lower electrode P30. In the structure of fig. 1, the ideal electronic component P has no process problems.
However, referring to fig. 2 to 4A, fig. 2 shows the prior art ablation process of applying a single power laser to semiconductor layers of different thicknesses, fig. 3A shows the results of the ablation test of applying a different power laser to semiconductor layers of about 350nm, fig. 3B shows the results of the ablation test after removing the semiconductor layers of fig. 3A, fig. 3C shows the results of the ablation test of applying a different power laser to semiconductor layers of about 250nm, fig. 3D shows the results of the ablation test after removing the semiconductor layers of fig. 3C, and fig. 4A is a schematic diagram showing the thickness distribution of the semiconductor layers deposited in a large area. As shown in fig. 2 and 4A, in the actual process, the problem of uneven deposition thickness is unavoidable when depositing the semiconductor layer 13 over a large area. In fig. 4A, it can be seen that in a single area of the semiconductor layer 13, the range of the thickness of the semiconductor layer 13 may include a range of 200nm to 354 nm. Therefore, in the prior art process, the cross section of the semiconductor layer 13 will be shown in fig. 2. This results in uneven ablation levels during subsequent laser ablation, as shown in fig. 2, if the laser L is operated at the same power. The result of the ablation comprises incomplete ablation, ideal ablation and excessive ablation. Ablation is incomplete in that a portion of the semiconductor layer 13 material remains on the bottom electrode surface, and because of this material residue, additional resistance is created that affects the conduction between the top and bottom electrodes. The ideal ablation is that the target semiconductor layer 13 is completely removed, and the laser processing has no damage to the surface of the lower electrode 12, at which time the conduction efficiency between the upper and lower electrodes is optimal. The excessive ablation is that the target semiconductor layer 13 is completely removed, but the surface of the lower electrode 12 is damaged, and a recess 121 is formed on the surface of the lower electrode 12. If ablation is excessive, the lower electrode 12 is destroyed, which results in a decrease in its conductivity and thus affects the conductivity.
For further explanation, as shown in fig. 3A to 3D, lasers with powers of 12%, 13% and 14% are applied from left to right on the semiconductor layers with thicknesses of 350nm (fig. 3A) and 250nm (fig. 3C), respectively. Then, the semiconductor layer with the thickness of about 350nm (as shown in FIG. 3A) is removed to form the ablation test result as shown in FIG. 3B, and the semiconductor layer with the thickness of about 250nm (as shown in FIG. 3C) is removed to form the ablation test result as shown in FIG. 3D. The solid Fang Kuangjuan in fig. 3B and 3D is selected as the ideal ablation test result, and the dotted square frame is selected as the excessive ablation test result. As shown in fig. 3B, a laser with a power of 12% may ablate the semiconductor layer to the desired ablation (as selected by solid Fang Kuangjuan in fig. 3B) at 350 nm. However, as shown in FIG. 3D, at 250nm, a laser with a power of 12% is overerased to the semiconductor layer (as selected by the dashed line Fang Kuangjuan in FIG. 3D). Therefore, if the laser ablation is performed with a single laser power in the prior art, connection channels which are incompletely ablated, ideally ablated and excessively ablated are correspondingly formed between electronic elements in the electronic assembly according to the thickness difference of the semiconductor layers, so that the conductive efficiency of the electronic elements is reduced or even cannot be conducted at all.
In order to solve the above problems, the present invention uses multiple powers for laser processing. Referring to fig. 4B to 6, fig. 4B is a schematic diagram showing the comparison of the design of laser ablation tracks in a single area with the prior art, fig. 5A is a schematic diagram showing the prior art for applying single power laser ablation, fig. 5B is a schematic diagram showing the prior art for applying multiple power laser ablation, and fig. 6 is a schematic diagram showing the structure of an embodiment of the electronic component of the present invention. As shown in fig. 4B, 5A and 5B, fig. 4B is a graph showing a comparison of the design of ablation tracks between individual electronic components in a single area by prior art single power laser ablation (e.g., left half) and multiple power laser ablation (e.g., right half) in accordance with the present invention. Fig. 5A is a schematic diagram showing the result of ablation with a single power laser L on a semiconductor layer P4 with uneven thickness in the prior art, and fig. 5B is a schematic diagram showing the result of multiple ablation with different powers of laser L on a semiconductor layer 13 with uneven thickness in the present invention. Referring to fig. 4B, fig. 5A and fig. 5B, it can be seen that the left half corresponds to the schematic cross-sectional view of fig. 5A, and the right half corresponds to the schematic cross-sectional view of fig. 5B. It is seen from fig. 5A that when ablation is performed using a single power, excessive ablation occurs to damage the surface of the lower electrode when the semiconductor layer P4 having a thickness lower than the average thickness is encountered, incomplete ablation does not occur when the semiconductor layer P4 having a thickness higher than the average thickness is encountered, so that the remaining semiconductor layer becomes a resistor to make the upper and lower electrodes non-conductive, and ideal ablation occurs only when the thickness of the semiconductor layer is the average thickness of the target, thereby greatly affecting the conductive efficiency of the electronic component. As can be seen in fig. 5B, the present invention will perform multiple laser ablations with different powers at each unit ablation site, and no matter what thickness is encountered, an ideal ablation will be formed in the connecting channel 14 ablated by the multiple power laser L, thereby ensuring that the electronic components 2 in the electronic assembly D must be electrically conductive to each other. In other words, the multiple connecting channels formed by multiple laser ablations of the invention replace the single connecting channel formed by single laser ablations in the prior art, so that the problem of different ablations in the laser ablation process caused by semiconductor layers with different thicknesses can be completely solved.
As shown in fig. 6, the electronic component D is completed by a multiple power laser ablation process, wherein the electronic component D includes a substrate 10, a plurality of electronic components 2, and a conductive material 15. The electronic component 2 is disposed on the substrate 10, and the electronic component 2 includes a lower electrode 12, a semiconductor layer 13, and an upper electrode 11, respectively, and the lower electrode 12, the semiconductor layer 13, and the upper electrode 11 are sequentially stacked on the substrate 10. The electronic component 2 is a shared semiconductor layer 13, wherein the semiconductor layer 13 forms a plurality of connection channels 14 through the semiconductor layer 13. The connection channel 14 is located between a first upper electrode 201 of a first electronic component 20 of the electronic components 2 and a second lower electrode 210 of a second electronic component 21 of the electronic components 2. These connecting channels 14 are machined with lasers of different powers. The conductive material 15 is disposed in the plurality of connection channels 14, and the plurality of connection channels 14 collectively electrically connect the first upper electrode 201 and the second lower electrode 210.
Since the laser beam of different powers is used for processing the same channel, the electronic device D of the present invention must include a first channel 140 extending through the semiconductor layer 13 and coupling the surface of the first upper electrode 201 and the surface of the second lower electrode 210, which is ideal ablation. In addition, the electronic component D of the present invention may further include at least one of the second channel 141 and the third channel 142. The second channel 141 is not completely ablated through the semiconductor layer 13, and the third channel 142 is completely ablated through the semiconductor layer 13 and couples the first upper electrode 201 and the second lower electrode 210 to the recess 121, and the recess 121 is ablated by laser processing. In this regard, although incomplete ablation and excessive ablation still occur due to the difference in thickness of the semiconductor layer 13, the generation of ideal ablation is ensured, thereby improving the process yield of the electronic component D.
Since excessive ablation inevitably affects the conduction efficiency of the second lower electrode 210 itself, the conduction efficiency of the first channel 140 containing the conductive material 15 is higher than that of the third channel 142 containing the conductive material 15. Although the third channel 142 containing the conductive material 15 has a lower conductivity than the first channel 140 containing the conductive material 15, the third channel 142 of the conductive material 15 can still provide the conductive function between the first upper electrode 201 and the second lower electrode 210.
In practical applications, the electronic component D of the present invention includes at least one of a photovoltaic element, a photodiode, a light emitting diode, a capacitor, and a transistor.
Referring to fig. 7 to 8B, fig. 7 is a flowchart showing steps of a method for manufacturing an electronic component D according to an embodiment of the invention, and fig. 8A and 8B are flowcharts showing an embodiment of the electronic component D according to the invention. As shown in fig. 7, 8A and 8B, the method for manufacturing the electronic component D of the present invention includes providing a substrate 10, forming a first lower electrode 200 and a second lower electrode 210 on the substrate 10 with an insulating material 16 between the first lower electrode 200 and the second lower electrode 210, forming a semiconductor layer 13 on the first lower electrode 200, the second lower electrode 210 and the insulating material 16, forming a plurality of vertical connection channels 14 by laser processing the semiconductor layer 13 at positions corresponding to the second lower electrode 210 with laser beams having different powers, providing a conductive material 15 in the connection channels 14, and providing a first upper electrode 201 and a second upper electrode 211 on the semiconductor layer 13 and the conductive material 15, wherein the first upper electrode 201 covers the connection channels 14 and the conductive material 15, in step S14. The first upper electrode 201, the first lower electrode 200 and the semiconductor layer 13 therebetween form the first electronic component 20. The second upper electrode 210, the second lower electrode 211, and the semiconductor layer 13 therebetween form a second electronic element 21. Since the plurality of connection channels 14 can jointly achieve the electrical connection between the first upper electrode 201 of the first electronic device 20 and the second lower electrode 210 of the second electronic device 21 through the connection channels 14 and the conductive material 15.
The laser power difference range of the multiple laser processing is 3% -20%.
Referring to fig. 9, fig. 9 is a flowchart showing further steps of an embodiment of a method for manufacturing an electronic component D according to the present invention. As shown in fig. 9, step 13 further includes a substep 131 of laser processing the semiconductor layer 13 at a first power to form a first channel 140. In the first power laser processing, a portion of the semiconductor layer 13 on the first power laser path is removed to form a first channel 140 penetrating the semiconductor layer 13 and coupling the surface of the first upper electrode 201 and the surface of the second lower electrode 210. In practical applications, at least one of the substep 132 and the substep 133 is further included in the step 13, wherein the substep 132 is to laser process the semiconductor layer 13 with the second power to form the second channel 141, and the substep 133 is to laser process the semiconductor layer 13 with the third power to form the third channel 142. In the second power laser processing, a portion of the semiconductor layer 13 on the second power laser path is removed and a portion of the semiconductor layer 13 not ablated by the laser is remained, so as to form a second channel 141 which does not penetrate the semiconductor layer 13. During the third power laser processing, a portion of the semiconductor layer 13 on the third power laser path is removed, and a recess 121 is formed in the second lower electrode 210, so as to form a third channel 142 penetrating the semiconductor layer 13 and coupling the recesses 121 on the first upper electrode 201 and the second lower electrode 210.
It should be noted that, the above is to clearly distinguish the first channel 140 (ideal ablation), the second channel 141 (incomplete ablation), and the third channel 142 (excessive ablation), and the first power, the second power, and the third power are respectively applied. However, in practical situations, the multiple power laser processing may form the first channel 140, the second channel 141 and the third channel 142 on the semiconductor layer 13 with different thicknesses during the first laser processing, and thus the first power, the second power and the third power may be the same or different laser powers, which is not limited thereto.
Referring to fig. 10 to 11B, fig. 10 is a flowchart showing steps of another embodiment of the method for manufacturing an electronic component D according to the present invention, and fig. 11A and 11B are flowcharts showing another embodiment of the method for manufacturing an electronic component D according to the present invention. Since the electronic component D is composed of a plurality of electronic components 2, when the number of electronic components 2 is three, the steps S21 of providing the substrate 10, forming the first lower electrode 200, the second lower electrode 210 and the third lower electrode 220 on the substrate 10, providing the insulating material 16 between the first lower electrode 200 and the second lower electrode 210 and between the second lower electrode 210 and the third lower electrode 220, S22 of forming the semiconductor layer 13 on the first lower electrode 200, the second lower electrode 210, the third lower electrode 220 and the insulating material 16, S23 of laser processing the semiconductor layer 13 at different power positions corresponding to the second lower electrode 210 and the semiconductor layer 13 at positions corresponding to the third lower electrode 220 for a plurality of times to form a plurality of vertical connecting channels 14, S24 of disposing the conductive material 15 in the plurality of connecting channels 14, S25 of disposing the first upper electrode 201, the second upper electrode 211 and the third upper electrode 221 on the semiconductor layer 13 and the conductive material 15, wherein the first upper electrode 201 covers the second upper electrode 201 and the third upper electrode 211 relative to the second electrode 14 and the conductive material 15 and the connecting channels 14 and the third upper electrode 211 covers the conductive material 15. The first upper electrode 201, the first lower electrode 200 and the semiconductor layer 13 therebetween form the first electronic component 20. The second upper electrode 211, the second lower electrode 210 and the semiconductor layer 13 therebetween form a second electronic element 21. The third upper electrode 221, the third lower electrode 220, and the semiconductor layer 13 therebetween form a third electronic element 22. The first upper electrode 201 of the first electronic component 20 and the second lower electrode 210 of the second electronic component 21 are electrically connected through the connecting channels 14 and the conductive material 15. The second upper electrode 211 of the second electronic component 21 is electrically connected to the third lower electrode 220 of the third electronic component 22 through the connecting channels 14 and the conductive material 15. When the number of electronic components 2 in the electronic component D increases, the number of electronic components 2 is not limited to this.
The semiconductor layer includes organic semiconductor, perovskite, copper indium gallium tin, copper zinc tin sulfur, and other compound semiconductors, and other kinds of thin film solar semiconductor materials, and the semiconductor layer may include a layer of multiple layers of different carrier transport functional materials or a mixture of multiple different carrier transport functional materials, not limited to a single semiconductor layer in the figure. The conductive material comprises metal oxide and metal material.
In summary, by means of the multiple power laser ablation of the present invention, the probability of achieving ideal ablation in a unit area can be increased, thereby improving the process yield.
With the foregoing detailed description of the embodiments, it is intended that the features and spirit of the invention be more clearly described, but that the invention not be limited to the embodiments disclosed above. On the contrary, the intention is to cover all modifications and equivalents falling within the scope of the invention as defined by the appended claims.
Symbol description
P: prior Art electronic component P4: prior Art semiconductor layer
P1: prior art substrate P5 prior art connecting channel
P2:first electronic component of the prior art P6:conductive material of the prior art
P20:PRIOR ART first bottom electrode P7:PRIOR ART insulating material
P21:first upper electrode L of the prior art, laser
P3:second electronic component D of the prior art
P30:second bottom electrode 10:substrate of the prior art
P31:second upper electrode 11:upper electrode of the prior art
12 Lower electrode
121, Concave part
13 Semiconductor layer
14 Connecting channel
140 First channel
141 Second channel
142 Third channel
15 Conductive material
16 Insulating material
2 Electronic component
20 First electronic component
200 First bottom electrode
201 First upper electrode
21 Second electronic component
210 Second bottom electrode
211 Second upper electrode
22 Third electronic component
220 Third bottom electrode
221 Third upper electrode
S11-S25 step
S131-S133 substeps

Claims (10)

1. An electronic component, comprising:
A substrate;
A plurality of electronic components disposed on the substrate, each of the electronic components including a lower electrode, a semiconductor layer and an upper electrode sequentially stacked on the substrate and sharing the semiconductor layer, wherein the semiconductor layer forms a plurality of connection channels passing through the semiconductor layer and located between the upper electrode of a first one of the electronic components and the lower electrode of a second one of the electronic components, the connection channels being formed by laser processing at different powers, and
And the conductive material is arranged in the connecting channels so that the upper electrode of the first electronic element is electrically connected with the lower electrode of the second electronic element.
2. The electronic assembly of claim 1, wherein the connecting channels comprise a first channel penetrating the semiconductor layer and coupling the surface of the upper electrode of the first electronic component and the surface of the lower electrode of the second electronic component according to the power of the processed laser.
3. The electronic device of claim 2, wherein the plurality of connection channels are configured to have different powers according to the laser beam, and further comprise at least one of a second channel and a third channel, wherein the second channel does not penetrate the semiconductor layer, the third channel penetrates the semiconductor layer and couples the upper electrode of the first electronic device and a recess on the lower electrode of the second electronic device, and the recess is ablated by laser beam machining.
4. The electronic assembly of claim 3, wherein the first channel comprising the conductive material has a higher electrical conductivity than the third channel comprising the conductive material.
5. The electronic component of claim 1, wherein the electronic component comprises at least one of a photovoltaic element, a photodiode, a light emitting diode, a capacitor, and a transistor.
6. A method of manufacturing an electronic component, comprising the steps of:
providing a substrate, forming a first lower electrode and a second lower electrode on the substrate, wherein an insulating material is arranged between the first lower electrode and the second lower electrode;
Forming a semiconductor layer on the first bottom electrode, the second bottom electrode and the insulating material;
Performing laser processing on the semiconductor layer corresponding to the position of the second lower electrode for multiple times by using lasers with different powers so as to form a plurality of vertical connecting channels;
providing a conductive material in the plurality of connection channels, and
A first upper electrode and a second upper electrode are arranged on the semiconductor layer and the conductive material, wherein the first upper electrode covers the connecting channels and the conductive material;
The first upper electrode, the first lower electrode and the semiconductor layer therebetween form a first electronic element, the second upper electrode, the second lower electrode and the semiconductor layer therebetween form a second electronic element, and the first upper electrode of the first electronic element and the second lower electrode of the second electronic element are electrically connected through the connecting channels and the conductive material.
7. The method of claim 6, wherein the laser power difference of the plurality of laser processes is in a range of 3% -20%.
8. The method of claim 6, wherein the step of forming the vertical connection channels by laser processing the semiconductor layer at the position corresponding to the second bottom electrode with laser beams having different powers comprises the following sub-steps:
laser processing the semiconductor layer with a first power to form a vertical first channel;
When the first power laser processing is performed, a portion of the semiconductor layer on the first power laser path is removed to form a first channel penetrating the semiconductor layer and coupling the surface of the upper electrode of the first electronic component and the surface of the lower electrode of the second electronic component.
9. The method of claim 8, wherein the step of forming the vertical connection channels by laser processing the semiconductor layer at the position corresponding to the second lower electrode with laser beams having different powers comprises at least one of the following steps:
laser processing the semiconductor layer with a second power to form a second channel, and
Laser processing the semiconductor layer with a third power to form a third channel;
when the second power laser processing is performed, removing part of the semiconductor layer on the second power laser path and leaving part of the semiconductor layer which is not ablated by the laser, so as to form the second channel which does not penetrate through the semiconductor layer; when the third power laser processing is performed, a part of the semiconductor layer on the third power laser path is removed, and a recess is formed in the second lower electrode, so as to form the third channel penetrating the semiconductor layer and coupling the recess on the first upper electrode and the second lower electrode.
10. A method of manufacturing an electronic component, comprising the steps of:
Providing a substrate, and forming a first lower electrode, a second lower electrode and a third lower electrode on the substrate, wherein an insulating material is arranged between the first lower electrode and the second lower electrode and between the second lower electrode and the third lower electrode;
forming a semiconductor layer on the first bottom electrode, the second bottom electrode, the third bottom electrode and the insulating material;
Laser processing is carried out on the position of the semiconductor layer corresponding to the second lower electrode and the position of the semiconductor layer corresponding to the third lower electrode for a plurality of times by lasers with different powers so as to form a plurality of vertical connecting channels;
providing a conductive material in the plurality of connection channels, and
Disposing a first upper electrode, a second upper electrode and a third upper electrode on the semiconductor layer and the conductive material, wherein the first upper electrode covers the connection channels and the conductive material relative to the second lower electrode, and the second upper electrode covers the connection channels and the conductive material relative to the third lower electrode;
The first upper electrode, the first lower electrode and the semiconductor layer therebetween form a first electronic element, the second upper electrode, the second lower electrode and the semiconductor layer therebetween form a second electronic element, the third upper electrode, the third lower electrode and the semiconductor layer therebetween form a third electronic element, the first upper electrode of the first electronic element and the second lower electrode of the second electronic element are electrically connected through the connecting channels and the conductive material, and the second upper electrode of the second electronic element and the third lower electrode of the third electronic element are electrically connected through the connecting channels and the conductive material.
CN202110456678.0A 2021-04-27 2021-04-27 Electronic component and method of manufacturing the same Active CN115249696B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110456678.0A CN115249696B (en) 2021-04-27 2021-04-27 Electronic component and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110456678.0A CN115249696B (en) 2021-04-27 2021-04-27 Electronic component and method of manufacturing the same

Publications (2)

Publication Number Publication Date
CN115249696A CN115249696A (en) 2022-10-28
CN115249696B true CN115249696B (en) 2025-07-01

Family

ID=83696341

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110456678.0A Active CN115249696B (en) 2021-04-27 2021-04-27 Electronic component and method of manufacturing the same

Country Status (1)

Country Link
CN (1) CN115249696B (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102744520A (en) * 2011-04-19 2012-10-24 初星太阳能公司 Methods of temporally varying the laser intensity during scribing a photovoltaic device
CN103392237A (en) * 2011-07-13 2013-11-13 薄膜硅公司 Photovoltaic device and method for scribing a photovoltaic device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4197420B2 (en) * 2002-09-27 2008-12-17 パナソニック株式会社 Manufacturing method of semiconductor device
JP2006253631A (en) * 2005-02-14 2006-09-21 Fujitsu Ltd Semiconductor device and manufacturing method thereof, capacitor structure and manufacturing method thereof
TWI405340B (en) * 2007-08-31 2013-08-11 Nexpower Technology Corp Thin film solar cell and manufacturing method thereof
CN104952858B (en) * 2014-03-24 2019-03-08 株式会社吉帝伟士 Semiconductor device, semiconductor stacked module structure, stacked module structure, and methods of making the same
KR101649657B1 (en) * 2014-10-07 2016-08-30 엘지전자 주식회사 Semiconductor devices and methods of manufacturing the same
CN107305861B (en) * 2016-04-25 2019-09-03 晟碟信息科技(上海)有限公司 Semiconductor device and manufacturing method thereof
EP3493274A1 (en) * 2017-12-04 2019-06-05 Bengbu Design & Research Institute for Glass Industry Thin film solar module with improved shunt resistor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102744520A (en) * 2011-04-19 2012-10-24 初星太阳能公司 Methods of temporally varying the laser intensity during scribing a photovoltaic device
CN103392237A (en) * 2011-07-13 2013-11-13 薄膜硅公司 Photovoltaic device and method for scribing a photovoltaic device

Also Published As

Publication number Publication date
CN115249696A (en) 2022-10-28

Similar Documents

Publication Publication Date Title
US8822809B2 (en) Solar cell apparatus and method for manufacturing the same
US20120186634A1 (en) Solar cell apparatus and method of fabricating the same
JP4439492B2 (en) Chalcopyrite solar cell and method for manufacturing the same
US8962984B2 (en) Solar cell apparatus and manufacturing method thereof
US8941160B2 (en) Photoelectric conversion module and method of manufacturing the same
WO2007086522A1 (en) Solar cell and manufacturing method thereof
US20160268454A1 (en) Solar Cell and Method for Manufacturing Same
WO2019148774A1 (en) Manufacturing method of thin film solar cell
US9818897B2 (en) Device for generating solar power and method for manufacturing same
CN119384065B (en) Production method of battery piece
KR20100030944A (en) Method of fabricating solar cell
US20140076376A1 (en) Solar cell module
US12094996B2 (en) Electronic device and manufacturing method of the same
JP2012238789A (en) Semiconductor device, solar cell module, solar cell string and solar cell array
JP4975528B2 (en) Integrated solar cell
JP2005093939A (en) Integrated tandem connection solar cell and manufacturing method of integrated tandem connection solar cell
CN115249696B (en) Electronic component and method of manufacturing the same
WO2013050563A2 (en) Semiconductor component having a multi-layer structure and module formed therefrom
KR101382880B1 (en) Solar cell apparatus and method of fabricating the same
US9960291B2 (en) Solar cell
JP2008021713A (en) Integrated thin-film solar cell and method for manufacturing the same
KR101055019B1 (en) Photovoltaic device and its manufacturing method
US20120000529A1 (en) Method and system for forming a photovoltaic cell and a photovoltaic cell
US9142701B2 (en) Tandem type integrated photovoltaic module and manufacturing method thereof
US20120318329A1 (en) Integrated thin film photovoltaic module and manufacturing method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant