CN115132872A - Photodiode device, photosensitive detector and detection device - Google Patents

Abstract

The embodiment of the application provides a photodiode device, a photosensitive detector and a detection device. The device comprises a semiconductor substrate, a first doped region, a second doped region, a third doped region and a first electrode. The semiconductor substrate includes opposing first and second surfaces. The first doping region is located in the semiconductor substrate, and the first doping region and the semiconductor substrate form a first PN junction. The second doped region is located in the first doped region. The second doped region is of a different conductivity type than the first doped region. The third doped region is located in the second doped region. The third doped region and the second doped region form a second PN junction. The first electrode is arranged on one side of the third doped region far away from the second surface and is electrically connected with the third doped region, and the first electrode is used for forming a first electric field with the semiconductor substrate. The first electric field is distributed between the first electrode and the semiconductor substrate, so that the electric field force on electrons and holes is large, the drift speed is relatively high, and the carrier collection efficiency is improved.

Description

Photodiode device, photosensitive detector and detection device

technical field

The present application relates to the field of semiconductor technology, and in particular, to a photodiode device, a photosensitive detector, and a detection device.

Background technique

A photodiode device is an optoelectronic device that converts optical signals into electrical signals based on the basic physical phenomenon of photogenerated carriers. The ability of photodiode devices to convert optical signals into electrical signals is closely related to the collection efficiency of carriers. Among them, the collection efficiency of carriers refers to the efficiency with which the electron-hole pairs generated inside the device are collected by the positive and negative electrodes. However, the carrier collection efficiency of current photodiode devices is relatively low.

SUMMARY OF THE INVENTION

Embodiments of the present application provide a photodiode device, a photosensitive detector, and a detection device, which are used to improve the carrier collection efficiency of the photodiode device.

To achieve the above object, the application adopts the following technical solutions:

In a first aspect of the embodiments of the present application, a photodiode device is provided, which includes a semiconductor substrate, a first doped region, a second doped region, a third doped region, and a first electrode. The semiconductor substrate includes opposing first and second surfaces. The first doped region is located in the semiconductor substrate, and a part of it is exposed on the first surface, and the first doped region and the semiconductor substrate form a first PN junction. The second doping region is located in the first doping region, and a part of it is exposed on the first surface. The conductivity type of the second doped region is different from that of the first doped region. The third doping region is located in the second doping region, and a part of the third doping region is exposed on the first surface. The third doped region and the second doped region form a second PN junction. The first electrode is arranged on the side of the third doped region away from the second surface, and is electrically connected to the third doped region. The first electrode is used to form a first electric field with the semiconductor substrate, and the first electric field and the second The built-in electric field direction of the PN junction is the same.

In the above photodiode device, the third doped region and the second doped region form a second PN junction. When light is incident on the third doped region, a large number of electron-hole pairs are excited. A voltage is applied through the first electrode and the semiconductor substrate, so that the first electrode is used to form a first electric field with the semiconductor substrate. The first electric field is in the same direction as the built-in electric field of the second PN junction. The electron-hole pairs are separated under the action of the built-in electric field and the first electric field. Because the first electric field is distributed between the first electrode and the semiconductor substrate, the distance from the second PN junction is relatively short, and the first doped region avoids the influence of the voltage of the semiconductor substrate on the second PN junction, so The electric field force on electrons and holes is relatively large, and the drift speed is relatively fast, which improves the collection efficiency of carriers.

Optionally, the photodiode device further includes at least one fourth doped region. The fourth doped region is located in the semiconductor substrate, and part of it is exposed on the second surface, the conductivity type of the fourth doped region is the same as that of the semiconductor substrate, and the doping concentration of the fourth doped region is greater than that of the semiconductor substrate doping concentration. The vertical projection of any one of the first doped region, the second doped region and the third doped region on the second surface overlaps the vertical projection of the at least one fourth doped region on the second surface. In this way, when the thickness of the semiconductor substrate is relatively large, the carriers can also reach the second surface, so that the collection efficiency of the carriers can be improved.

Optionally, the photodiode device includes a plurality of fourth doped regions, and the plurality of fourth doped regions are arranged at intervals. In this way, the photodiode device has a path for carrier generation and collection, which can lead out the carriers in time for collection, avoid reducing the loss of carriers due to rapid recombination of carriers, and improve the collection efficiency of carriers.

Optionally, the photodiode device further includes a first lead and a second lead. The first end of the first lead is electrically connected to the first electrode, and the second end is used for receiving the first voltage. The first end of the second lead is electrically connected to the semiconductor substrate, and the second end is used for receiving the second voltage. In this way, it is more convenient to connect the photodiode device to the voltage.

Optionally, the semiconductor substrate is a P-type substrate, the first doping region and the third doping region are N-type doping regions, and the second doping region is a P-type doping region. Wherein, the first voltage is greater than the second voltage. This facilitates the collection of carriers and improves the collection efficiency of carriers.

Optionally, the semiconductor substrate is an N-type substrate, the first doped region and the third doped region are P-type doped regions, and the second doped region is an N-type doped region. Wherein, the first voltage is lower than the second voltage. This facilitates the collection of carriers and improves the collection efficiency of carriers.

Optionally, the photodiode device further includes a first lead and a second lead. The first end of the first lead is electrically connected to the first electrode, and the second end is used for receiving the first voltage. The first end of the second lead is electrically connected to the fourth doping region, and the second end is used for receiving the third voltage. In this way, it is more convenient to connect the photodiode device to the voltage.

Optionally, the semiconductor substrate is a P-type substrate, the first doping region and the third doping region are N-type doping regions, and the second doping region is a P-type doping region. Wherein, the first voltage is greater than the third voltage. This facilitates the collection of carriers and improves the collection efficiency of carriers.

Optionally, the semiconductor substrate is an N-type substrate, the first doped region and the third doped region are P-type doped regions, and the second doped region is an N-type doped region. Wherein, the first voltage is lower than the third voltage. This facilitates the collection of carriers and improves the collection efficiency of carriers.

Optionally, the photodiode device further includes a second electrode. The second electrode is disposed on the side of the second doping region away from the second surface and is electrically connected to the second doping region. In this way, the collection mode and collection efficiency of carriers can be adjusted according to needs, which is more flexible.

In a second aspect of the embodiments of the present application, a photosensitive detector is provided, which includes a photodiode array, and the photodiode array includes a photodiode device. Since the above-mentioned photodiode device is used, the photosensitive detector is highly sensitive.

In a third aspect of the embodiments of the present application, a detection device is provided, including an emitter and a photosensitive detector. The transmitter is used to emit detection light to the object to be detected. The photosensitive detector is used to receive the reflected light after the detection light is reflected by the object to be tested. Since the above-mentioned photosensitive detector is used, the detection device has high reliability.

Description of drawings

FIG. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application;

FIG. 2 is a schematic structural diagram of the photodiode array of FIG. 1;

3a is a schematic structural diagram of a photodiode device provided by an embodiment of the present application;

3b is a schematic diagram of the built-in electric field of the PN junction;

4a is a schematic diagram of forming a first doped region on a semiconductor substrate;

4b is a schematic diagram of forming a second doped region in the first doped region;

4c is a schematic diagram of forming a third doped region in the second doped region;

FIG. 4d is a schematic diagram of the included angle between the first electric field and the built-in electric field;

FIG. 5 is a schematic structural diagram of a photodiode device provided by another embodiment of the present application;

6a is a schematic structural diagram of a photodiode device provided by another embodiment of the present application;

FIG. 6b is a schematic view of the cross-sectional structure in the M-M direction of FIG. 6a;

FIG. 6c is a schematic structural diagram of a photodiode device provided by another embodiment of the present application;

FIG. 6d is an electric field distribution diagram of the photodiode device of FIG. 6c;

7 is a schematic structural diagram of a photodiode device provided by another embodiment of the present application;

8 is a schematic structural diagram of a photodiode device provided by another embodiment of the present application;

FIG. 9 is a schematic structural diagram of a photodiode device provided by another embodiment of the present application;

FIG. 10 is a schematic structural diagram of a photodiode device provided by another embodiment of the present application.

Reference number:

01, electronic equipment; 02, transmitter; 03, photosensitive detector; 31, photodiode array; 100, photodiode device; 04, object to be measured; 110, semiconductor substrate; 111, first surface; 112, second surface; 120, first doped region; 130, second doped region; 140, third doped region; 150, first electrode; 160, fourth doped region; 170, first lead; 180, second lead; 190, the second electrode; 210, the first PN junction; 220, the second PN junction;

E1, first electric field; E0, built-in electric field; S1, detected light; S2, reflected light;

1a, intrinsic semiconductor; a2, PN junction; 1d, the first end; 2d, the second end.

Detailed ways

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments.

Hereinafter, the terms "first", "second", etc. are only used for descriptive purposes, and should not be understood as indicating or implying relative importance or implying the number of indicated technical features. Thus, a feature defined as "first", "second", etc., may expressly or implicitly include one or more of that feature. In the description of this application, unless stated otherwise, "plurality" means two or more.

In addition, in this application, directional terms such as "upper" and "lower" may include, but are not limited to, definitions relative to the schematic placement of components in the drawings. It should be understood that these directional terms may be relative concepts, They are used for relative description and clarification, which may vary accordingly depending on the orientation in which the components are placed in the drawings.

In this application, unless otherwise expressly specified and limited, the term "connection" should be understood in a broad sense. For example, "connection" may be a fixed connection, a detachable connection, or an integrated body; it may be directly connected, or Can be indirectly connected through an intermediary. Furthermore, the term "coupled" may be a manner of electrical connection that enables signal transmission. "Coupling" can be a direct electrical connection or an indirect electrical connection through an intermediate medium.

Embodiments of the present application provide a detection device. The detection device may include products such as security inspection machines and cameras. The embodiments of the present application do not specifically limit the specific form of the above electronic device.

In some embodiments of the present application, referring to FIG. 1 , the above-mentioned electronic device 01 may be a security inspection machine. In this case, the above-mentioned electronic device 01 mainly includes a transmitter 02 and a photosensitive detector 03 . The transmitter 02 is used for emitting detection light S1 to the object to be measured 04 . The photosensitive detector 03 is used to receive the reflected light after the detection light S1 is reflected by the object to be tested 04 . The transmitter 02 emits detection light S1, such as infrared rays, to the object to be measured 04. After the detection light S1 irradiates the object to be measured 04, it may be blocked by the object to be measured 04, or the intensity and angle of reflection may change to form a reflected light S2. The photosensitive detector 03 receives the reflected light S2, and generates different electrical signals according to the intensity and angle of the reflected light S2 to form an image, thereby realizing the detection of the object 04 to be measured. The above-mentioned detection device can effectively detect the object 04 to be measured, such as a processed product, or a subway or high-speed rail luggage.

The photosensitive detector 03 used in the above-mentioned security inspection machine may include a photodiode array 31 as shown in FIG. 2 . The photodiode array 31 may include a plurality of photodiode devices 100 arranged in an array. Of course, in order to improve the integration degree and reduce the volume of the photosensitive detector 03, the photodiode device 100 can be integrated on one substrate a. That is, each photodiode device 100 shares one substrate a, and the substrate a is configured with a plurality of area regions arranged in an array, and each area region of the substrate a serves as the semiconductor substrate 110 of a single photodiode device 100 .

The photodetector 03 can utilize the photoelectric conversion function of the photodiode array 31 to convert the optical signal incident on the photodiode array 31 from the photosensitive surface of the photodetector 03 into an electrical signal. Each photodiode device 100 may function as a photosensitive element. The electrical signal received by each photodiode device 100 may be proportional to the optical signal. For example, the aforementioned electrical signal may be proportional or approximately proportional to the optical signal. Specifically, when there are many optical signals incident on the photodiode device 100 , eg, the incident light is strong, the electrical signal output by the photodiode device 100 , eg, a current, is relatively large, otherwise, the current is relatively small. The above description is given by taking an example that the electrical signal can be proportional to the optical signal. Of course, the electrical signal can also be inversely proportional or approximately inversely proportional to the optical signal, which will not be repeated here.

That is to say, the photosensitive detector 03 divides the light on the photosensitive surface into many small units. The light from each cell is projected onto a photodiode device 100 and converted into a usable electrical signal. It can be understood that when the quantum efficiency of the photodiode array 31 is high, the signal intensity of the photodetector 03 is high.

The carrier collection efficiency of the photodiode device 100 can greatly affect the quantum efficiency of the photodiode array 31 . Accordingly, an aspect of the present application provides a photodiode device 100 that can improve the collection efficiency of carriers.

In the first aspect of the embodiments of the present application, referring to FIG. 3a, a photodiode device 100 is provided, including a semiconductor substrate 110, a first doped region 120, a second doped region 130, a third doped region 140, and a first electrode 150. The semiconductor substrate 110 includes opposing first and second surfaces 111 and 112 . The first doped region 120 is located in the semiconductor substrate 110 , and a part of the first doped region 120 is exposed on the first surface 111 , and the first doped region 120 and the semiconductor substrate 110 form a first PN junction 210 . The second doping region 130 is located in the first doping region 120 , and a part of the second doping region 130 is exposed on the first surface 111 . The conductivity type of the second doped region 130 is different from that of the first doped region 120 . The third doping region 140 is located in the second doping region 130 , and a portion of the third doping region 140 is exposed on the first surface 111 . The third doped region 140 and the second doped region 130 form a second PN junction 220 . The first electrode 150 is disposed on the side of the third doped region 140 away from the second surface 112 and is electrically connected to the third doped region 140 . The first electrode 150 is used to form a first electric field E1 with the semiconductor substrate 110 , the first electric field E1 and the built-in electric field E0 of the second PN junction 220 have the same direction.

As shown in Figure 3b, if two sides of an intrinsic semiconductor 1a such as silicon are doped with different elements, one side is doped with P-type impurities such as boron (B) by ion implantation or diffusion to form a P-type region, and the other side is ionized by ions N-type impurities such as antimony (Sb) or arsenic (As) are doped by implantation or diffusion to form an N-type region. At the same time, the doping area can also be marked according to the doping concentration of the impurities. If the impurity concentration is a high impurity concentration of about 1×17 cm ^-3 or more, add "+" to the conductivity type. The doped regions are doped with P-type impurities with a high impurity concentration. If the impurity concentration is a low impurity concentration of about 1×15 cm ⁻³ or less, “-” is added to the conductivity type to indicate that the doped region is doped with P-type impurities of low impurity concentration.

As shown in Figure 3b, a special thin layer, called a PN junction, is formed near both sides of the contact surface between the P-type region and the N-type region, which is a2 in Figure 3a. Since the properties and concentrations of carriers on both sides of the P-type region and the N-type region are different, the hole concentration in the P-type region is large, and the electron concentration in the N-type region is large, so the diffusion movement occurs at the interface. The holes in the P-type region diffuse to the N-type region and are negatively charged due to the loss of holes; while the electrons in the N-type region diffuse to the P-type region and are positively charged due to the loss of electrons. An electric field is formed at the junction, namely the built-in electric field E0. The direction of the built-in electric field E0 is from the N-type region to the P-type region.

In the present application, the conductivity types of the first doped region 120 and the semiconductor substrate 110 are different, and the first PN junction 210 is formed therebetween. The conductivity types of the third doped region 140 and the second doped region 130 are different, and they form the second PN junction 220 . Meanwhile, the conductivity types of the second doping region 130 and the first doping region 120 are different. That is to say, the semiconductor substrate 110 and the second doped region 130 belong to the same conductivity type, such as P-type, and the first doped region 120 and the third doped region 140 belong to another conductivity type, such as N-type. For example, referring to FIG. 3a, the sequential arrangement (eg, from top to bottom) of the third doped region 140, the second doped region 130, the first doped region 120 and the semiconductor substrate 110 may be formed as shown in FIG. 3a. The N-P-N-P type four-layer doping structure. The semiconductor substrate 110 and the second doped region 130 both belong to one conductivity type, such as N-type, and the first doped region 120 and the third doped region 140 both belong to another conductivity type, such as P-type. For another example, the third doped region 140 , the second doped region 130 , the first doped region 120 and the semiconductor substrate 110 are sequentially arranged (eg, from top to bottom) to form a P-N-P-N type four-layer doped structure.

In the first embodiment of the photodiode device 100 of the present application, the semiconductor substrate 110 is a P-type substrate; the first doping region 120 is an N-type doping region, and the second doping region 130 is a P-type doping region region; the third doping region 140 is an N-type doping region. The formation process of each doped region of the photodiode device 100 will be described below.

Referring to FIG. 4 a , the semiconductor substrate 110 has two opposite surfaces, such as a first surface 111 and a second surface 112 . P-type impurity doping is performed on the first surface 111 of the semiconductor substrate 110 to form a P-type first doped region 120 in the semiconductor substrate 110 . At this time, one of the surfaces of the first doped region 120 , such as the surface A, is exposed on the first surface 111 . If one surface is exposed on the other surface, it can be understood that the surface is not covered by the other surface, for example, the surface is flush with the other surface. Next, referring to FIG. 4b, N-type impurity doping is performed on the surface A of the first doping region 120 to form an N-type second doping region 130 in the first doping region 120. The second doping region is doped with N-type impurities. The surface B of the region 130 is exposed to the surface A of the first doped region 120 . Therefore, in the surface A of the first doping region 120 , the portion other than the surface B region of the second doping region 130 is the aa region. The aa region is the exposed portion of the first doped region 120 on the first surface 111 .

Similarly, referring to FIG. 4c, a P-type impurity doping is performed on the surface B of the second doping region 130 to form a P-type third doping region 140 in the second doping region 130. The third doping region The surface C of the region 140 is exposed to the surface B of the second doped region 130 . Therefore, in the surface B of the second doping region 130 , the portion other than the surface C region of the third doping region 140 is the bb region. The bb region is the exposed portion of the second doping region 130 on the first surface 111 . However, the surface C of the third doped region 140 is a portion exposed on the first surface 111 .

In this embodiment, referring to FIG. 3a, a first PN junction 210 is formed near the contact surface between the N-type first doped region 120 and the P-type semiconductor substrate 110, and the N-type third doped region 140 is connected to the The P-type second doped region 130 forms the second PN junction 220 . It should be noted that the interface between two adjacent doped regions with different conductivity types includes the interface in the thickness direction of the doped regions and the interface on the plane where the doped regions are located. Corresponding PN junctions will be formed near the above two interfaces. Since the thickness of the doped regions is relatively small, the formed PN junctions are not easy to be identified in the figure, so they are not shown in the figure.

The electric field direction of the built-in electric field E0 of the second PN junction 220 is from the third doped region 140 to the second doped region 130 . The electric field directions of the first electric field E1 and the built-in electric field E0 of the second PN junction 220 are the same. It should be noted that the same direction of the electric fields of the two means that the directions of the first electric field E1 and the built-in electric field E0 of the second PN junction 220 are the same, thus including both the direction of the first electric field E1 and the built-in electric field of the second PN junction 220 The electric field directions of the electric field E0 are exactly the same as the electric field directions of the two are parallel (specifically, as shown in FIG. 3 a ), and the direction of the first electric field E1 and the electric field direction of the built-in electric field E0 of the second PN junction 220 are the same. The electric field direction of the first electric field has a certain angle. As shown in FIG. 4d, the electric field direction of the two is from the third doping region 140 to the second doping region 130. The electric field of the first electric field E1 is related to the dotted line (the second PN junction 220). The included angle θ between the extension lines of the electric field direction of the built-in electric field E0 can be different angles such as 10°, 15°, and 30°.

Continuing to refer to FIG. 3a, the first surface 111 of the semiconductor substrate 110 is a light-receiving surface. The second PN junction 220 is located above the first PN junction 210 and is closer to the light-receiving surface than the first PN junction 210 . Therefore, in the photodiode device 100, the second PN junction 220 is the main place where the photoelectric effect occurs. When light irradiates the second PN junction 220, photons carrying energy enter the second PN junction 220, transfer the energy to the bound electrons on the covalent bond, and make some electrons break away from the covalent bond, thereby generating electron-hole pairs. On the one hand, the second PN junction 220 has a built-in electric field E0 from the N-type to the P-type. On the other hand, by applying different voltages to the first electrode 150 and the semiconductor substrate 110, the first electric field E1 can be formed therebetween. The electric field directions of the first electric field E1 and the built-in electric field E0 of the second PN junction 220 are the same, and both are directed from the third doped region 140 to the second doped region 130 , which is equivalent to an external reverse bias on the second PN junction 220 . set voltage. In this way, the electron-hole pairs are separated under the action of the built-in electric field E0 and the first electric field E1, and photogenerated carriers, ie, electrons and holes, are generated.

The first electric field E1 is formed by the first electrode 150 and the semiconductor substrate 110 . The first electric field E1 is distributed between the first electrode 150 and the semiconductor substrate 110 , and the distance from the second PN junction 220 is relatively short, so the electric field force on the electrons and holes is relatively large. Moreover, the transistor formed by the semiconductor substrate 110, the third doping region 140 and the second doping region 130 is isolated from the semiconductor substrate 110 by the first doping region 120, so as to prevent the bias voltage of the semiconductor substrate 110 from directly acting on the transistor , so that the transistor is not affected by the bias voltage of the semiconductor substrate 110 , thereby preventing the bias voltage from hindering the drift of electrons and holes. In this way, electrons can quickly drift toward the first electrode 150 and accumulate on the surface of the third doped region 140 close to the first electrode 150 , and holes drift toward the semiconductor substrate 110 and accumulate on the semiconductor substrate 110 , thereby facilitating The collection of carriers improves the collection efficiency of carriers.

5 , in the second embodiment of the photodiode device 100 of the present application, the semiconductor substrate 110 is an N-type substrate; the first doped region 120 is a P-type doped region, and the second doped region 130 is N-type doping region; the third doping region 140 is a P-type doping region. The formation process of each doped region of the photodiode device 100 is similar to the formation process in the first embodiment, and each doped region selects a corresponding type of doping impurity according to its own conductivity type, and the specific doping process is not repeated.

In this embodiment, referring to FIG. 5 , the first PN junction 210 is formed near the contact surface between the P-type first doped region 120 and the N-type semiconductor substrate 110 , and the P-type third doped region 140 and the N-type semiconductor substrate 110 are formed near the contact surface. The N-type second doped region 130 forms the second PN junction 220 . The electric field direction of the built-in electric field E0 of the second PN junction 220 is from the second doped region 130 to the third doped region 140 . The electric field directions of the first electric field E1 and the built-in electric field E0 of the second PN junction 220 are the same. The electric field direction of the first electric field E1 is substantially directed from the semiconductor substrate 110 to the first electrode 150 . The electric field of the first electric field E1 can be parallel to the electric field direction of the built-in electric field E0 or have a certain angle, such as 10°, 15°, 30° and so on.

The specific working principle is similar to that of the first embodiment. When light irradiates the second PN junction 220, electron-hole pairs are generated. The electron-hole pairs are separated under the action of the built-in electric field E0 and the first electric field E1 to generate photogenerated carriers, namely electrons and holes. The first doped region 120 also has the function of protecting the transistor from the bias voltage of the semiconductor substrate 110 . The difference is that in this embodiment, holes drift toward the first electrode 150 and accumulate on the surface of the third doped region 140 close to the first electrode 150 , while electrons drift toward the semiconductor substrate 110 and accumulate on the semiconductor substrate 110 . The substrate 110 also facilitates the collection of carriers and improves the collection efficiency of carriers.

In the above photodiode device 100 , the third doped region 140 and the second doped region 130 form the second PN junction 220 . When light is incident on the third doped region 140, a large number of electron-hole pairs are excited. A voltage is applied through the first electrode 150 and the semiconductor substrate 110 , so that a first electric field E1 is formed between the first electrode 150 and the semiconductor substrate 110 . The first electric field E1 and the built-in electric field E0 of the second PN junction 220 are in the same direction. The electron-hole pair is separated under the action of the built-in electric field E0 and the first electric field E1. Because the first electric field E1 is distributed between the first electrode 150 and the semiconductor substrate 110, the distance from the second PN junction 220 is relatively short, and at the same time, the first doped region 120 prevents the voltage of the semiconductor substrate 110 from affecting the second PN junction 220. Due to the influence of the PN junction 220, the electric field force received by the electrons and holes is relatively large, the drift speed is relatively fast, and the collection efficiency of carriers is improved.

In order to adapt to the larger thickness of the semiconductor substrate 110 , referring to FIG. 6 a , the photodiode device 100 further includes at least one fourth doped region 160 . The fourth doped region 160 is located in the semiconductor substrate 110, and a part of it is exposed on the second surface 112. The conductivity type of the fourth doped region 160 is the same as that of the semiconductor substrate 110, and the fourth doped region 160 has the same conductivity type. The impurity concentration is greater than that of the semiconductor substrate 110 . The vertical projection of any one of the first doped region 120 , the second doped region 130 and the third doped region 140 on the second surface 112 intersects with the vertical projection of the at least one fourth doped region 160 on the second surface 112 stack.

Taking the structure of the photodiode device 100 in the first embodiment as an example, when the thickness of the semiconductor substrate 110 is relatively large, referring to FIG. 6a, the first electric field E1 of the outermost layer may not touch the bottom of the semiconductor substrate 110, that is, the first electric field E1. The two surfaces 112 are inconvenient for carriers to reach the second surface 112 for collection. At least one fourth doped region 160 is provided, and the type of the fourth doped region 160 is also the same as the conductivity type of the semiconductor substrate 110 , which is also P-type. As shown in FIG. 6 a , the vertical projection of any one of the first doped region 120 , the second doped region 130 and the third doped region 140 on the second surface 112 and the at least one fourth doped region 160 on the second The vertical projections of the surfaces 112 overlap so that the positions of the fourth doped regions 160 can be aligned with the positions of the first doped regions 120 , the second doped regions 130 and the third doped regions 140 .

The doping concentration of the fourth doping region 160 is greater than the doping concentration of the semiconductor substrate 110 , and is of P+ type. The doping concentration of the semiconductor substrate 110 is relatively low, so its resistance is relatively high and its conductivity is relatively poor. The fourth doping region 160 has a high doping concentration and high conductivity. Carriers tend to flow to regions of higher conductivity.

A first electric field E1 exists within the semiconductor substrate 110 , wherein the first electric field E1 extends from the third doped region 140 to a region of the semiconductor substrate 110 close to the second surface 112 . In this way, under the action of the first electric field E1 , the carriers reach the region of the semiconductor substrate 110 close to the second surface 112 , and then flow to the fourth doped region 160 with higher conductivity to reach the second surface 112 . The carriers can reach the second surface 112, and thus the collection efficiency of the carriers can be improved.

It can be understood that, referring to FIG. 6b, the total area of all the fourth doped regions 160 on the second surface 112 may occupy a relatively large area of the second surface 112, such as more than 60% of the area of the second surface 112, so that The photodiode device 100 has a relatively large area of carriers acceptable to the second surface 112, thereby increasing the collection efficiency of carriers.

Optionally, referring to FIG. 6c, the photodiode device 100 includes a plurality of fourth doped regions 160, and the plurality of fourth doped regions 160 are arranged at intervals.

Referring to FIG. 6d , a plurality of fourth doped regions 160 are arranged at intervals on the second surface 112 of the semiconductor substrate 110, and a certain interval L is left between two adjacent fourth doped regions 160, so that the fourth doped regions 160 Between 160 and the second surface 112, a converging electric field, that is, the second electric field E2, can be generated, and at the same time, there is a path for the generation and collection of carriers, and the carriers are exported and collected in time, so as to avoid reducing carriers caused by rapid recombination. The loss of carriers, thereby improving the collection efficiency of carriers, thereby improving the quantum efficiency. Of course, the plurality of intervals L may be completely identical, partially identical or completely different. It can be understood that, whether it is a back-illuminated optoelectronic device or a front-illuminated optoelectronic device, the above structure can be adopted, so that the quantum efficiency of the optoelectronic device can be improved.

It should be noted that, the above is an example to illustrate the function, setting position and setting method of the fourth doping region 160 by taking the structure of the photodiode device 100 in the first embodiment as an example. In other embodiments of the present application, the structure of the photodiode device 100 in the second embodiment can also be provided with a fourth doping region 160. The function, setting position and setting method of the fourth doping region 160 are the same as those in the first embodiment. The example is similar and will not be repeated here.

Optionally, referring to FIG. 7 , the photodiode device 100 further includes a first lead 170 and a second lead 180 . The first end 1d of the first lead 170 is electrically connected to the first electrode 150, and the second end 2d is used for receiving the first voltage V1. The first end 1d of the second lead 180 is electrically connected to the semiconductor substrate 110, and the second end 2d is used for receiving the second voltage V2.

In order to facilitate the voltage connection of the photodiode device 100 , the photodiode device 100 is further provided with a first lead 170 and a second lead 180 . The first end 1d of the first lead 170 is electrically connected to the first electrode 150, eg, directly fixed on the first electrode 150, and the second end 2d is used for receiving the external first voltage V1. The first end 1d of the second lead 180 is electrically connected to the semiconductor substrate 110, eg, directly fixed on the semiconductor substrate 110, and the second end 2d is used for receiving the external second voltage V2. The first voltage V1 and the second voltage V2 act on the first electrode 150 and the semiconductor substrate 110, respectively, thereby generating a first electric field E1 therebetween.

Optionally, referring to FIG. 7 , the semiconductor substrate 110 is a P-type substrate, the first doping region 120 and the third doping region 140 are N-type doping regions, and the second doping region 130 is a P-type doping region . Wherein, the first voltage V1 is greater than the second voltage V2.

In this case, as shown in FIG. 7 , the direction of the built-in electric field E0 of the second PN junction 220 is from the third doping region 140 to the second doping region 130 . In this way, the first voltage V1 is introduced on the first electrode 150 through the first lead 170 , and the second voltage V2 is introduced on the semiconductor substrate 110 through the second lead 180 , where V1 > V2 , thereby generating a voltage generated by the first electrode 150 A first electric field E1 directed to the semiconductor substrate 110 . V1 can be various voltages such as 12v, 6v, 3v, etc. V2<V1, can be 2v, 1v, 0v, -1v and so on. When V2 is 0v, the semiconductor substrate 110 is grounded.

The direction of the first electric field E1 is the same as the direction of the built-in electric field E0 of the second PN junction 220 , so that the electrons and holes are subjected to a larger electric field force. Electrons rapidly drift toward the first electrode 150 and gather on the surface of the third doped region 140 close to the first electrode 150 , and holes drift toward the semiconductor substrate 110 and gather on the semiconductor substrate 110 , thereby facilitating the collection of carriers , which improves the carrier collection efficiency.

Optionally, referring to FIG. 8 , the semiconductor substrate 110 is an N-type substrate, the first doped region 120 and the third doped region 140 are P-type doped regions, and the second doped region 130 is an N-type doped region . Wherein, the first voltage V1 is smaller than the second voltage V2.

In this case, as shown in FIG. 8 , the direction of the built-in electric field E0 of the second PN junction 220 is from the second doped region 130 to the third doped region 140 . In this way, the first voltage V1 is introduced on the first electrode 150 through the first lead 170 , and the second voltage V2 is introduced on the semiconductor substrate 110 through the second lead 180 , where V1 < V2 , thereby generating the semiconductor substrate 110 The first electric field E1 directed to the first electrode 150 . V2 can be various voltages such as 12v, 6v, 3v, etc. V1<V2, can be 2v, 1v, 0v, -1v and so on. When V1 is 0v, that is, the first electrode 150 is grounded.

The direction of the first electric field E1 is the same as the direction of the built-in electric field E0 of the second PN junction 220 , so that the electrons and holes are subjected to a larger electric field force. The holes rapidly drift toward the first electrode 150 and gather on the surface of the third doped region 140 close to the first electrode 150 , and the electrons drift toward the semiconductor substrate 110 and gather on the semiconductor substrate 110 , thereby facilitating the collection of carriers , which improves the carrier collection efficiency.

Optionally, referring to FIG. 9 , the photodiode device 100 further includes a first lead 170 and a second lead 180 . The first end 1d of the first lead 170 is electrically connected to the first electrode 150, and the second end 2d is used for receiving the first voltage V1. The first end 1d of the second lead 180 is electrically connected to the fourth doping region 160, and the second end 2d is used for receiving the third voltage V3.

In order to facilitate the voltage connection of the photodiode device 100 , the photodiode device 100 is further provided with a first lead 170 and a second lead 180 . The first end 1d of the first lead 170 is electrically connected to the first electrode 150, eg, directly fixed on the first electrode 150, and the second end 2d is used for receiving the external first voltage V1. The first end 1d of the second lead 180 is electrically connected to the fourth doping region 160, eg, directly fixed on the fourth doping region 160, and the second end 2d is used for receiving the external second voltage V2. The first voltage V1 and the second voltage V2 act on the first electrode 150 and the fourth doped region 160, respectively, thereby generating a first electric field E1 therebetween.

Optionally, continuing to refer to FIG. 9 , the semiconductor substrate 110 is a P-type substrate, the first doping region 120 and the third doping region 140 are N-type doping regions, and the second doping region 130 is P-type doping Area. Wherein, the first voltage V1 is greater than the third voltage V3.

In this case, the direction of the built-in electric field E0 of the second PN junction 220 is from the third doping region 140 to the second doping region 130 . In this way, the first voltage V1 is introduced to the first electrode 150 through the first lead 170, and the third voltage V3 is introduced to the fourth doping region 160 through the second lead 180, wherein V1>V3, thereby generating a The electrode 150 is directed to the first electric field E1 of the fourth doped region 160 . V1 can be various voltages such as 12v, 6v, 3v, etc. V3<V1, can be 2v, 1v, 0v, -1v and so on. When V3 is 0v, the fourth doped region 160 is grounded.

The fourth doped region 160 is located on the second surface 112 of the semiconductor substrate 110 , so the first electric field E1 actually also covers the region of the semiconductor substrate 110 . The direction of the first electric field E1 is the same as the direction of the built-in electric field E0 of the second PN junction 220 , so that the electrons and holes are subjected to a larger electric field force. Electrons rapidly drift toward the first electrode 150 and gather on the surface of the third doped region 140 close to the first electrode 150 , and holes drift toward the semiconductor substrate 110 and gather on the semiconductor substrate 110 , thereby facilitating the collection of carriers , which improves the carrier collection efficiency.

Optionally, referring to FIG. 10 , the semiconductor substrate 110 is an N-type substrate, the first doped region 120 and the third doped region 140 are P-type doped regions, and the second doped region 130 is an N-type doped region . Wherein, the first voltage V1 is smaller than the third voltage V3.

In this case, the direction of the built-in electric field E0 of the second PN junction 220 is from the second doped region 130 to the third doped region 140 . In this way, the first voltage V1 is introduced to the first electrode 150 through the first lead 170, and the third voltage V3 is introduced to the fourth doped region 160 through the second lead 180, wherein V1<V3, thereby generating a semiconductor substrate composed of The bottom 110 points to the first electric field E1 of the first electrode 150 . V3 can be various voltages such as 12v, 6v, 3v, etc. V1<V2, can be 2v, 1v, 0v, -1v and so on. When V1 is 0v, the third doped region 140 is grounded. The fourth doped region 160 is located on the second surface 112 of the semiconductor substrate 110 , so the first electric field E1 actually also covers the region of the semiconductor substrate 110 . Moreover, the direction of the first electric field E1 is the same as the direction of the built-in electric field E0 of the second PN junction 220 , so that the electrons and holes are subjected to a larger electric field force. The holes rapidly drift toward the first electrode 150 and gather on the surface of the third doped region 140 close to the first electrode 150 , and the electrons drift toward the semiconductor substrate 110 and gather on the semiconductor substrate 110 , thereby facilitating the collection of carriers , which improves the carrier collection efficiency.

Optionally, referring to FIG. 10 , the photodiode device 100 further includes a second electrode 190 . The second electrode 190 is disposed on a side of the second doped region 130 away from the second surface 112 and is electrically connected to the second doped region 130 .

The second electrode 190 is disposed on the side of the second doped region 130 away from the second surface 112 , that is, the second electrode 190 is disposed on the surface B. As shown in FIG. The second electrode 190 may be used to form an electric field between the third doped region 140 and the second doped region 130 , or to form an electric field between the second doped region 130 and the semiconductor substrate 110 . For example, the second electrode 190 can receive the fourth voltage. The voltage value of the fourth voltage may be between the first voltage V1 and the second voltage V2 or between the first voltage V1 and the third voltage V3. In this way, the first electric field E1 can be adjusted to a certain extent, so that the collection mode and collection efficiency of carriers can be adjusted as required, which is more flexible. Of course, the second electrode 190 can also be used to export part of the carriers generated at the second PN junction 220 .

The above are only specific embodiments of the present application, but the protection scope of the present application is not limited to this, and any changes or substitutions within the technical scope disclosed in the present application should be covered within the protection scope of the present application. . Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims (12)

1. A photodiode device, comprising:

a semiconductor substrate comprising opposing first and second surfaces;

the first doping area is positioned in the semiconductor substrate, one part of the first doping area is exposed out of the first surface, and the first doping area and the semiconductor substrate form a first PN junction;

the second doping area is positioned in the first doping area, and part of the second doping area is exposed out of the first surface; the second doped region is of a different conductivity type than the first doped region;

a third doped region located in the second doped region and partially exposed from the first surface; the third doped region and the second doped region form a second PN junction; and the number of the first and second groups,

the first electrode is arranged on one side, far away from the second surface, of the third doping area and is electrically connected with the third doping area, the first electrode is used for forming a first electric field between the first electrode and the semiconductor substrate, and the direction of the first electric field is the same as that of a built-in electric field of the second PN junction.

2. The photodiode device of claim 1, further comprising:

at least one fourth doped region located in the semiconductor substrate and partially exposed on the second surface, wherein the conductivity type of the fourth doped region is the same as that of the semiconductor substrate, and the doping concentration of the fourth doped region is greater than that of the semiconductor substrate;

any one of the first doped region, the second doped region and the third doped region has a vertical projection on the second surface overlapping with a vertical projection on the second surface of the at least one fourth doped region.

3. The photodiode device according to claim 2, wherein the photodiode device comprises a plurality of the fourth doping regions, and the plurality of fourth doping regions are arranged at intervals.

4. The photodiode device according to any one of claims 1 to 3, further comprising:

a first lead having a first end electrically connected to the first electrode and a second end for receiving a first voltage; and the number of the first and second groups,

and a second lead having a first end electrically connected to the semiconductor substrate and a second end for receiving a second voltage.

5. The photodiode device according to claim 4,

the semiconductor substrate is a P-type substrate, the first doped region and the third doped region are N-type doped regions, and the second doped region is a P-type doped region;

wherein the first voltage is greater than the second voltage.

6. The photodiode device according to claim 4,

the semiconductor substrate is an N-type substrate, the first doped region and the third doped region are P-type doped regions, and the second doped region is an N-type doped region;

wherein the first voltage is less than the second voltage.

7. The photodiode device of claim 3, further comprising:

a first lead having a first end electrically connected to the first electrode and a second end for receiving a first voltage; and the number of the first and second groups,

and a first end of the second lead is electrically connected with the fourth doped region, and a second end of the second lead is used for receiving a third voltage.

8. The photodiode device according to claim 7,

the semiconductor substrate is a P-type substrate, the first doping region and the third doping region are N-type doping regions, and the second doping region is a P-type doping region;

wherein the first voltage is greater than the third voltage.

9. The photodiode device according to claim 7,

the semiconductor substrate is an N-type substrate, the first doped region and the third doped region are P-type doped regions, and the second doped region is an N-type doped region;

wherein the first voltage is less than the third voltage.

10. The photodiode device of claim 1, further comprising:

and the second electrode is arranged on one side of the second doping region far away from the second surface and is electrically connected with the second doping region.

11. A photosensitive detector, comprising:

an array of photodiodes comprising a photodiode device as claimed in any one of claims 1 to 10.

12. A detection device, comprising:

the emitter is used for emitting detection light to the object to be detected;

the photosensitive detector according to claim 11, for receiving the reflected light after the detection light is reflected by the object to be measured.

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