CN115083889A - Wafer grinding method and wafer processing method - Google Patents
Wafer grinding method and wafer processing method Download PDFInfo
- Publication number
- CN115083889A CN115083889A CN202210769328.4A CN202210769328A CN115083889A CN 115083889 A CN115083889 A CN 115083889A CN 202210769328 A CN202210769328 A CN 202210769328A CN 115083889 A CN115083889 A CN 115083889A
- Authority
- CN
- China
- Prior art keywords
- wafer
- grinding
- dicing
- thinning
- processing method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02013—Grinding, lapping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6838—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
技术领域technical field
本申请涉及半导体技术领域,特别是涉及一种晶圆的研磨方法及晶圆的处理方法。The present application relates to the field of semiconductor technology, and in particular, to a method for grinding wafers and a method for processing wafers.
背景技术Background technique
晶圆的正面在器件制备完成后,需要的背面进行研磨。为了减低晶圆的搬运风险和减少晶圆的翘曲,一般会对晶圆的背面进行太鼓研磨;太鼓研磨后,晶圆的边缘会形成凸环。但由于受太鼓研磨属性的限制,以及太鼓研磨后去除凸环时使用的垫片治具厚度的限制,最后仅能得到最终厚度为个别数值的晶圆,无法满足工艺对不同最终厚度的晶圆的需求。The front side of the wafer needs to be ground after the device is fabricated. In order to reduce the risk of wafer handling and reduce the warpage of the wafer, the backside of the wafer is generally subjected to drum grinding; after the drum grinding, a convex ring will be formed on the edge of the wafer. However, due to the limitation of the grinding properties of the drum and the thickness of the shim jig used to remove the convex ring after the drum grinding, only wafers with a final thickness of individual values can be obtained, which cannot meet the requirements of the process for wafers with different final thicknesses. demand.
发明内容SUMMARY OF THE INVENTION
基于现有技术存在的仅使用太鼓研磨机对晶圆的背面进行太鼓研磨而存在的最后仅能得到最终厚度为个别数值的晶圆,无法满足工艺对不同最终厚度的晶圆的需求的问题,有必要针对上述问题,提供一种晶圆的研磨方法及晶圆的处理方法。Based on the existing technology that only uses a drum grinder to perform drum grinding on the back of the wafer, only wafers with a final thickness of an individual value can be obtained, which cannot meet the requirements of the process for wafers with different final thicknesses. It is necessary to provide a method for grinding wafers and a method for processing wafers in response to the above problems.
在第一方面,本申请提供一种晶圆的研磨方法,包括:In a first aspect, the present application provides a method for grinding a wafer, comprising:
提供晶圆,所述晶圆包括器件区域及边缘区域;providing a wafer including a device area and an edge area;
自所述晶圆的背面对所述晶圆进行预减薄处理;pre-thinning the wafer from the backside of the wafer;
对预减薄处理后的所述晶圆的背面进行太鼓研磨,所述太鼓研磨后,所述晶圆的边缘区域形成凸环。The back surface of the wafer after the pre-thinning treatment is subjected to drum grinding. After the drum grinding, a convex ring is formed on the edge area of the wafer.
本发明的晶圆的研磨方法中,在对晶圆的背面进行太鼓研磨之前增设对自晶圆的背面进行预减薄处理的步骤,可以通过调节预减薄处理中的减薄量来灵活调整最终得到的晶圆的最终厚度,可以得到数值范围更为广泛的最终厚度的晶圆,能够满足工艺对不同最终厚度的晶圆的需求。In the wafer grinding method of the present invention, the step of pre-thinning from the back of the wafer is added before the drum grinding of the back of the wafer, which can be flexibly adjusted by adjusting the amount of thinning in the pre-thinning process The final thickness of the finally obtained wafer can be obtained with a wider numerical range of the final thickness of the wafer, which can meet the requirements of the process for wafers with different final thicknesses.
在其中一个实施例中,所述自晶圆的背面对所述晶圆进行预减薄处理包括:In one embodiment, the pre-thinning process on the wafer from the backside of the wafer includes:
对所述晶圆的背面进行平面研磨。Plane grinding is performed on the backside of the wafer.
在第二方面,本发明还提供一种晶圆的处理方法,包括:In a second aspect, the present invention also provides a method for processing a wafer, comprising:
采用第一方面中所述的晶圆的研磨方法对所述晶圆进行研磨处理;The wafer is ground by the grinding method of the wafer described in the first aspect;
提供贴装装置,所述贴装装置包括切割环及切割膜,所述切割膜贴置于所述切割环上;A placement device is provided, the placement device includes a dicing ring and a dicing film, and the dicing film is attached to the dicing ring;
将研磨处理后的所述晶圆贴置于所述切割膜的表面,所述晶圆的背面与所述切割膜的表面相接触;The wafer after grinding treatment is attached to the surface of the dicing film, and the back of the wafer is in contact with the surface of the dicing film;
去除所述晶圆的所述边缘区域及所述凸环。The edge region and the raised ring of the wafer are removed.
本发明的晶圆的处理方法中,在对晶圆的背面进行太鼓研磨之前增设对自晶圆的背面进行预减薄处理的步骤,可以通过调节预减薄处理中的减薄量来灵活调整最终得到的晶圆的最终厚度,可以得到数值范围更为广泛的最终厚度的待切割的晶圆,能够满足工艺对不同最终厚度的晶圆的需求。In the wafer processing method of the present invention, a step of pre-thinning from the backside of the wafer is added before the drum grinding of the backside of the wafer, which can be flexibly adjusted by adjusting the amount of thinning in the pre-thinning process The final thickness of the finally obtained wafer can obtain the wafer to be cut with a wider range of final thicknesses, which can meet the requirements of the process for wafers with different final thicknesses.
在其中一个实施例中,所述器件区域包括多个间隔排布的芯片区域,相邻所述芯片区域由切割道相隔离;各所述芯片区域的正面均形成有器件;In one embodiment, the device region includes a plurality of chip regions arranged at intervals, and adjacent chip regions are separated by dicing lanes; devices are formed on the front surface of each chip region;
采用如第一方面中所述的晶圆的研磨方法对所述晶圆进行研磨处理之前,还包括:于所述晶圆的正面形成保护膜,所述保护膜至少覆盖所述器件区域的正面;Before performing the grinding process on the wafer using the wafer grinding method as described in the first aspect, the method further includes: forming a protective film on the front surface of the wafer, the protective film covering at least the front surface of the device region ;
采用如第一方面中所述的晶圆的研磨方法对所述晶圆进行研磨处理之后,将研磨处理后的所述晶圆贴置于所述切割膜的表面之前,还包括:去除所述保护膜。After grinding the wafer by using the wafer grinding method described in the first aspect, and before attaching the polished wafer to the surface of the dicing film, the method further includes: removing the protective film.
在其中一个实施例中,所述对预减薄处理后的所述晶圆的背面进行太鼓研磨之后,所述晶圆的背面具有粗糙纹路;对所述晶圆进行研磨处理之后,去除所述保护膜之前,还包括:In one embodiment, after performing drum grinding on the back of the wafer after the pre-thinning process, the back of the wafer has rough textures; after grinding the wafer, remove the Before the protective film, also include:
去除所述粗糙纹路;removing the rough texture;
于所述晶圆的背面形成电极。Electrodes are formed on the backside of the wafer.
在上述实施例中,通过去除晶圆的背面的粗糙纹路,可以减小电极与晶圆的接触电阻;同时还可以释放由于研磨而在晶圆中形成的应力,从而降低碎片的风险。In the above embodiment, by removing the rough texture on the backside of the wafer, the contact resistance between the electrodes and the wafer can be reduced; at the same time, the stress formed in the wafer due to grinding can also be released, thereby reducing the risk of debris.
在其中一个实施例中,对研磨处理后的所述晶圆的背面进行干法刻蚀或湿法刻蚀,以去除所述粗糙纹路。In one embodiment, dry etching or wet etching is performed on the back surface of the wafer after grinding to remove the rough texture.
在其中一个实施例中,使用切割刀切割去除所述晶圆的所述边缘区域及所述凸环。In one embodiment, the edge region and the raised ring of the wafer are removed by dicing using a dicing knife.
在其中一个实施例中,所述切割膜位于所述器件区域的背面及所述凸环的表面;去除所述晶圆的所述边缘区域及所述凸环,包括:In one embodiment, the dicing film is located on the back surface of the device area and the surface of the convex ring; removing the edge area and the convex ring of the wafer includes:
提供真空吸附载台,所述真空吸附载台包括载台主体及位于所述载台主体内的真空吸附装置,所述真空吸附载台的表面设有垫片治具,所述垫片治具内设有沿厚度方向贯穿所述垫片治具的吸附孔,所述吸附孔与所述真空吸附装置相连通;A vacuum adsorption stage is provided. The vacuum adsorption stage includes a stage main body and a vacuum adsorption device located in the stage main body. A gasket fixture is provided on the surface of the vacuum adsorption stage. The gasket fixture An adsorption hole is arranged inside the gasket fixture along the thickness direction, and the adsorption hole is communicated with the vacuum adsorption device;
将贴置有所述晶圆的所述贴装装置置于所述真空吸附载台上,位于所述凸环表面的所述切割膜与所述真空吸附载台的表面,位于所述器件区域的背面的所述切割膜与所述垫片治具的表面相接触;Place the mounting device on which the wafer is attached on the vacuum suction stage, and the dicing film on the surface of the convex ring and the surface of the vacuum suction stage are located in the device area The dicing film on the back side is in contact with the surface of the gasket fixture;
使用所述切割刀切割去除所述边缘区域及所述凸环。The edge region and the collar are removed by cutting with the cutting knife.
在其中一个实施例中,对预减薄处理后的所述晶圆的背面进行太鼓研磨的过程中,去除的所述晶圆的厚度与所述垫片治具的厚度相同。In one embodiment, the thickness of the removed wafer is the same as the thickness of the spacer fixture during the drum grinding of the back surface of the wafer after the pre-thinning process.
在其中一个实施例中,去除所述晶圆的所述边缘区域及所述凸环之后,还包括:对所述晶圆进行切割,以得到多个分离的芯片。In one embodiment, after removing the edge region and the convex ring of the wafer, the method further includes: dicing the wafer to obtain a plurality of separated chips.
附图说明Description of drawings
为了更清楚地说明本申请实施例或传统技术中的技术方案,下面将对实施例或传统技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present application or in the traditional technology, the following briefly introduces the accompanying drawings that are used in the description of the embodiments or the traditional technology. Obviously, the drawings in the following description are only the For some embodiments of the application, for those of ordinary skill in the art, other drawings can also be obtained according to these drawings without any creative effort.
图1为本申请一个实施例中提供的晶圆的研磨方法的流程图;1 is a flowchart of a method for grinding a wafer provided in an embodiment of the present application;
图2为本申请一个实施例中提供的晶圆的研磨方法中对晶圆的背面进行平面研磨的示意图;2 is a schematic diagram of plane grinding the backside of the wafer in the wafer grinding method provided in one embodiment of the present application;
图3为为本申请一个实施例中提供的晶圆的研磨方法中对预减薄处理后的晶圆的背面进行太鼓研磨的示意图;3 is a schematic diagram of drum grinding performed on the back surface of a pre-thinning wafer in a method for grinding a wafer provided in an embodiment of the present application;
图4为本申请另一个实施例中提供的晶圆的处理方法的流程图;FIG. 4 is a flowchart of a wafer processing method provided in another embodiment of the present application;
图5为另一个实施例中提供的晶圆的处理方法中去除所述晶圆的所述边缘区域及所述凸环的示意图。FIG. 5 is a schematic diagram of removing the edge region and the convex ring of the wafer in the processing method of the wafer provided in another embodiment.
附图标记说明:110、真空吸盘;120、保护膜;130、晶圆;1301、凸环;140、研磨液输送管路;150、研磨头;1601、切割环;1602、切割膜;1701、载台主体;1702、真空吸附装置;180、垫片治具;1801、吸附孔;190、切割刀。Description of reference numerals: 110, vacuum chuck; 120, protective film; 130, wafer; 1301, convex ring; 140, polishing liquid delivery pipeline; 150, grinding head; 1601, cutting ring; 1602, cutting film; 1701, Stage main body; 1702, vacuum adsorption device; 180, gasket fixture; 1801, adsorption hole; 190, cutting knife.
具体实施方式Detailed ways
为了便于理解本申请,下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的实施例。但是,本申请可以以许多不同的形式来实现,并不限于本文所描述的实施例。相反地,提供这些实施例的目的是使本申请的公开内容更加透彻全面。In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the related drawings. Embodiments of the present application are presented in the accompanying drawings. However, the application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
除非另有定义,本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所使用的术语只是为了描述具体的实施例的目的,不是旨在于限制本申请。Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terms used herein in the specification of the application are for the purpose of describing specific embodiments only, and are not intended to limit the application.
可以理解,本申请所使用的术语“第一”、“第二”等可在本文中用于描述各种元件,但这些元件不受这些术语限制。这些术语仅用于将第一个元件与另一个元件区分。It will be understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element.
可以理解,以下实施例中的“连接”,如果被连接的电路、模块、单元等相互之间具有电信号或数据的传递,则应理解为“电连接”、“通信连接”等。It can be understood that the "connection" in the following embodiments should be understood as "electrical connection", "communication connection", etc. if the connected circuits, modules, units, etc. have electrical signals or data transmission between them.
在此使用时,单数形式的“一”、“一个”和“所述/该”也可以包括复数形式,除非上下文清楚指出另外的方式。还应当理解的是,术语“包括/包含”或“具有”等指定所陈述的特征、整体、步骤、操作、组件、部分或它们的组合的存在,但是不排除存在或添加一个或更多个其他特征、整体、步骤、操作、组件、部分或它们的组合的可能性。As used herein, the singular forms "a," "an," and "the/the" can include the plural forms as well, unless the context clearly dictates otherwise. It should also be understood that the terms "comprising/comprising" or "having" etc. designate the presence of stated features, integers, steps, operations, components, parts or combinations thereof, but do not preclude the presence or addition of one or more Possibilities of other features, integers, steps, operations, components, parts or combinations thereof.
半导体芯片,例如,功率器件、电源管理、传感器芯片等,广泛应用于工控、汽车、电力、能源等领域。以功率器件IGBT为例,Insulated Gate Bipolar Transistor,即绝缘栅双极型晶体管,是由BJT和MOSFET组成的复合功率半导体器件,既具备MOSFET的开关速度高、输入阻抗高、控制功率小、驱动电路简单、开关损耗小的优点,又有BJT导通电压低、通态电流大、损耗小的优点,在高压、大电流、高速等方面有突出的竞争力,已成为电力电子领域开关器件的主流发展方向。Semiconductor chips, such as power devices, power management, sensor chips, etc., are widely used in industrial control, automotive, electric power, energy and other fields. Taking power device IGBT as an example, Insulated Gate Bipolar Transistor, namely insulated gate bipolar transistor, is a composite power semiconductor device composed of BJT and MOSFET. It has both high switching speed of MOSFET, high input impedance, low control power, and drive circuit. It has the advantages of simplicity and low switching loss, and has the advantages of low on-state voltage, large on-state current, and low loss of BJT. It has outstanding competitiveness in high voltage, high current, and high speed, and has become the mainstream of switching devices in the field of power electronics. Direction of development.
研磨是半导体芯片制程工艺中非常重要的一道工序。研磨可以实现对晶圆的减薄,以及晶圆表面的平坦化等等。Grinding is a very important process in the semiconductor chip manufacturing process. Grinding can achieve thinning of the wafer, flattening of the wafer surface, and so on.
晶圆的正面在器件制备完成后,需要的背面进行研磨。为了减低晶圆的搬运风险和减少晶圆的翘曲,一般会对晶圆的背面进行太鼓研磨;太鼓研磨后,晶圆的边缘会形成凸环。但由于受太鼓研磨属性的限制,以及太鼓研磨后去除凸环时使用的垫片治具厚度的限制,最后仅能得到最终厚度为个别数值的晶圆,无法满足工艺对不同最终厚度的晶圆的需求。The front side of the wafer needs to be ground after the device is fabricated. In order to reduce the risk of wafer handling and reduce the warpage of the wafer, the backside of the wafer is generally subjected to drum grinding; after the drum grinding, a convex ring will be formed on the edge of the wafer. However, due to the limitation of the grinding properties of the drum and the thickness of the shim jig used to remove the convex ring after the drum grinding, only wafers with a final thickness of individual values can be obtained, which cannot meet the requirements of the process for wafers with different final thicknesses. demand.
表1.初始厚度为725μm的晶圆的背面经过太鼓研磨后,基于不同垫片治具进行去除凸环后得到的晶圆的最终厚度。Table 1. The final thickness of the wafer after the backside of the wafer with an initial thickness of 725 μm has been drum-polished, and the convex ring has been removed based on different shim fixtures.
表2.初始厚度为735μm的晶圆的背面经过太鼓研磨后,基于不同垫片治具进行去除凸环后得到的晶圆的最终厚度。Table 2. The final thickness of the wafer after the backside of the wafer with an initial thickness of 735 μm was drum-polished and the convex ring was removed based on different shim fixtures.
表1及表2中500#的垫片治具的厚度为500μm,610#的垫片治具的厚度为610μm,655#的垫片治具的厚度为655μm。由表1及表2可知,凸环去除机台所使用的的垫片治具只有三种型号;初始厚度为725μm的晶圆的背面经过太鼓研磨后,基于不同垫片治具进行去除凸环后得到的晶圆的最终厚度仅有70μm、115μm和225μm三个数值;初始厚度为735μm的晶圆的背面经过太鼓研磨后,基于不同垫片治具进行去除凸环后得到的晶圆的最终厚度仅有80μm、125μm和235μm三个数值。表1及表2进一步证实了仅对晶圆进行太鼓研磨,无法满足工艺对不同最终厚度的晶圆的需求。In Table 1 and Table 2, the thickness of the 500# gasket jig is 500μm, the thickness of the 610# gasket jig is 610μm, and the thickness of the 655# gasket jig is 655μm. As can be seen from Table 1 and Table 2, there are only three types of spacer fixtures used in the convex ring removal machine; The final thicknesses of the obtained wafers are only 70 μm, 115 μm and 225 μm; after the backside of the wafer with an initial thickness of 735 μm is subjected to drum grinding, the final thickness of the wafer obtained after removing the convex ring based on different gasket fixtures There are only three values of 80 μm, 125 μm and 235 μm. Tables 1 and 2 further confirm that only drum grinding of wafers cannot meet the requirements of the process for wafers with different final thicknesses.
在一个实施例中,请参阅图1,本申请提供一种晶圆的研磨方法,晶圆的研磨方法可以包括如下步骤:In one embodiment, referring to FIG. 1 , the present application provides a method for grinding a wafer, and the method for grinding a wafer may include the following steps:
S10:提供晶圆,晶圆包括器件区域及边缘区域;S10: Provide a wafer, the wafer includes the device area and the edge area;
S11:自晶圆的背面对晶圆进行预减薄处理;S11: pre-thinning the wafer from the backside of the wafer;
S12:对预减薄处理后的晶圆的背面进行太鼓研磨,太鼓研磨后,晶圆的边缘区域形成凸环。S12 : performing drum grinding on the back surface of the pre-thinned wafer, and after the drum grinding, a convex ring is formed on the edge area of the wafer.
上述晶圆的研磨方法中,在对晶圆的背面进行太鼓研磨之前增设对自晶圆的背面进行预减薄处理的步骤,可以通过调节预减薄处理中的减薄量来灵活调整最终得到的晶圆的最终厚度,可以得到数值范围更为广泛的最终厚度的晶圆,能够满足工艺对不同最终厚度的晶圆的需求。In the above-mentioned wafer grinding method, the step of pre-thinning from the back of the wafer is added before the drum grinding of the back of the wafer, which can be flexibly adjusted by adjusting the amount of thinning in the pre-thinning process. The final result is obtained. The final thickness of the wafer can be obtained with a wider range of final thicknesses, which can meet the requirements of the process for wafers with different final thicknesses.
在步骤S10中,请参阅图1中的S10步骤及图2,提供晶圆130,晶圆130包括器件区域及边缘区域。In step S10 , referring to step S10 in FIG. 1 and FIG. 2 , a
在一个可选地额示例中,晶圆130可以包括但不仅限于硅晶圆、氮化镓晶圆或碳化硅晶圆等等。In an alternate example,
具体的,器件区域可以包括多个间隔排布的芯片区域,相邻芯片区域由切割道相隔离;各芯片区域的正面均形成有器件。Specifically, the device region may include a plurality of chip regions arranged at intervals, and adjacent chip regions are separated by dicing lines; devices are formed on the front surface of each chip region.
为了保护器件不被后续工艺损坏,可以在晶圆130的正面形成有保护膜120,如图2所示。In order to protect the device from being damaged by subsequent processes, a
在步骤S11中,请参阅图1中的S11及图2,自晶圆130的背面对晶圆130进行预减薄处理。In step S11 , referring to S11 in FIG. 1 and FIG. 2 , the
在一个示例中,步骤S11中,可以对晶圆130的背面进行平面研磨,以实现对晶圆130进行减薄。In one example, in step S11 , the backside of the
具体的,步骤S11中,可以对晶圆130的正面背面进行整体减薄,减薄的厚度可以根据后续最终得到的晶圆所需的最终厚度而灵活调整设置,此处不做限定。Specifically, in step S11 , the front and back sides of the
在一个示例中,步骤S11中,可以基于如图2所示的平面研磨机台对晶圆130的背面进行平面研磨。具体的,平面研磨机台可以包括真空吸盘110、研磨液输送管路140及研磨头(未示出),真空吸盘110用于吸附晶圆130,晶圆130正面朝下吸附于真空吸盘110上,此时,保护膜120与真空吸盘110的表面相接触。研磨也输送管路140用于向晶圆130的表面输送研磨液,研磨头用于基于研磨液对晶圆130的背面进行平面研磨。In one example, in step S11 , the backside of the
在步骤S12中,请参阅图1中的S12及图3,对预减薄处理后的晶圆130的背面进行太鼓研磨(即执行TAIKO工艺),太鼓研磨后,晶圆130的边缘区域形成凸环1301。In step S12 , referring to S12 in FIG. 1 and FIG. 3 , drum grinding is performed on the back surface of the
在一个示例中,步骤S12中,请参阅图3,在使用研磨头150对预减薄处理后的晶圆130的背面进行太鼓研磨时,仅对器件区域的背面进行研磨,而不会对边缘区域进行研磨,这样,在太鼓研磨后,晶圆130的边缘区域就会形成凸环1301。In an example, in step S12 , referring to FIG. 3 , when the grinding
具体的,凸环1301的宽度可以为3mm左右。Specifically, the width of the
在另一个实施例中,请结合图1至图3参阅图4,本申请还提供一种晶圆的处理方法,晶圆的处理方法包括:In another embodiment, please refer to FIG. 4 in conjunction with FIG. 1 to FIG. 3 , the present application further provides a method for processing a wafer, and the method for processing a wafer includes:
S20:采用如上述实施例中所述的晶圆的研磨方法对晶圆进行研磨处理;S20: using the wafer grinding method described in the above embodiment to perform grinding processing on the wafer;
S21:提供贴装装置,贴装装置包括切割环及切割膜,切割膜贴置于切割环上;S21: Provide a mounting device, the mounting device includes a cutting ring and a cutting film, and the cutting film is attached to the cutting ring;
S22:将研磨处理后的晶圆贴置于切割膜的表面,晶圆的背面与切割膜的表面相接触;S22: the ground wafer is placed on the surface of the dicing film, and the back of the wafer is in contact with the surface of the dicing film;
S23:去除晶圆的边缘区域及凸环。S23: Remove the edge region and the convex ring of the wafer.
本发明的晶圆的处理方法中,在对晶圆的背面进行太鼓研磨之前增设对自晶圆的背面进行预减薄处理的步骤,可以通过调节预减薄处理中的减薄量来灵活调整最终得到的晶圆的最终厚度,可以得到数值范围更为广泛的最终厚度的待切割的晶圆,能够满足工艺对不同最终厚度的晶圆的需求。In the wafer processing method of the present invention, a step of pre-thinning from the backside of the wafer is added before the drum grinding of the backside of the wafer, which can be flexibly adjusted by adjusting the amount of thinning in the pre-thinning process The final thickness of the finally obtained wafer can obtain the wafer to be cut with a wider range of final thicknesses, which can meet the requirements of the process for wafers with different final thicknesses.
在步骤S20中,请结合图1至图3参阅图4中的S20步骤,采用如上述实施例中所述的晶圆的研磨方法对晶圆进行研磨处理。In step S20 , please refer to step S20 in FIG. 4 with reference to FIG. 1 to FIG. 3 , and use the wafer grinding method as described in the above-mentioned embodiment to grind the wafer.
在一个可选的示例中,器件区域包括多个间隔排布的芯片区域,相邻所述芯片区域由切割道相隔离;各所述芯片区域的正面均形成有器件。对晶圆130进行研磨处理之前,还可以包括:于晶圆130的正面形成保护膜120,保护膜120至少覆盖器件区域的正面。通过在晶圆130的正面形成保护膜120,可以保护器件在后续研磨处理过程中不会受到损伤。In an optional example, the device region includes a plurality of chip regions arranged at intervals, and adjacent chip regions are separated by dicing lines; devices are formed on the front surface of each chip region. Before grinding the
在一个可选的示例中,对晶圆130进行研磨处理之后,将研磨处理后的晶圆130贴置于切割膜的表面之前,即步骤S20与步骤S21之间还包括:去除保护膜120。In an optional example, after grinding the
具体的,保护膜120可以包括但不仅限于UV固化胶层或热熔胶层。可以采用但不仅限于加热等方式去除保护膜120。Specifically, the
在一个可选的示例中,对预减薄处理后的晶圆130的背面进行太鼓研磨之后,晶圆130的背面具有粗糙纹路;对晶圆130进行研磨处理之后,去除保护膜120之前,还包括:In an optional example, after performing drum grinding on the backside of the
去除粗糙纹路;remove rough texture;
于晶圆130的背面形成电极。Electrodes are formed on the backside of the
在上述实施例中,通过去除晶圆130的背面的粗糙纹路,可以减小电极与晶圆130的接触电阻;同时还可以释放由于研磨而在晶圆130中形成的应力,从而降低碎片的风险。In the above embodiment, by removing the rough texture on the backside of the
具体的,电极可以包括金属电极,可以采用但不仅限于溅射工艺、电镀工艺或物理气相沉积工艺形成电极,本实施例中,采用物理气相沉积工艺形成电极。更为具体的,电极的材料可以包括铝、钛、镍及银中的至少一种。Specifically, the electrode may include a metal electrode, and the electrode may be formed by, but not limited to, a sputtering process, an electroplating process or a physical vapor deposition process. In this embodiment, a physical vapor deposition process is used to form the electrode. More specifically, the material of the electrode may include at least one of aluminum, titanium, nickel and silver.
在一个可选的示例中,可以对研磨处理后的晶圆130的背面进行干法刻蚀,以去除粗糙纹路,也可以对研磨处理后的晶圆130的背面进行湿法刻蚀,以去除粗糙纹路。In an optional example, dry etching may be performed on the backside of the
在步骤S21中,请参阅图4中的S21步骤及图5,提供贴装装置,贴装装置包括切割环1601及切割膜1602,切割膜1602贴置于切割环1601上。In step S21 , referring to step S21 in FIG. 4 and FIG. 5 , a mounting device is provided. The mounting device includes a
具体的,切割膜1602可以包括蓝膜,切割膜1602可以覆盖切割环1601内的开口。Specifically, the
在步骤S22中,请参阅图4中的S22步骤及图5,将研磨处理后的晶圆130贴置于切割膜1602的表面,晶圆130的背面与切割膜1602的表面相接触。In step S22 , referring to step S22 in FIG. 4 and FIG. 5 , the
需要说明的是,晶圆130的直径应小于切割环1601的内径,以确保晶圆130可以贴置于切割膜1602上。It should be noted that the diameter of the
在步骤S23中,请参阅图4中的S23步骤及图5,去除晶圆130的边缘区域及凸环1301。In step S23 , referring to step S23 in FIG. 4 and FIG. 5 , the edge region of the
在一个可选的示例中,可以使用切割刀190切割去除晶圆130的边缘区域及凸环1301。In an alternative example, the edge region of the
具体的,切割刀190可以包括但不仅限于金刚石刀片。Specifically, the
在其中一个示例中,切割膜1602位于器件区域的背面及凸环1301的表面;步骤S23中,去除晶圆的边缘区域及凸环1301,可以包括:In one example, the
S231:提供真空吸附载台,真空吸附载台包括载台主体1701及位于载台主体1701内的真空吸附装置1702,真空吸附载台的表面设有垫片治具180,垫片治具180内设有沿厚度方向贯穿垫片治具180的吸附孔1801,吸附孔1801与真空吸附装置相连通;S231 : providing a vacuum adsorption stage, the vacuum adsorption stage includes a stage
S232:将贴置有所晶圆130的贴装装置置于真空吸附载台上,位于凸环1301表面的切割膜1602与真空吸附载台的表面,位于器件区域的背面的切割膜1602与垫片治具180的表面相接触;S232: Place the mounting device on which the
S233:使用所切割刀190切割去除边缘区域及凸环1301。S233 : Use the cutting
在一个可选的示例中,对预减薄处理后的晶圆130的背面进行太鼓研磨的过程中,去除的晶圆130的厚度可以与垫片治具180的厚度相同。In an optional example, the thickness of the removed
在一个可选的示例中,垫片治具180可以选择已有的厚度最薄的垫片治具,譬如,可以选择表1及表2中500#、610#及655#三个型号中的500#的垫片治具。由于太鼓研磨过程中去除的晶圆130的厚度与垫片治具180的的厚度相同,垫片治具180的厚度越薄,留给对晶圆130进行预减薄处理的减薄范围就越大,这样就可以根据实际需要选择预减薄处理过程中减薄的厚度,从而可以可选择性最多的最终厚度的晶圆的方案。In an optional example, the
表3.选择500#的垫片治具的初始厚度为725μm的晶圆,经过本申请的晶圆的研磨方法后的各项数据。Table 3. Various data of wafers with an initial thickness of 725 μm selected for a 500# gasket fixture after the wafer grinding method of the present application.
由表3可知,通过调整预减薄处理过程中晶圆130的减薄厚度,可以得到较宽的最终厚度范围,即预减薄处理过程中的减薄厚度可以选择为0~225μm,对应得到的晶圆的最终厚度的范围也可以达到0~225μm。It can be seen from Table 3 that by adjusting the thinning thickness of the
在一个可选的示例中,去除晶圆的边缘区域及所述凸环1301之后,即步骤S23之后,还包括:对晶圆130进行切割,以得到多个分离的芯片。In an optional example, after removing the edge region of the wafer and the
具体的,可以但不仅限于使用金刚石刀片对晶圆130的器件区域进行切割,以得到多个分离的独立的芯片。当然,在其他示例中,也可以采用激光对晶圆130的器件区域进行切割。Specifically, the device area of the
更为具体的,可以沿切割道对晶圆130的器件区域进行切割,以避免破坏芯片。More specifically, the device area of the
在本说明书的描述中,参考术语“其中一个实施例”、“其他实施例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特征包含于本发明的至少一个实施例或示例中。在本说明书中,对上述术语的示意性描述不一定指的是相同的实施例或示例。In the description of this specification, description with reference to the terms "one of the embodiments", "the other embodiment", etc. means that a particular feature, structure, material or feature described in connection with that embodiment or example is included in at least one implementation of the invention example or example. In this specification, schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.
以上所述实施例的各技术特征可以进行任意的组合,为使描述简洁,未对上述实施例中的各个技术特征所有可能的组合都进行描述。然而,只要这些技术特征的组合不存在矛盾,都应当认为是本说明书记载的范围。The technical features of the above-described embodiments can be combined arbitrarily. To simplify the description, all possible combinations of the technical features of the above-described embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of the description in this specification.
以上所述实施例仅表达了本发明的几种实施方式,其描述较为具体和详细,但并不能因此而理解为对发明专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干变形和改进,这些都属于本发明的保护范围。因此,本发明专利的保护范围应以所附权利要求为准。The above-mentioned embodiments only represent several embodiments of the present invention, and the descriptions thereof are specific and detailed, but should not be construed as a limitation on the scope of the invention patent. It should be pointed out that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can also be made, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention should be subject to the appended claims.
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210769328.4A CN115083889A (en) | 2022-07-01 | 2022-07-01 | Wafer grinding method and wafer processing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210769328.4A CN115083889A (en) | 2022-07-01 | 2022-07-01 | Wafer grinding method and wafer processing method |
Publications (1)
Publication Number | Publication Date |
---|---|
CN115083889A true CN115083889A (en) | 2022-09-20 |
Family
ID=83258042
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202210769328.4A Pending CN115083889A (en) | 2022-07-01 | 2022-07-01 | Wafer grinding method and wafer processing method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN115083889A (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103050480A (en) * | 2012-08-14 | 2013-04-17 | 上海华虹Nec电子有限公司 | Technical method for imaging rear side of silicon wafer |
CN105428220A (en) * | 2015-12-22 | 2016-03-23 | 上海华虹宏力半导体制造有限公司 | Annular cutting process method of Taiko thinning process |
CN113172778A (en) * | 2021-04-28 | 2021-07-27 | 华虹半导体(无锡)有限公司 | Taizhou ring removing method and positioning device for Taizhou ring removing |
CN114242579A (en) * | 2021-12-16 | 2022-03-25 | 上海华虹宏力半导体制造有限公司 | Method for improving wafer warpage before TAIKO thinning and film stripping |
-
2022
- 2022-07-01 CN CN202210769328.4A patent/CN115083889A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103050480A (en) * | 2012-08-14 | 2013-04-17 | 上海华虹Nec电子有限公司 | Technical method for imaging rear side of silicon wafer |
CN105428220A (en) * | 2015-12-22 | 2016-03-23 | 上海华虹宏力半导体制造有限公司 | Annular cutting process method of Taiko thinning process |
CN113172778A (en) * | 2021-04-28 | 2021-07-27 | 华虹半导体(无锡)有限公司 | Taizhou ring removing method and positioning device for Taizhou ring removing |
CN114242579A (en) * | 2021-12-16 | 2022-03-25 | 上海华虹宏力半导体制造有限公司 | Method for improving wafer warpage before TAIKO thinning and film stripping |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101005021B (en) | Manufacturing method of semiconductor device | |
TW201009920A (en) | Method of thinning a semiconductor wafer | |
US8435417B2 (en) | Method of manufacturing semiconductor device | |
TW476141B (en) | Method of dicing a wafer and method of manufacturing a semiconductor device | |
US8633086B2 (en) | Power devices having reduced on-resistance and methods of their manufacture | |
JP2015035461A (en) | Method for manufacturing silicon carbide semiconductor device | |
JP2010016188A (en) | Method of manufacturing semiconductor device, and semiconductor device | |
JP2020145418A (en) | Substrate manufacturing method and substrate manufacturing system | |
JP2002100589A (en) | Semiconductor device manufacturing method | |
TW202003150A (en) | Wafer processing method with full edge trimming | |
JP2005166925A (en) | Wafer processing method and wafer processing apparatus | |
CN115083889A (en) | Wafer grinding method and wafer processing method | |
CN111463141B (en) | Method for improving utilization rate of wafer probe station | |
CN116072533B (en) | Wafer and wafer thinning process thereof | |
WO2013011759A1 (en) | Semiconductor device manufacturing method | |
JP2011054914A (en) | Manufacturing method of semiconductor device and semiconductor wafer | |
JP2004022899A (en) | Process for machining thin silicon wafer | |
JP2009016420A (en) | Method of manufacturing semiconductor device | |
JP5499826B2 (en) | Manufacturing method of semiconductor device | |
TW202236407A (en) | A method for back grinding a wafer and a method for manufacturing an electronic device | |
TWI762698B (en) | Substrate processing method | |
CN113178383A (en) | Silicon carbide substrate, silicon carbide device and substrate thinning method thereof | |
CN112185803A (en) | Power device substrate back processing method and power device manufacturing method | |
CN110890281A (en) | Method for manufacturing semiconductor device | |
JP2020177963A (en) | Method for manufacturing semiconductor chip |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |