CN114999910A - Directed deposition on patterned structures - Google Patents

Abstract

The invention relates to directional deposition on patterned structures. The present invention provides methods and related devices that facilitate patterning by performing highly non-conformal (directional) deposition on patterned structures. The method includes depositing a film on a patterned structure (e.g., a hard mask). The deposition may be substrate selective such that the film has a high etch selectivity relative to the underlying material to be etched, and pattern selective such that the film is directionally deposited to replicate the pattern of the patterned structure. In some embodiments, the deposition is performed in the same chamber as the chamber in which the subsequent etch is performed. In some embodiments, the deposition may be performed in a separate chamber (e.g., a PECVD deposition chamber) connected to the etch chamber by a vacuum transfer chamber. The deposition may be performed prior to or during selected intervals during the etch process. In some embodiments, the deposition involves multiple cycles of the deposition process and the treatment process.

Description

Directed deposition on patterned structures

This application is a divisional application for an invention patent application with the application number of 201611177683.3 and the application date of December 19, 2016, the applicant is Rum Research Corporation, and the invention and creation name is "directional deposition on patterned structures".

technical field

The present invention relates generally to the field of semiconductors and, more particularly, to directional deposition on patterned structures.

Background technique

In the scaling of 3D-NAND and DRAM, up to 64 pairs of ONON/OPOP are used for via holes. One of the key challenges in etching these high aspect ratio holes is mask loss during etching. Typical mask selectivity ratios are in the range of 5-8 times the etch selectivity ratio, which results in the need for mask heights in the range of 0.5 to 2 microns, depending on the depth of the holes. A taller mask increases the aspect ratio of the hole, which increases the difficulty of etching. The increasing plasma densities and ion energies used to etch these high aspect ratio holes reduce the efficiency of the conventional practice of slowing mask etching by non-selective deposition of fluorocarbon-based polymers during etching.

SUMMARY OF THE INVENTION

The present invention provides methods and apparatus for directional deposition on patterned structures. In some embodiments, the method involves performing a multi-cycle directional deposition process to deposit a mask building material on a patterned structure. Each cycle may include (i) depositing the first material on the patterned structure by a plasma enhanced chemical vapor deposition (PECVD) process, and (ii) plasma treating the first material to improve directionality.

According to various embodiments, the first material may be a silicon-based material, a carbon-based material, a boron-based material, or a combination thereof. In some embodiments, the first material includes two or more of silicon, carbon, boron, phosphorus, arsenic, and sulfur. In some embodiments, the first material is a metal-containing material. In some embodiments, the plasma treatment includes exposing the first material to nitrogen-based plasma, oxygen-based plasma, hydrogen-based plasma, hydrocarbon-based plasma, argon-based plasma, helium-based plasma body, or a combination thereof.

In some embodiments, the method includes etching the layer masked by the patterned structure. The patterned structure may include raised features with feature tops and feature sidewalls. In such embodiments, processing the first material may include redepositing the first material from the feature sidewalls to the feature tops.

In some embodiments, each cycle includes reacting the first material to form the second material. In some embodiments, each cycle includes changing a material property of the first material. For example, altering the material properties of the first material may include one or more of plasma treatment, exposure to ultraviolet radiation, or thermal annealing.

In some embodiments, depositing by a PECVD process includes introducing a silicon-containing precursor, a carbon-containing precursor, a boron-containing precursor, or a metal-containing precursor into a plasma reactor. In some embodiments, depositing by a PECVD process includes introducing a silicon-containing precursor selected from the group consisting of silanes, halosilanes, organosilanes, or aminosilanes.

In some embodiments, depositing by a PECVD process includes introducing a silicon-containing precursor selected from the group consisting of methylsilane, ethylsilane, isopropylsilane, tert-butylsilane, dimethylsilane, diethylsilane Silane, di-tert-butylsilane, allylsilane, sec-butylsilane, thexylsilane, isopentylsilane, tert-butyldisilane, di-tert-butyldisilane, tetrachlorosilane, trichlorosilane Silane, dichlorosilane, monochlorosilane, chloroallylsilane, chloromethylsilane, dichloromethylsilane, chlorodimethylsilane, chloroethylsilane, tert-butyl chlorosilane, di-tert-butyl chloride Silane, chloroisopropylsilane, chlorosec-butylsilane, tert-butyldimethylchlorosilane, tert-hexyldimethylchlorosilane, monoaminosilane, diaminosilane, triaminosilane, tetraaminosilane, tert-butyl Aminosilane, methylaminosilane, tert-butylsilylamine, bis(tert-butylamino)silane or tert-butyl silylcarbamate.

In some embodiments, depositing by a PECVD process includes introducing a material selected from the group consisting of methane (CH ₄ ), acetylene (C ₂ H ₂ ), ethylene (C ₂ H ₄ ), propylene (C ₃ H ₆ ), butane (C ₄ H ) ₁₀ ), _carbonaceous precursors in _cyclohexane ( _C6H12 ), _benzene ( _C6H6 ) and toluene ( _C7H8 ).

In some embodiments, depositing by a PECVD process includes introducing a boron-containing precursor selected from the group consisting of borane (BH ₃ ), diborane (B ₂ H ₆ ), and triborane (B ₃ H ₇ ).

In some embodiments, depositing by a PECVD process includes introducing a group selected from the group consisting of penta(dimethylamido)tantalum, trimethylaluminum, tetraethoxytitanium, tetra-dimethylamidotitanium, tetrakis(ethylmethyl) amide) metal-containing precursors in hafnium, bis(cyclopentadienyl)manganese and bis(n-propylcyclopentadienyl)magnesium.

In some embodiments, one or both of the PECVD process and the plasma processing operation use inductively coupled plasma, or capacitively coupled plasma, or microwave plasma. In some embodiments, one or both of the PECVD process and the plasma treatment operation use direct plasma, or remote plasma, or a combination thereof. In some embodiments, one or both of the PECVD process and the plasma treatment operation is an ion-assisted process, or a radical-assisted process, or a combination thereof.

Apparatuses for performing the methods disclosed herein are also provided. The apparatus may include one or more processing chambers, such as an inductively coupled etch chamber or a capacitively coupled etch chamber, and a controller having machine-readable instructions for performing the method.

In particular, some aspects of the present invention can be set forth as follows:

1. A method comprising:

A multi-cycle directional deposition process is performed to deposit mask build material on the patterned structure, where each cycle includes:

i) depositing a first material on the patterned structure by a plasma enhanced chemical vapor deposition (PECVD) process, and

ii) Plasma treating the first material to improve directionality.

2. The method of clause 1, wherein the first material is a silicon-based material, a carbon-based material, a boron-based material, or a combination thereof.

3. The method of clause 1, wherein the first material comprises two or more of silicon, carbon, boron, phosphorous, arsenic, and sulfur.

4. The method of clause 1, wherein the first material is a metal-containing material.

5. The method of clause 1, wherein (ii) comprises exposing the first material to a nitrogen-based plasma, an oxygen-based plasma, a hydrogen-based plasma, a hydrocarbon-based plasma, an argon-based plasma plasma, helium-based plasma, or a combination thereof.

6. The method of clause 1, wherein (ii) comprises exposing the first material to a plasma generated from a hydrogen-containing compound.

7. The method of clause 5, wherein the hydrogen _- containing _compound is one of _H2 , _CH4 , _NH3 , _C2H2 , and _N2H2 .

8. The method of clause 1, further comprising etching a layer masked by the patterned structure.

9. The method of clause 1, wherein the patterned structure comprises raised features having feature tops and feature sidewalls.

10. The method of clause 9, wherein processing the first material comprises redepositing the first material from the feature sidewalls to the feature tops.

11. The method of clause 1, wherein each cycle further comprises reacting the first material to form a second material.

12. The method of clause 1, wherein each cycle further comprises changing a material property of the first material.

13. The method of clause 12, wherein the altering the material properties of the first material comprises one or more of plasma treatment, exposure to ultraviolet radiation, or thermal annealing.

14. The method of clause 1, wherein depositing by the PECVD process comprises introducing a silicon-containing precursor, a carbon-containing precursor, a boron-containing precursor, or a metal-containing precursor into a plasma reactor.

15. The method of clause 14, wherein depositing by the PECVD process comprises introducing a silicon-containing precursor selected from the group consisting of silanes, halosilanes, organosilanes, or aminosilanes.

16. The method of clause 14, wherein depositing by the PECVD process comprises introducing a silicon-containing precursor selected from the group consisting of methylsilane, ethylsilane, isopropylsilane, tert-butylsilane, Dimethylsilane, diethylsilane, di-tert-butylsilane, allylsilane, sec-butylsilane, tert-hexylsilane, isopentylsilane, tert-butyldisilane, di-tert-butyldisilane, tetrachlorosilane Silane, trichlorosilane, dichlorosilane, monochlorosilane, chloroallylsilane, chloromethylsilane, dichloromethylsilane, chlorodimethylsilane, chloroethylsilane, tert-butylchlorosilane, dichlorosilane tert-butylchlorosilane, chloroisopropylsilane, chlorosec-butylsilane, tert-butyldimethylchlorosilane, t-hexyldimethylchlorosilane, monoaminosilane, diaminosilane, triaminosilane, tetraaminosilane , tert-butylaminosilane, methylaminosilane, tert-butylsilylamine, bis(tert-butylamino)silane or tert-butyl silylcarbamate.

17. The method of clause 14, wherein depositing by the PECVD process comprises introducing a material selected from the group consisting of methane ( _CH4 ), acetylene (C2H2 ₎ , ethylene _{( C2H4 )} , propylene ( _{C3H6 )} , butane (C ₄ H ₁₀ ), cyclohexane (C ₆ H ₁₂ ), benzene (C ₆ H ₆ ) and carbonaceous precursors in toluene (C ₇ H ₈ ).

18. The method of clause 14, wherein depositing by the PECVD process comprises introducing a compound selected from the group consisting of borane ( _{BH3 )} , diborane ( _B2H6 ) and _triborane ( _B3H7 ). Boron precursor.

19. The method of clause 14, wherein depositing by the PECVD process comprises introducing a group selected from the group consisting of penta(dimethylamido)tantalum, trimethylaluminum, tetraethoxytitanium, tetra-dimethylamidotitanium Metal-containing precursors in tetrakis(ethylmethylamide) hafnium, bis(cyclopentadienyl)manganese, and bis(n-propylcyclopentadienyl)magnesium.

20. The method of clause 1, wherein one or both of the PECVD process and the plasma treatment operation uses an inductively coupled plasma, or a capacitively coupled plasma, or a microwave plasma.

21. The method of clause 1, wherein one or both of the PECVD process and the plasma treatment operation uses a direct plasma, or a remote plasma, or a combination thereof.

22. The method of clause 1, wherein one or both of the PECVD process and the plasma treatment operation is an ion-assisted process, or a radical-assisted process, or a combination thereof.

23. An apparatus comprising:

a chamber configured to hold the substrate;

a plasma generator integrated with or connected to the chamber; and

A controller including instructions for performing a multi-cycle directional deposition process to deposit a mask build material on a patterned structure, wherein the instructions include:

i) instructions for depositing a first material on the patterned structure by a plasma enhanced chemical vapor deposition (PECVD) process, and

ii) Instructions for plasma treating the first material to improve directionality.

These and other aspects are further described below with reference to the accompanying drawings.

Description of drawings

FIG. 1 illustrates the operation of an example of an integrated process involving directional deposition on a hard mask.

2 illustrates certain operations in an example of a method of directional deposition on high aspect ratio features.

3a-3d show schematic examples of three high aspect ratio patterned hardmask features during a directional deposition process.

4 illustrates certain operations in an example of a method of directional deposition on high aspect ratio features.

5 and 6 are schematic diagrams of examples of process chambers for performing methods according to disclosed embodiments.

Detailed ways

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail so as not to unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with specific embodiments, it will be understood that no limitation of the disclosed embodiments is intended.

In semiconductor processing, masking methods are used to pattern and etch substrates. Mask loss during etching (also known as mask erosion) is a key challenge in etching high aspect ratio features such as holes and trenches. Provided herein are methods involving depositing films on masks or on substrate patterns. The deposition can be substrate-selective (so that the film has high etch selectivity with respect to the substrate) and pattern-selective (so that the film is directionally deposited on the pattern and replicates the pattern). The deposited material is referred to as the mask build material. In some embodiments, the deposition is performed in the same chamber as the etching is performed, also referred to as in-situ deposition. In some embodiments, the deposition may be performed in a separate chamber (eg, a PECVD chamber or a different etch chamber) connected to the main etch chamber through the transfer chamber. It should be noted that although the description primarily refers to deposition on a patterned hardmask, the methods disclosed herein include directional deposition on any patterned structure to replicate the structure pattern.

The deposition of the mask build material may be performed before or at selected intervals during the etching process. FIG. 1 illustrates the operation of an example of an integrated process involving directional deposition on a hard mask. In FIG. 1, at 10, a hardmask 105 and photoresist 109 are formed over the material 101 to be etched. Hardmask 105 may be any suitable material, including organic or inorganic hardmasks. Examples of organic hardmasks include doped or undoped amorphous carbon (also known as an ashable hardmask or AHM) and organosiloxane materials. Examples of inorganic hardmask materials include polysilicon and amorphous silicon (poly-Si, a-Si), silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), silicon carbon nitride (SiCN) , titanium nitride (TiN), tungsten (W), and other metals that can be selectively removed after feature etching. The hard mask can be doped, an example is a boron doped AHM. In some embodiments, the hard mask may be a metal hard mask (MHM), examples of which include metals such as aluminum (Al), metal nitrides such as TiN and tantalum nitride (TaN), tungsten (W), and metals Oxides such as alumina (Al ₂ O ₃ ). In some embodiments, the hard mask may be a ceramic hard mask (CHM).

The process then proceeds with photoresist development (20) and hardmask opening (30) to expose the material to be etched. In the example of FIG. 1 , before etching material 101 , mask build material 111 is directionally deposited on hardmask 105 to increase the aspect ratio of the patterned features of hardmask 105 . See operation 40. This enables subsequent etchings to be performed for longer periods of time to provide deeper etchings. The material 101 is then etched. See operation 50. In the example of FIG. 1 , the mask build material 111 is completely removed during etching. However, in some embodiments, some of them may remain. At operation 50, if the etching is complete, the hard mask 105 may be removed by a suitable process. However, in some embodiments, an on-pattern directional deposition of the mask build material may be performed after 50 to increase the aspect ratio of the patterned features of the hardmask before continuing the etch process . The etched mask material can be restored with the same or a similar material or a different material and restored to the same or a different profile as desired.

Figure 2 illustrates certain operations in a method of directional deposition on high aspect ratio features. As mentioned above, directional deposition can be performed in the etch chamber before or in the middle of the etch process to increase the aspect ratio of the mask covering the material to be etched.

In Figure 2, the mask build material is deposited on the high aspect ratio features by a plasma enhanced chemical vapor deposition (PECVD) process. See box 201. The mask build material is typically different from the mask material, can be deposited by PECVD, and has at least some etch selectivity for the material to be etched. Therefore, the mask build material will depend on the material to be etched and the etch chemistry to be used. Typically, the mask build material is a dielectric material. Examples include silicon-containing films and carbon-containing films and combinations thereof.

To facilitate directional deposition, in some embodiments, the deposition chemistry may include molecules with high adhesion coefficients and low mobility. The adhesion coefficient is the ratio of the number of adsorbed molecules adhering to the surface to the total number of molecules hitting the surface during the same time period. The adhesion coefficient depends on the size (large molecules have higher adhesion coefficients) and the propensity for adsorption on the surface.

Mobility refers to the surface and gas diffusion rates of molecules. In some embodiments, deposition chemistries that include polymer chains may be used. Such chains can be formed in the plasma during the PECVD process. For example, chlorosilane with hydrogen ( _H2 ) can be introduced into the chamber. The plasma can be excited, producing free radicals (denoted by a*) and ions, and subsequent reactions produce chlorinated polysilanes.

Examples of plasma reactions include:

H ₂ +e ^- →2H*+e ^-

SiCl ₄ +e ^- →SiCl ₃ +Cl*+e ^-

SiCl ₄ +H*→SiCl ₃ *+HCl

SiCl ₄ +2H*→HSiCl ₃ +HCl

SiCl ₃ *+2H*→SiCl ₂ *+HCl+H*,

or →HSiCl ₂ *+Cl*+H*,

or →HSiCl ₃ +H*,

or →H ₂ SiCl*+2Cl*,

n(SiCl ₂ *)+mSiCl ₃ *→Si ₂ Cl ₆ +…→Si ₃ Cl ₈ +…→Si _n Cl _2n+2

n(HSiCl*)+mH ₂ SiCl*→H ₂ Si ₂ Cl ₄ +→H _x Si _n Cl _2n+2-x

Similar reactions also taking place on the surface complicate the deposition process.

Chlorinated polysilanes can be large clusters. Both chlorosilanes and chlorinated polysilanes have high adhesion coefficients and low mobility, which help provide directional deposition on patterns. Other exemplary deposition chemistries are discussed further below. After block 201, the mask build material deposited on the high aspect ratio features may be directionally deposited, with the deposited material being thicker at the top of the feature than along the sidewalls and at the bottom of the feature. FIG. 3a shows a schematic example of a high aspect ratio patterned hardmask feature after block 201 . In the example of Figure 3a, patterned hardmask features 303 are shown covering material 309 to be etched. Patterned hardmask features 303 may be characterized as having feature tops 305 and sidewalls 307 . The patterned hardmask features 303 form high aspect ratio holes 313, which may be, for example, contact holes or trenches. The bottom 311 of the hole 313 may be referred to as the feature bottom.

In some embodiments, a bias voltage is applied to the wafer during PECVD deposition. This can increase the adhesion coefficient of various species in the plasma. For example, the bias voltage can increase the adhesion coefficient of the chlorosilane ionic group.

The plasma 301 generated in the gas mixture containing the silicon precursor and the diluent gas is used to deposit the silicon film on the hard mask. Exemplary plasma species include SiH _{yCl x} * radicals 302 , H* atoms 308 , and chlorinated polysilanes 306 . Hydrogen chloride (HCl) species 304 is produced as a by-product. The silicon-containing species deposits silicon build material 312 on patterned hardmask features 303 . In the example of FIG. 3a, the deposition is directional because more build material 312 is deposited on feature top 305 than on sidewalls 307 and bottom 311 . The thickness of the build material 312 decreases as the depth of the feature increases.

Returning to Figure 2, the deposited mask build material is then processed to enhance directionality. See box 203. Enhancing directionality can increase the aspect ratio of the mask build material. In some embodiments, the mask build material is no more than a few nanometers thick on the sidewalls of the patterned hardmask. Directionality can also be characterized by top:bottom step coverage or top:sidewall step coverage. In Figure 3d, for example, 320 represents the top thickness, 322 represents the bottom thickness, and 324 represents the sidewall thickness. Step coverage is the ratio of two thicknesses, for example, top:bottom step coverage or top:sidewall step coverage. When measuring sidewall thickness, the thickness at the midpoint of the feature depth can be used. In some embodiments, the processing operation increases the top:bottom step coverage or top:sidewall step coverage. In some embodiments, block 203 also modifies the material properties (eg, density, chemical composition, or etch resistivity) of the deposited material.

Operation 203 can include exposing the mask build material to a plasma species having high mobility and can etch the mask build material. The plasma species may selectively chemically etch the mask build material relative to the material to be etched and/or relative to the hard mask. In some embodiments, the reaction product of the chemical etch is redeposited as a build material on the upper portion of the patterned hardmask features.

In some embodiments, a hydrogen-based plasma is used. A hydrogen-based plasma is a plasma in which hydrogen species (primarily H radicals) are the primary process species and in some embodiments may be the primary etch species. In some embodiments, the hydrogen-based plasma can be formed from a gas consisting essentially of _H2 . In some embodiments, one or more inert gases may be present with H ₂ . A hydrogen-based plasma can selectively etch silicon without etching oxide.

In some embodiments, a plasma generating gas including one or more of the following is introduced into a plasma generator to generate plasma species. In some embodiments, the plasma generating gas includes one or more hydrogen-containing plasmas. _Examples of such _gases include _H2 , _CH4 , _NH3 , _C2H2 , and _N2H2 . The resulting plasma may be a hydrogen-based plasma.

In some embodiments, nitrogen-based plasmas, oxygen-based plasmas, hydrocarbon-based plasmas, argon-based plasmas, or helium-based plasmas may be used. In nitrogen-based plasmas, the main treatment species is nitrogen, in oxygen-based plasmas, the main treatment species is oxygen, and so on. In some embodiments, these may be the primary etching species used for processes involving etching.

FIG. 3b shows a schematic example of a high aspect ratio patterned hardmask feature after block 203 . Process plasma 321 may include, for example, one or more of Ar ions, Si ions, H* atoms, N ions, and Cl* atoms. Ultraviolet light generated from the plasma or from a separate UV source can also be in the chamber.

至

或

至

的范围内。图3c示出了在第N和第(N+1)循环中图案化的硬掩模和掩模构建材料的示意性示例。In Figure 3b, the processing plasma includes H* atoms 308, N ions 309 and Ar ions 310. These can penetrate deep into hole 313 and etch build material 312 from sidewalls 307 and bottom 311 of the feature. Some of the etched build material may be redeposited at the top 305 of the feature. Various product species 315 may form and cause redeposition or leave as by-products. Examples of product species may include _SiClxHy species, _{SixHy , and NxHy species .} In this way, the directionality of the mask build material toward the top of the patterned hardmask features is improved compared to toward the sidewalls and bottom. Returning to Figure 2, blocks 201 and 203 may be repeated one or more times to achieve the desired aspect ratio. Block 201 may be performed only long enough to deposit only a thin layer of mask build material on the sidewalls and bottom of the feature so that it may be removed in block 203 . Exemplary top thicknesses for each cycle can be found at

to

or

to

In the range. Figure 3c shows a schematic example of a hardmask and mask build material patterned in the Nth and (N+1)th cycles.

4 illustrates certain operations in a method of directional deposition on high aspect ratio features. As mentioned above, directional deposition can occur in the etch chamber before or in the middle of the etch process to increase the aspect ratio of the mask covering the material to be etched. The process described in FIG. 4 is similar to the process described with respect to FIG. 2, with operations 201 and 203 performed as described above. However, in the example of Figure 4, after processing the deposited material to increase the pattern selectivity, the mask build material may react to increase the etch selectivity. See block 204. In one example, the silicon mask build material may be exposed to a carbon-containing gas to form silicon carbide. This is particularly useful for forming mask build materials with high etch selectivity to oxides. In other examples, the silicon mask build material may be exposed to a nitrogen-containing gas to form silicon nitride.

In some embodiments, operation 204 in FIG. 4 may be performed before operation 203, such that the mask building material reacts to form another material prior to the process. In some implementations, operation 204 may only be performed after multiple cycles of operations 203 and 204 . For example, operation 204 may be performed after operation 205 .

In some embodiments, an optional densification operation may be performed after operation 203 in FIG. 2 or operation 204 in FIG. 4 . If performed, the densification operation may involve, for example, thermal annealing, exposure to ultraviolet radiation, or plasma densification. In some embodiments, an optional densification operation may be performed after operation 205 in FIG. 2 or FIG. 4 . In some embodiments, operations 203 and 204 may be performed simultaneously using appropriate chemicals.

During deposition and processing, process conditions are adjusted to provide non-conformal deposition without pinch-off. Pinch-off refers to adjacent features growing together to pinch off the area between the features. As discussed further below based on experimental results, various process conditions can be adjusted to provide directional deposition during PECVD deposition, as well as improved directionality and vertical sidewalls during processing operations. Cycling (rather than continuous PECVD) and using processing operations have been shown to facilitate well-defined high aspect ratio build material characteristics in some embodiments. Bias voltage during PECVD deposition can also increase non-conformity and reduce pinch off. Residence time (flow rate) and plasma power during deposition also affect non-conformity and pinch-off. Adding additive gases during processing operations can help prevent etching of previously deposited material on top of features. Plasma power and exposure time during processing can also be adjusted to limit etching of the hardmask walls and bottom.

While the above discussion has focused on depositing silicon-based mask building materials, other materials, such as carbon films, may be used. In depositing silicon, any suitable silicon-containing precursor may be used, including silanes (eg _SiH4 ), polysilanes ( _H3Si- (SiH2) _{n - SiH3} ) (where n>1), organosilanes, halogens Substituted silanes and amino silanes. Organosilanes such as methylsilane, ethylsilane, isopropylsilane, tert-butylsilane, dimethylsilane, diethylsilane, di-tert-butylsilane, allylsilane, sec-butylsilane, Tert-hexylsilane, isopentylsilane, tert-butyldisilane, di-tert-butyldisilane, etc. Halogenated silanes contain at least one halogen group and may or may not contain hydrogen and/or carbon groups. Examples of halosilanes are iodosilanes, bromosilanes, chlorosilanes and fluorosilanes. Specific chlorosilanes are tetrachlorosilane (SiCl4), trichlorosilane (HSiCl3 ₎ , dichlorosilane _{( H2SiCl2} ), monochlorosilane ( _{ClSiH3 )} , chloroallylsilane, chloromethylsilane, Dichloromethylsilane, chlorodimethylsilane, chloroethylsilane, tert-butylchlorosilane, di-tert-butylchlorosilane, chloroisopropylsilane, chlorosec-butylsilane, tert-butyldimethylchlorosilane , tert-butyldimethylsilyl chloride, etc. Aminosilanes include at least one nitrogen atom bonded to a silicon atom, but may also contain hydrogen, oxygen, halogen and carbon. Examples of aminosilanes are mono-, di-, tri-, and tetra-amino silanes (H ₃ Si(NH ₂ ) ₄ , H ₂ Si(NH ₂ ) ₂ , HSi(NH ₂ ) ₃ and Si ( NH ₂ ) ₄ ), and substituted mono-, di-, tri- and tetra-amino silanes, such as tert-butylaminosilane, methylaminosilane, tert-butylsilylamine, bis(tert-butylamino) ) Silane (SiH ₂ (NHC(CH ₃ ) ₃ ) ₂ (BTBAS)), tert-butyl silylcarbamate, SiH(CH ₃ )-(N(CH ₃ ) ₂ ) ₂ , SiHCl-(N(CH ) ₃ ) ₂ ) ₂ , (Si(CH ₃ ) ₂ NH) ₃ and the like.

The deposited films are generally amorphous and the film composition will depend on the specific precursors and co-reactants used, organosilanes will result in a-SiC:H films, while aminosilanes will result in a-SiN:H or a-SiCN:H membrane.

In depositing carbon films, any suitable carbon-containing precursor may be used. In some embodiments, hydrocarbon precursors of the formula _CxHy , where _X is an integer between 2 and 10 and Y is an integer between 2 and 24, can be used. Examples include methane (CH ₄ ), acetylene (C ₂ H ₂ ), ethylene (C ₂ H ₄ ), propylene (C ₃ H ₆ ), butane (C ₄ H ₁₀ ), cyclohexane (C ₆ H ₁₂ ) , benzene (C ₆ H ₆ ) and toluene (C ₇ H ₈ ).

In some embodiments, the build material may be doped or include materials such as boron or phosphorous. Additional dopants include arsenic, sulfur and selenium. In this way, the etch selectivity to the underlying film can be improved. For example, for doped dielectrics (especially silica-based dielectrics), the process gas may include dopant precursors such as boron-containing gases, phosphorus-containing gases, carbon-containing gases, or mixtures thereof. In a specific embodiment, the gas includes one or more boron-containing reactants and one or more phosphorus-containing reactants, and the dielectric film includes phosphorus-doped and boron-doped silica glass (BPSG). Examples of suitable boron and phosphorus precursor gases include borane ( _{BH3 )} , diborane ( _B2H6 ) and _triborane ( _{B3H7 )} , and phosphine (PH3). Examples of the arsenic-containing gas, the sulfur-containing gas, and the selenium-containing gas include hydrogen selenide (H ₂ Se), arsine (AsH ₃ ), and hydrogen sulfide (H ₂ S).

If the dielectric is to contain oxynitride (eg, silicon oxynitride), the deposition gas may include nitrogen-containing reactants such as _N2 , _NH3 , NO, _N2O , and mixtures thereof. Examples of deposited films include boron-doped silicon, silicon boride, silicon boride carbon, and the like.

Metal-containing films can also be deposited. Examples of metal-containing films that may be formed include oxides and nitrides of aluminum, titanium, hafnium, tantalum, tungsten, manganese, magnesium, strontium, etc., as well as elemental metal films. Exemplary precursors may include metal alkylamines, metal alkoxides, metal alkylamides, metal halides, metal beta-diketonates, metal carbonyls, organometallic compounds, and the like. Suitable metal-containing precursors would include the metals desired to be incorporated into the film. For example, the tantalum-containing layer can be deposited by reacting penta(dimethylamido)tantalum with ammonia or another reducing agent as a secondary reactant. Other examples of metal-containing precursors that may be used include trimethylaluminum, tetraethoxytitanium, tetra-dimethyl-amidotitanium, tetrakis(ethylmethylamide)hafnium, bis(cyclopentadienyl) Manganese and bis(n-propylcyclopentadienyl)magnesium, etc.

In addition to hydrogen, examples of treatment chemistries include nitrogen-containing treatment chemistries, oxygen-containing treatment chemistries, carbon-containing treatment chemistries, and halogen-containing treatment chemistries, and inert gases.

In some implementations, blocks 203 and 204 may be combined. For example, operations may include exposing the deposited material to a hydrogen _- containing _compound , such as _CH4 , _NH3 , H2Se, H2S, _AsH3 , or _PH3 , to simultaneously process and expose the deposited material reaction.

device

In some embodiments, the directional deposition is performed in an etching apparatus. For example, the above-described method may be performed in an inductively coupled plasma etching apparatus or in a capacitively coupled plasma etching apparatus.

5 schematically illustrates a cross-sectional view of an inductively coupled plasma etch apparatus 500 in accordance with certain embodiments herein. The Kiyo ^™ reactor, produced by Lam Research Corp. of Fremont, California, is one example of a suitable reactor that can be used to implement the techniques described herein. The inductively coupled plasma etch apparatus 500 includes an overall processing chamber that is structurally defined by chamber walls 501 and windows 511 . The chamber wall 501 may be made of stainless steel or aluminum. Window 511 may be made of quartz or other dielectric materials. An optional internal plasma grid 550 divides the overall etch chamber into an upper sub-chamber 502 and a lower sub-chamber 503 . In most embodiments, the plasma grid 550 can be removed to utilize the chamber space made by the secondary chambers 502 and 503 . The chuck 517 is positioned in the lower sub-chamber 503 near the bottom inner surface. The chuck 517 is configured to receive and hold the semiconductor wafer 519 on which the etching process is performed. Chuck 517 may be an electrostatic chuck for supporting wafer 519 when wafer 519 is present. In some embodiments, an edge ring (not shown) surrounds the chuck 517 and has an upper surface that is approximately in the same plane as the top surface of the wafer 519 (when the wafer is present over the chuck 517). Chuck 517 also includes electrostatic electrodes for clamping and loosening the wafer. A filter and DC clamp power source (not shown) can be provided for this purpose. Other control systems may also be provided for lifting wafer 519 off chuck 517 . Chuck 517 can be charged with RF power source 523 . RF power source 523 is connected to matching circuit 521 through connection 527 . Matching circuit 521 is connected to chuck 517 through connector 525 . In this manner, the RF power source 523 is connected to the chuck 517 .

Coil 533 is located above window 511 . Coil 533 is made of conductive material and includes at least one full turn. The exemplary coil 533 shown in FIG. 5 includes three turns. Cross-sections of coils 533 are shown with symbols, and coils 533 with "X" extend rotationally into the page, while coils 533 with "-" extend rotationally out of the page. RF power source 541 is configured to provide RF power to coil 533 . Typically, RF power source 541 is connected to matching circuit 539 through connection 545 . The matching circuit 539 is connected to the coil 533 through the connector 543 . In this manner, RF power source 541 is connected to coil 533 . An optional Faraday shield 549 is positioned between coil 533 and window 511 . Faraday shield 549 is held in spaced relation relative to coil 533 . Faraday shield 549 is positioned directly above window 511 . Coil 533, Faraday shield 549, and window 511 are each configured to be substantially parallel to each other. Faraday shields prevent deposition of metals or other substances on the dielectric windows of the plasma chamber

Process gas may be supplied through the main injection port 560 located in the upper chamber and/or through the side injection port 570, sometimes referred to as STG. During operational plasma processing, vacuum pumps (eg, one- or two-stage dry mechanical pumps and /or turbomolecular pump 540 ) may be used to draw process gas from process chamber 524 and maintain pressure within process chamber 500 .

During operation of the device, one or more reactant gases may be supplied through injection ports 560 and/or 570 . In certain embodiments, gas may be supplied only through the main injection port 560 , or only through the side injection port 570 . In some cases, the injection port may be replaced by a spray head. Faraday shield 549 and/or optional grid 550 may include internal channels and apertures that enable process gas delivery to the chamber. One or both of the Faraday shield 549 and optional grid 550 may act as a showerhead for delivering the process gas.

RF power is supplied to coil 533 from RF power source 541 to cause RF current to flow through coil 533 . The RF current flowing through the coil 533 generates an electromagnetic field around the coil 533 . The electromagnetic field generates induced currents in the upper sub-chamber 502 . During the etching process, physical and chemical interactions of the various ions and radicals generated with the wafer 519 selectively etch features on the wafer.

If a plasma grid is used such that both the upper sub-chamber 502 and the lower sub-chamber 503 are present, an induced current acts on the gas present in the upper sub-chamber 502 to generate electron-ion plasma in the upper sub-chamber 502 . An optional internal plasma grid 550 limits the amount of hot electrons in the lower sub-chamber 503 . In some embodiments, the apparatus is designed and operated such that the plasma present in the lower sub-chamber 503 is an ion-ion plasma.

Both the upper electron-ion plasma and the lower ion-ion plasma may contain cations and anions, although the ion-ion plasma will have a greater ratio of anions:cations. Volatile etch by-products may be removed from the lower secondary chamber 503 through port 522 .

The disclosed chuck 517 can operate in an elevated temperature range between about 30°C to about 250°C. This temperature will depend on the etch process operation and the specific recipe. In some embodiments, chamber 501 may also operate at pressures ranging between about 1 mTorr and about 95 mTorr. In certain embodiments, the pressure may be higher, as disclosed above.

Chamber 501 may be coupled to a facility (not shown) when it is installed in a clean room or manufacturing plant. Facilities include piping that provides process gas, vacuum, temperature control, and environmental particulate control. These facilities are coupled to chamber 501 when installed at the target manufacturing plant. In addition, chamber 501 may be coupled to a transfer chamber, allowing for the transfer of semiconductor wafers in and out of chamber 501 by a robot using typical automation.

In some embodiments, system controller 530 (which may include one or more physical or logical controllers) controls some or all operations of the etch chamber. The controller is described further below.

6 is a schematic diagram of an example of a capacitively coupled plasma etching apparatus in accordance with various embodiments. The plasma etch chamber 600 includes an upper electrode 602 and a lower electrode 604 between which plasma can be generated. A substrate 699 with a patterned hard mask thereon and as described above can be placed on the lower electrode 604 and can be held in place by an electrostatic chuck (ESC). Other clamping mechanisms may also be used. The plasma etch chamber 600 may include a plasma confinement ring 606 that maintains the plasma above the substrate and away from the chamber walls. Other plasma confinement structures can be employed, such as as a shield that acts as an inner wall. In some embodiments, the plasma etch chamber may not include any such plasma confinement structures.

In the embodiment of FIG. 6 , plasma etch chamber 600 includes two RF sources, RF source 610 connected to upper electrode 602 and RF source 612 connected to lower electrode 604 . Each of RF sources 610 and 612 may include one or more sources at any suitable frequency, including 2 MHz, 13.56 MHz, 27 MHz, and 60 MHz. Gas may be introduced into the chamber from one or more gas sources 614 , 616 and 618 . For example, the gas source 614 may include deposition gases and etching gases as described above. Gases may be introduced into the chamber through inlet 620 , with excess gas and reaction by-products evacuated via exhaust pump 622 .

Flex^TM反应离子蚀刻工具。等离子体蚀刻室的进一步描述可在美国专利No.6,841,943和No.8,552,334中找到，其全部内容通过引用并入本文。An example of a plasma etch chamber that can be used is commercially available from Lam Research Corp. of Fremont, CA, USA

Flex ^TM reactive ion etch tool. Further descriptions of plasma etch chambers can be found in US Pat. Nos. 6,841,943 and 8,552,334, the entire contents of which are incorporated herein by reference.

Returning to FIG. 6 , the controller 530 is connected to the RF sources 610 and 612 and the valves associated with the gas sources 614 , 616 and 618 , and the exhaust pump 622 . In some embodiments, the controller 530 controls all activities of the plasma etch chamber 600 .

The following discussion of controller 530 may be applied to controller 530 in FIGS. 5 and 6 as appropriate. The controller 530 may execute control software stored in the mass storage device, loaded into the memory device, and executed on the processor. Alternatively, the control logic may be hard-coded in the controller 530 . Alternatively, the control logic may be hard-coded in the controller 530 . Application specific integrated circuits, programmable logic devices (eg, field programmable gate arrays, or FPGAs), etc. can be used for these purposes. In the following discussion and in the discussion of the controller in Figure 6, wherever "software" or "code" is used, functionally equivalent hardcoded logic may be used in its place.

The control software may include instructions for controlling application timing and/or magnitude of any one or more of the following chamber operating conditions: mixture and/or composition of gases, chamber pressure, chamber temperature, wafer temperature/wafer support temperature, Bias applied to the wafer, frequency and power applied to coils or other plasma generating components, wafer position, wafer movement speed, and other parameters of the particular process performed by the tool. The control software can be configured in any suitable way. For example, various process tool component subprograms or control objects may be written to control the operation of the process tool components required to perform various process tool processes. The control software may be coded in any suitable computer-readable programming language.

In some embodiments, the control software may include input/output control (IOC) sequencing instructions for controlling the various parameters described above. Other computer software and/or programs stored on mass storage and/or memory devices associated with controller 530 may be employed in some implementations. Examples of programs or portions of programs used for this purpose include process gas control programs, pressure control programs, and RF source control programs.

The process gas control program may include code for controlling gas composition (eg, deposition and process gases as described herein) and flow rates and optionally for flowing gases into the chamber to stabilize the pressure in the chamber prior to etching. The pressure control program may include code for controlling the pressure in the chamber by adjusting, for example, a throttle valve in the chamber's exhaust system, gas flow into the chamber, and the like. The RF source control program may include code for setting the level of RF power applied to the electrodes in accordance with embodiments of the present invention.

In some implementations, there may be a user interface associated with the system controller 530 . The user interface may include a display screen, a graphical software display of device and/or process conditions, and user input devices such as a pointing device, keyboard, touch screen, microphone, and the like.

In some embodiments, the parameters adjusted by the system controller 530 may relate to process conditions. Non-limiting examples include process gas composition and flow rate, temperature, pressure, plasma conditions (eg, RF bias power level), pressure, temperature, and the like. These parameters can be provided to the user in the form of recipes that can be entered using the user interface.

Signals for monitoring the process may be provided from various process tool sensors through the analog and/or digital input connections of the system controller 530 . Signals used to control the process can be output through the plasma etch chamber's analog and digital output connections. Non-limiting examples of sensors that can be monitored include mass flow controllers, pressure sensors (eg, manometers), thermocouples, and the like. Appropriately programmed feedback and control algorithms can be used with data from these sensors to maintain process conditions.

System controller 530 may provide program instructions for performing the above-described directional deposition process and subsequent etching process. The program instructions can control various process parameters, such as RF bias power level, pressure, temperature, and the like. The instructions may control these parameters to orient the deposition mask build film according to various embodiments described herein.

The controller 530 will typically include one or more memory devices and one or more processors configured to execute instructions such that the apparatus will perform methods in accordance with the disclosed embodiments. For example, as described above, a machine-readable medium containing instructions for controlling process operations in accordance with the disclosed embodiments may be coupled to controller 530 .

In some implementations, controller 530 may be part of or form part of a system controller that is part of a system, which may be part of the examples described above. Such systems may include semiconductor processing equipment including one or more processing tools, one or more processing chambers, one or more platforms for processing, and/or dedicated processing components (wafer pedestal, gas flow, etc.) system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing semiconductor wafers or substrates. Electronic devices may be referred to as "controllers," which may control various components or sub-components of one or more systems. Depending on process conditions and/or type of system, the system controller can be programmed to control any of the processes disclosed herein, including control of process gas delivery, temperature settings (eg, heating and/or cooling), pressure settings, vacuum settings, Power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, location and operation settings, wafer transfer in and out tools and other transfer tools and/or connection to dedicated systems or interfacing load lock.

Broadly speaking, a system controller may be defined as an electronic device having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operations, enable cleaning operations, enable endpoint measurements, and the like. An integrated circuit may include a chip in the form of firmware that stores program instructions, a digital signal processor (DSP), a chip defined as an application specific integrated circuit (ASIC), and/or one or more microprocessors or execute program instructions (eg, software) 's microcontroller. Program instructions may be instructions that are communicated to the system controller in the form of various individual settings (or program files) that define instructions for performing specific processing on or for a semiconductor wafer or system. Operational parameters. In some embodiments, operating parameters may be defined by a process engineer for use in preparing one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or tubes in the fabrication of wafers Part of a recipe for completing one or more processing steps during core.

In some implementations, the system controller may be part of or coupled to a computer that is integrated with, coupled to, or otherwise connected to the system or a combination thereof through a network. For example, the system controller may be in the "cloud" or all or part of a fab host system that may allow remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of a manufacturing operation, examine the history of past manufacturing operations, examine trends or performance criteria for multiple manufacturing operations, change parameters of the current process, set process steps to follow the current process, or Start a new craft. In some instances, a remote computer (eg, a server) may provide process recipes to the system over a network, which may include a local network or the Internet. The remote computer may include a user interface that allows for the entry or programming of parameters and/or settings, which are then transferred from the remote computer to the system. In some instances, the system controller receives instructions in the form of data specifying parameters for each processing step to be performed during one or more operations. It will be appreciated that the parameters may be specific to the type of process to be performed as well as the type of tool to which the system controller is configured to connect or control. Thus, as described above, system controllers may be distributed, for example, by including one or more discrete controllers that are networked together and directed toward a common goal (eg, the processes and processes provided by the present invention). control) work. An example of a distributed controller for these purposes may be one or more integrated circuits on a room in communication with one or more remote integrated circuits (eg, at the platform level or as part of a remote computer) that combine to control Indoor craft.

In some embodiments, PECVD deposition may employ remote radical assisted plasma or microwave plasma. Such deposition can be performed in an etch chamber equipped with a remote plasma generator or microwave plasma generator, or can be performed in a deposition chamber connected to the etch chamber under vacuum. Similarly, in some embodiments, remote radical assisted plasma or microwave plasma may be used to perform the processing operations.

Exemplary process parameters are given below. Exemplary pressures range from 5 mT to 1000 mT, and in some embodiments, between 40 mT and 100 mT. In processing operations, exemplary pressures may range from 5 mT to 300 mT.

Exemplary plasma powers for inductively coupled plasma sources (eg, transformer coupled plasma (TCP) sources available from Lam Research of Fremont, CA) are 10W to 1200W, 20W to 500W, or 50W to 300W. An exemplary plasma power range for deposition operations is 20W to 200W. Exemplary plasma power ranges for processing operations are 20W to 1200W.

Exemplary bias voltages range from 0V to -500V, 0 to -80V, eg -50V. The bias voltage can also be expressed in magnitude, such as 0 to 500V, 0 to 80V, or 0 to 50V. Exemplary flow rates for the deposition step are 1 seem to 2000 seem, 1 to 300 seem or 100 seem. Exemplary flow rates in the treatment step range from 1 to 2000 seem, 1 to 500 seem or 300 seem. Exemplary substrate temperature ranges are 40°C to 250°C or 60°C to 120°C. In some embodiments, the deposition and treatment exposure time may be 0.5s to 20s, or 3s to 10s, or 4s to 6s, with the treatment time of a multi-cycle process as an example. In some examples, 10 to 100 cycles are performed.

experiment

The following examples are provided to further illustrate aspects of the various implementations. These examples are offered to illustrate and more clearly illustrate some aspects, and not to be limiting.

Inductively coupled etch reactors are used to deposit a-Si build materials on hard masks for continuous and cyclic deposition with and without processing. The deposition process gas was SiCl ₄ /H ₂ , and H ₂ based plasma was used as the processing step. The pressure was varied between 20mT and 120mT.

For continuous PECVD, the build material was deposited at 40 mT for 60 sec(s) and 120 sec(s), while at 60 mT for 75 s. Pinch-off of the mask build material was observed at 120s/40mT and 75s/40mT. The deposition is non-conformal. For cyclic PECVD without treatment, build material was deposited at 20 cycles of 3s (60s) and 40 cycles of 3s (120s) at 40mT and 25 cycles of 3s (75s) at 60mT. Pinch off was observed for the 60 mT case. The deposition is non-conformal. A comparison of this 120s/40mT result (no pinch-off) with the 120s/40mT result of continuous CVD shows that cycling contributes to well-defined high aspect ratio features. For cyclic PECVD with plasma treatment, build materials were deposited with 20 cycles of 3s deposition + 5s treatment at 40 mT and 40 cycles of 3s deposition + 5s treatment and 25 s cycles of 3s deposition + 5s treatment at 60 mT. The deposition is non-conformal. No pinch-off was observed, indicating that the treatment favors the deposition of high aspect ratio features over a wide range of pressures.

The a-Si build material was deposited on the _SiO2 hardmask using multiple deposition-processing cycles by using an inductively coupled etch reactor. The deposition process gas was SiCl ₄ /H ₂ , the plasma power was 50W, and the pressure was 60mT. The process gas was _H2 with a small amount (about 5 vol%) of _N2 , the plasma power was 300W, and there was no bias on the substrate. 25 deposition-treatment cycles were performed. The bias voltage was varied for deposition with the following results:

An inductively coupled etch reactor was utilized to deposit a-Si build material on the hardmask using multiple deposition/processing cycles. Change the _SiCl4 / _H2 flow rate. For longer residence times (lower flow rates), pinch-off was observed. Without being bound by a particular theory, it is believed that the longer residence time of the SiCl _x species results in pinch off. H radical scavenging reaction of Cl in plasma. H radicals and ions eliminate overhang and pinch off, providing efficient top mask etch and vertical sidewall profiles.

An inductively coupled etch reactor was utilized to deposit the a-Si build material on the hardmask using multiple deposition/processing cycles. Change the plasma power during the deposition step. Higher non-conformity is achieved with higher power. Without being bound by a particular theory, it is believed that the concentration of SiCl _x radicals, which have high adhesion coefficients, and the concentration of H radicals, which prevent pendulous and pinch-off, are increased.

An inductively coupled etch reactor was utilized to deposit a-Si build material on the hardmask using multiple deposition/processing cycles. Change the gas composition during the processing steps. Using 100% _H2 resulted in a necked profile. Without being bound by a particular theory, it is believed that the _H2 plasma makes the already deposited a-Si film less reactive, thereby reducing the adhesion coefficient. The deposited film is etched and redeposited from the bottom to the top of the trench. A more vertical profile was observed by adding additive gas (5 vol% _N2 or 5 vol% _CH4 ). Thicker deposits at the bottom of the trenches were observed.

An inductively coupled etch reactor was utilized to deposit a-Si build material on the hardmask using multiple deposition/processing cycles. Change the plasma power during the processing steps. The process gas was 100% _H2 . Use 0W, 50W, 100W, 200W and 300W power. 300W results in a necked profile. Lowering the power results in more vertical sidewalls and thicker trench and sidewall deposition, while 0W results in pinch off.

An inductively coupled etch reactor is utilized to deposit Si-containing build materials on the hardmask using multiple deposition/processing cycles. Change the exposure time during the processing steps. Use 1s, 2s, 3s and 5s. 5s results in a necked profile. Reducing the exposure time results in more vertical sidewalls and thicker trench and sidewall deposition.

in conclusion

Although the above-described embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems and apparatus of these embodiments. Accordingly, the present embodiments are to be regarded as illustrative rather than restrictive, and the embodiments are not to be limited to the details given herein.

Claims (10)

1. A method comprising: A multi-cycle directional deposition process is performed to deposit mask build material on the patterned structure, where each cycle includes: i) depositing a first material on the patterned structure by a plasma enhanced chemical vapor deposition (PECVD) process, and ii) Plasma treating the first material to improve directionality. 2. The method of claim 1, wherein the first material is a silicon-based material, a carbon-based material, a boron-based material, or a combination thereof. 3. The method of claim 1, wherein the first material comprises two or more of silicon, carbon, boron, phosphorus, arsenic, and sulfur. 4. The method of claim 1, wherein the first material is a metal-containing material. 5. The method of claim 1, wherein (ii) comprises exposing the first material to nitrogen-based plasma, oxygen-based plasma, hydrogen-based plasma, hydrocarbon-based plasma, argon-based plasma plasma, helium-based plasma, or a combination thereof. 6. The method of claim 1, wherein (ii) comprises exposing the first material to a plasma generated from a hydrogen-containing compound. 7. The method of claim 5, wherein the hydrogen _- containing _compound is one of _H2 , _CH4 , _NH3 , _C2H2 , and _N2H2 . 8. The method of claim 1, further comprising etching a layer masked by the patterned structure. 9. The method of claim 1, wherein the patterned structure comprises raised features having feature tops and feature sidewalls. 10. The method of claim 9, wherein processing the first material comprises redepositing the first material from the feature sidewalls to the feature tops.

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