CN114915163A - Charge pump circuit and control method thereof - Google Patents

Abstract

The application discloses charge pump circuit includes: the voltage stabilizing module generates a voltage regulating signal according to the first voltage source; the charge pump module generates output voltage according to the first voltage source, the second voltage source and the voltage regulating signal; the voltage regulating signal is a voltage difference between a first voltage source and a preset voltage; the charge pump module comprises a plurality of switching tubes and at least one switching capacitor, and the voltage between any two ends of the first end, the second end and the third end of each switching tube and the swing of the voltage between the two ends of the capacitor are less than or equal to the pre-adjustment voltage. The embodiment of the invention adopts the voltage stabilizing module to generate the voltage regulating signal related to the first voltage source, and the charge pump circuit is connected between the first voltage source and the voltage regulating signal, thereby reducing the voltage swing between any two ends of the three ends of the switch tube, reducing the voltage swing between the two ends of the capacitor, and reducing the loss caused by the voltage swing on the parasitic capacitor of the switch tube and the loss caused by the charge and discharge of the capacitor.

Description

Charge pump circuit and control method thereof

technical field

The present invention relates to the technical field of integrated circuits, and more particularly, to a charge pump circuit and a control method thereof.

Background technique

The integrated power switch circuit is a new type of integrated circuit that integrates power devices, control circuits, drive circuits, protection circuits, sensors and other modules, and is widely used in the fields of fast charging and POE. In some integrated power switch circuits, N-type power transistors are used as high-side drive transistors. In order to turn on the high-side drive transistors, a level higher than the voltage source needs to be generated. The charge pump circuit is often used to generate such a higher level than the voltage source. The voltage signal of the voltage source voltage.

FIG. 1 shows a schematic diagram of a charge pump circuit in the prior art. Referring to FIG. 1 , the charge pump circuit includes a first voltage source (or first voltage) V1 , a second voltage source (or second voltage) V2 , a low-side voltage regulator module 110 , a charge pump module 120 and a control module 130 .

The low-side voltage regulator module 110 generates a voltage regulation signal Vs according to the first voltage source V1. The first input terminal of the low-side voltage regulator module 110 is connected to the first voltage source V1, the second input terminal is connected to the ground terminal GND, and the output terminal outputs a voltage regulation signal Vs, which is a pre-regulated voltage Vpre, namely Vs =Vpre.

The charge pump module 120 generates an output voltage Vo according to the second voltage source V2 and the voltage regulation signal Vs, where the output voltage Vout=V2+Vs. The first input terminal of the charge pump module 120 is connected to the output terminal of the low-side voltage regulator module to receive the voltage regulation signal Vs, the second input terminal is connected to the ground terminal GND, and the third input terminal is connected to the second voltage source V2. The charge pump module 120 includes first to fourth switch transistors (M1-M4) and a first switch capacitor C1. The first switch transistor M1, the first switch capacitor C1 and the third switch transistor M3 are connected in series to the voltage regulator. between the signal Vs and the ground terminal GND; the first node A between the first switch M1 and the first switch capacitor C1 is connected to the output end of the charge pump module 120 via the second switch M2, the third switch M3 and the The second node B between a switched capacitor C1 is connected to the second voltage source V2 via the fourth switch M4.

The control module 130 is configured to generate first to fourth control signals ( G1 - G4 ) according to the clock signal CLK, and control the on and off of the first to fourth switches ( M1 - M4 ) respectively.

During the first period of time, the first switch M1 and the third switch M3 are turned on, the second switch M2 and the fourth switch M4 are turned off, the charge pump module 120 charges the first switch capacitor C1, and the first switch The voltage across the capacitor C1 is Vs, the voltage at the first node A is Vs, and the voltage at the second node B is 0; in the second time period, the second switch M2 and the fourth switch M4 are turned on, and the first The switch M1 and the third switch M3 are turned off, and the charge pump module 120 superimposes the voltage on the first switched capacitor C1 to the second voltage source V2 for output. Ideally, the output voltage Vo=V2+Vs.

其中V为第一开关电容C1两端的电压摆幅。第二节点B的电压从0V变化至第二电压源V2，其电压摆幅为V2，所以第二节点B 的寄生电容上的能量损耗会随着第二电压源的增大而增大，在常规的集成芯片中考虑到面积原因第一开关电容C1的容值不会很大，所以随着第二电压源V2的增大寄生电容上的能量损耗将增大且无法忽略导致电荷泵的效率逐渐降低。However, in practical applications, when the charge pump operates with the switching frequency, the gate capacitance of the switch tube and the parasitic capacitance to each node (parasitic capacitance refers to the capacitance of the switch tube relative to each node) are frequently charged and discharged, which brings energy loss and reduces the charge. pump efficiency. The formula for energy loss is

Wherein V is the voltage swing across the first switched capacitor C1. The voltage of the second node B changes from 0V to the second voltage source V2, and its voltage swing is V2, so the energy loss on the parasitic capacitance of the second node B will increase with the increase of the second voltage source. In conventional integrated chips, considering the area, the capacitance of the first switched capacitor C1 is not very large, so with the increase of the second voltage source V2, the energy loss on the parasitic capacitance will increase and the efficiency of the charge pump cannot be ignored. Gradually decreases.

SUMMARY OF THE INVENTION

In view of the above problems, the purpose of the present invention is to provide a charge pump circuit and a control method thereof, which can reduce the energy loss during the voltage conversion process and improve the working efficiency of the charge pump.

According to an aspect of the present invention, a charge pump circuit is provided, comprising: a voltage regulator module, which generates a voltage regulation signal according to a first voltage source; a charge pump module, which generates an output voltage according to the first voltage source and the voltage regulation signal; wherein , the charge pump module includes a first input terminal and a second input terminal, wherein the first input terminal is connected to the first voltage source, and the second input terminal is connected to the output terminal of the voltage regulator module to receive voltage regulation signals.

Preferably, the voltage difference between the first voltage source and the voltage regulation signal is a pre-regulated voltage.

Preferably, the charge pump module includes a plurality of switch tubes and at least one switch capacitor, and the voltage between any two ends of the first end, the second end and the third end of each switch tube and the capacitance The swing of the voltage between the two ends is less than or equal to the magnitude of the pre-adjusted voltage.

Preferably, the charge pump circuit further includes: a control module, configured to generate a control signal according to a clock signal, and the control signal is used to control the on and off of the switch tube.

Preferably, when the control signal is at a high level, the control signal is the first voltage source; when the control signal is at a low level, the control signal is the voltage regulation signal.

Preferably, the charge pump further includes a third input terminal connected to the second voltage source.

Preferably, the charge pump module includes first to fourth switching transistors and a first switching capacitor, wherein the first switching transistor, the first switching capacitor and the third switching transistor are connected in series between the first voltage source and the voltage regulator between signals; the first node between the first switch tube and the first switch capacitor is connected to the output end of the charge pump module via the second switch tube; the second node between the third switch tube and the first switch capacitor is connected to the output end of the charge pump module via the second switch tube The four switch tubes are connected to the second voltage source.

Preferably, the control signal includes a first control signal to a fourth control signal, the first control signal controls the turn-on and turn-off of the first switch tube, and the second control signal controls the turn-on of the second switch tube On and off, the third control signal controls the turn-on and turn-off of the third switch tube, and the fourth control signal controls the turn-on and turn-off of the fourth switch tube.

Preferably, there is a certain dead time between the first control signal and the third control signal and the second control signal and the fourth control signal, so as to prevent the four switches from being turned on at the same time.

Preferably, the output voltage is the sum of the second voltage and the pre-regulated voltage.

Preferably, the first voltage source and the second voltage source are the same voltage source.

Preferably, the control signal includes a first control signal and a second control signal, and the first control signal and the second control signal are opposite.

Preferably, the charge pump module includes first to fourth switch transistors, a first switch capacitor and a second switch capacitor, wherein the first switch transistor and the third switch transistor are connected in series between the first voltage source and the charge pump between the output ends of the module; the second switch tube and the fourth switch tube are connected in series between the first voltage source and the output end of the charge pump module; the positive end of the first switch capacitor is connected to the first switch tube and the third switch tube The fourth node between them is connected, and the negative end is connected to the first control signal; the control ends of the second switch tube and the fourth switch tube are connected to the fourth node; the positive end of the second switch capacitor is connected to the second switch tube and the fourth node. The negative terminal of the fifth node between the fourth switch tubes is connected to the second control signal; the control terminals of the first switch tube and the third switch tube are connected to the fifth node.

Preferably, the charge pump module further includes first to fourth inverters; the first control signal outputs a third control signal via the first inverter and the second inverter, and the third The control signal is connected to the negative terminal of the first switched capacitor; the second control signal outputs a fourth control signal via the third inverter and the fourth inverter, and the fourth control signal is connected to the negative terminal of the second switched capacitor.

Preferably, the positive power terminals of the first inverter to the fourth inverter are connected to the first voltage source, and the negative power terminals are connected to the output terminal of the voltage regulator module.

Preferably, the first to fourth switch transistors are MOS transistors.

Preferably, the voltage regulator circuit includes a Zener tube, a current limiting resistor and a high voltage driving tube, wherein the Zener tube and the current limiting resistor are connected in series between the first voltage source and the ground terminal, and the high voltage driving tube is connected to the voltage regulator Between the output terminal of the module and the ground terminal, the grid of the high-voltage driving tube is connected to the fifth node between the Zener tube and the current limiting resistor.

According to another aspect of the present invention, a method for controlling a charge pump circuit is provided, wherein the charge pump includes a plurality of switch tubes and at least one switch capacitor, and the control method includes: generating a voltage regulation signal according to a first voltage source, wherein , the voltage difference between the first voltage source and the voltage regulation signal is a pre-adjusted voltage; the switched capacitor is charged according to the first voltage source and the voltage regulation signal to generate an output voltage; wherein, each switch tube The swing of the voltage between any two ends of the first end, the second end and the third end and the voltage between the two ends of the capacitor is less than or equal to the magnitude of the pre-adjusted voltage.

Preferably, the control method further includes: generating a control signal according to a clock signal, and the control signal is used to control the turn-on and turn-off of the switch.

Preferably, when the control signal is at a high level, the control signal is the first voltage source; when the control signal is at a low level, the control signal is the voltage regulation signal.

Preferably, the control method further comprises: charging a switched capacitor according to the first voltage source, the second voltage source and the voltage regulation signal to generate an output voltage.

In the charge pump circuit and its control method provided by the present invention, a voltage regulator module is used to generate a voltage regulation signal related to the first voltage source, and the charge pump circuit is connected between the first voltage source, the second voltage source and the voltage regulation signal, so that the The voltage swing between any two ends of the first end, the second end and the third end of the switch tube inside the charge pump module and the voltage between the two ends of the capacitor is less than or equal to the pre-adjusted voltage. It not only reduces the voltage swing between any two ends of the three terminals of the switch, but also reduces the voltage swing at both ends of the capacitor, reducing the loss caused by the voltage swing on the parasitic capacitance of the switch and the loss caused by the charging and discharging of the capacitor. , which increases the working efficiency of the charge pump under the same area, and reduces the requirement for the withstand voltage of the MOS tube.

Further, the first voltage source and the second voltage source are the same voltage source, and the voltage swing of the node between the switch capacitor and the switch tube can be controlled within the voltage regulation signal, and the energy loss of the charge pump has nothing to do with the size of the voltage source. , it can still maintain high-efficiency operation under the condition of high voltage source.

Further, by using a voltage source, the chip area can also be reduced and the cost can be reduced.

Description of drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the present invention with reference to the accompanying drawings, in which:

1 shows a schematic diagram of a charge pump circuit according to the prior art;

FIG. 2 shows a schematic diagram of a charge pump circuit according to the first embodiment of the present invention;

3 shows a schematic diagram of a voltage regulator module in a charge pump circuit according to an embodiment of the present invention;

4 shows a schematic structural diagram of a control module in a charge pump circuit according to a first embodiment of the present invention;

Fig. 5 shows the waveform diagram of the clock signal and each control signal of the charge pump circuit according to the first embodiment of the present invention;

6 shows a schematic diagram of a charge pump circuit according to a second embodiment of the present invention;

FIG. 7 shows waveforms of clock signals and control signals of the charge pump circuit according to the second embodiment of the present invention.

Detailed ways

Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In the various figures, the same elements are designated by the same or similar reference numerals. For the sake of clarity, various parts in the figures have not been drawn to scale.

The charge pump circuit provided in this application is described by taking the application in a non-volatile memory as an example.

The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and embodiments.

FIG. 2 shows a schematic diagram of a charge pump circuit according to a first embodiment of the present invention. As shown in FIG. 2 , the charge pump circuit includes a first voltage source (or first voltage) V1 , a second voltage source (or second voltage) V2 , a voltage regulator module 210 , a charge pump module 220 and a control module 230 .

The voltage regulation module 210 generates the voltage regulation signal Vs according to the first voltage source V1.

In this embodiment, the first input terminal of the voltage regulator module 210 is connected to the first voltage source V1, the second input terminal is connected to the ground terminal GND, and the output terminal outputs a voltage regulation signal Vs, the voltage regulation signal Vs=V1-Vpre , where Vpre is the pre-adjustment voltage.

Referring to FIG. 3, the voltage regulator module 210 includes a Zener transistor Zd, a current limiting resistor R1, and a high-voltage driving transistor MP1. The Zener transistor Zd and the current limiting resistor R1 are connected in series between the first voltage source V1 and the ground terminal GND. The driving transistor MP1 is connected between the output terminal of the voltage regulator module 210 and the ground terminal, and the gate of the high-voltage driving transistor MP1 is connected to the third node C between the Zener transistor Zd and the current limiting resistor R1. The voltage of the third node C is Vc=V1-Vzd, where Vzd is the voltage across the Zener tube Zd. Vzd drives the high-voltage driving tube MP1 to turn on, and the source end of the high-voltage driving tube MP1 outputs a voltage regulation signal Vs, and the voltage regulation signal Vs=V1-Vpre. The pre-adjustment voltage Vpre=Vzd-|Vth|, where Vth is the threshold voltage of the high-voltage driving transistor. In this embodiment, the high-voltage driving transistor MP1 is a PMOS transistor.

The charge pump module 220 generates the output voltage Vo according to the first voltage source V1, the second voltage source V2 and the voltage regulation signal Vs.

In this embodiment, the ideal output voltage Vo=V2+(V1-Vs)=V2+Vpre.

The first input end of the charge pump module 220 is connected to the first voltage source V1, the second input end is connected to the output end of the voltage regulator module 210, and receives the voltage regulation signal Vs; the third input end is connected to the second voltage source V2 .

Specifically, the charge pump module 220 includes first to fourth switch transistors (M1-M4) and a first switch capacitor C1. The first switch transistor M1, the first switch capacitor C1 and the third switch transistor M3 are connected in series on the Between a voltage source V1 and the voltage regulation signal Vs; the first node A between the first switch tube M1 and the first switch capacitor C1 is connected to the output end of the charge pump module 220 via the second switch tube M2, and the third switch tube The second node B between M3 and the first switched capacitor C1 is connected to the second voltage source V2 via the fourth switch M4.

In this embodiment, the first to fourth switches (M1-M4) are field effect transistors, wherein the first switch M1, the second switch M2, and the fourth switch M4 are PMOS transistors, and the third switch M1, M2, and M4 are PMOS transistors. The switch tube M3 is an NMOS transistor.

The control module 230 is configured to generate the first to fourth control signals ( G1 - G4 ) according to the clock signal CLK, and control the on and off of the first to fourth switches ( M1 - M4 ) respectively. There is a certain dead time between the first control signal, the third control signal, the second control signal, and the fourth control signal, so as to prevent the first to fourth switching transistors (M1-M4) from being turned on at the same time .

In this embodiment, the control module 230 includes a dead zone control unit 231 , a first level conversion unit 232 , a second level conversion unit 233 , a third level conversion unit 234 and a fourth level conversion unit 235 . The dead zone control unit 231 generates the dead zone control signal according to the clock signal, the first level conversion unit 232 generates the first control signal G1 according to the dead zone control signal, and the second level conversion unit 233 generates the first control signal G1 according to the dead zone control signal. The zone control signal generates the second control signal G2; the third level conversion unit 234 generates the third control signal G3 according to the dead zone control signal, and the fourth level conversion unit 235 generates the fourth control signal according to the dead zone control signal G4.

During the first period of time, the first switch M1 and the third switch M3 are turned on, the second switch M2 and the fourth switch M4 are turned off, the charge pump module 120 charges the first switch capacitor C1, and the first switch The voltage across the capacitor C1 is V1-Vs, that is, the final voltage difference across the first switched capacitor C1 is the pre-adjusted voltage Vpre, the voltage at the first node A is V1, and the voltage at the second node B is Vs; During the time period, the second switch M2 and the fourth switch M4 are turned on, the first switch M1 and the third switch M3 are turned off, and the charge pump module 220 superimposes the voltage on the first switch capacitor C1 to the second voltage source Output on V2, ideally, the output voltage Vo=V2+V1-Vs=V2+Vpre.

The voltage between any two ends of the first switching transistor M1 to the fourth switching transistor M4 and the voltage difference between the two ends of the first switching capacitor and the second switching capacitor do not exceed the pre-adjusted voltage.

The voltage of the second node B changes from the voltage regulation signal Vs to the second voltage source V2, the voltage regulation signal Vs is a positive voltage, therefore, the voltage swing of the second node B is V2-Vs, compared with the prior art , reducing the swing of the voltage of the second node, thereby reducing the energy loss during the voltage conversion process and improving the working efficiency of the charge pump.

In a preferred embodiment, the first voltage source V1 and the second voltage source V2 are the same power source.

According to FIG. 5 , when the first control signal G1 is V1-Vpre, the third control signal G3 is V1, the second control signal G2 is V2, the fourth control signal G4 is V2-Vpre, the first switch M1, the third The switch M3 is turned on, the second switch M2 and the fourth switch M4 are turned off, and the first capacitor C1 is charged. Point A is the connection point between the third end of the first switch M1 and the first end of the first capacitor , the voltage of point A rises with the charging process of C1, the final voltage of point A is V1, and the voltage of point B is V1-Vpre. The first end of the first switch tube M1 is connected to the first voltage source V1, then the voltage of the first end of the first switch tube M1 is V1, and the second end of the first switch tube M1 is connected to the first control signal G1, then the first switch tube M1 is connected to the first control signal G1. The voltage of the second terminal of the tube M1 is V1-Vpre, and the third terminal of the first switch tube M1 is connected to point A, then the voltage of the third terminal of the first switch tube M1 is V1. It can be seen that during the charging process of C1, the first The voltage difference between the first end and the second end of the switch tube M1, the voltage difference between the first end and the third end, and the voltage difference between the second end and the third end do not exceed the pre-adjusted voltage Vpre, and the two ends of C1 are A and B. The voltage difference also does not exceed the pre-regulated voltage Vpre. The first end of the third switch tube M3 is connected to the voltage regulation signal, then the voltage value of the first end of the third switch tube M3 is V1-Vpre, and the second end of the third switch tube M3 is connected to the third control signal G3, then the third The voltage of the second terminal of the switch M3 is V1, and the third terminal of the third switch M3 is connected to point B, then the voltage of the third terminal of the third switch M3 is V1-Vpre. It can be seen that during the charging process of C1, the first The voltage difference between the first end and the second end, the voltage difference between the first end and the third end, and the voltage difference between the second end and the third end of the three-switch M3 do not exceed the pre-adjusted voltage Vpre.

When the first control signal G1 is V1 and the third control signal G3 is V1-Vpre, the first switch M1 and the third switch M3 are turned off, M2 and M4 are turned on, and C1 is discharged. At the beginning of the discharge, the voltage at point A is V2+Vpre, the voltage at point B is V2, that is, the voltage of the third terminal of the first switch M1 is V2+Vpre, the voltage of the first terminal of the first switch M1 is V1, and the voltage of the first switch M1 is V1. The voltage of the second terminal of M1 is V1, the voltage of the third terminal of the third switch M3 is V2, the voltage of the first terminal of the third switch M3 is V1-Vpre, and the voltage of the second terminal of the third switch M3 is V1- Vpre, the relationship between V1 and V2 is that V1 is greater than or equal to V2. In a preferred embodiment, V1 and V2 are the same voltage source, that is, V1=V2. It can be seen from this that when the first switch tube M1 is turned off, the voltage difference between any two ends of the three terminals of the first switch tube M1, the voltage difference between any two ends of the three terminals of the third switch tube M3, and The pre-regulated voltage Vpre is also not exceeded across C1.

The circuit analysis of other switching devices under on and off conditions is similar to that of M1. When the second control signal G2 is V2+Vpre and the fourth control signal G4 is V2, the second switch M2 and the fourth switch M4 are turned on. , the first switch M1 and the third switch M3 are turned off, and C1 starts to discharge. At the beginning of discharge, the voltage at point A is V2+Vpre, and the voltage at point B is V2; the first end of the second switch tube M2 is connected to point A, the second end is connected to the second control signal G2, and the third end is connected to the output voltage Vo=V2+ Vpre, that is, the voltage of the first terminal of the second switch M2 is V2+Vpre, the voltage of the second terminal is V2+Vpre, and the voltage of the third terminal is V2+Vpre. During the discharging process of C1, the voltage difference between the first terminal and the second terminal, the voltage difference between the first terminal and the third terminal, and the voltage difference between the second terminal and the third terminal of the second switch M2 do not exceed the pre-adjusted voltage Vpre. The first end of the fourth switch tube M4 is connected to point B, the second end is connected to the fourth control signal G4, and the third end is connected to the second voltage source, that is, the voltage of the first end of the fourth switch tube M4 is V2, and the voltage of the second end is V2. is V2, and the third terminal voltage is V2. During the discharge process of C1, the voltage difference between the first end and the second end, the voltage difference between the first end and the third end, and the voltage difference between the second end and the third end of the fourth switch M4 do not exceed the pre-adjusted voltage Vpre.

When the first voltage source V1 and the second voltage source V2 are the same voltage source, the voltage of the second node B changes from the voltage regulation signal V2-Vpre to the second voltage source V2, that is, the voltage swing of the second node B is pre- Adjust the voltage Vpre. Therefore, the energy loss of the charge pump is only related to the pre-adjusted voltage Vpre, and has nothing to do with the voltage source. Keep working efficiently.

Further, the energy loss of the charge pump is related to the pre-regulated voltage Vpre, which is generated by the voltage regulator module 210, and the energy loss of the charge pump can be reduced by adjusting the pre-regulated voltage Vpre generated by the voltage regulator module 210.

In the charge pump circuit provided by the present invention, a voltage regulator module is used to generate a voltage regulation signal related to the first voltage source, and the charge pump circuit is connected between the first voltage source, the second voltage source and the voltage regulation signal, so that the inside of the charge pump module is The voltage swing between any two ends of the first end, the second end and the third end of the switch tube and the voltage between the two ends of the capacitor is less than or equal to the size of the pre-adjusted voltage. It not only reduces the voltage swing between any two ends of the three terminals of the switch, but also reduces the voltage swing at both ends of the capacitor, reducing the loss caused by the voltage swing on the parasitic capacitance of the switch and the loss caused by the charging and discharging of the capacitor. , which increases the working efficiency of the charge pump under the same area, and reduces the requirement for the withstand voltage of the MOS tube.

Further, the first voltage source and the second voltage source are the same voltage source, and the voltage swing of the node between the switch capacitor and the switch tube can be controlled within the voltage regulation signal, and the energy loss of the charge pump has nothing to do with the size of the voltage source. , it can still maintain high-efficiency operation under the condition of high voltage source.

Further, by using a voltage source, the chip area can also be reduced and the cost can be reduced.

FIG. 6 shows a schematic diagram of a charge pump circuit according to a second embodiment of the present invention. Compared with the first embodiment, the circuit connection manner of the charge pump module in the second embodiment is different from that in the first embodiment.

Referring to FIG. 6 , the charge pump module 220 includes (M1-M4), a first switched capacitor C1 and a second switched capacitor C2. The first switch M1 and the third switch M3 are connected in series between the first voltage source V1 and the output end of the charge pump module (ie, the output voltage Vo); the second switch M2 and the fourth switch M4 are connected in series between the first voltage source V1 and the output terminal of the charge pump module (ie, the output voltage Vo).

The positive terminal of the first switch capacitor C1 is connected to the fourth node E between the first switch M1 and the third switch M3, and the negative terminal is connected to the control signal. The positive terminal of the second switched capacitor C2 is connected to the fifth node between the second switch M2 and the fourth switch M4, and the negative terminal is connected to the control signal.

The control terminals of the second switch M2 and the fourth switch M4 are connected to the fourth node E; the control terminals of the first switch M1 and the third switch M3 are connected to the fourth node E.

The control module 230 is configured to generate a first control signal G1 and a second control signal G2 according to the clock signal CLK, wherein the first control signal G1 is connected to the negative end of the first switched capacitor C1; the second control signal G2 is connected to the second switched capacitor C1 The negative terminal of C2 is connected. The first control signal G1 and the second control signal G2 are completely opposite.

The charge pump module 220 further includes first to fourth inverters, and the first control signal G1 is connected to the negative terminal of the first switched capacitor C1 via the first inverter and the second inverter; the second The control signal G2 is connected to the negative terminal of the second switched capacitor C2 via the third inverter and the fourth inverter.

The positive power terminals of the first inverter to the fourth inverter are connected to the first voltage source V1 , and the negative power terminals are connected to the output terminal of the voltage regulator module 210 . The input end of the first inverter receives the first control signal G1, the output end of the first inverter is connected to the input end of the second inverter, and the output end of the second inverter is connected to the first switched capacitor C1 negative terminal connection. The input end of the third inverter receives the second control signal G2, the output end of the third inverter is connected to the input end of the fourth inverter, and the output end of the fourth inverter is connected to the second switched capacitor C2 negative terminal connection.

The first control signal G1 outputs a third control signal G3 after passing through the first inverter and the second inverter, the phases of the first control signal G1 and the third control signal G3 remain unchanged, and the amplitude is between V1 and Vs; The second control signal G2 outputs a fourth control signal G4 after passing through the third inverter and the fourth inverter. The phases of the second control signal G2 and the fourth control signal G4 remain unchanged, and the amplitudes are between Vs˜V1. The third control signal G3 and the fourth control signal G4 are inverted.

In the first time period, when the third control signal G3 is V1, the fourth control signal G4 is Vs=V1-Vpre, at this time, the second switch M2 and the fourth switch M4 are turned off, and the third switch M3 is always on The first switch M1 is turned on first to charge the second switch capacitor C2, the voltage of the fifth node E rises to V1, after the second switch capacitor C2 is charged, the voltage difference across the second switch capacitor C2 is Vpre, the fifth The voltage of the node E is V1, and the first switch M1 is turned off. Since the voltage difference across the first switched capacitor C1 in the previous stage is Vpre, the output voltage at this time is the voltage of the fourth node D, that is, Vo=V1+Vpre.

The first end of the first switch M1 is connected to the first voltage source, the second end is connected to the fifth node E, and the third end is connected to the fourth node D, then the voltage of the first end of the first switch M1 is V1, The second terminal voltage is V1, and the third terminal voltage is V1+Vpre. Therefore, it can be seen that during the charging process of the second switch capacitor C2, the voltage difference between the first terminal and the second terminal of the first switch tube M1, the first terminal The voltage difference with the third terminal, the voltage difference between the second terminal and the third terminal does not exceed the pre-adjustment voltage Vpre, and the voltage difference between the two ends of C2 does not exceed the pre-adjustment voltage Vpre.

The first end of the third switch M3 is connected to the fourth node D, the second end is connected to the fifth node E, and the third end is connected to the output voltage Vo, then the voltage of the first end of the third switch M3 is V1+Vpre , the second terminal voltage is V1, and the third terminal voltage is V1+Vpre. Therefore, it can be seen that during the charging process of the second switch capacitor C2, the voltage difference between the first terminal and the second terminal of the third switch tube M3, the first terminal The voltage difference between the terminal and the third terminal and the voltage difference between the second terminal and the third terminal do not exceed the pre-adjustment voltage Vpre, and the voltage difference between the two ends of C2 does not exceed the pre-adjustment voltage Vpre.

In the second time period, when the third control signal G3 is Vs=V1-Vpre, the fourth control signal G4 is V1, at this time the first switch M1 and the third switch M3 are turned off, and the fourth switch M4 is always on The second switch M2 is turned on first to charge the first switch capacitor C1, the voltage of the fourth node D rises to V1, after the first switch capacitor C1 is charged, the voltage difference across the first switch capacitor C1 is Vpre, the fourth The voltage of node D is V1+V1pre, and the second switch M2 is turned off; since the voltage difference across the second switch capacitor C2 in the previous stage is Vpre, the output voltage at this time is the voltage of the fifth node E, that is, Vo=V1+ Vpre. The two states are alternately performed, so that the output voltage Vo is always maintained at V1+Vpre.

The first end of the second switch M2 is connected to the first voltage source, the second end is connected to the fourth node D, and the third end is connected to the fifth node E, then the voltage of the first end of the second switch M2 is V1, The voltage of the second terminal is V1+Vpre, and the voltage of the third terminal is V1. Therefore, it can be seen that during the charging process of the first switch capacitor C1, the voltage difference between the first terminal and the second terminal of the second switch tube M2, the first terminal The voltage difference with the third terminal, the voltage difference between the second terminal and the third terminal does not exceed the pre-adjustment voltage Vpre, and the voltage difference between the two ends of C2 does not exceed the pre-adjustment voltage Vpre.

The first end of the fourth switch M4 is connected to the fifth node E, the second end is connected to the fourth node D, and the third end is connected to the output voltage Vo, then the voltage of the first end of the fourth switch M4 is V1+Vpre , the second terminal voltage is V1, and the third terminal voltage is V1+Vpre. Therefore, it can be seen that during the charging process of the second switch capacitor C2, the voltage difference between the first terminal and the second terminal of the fourth switch tube M4, the first terminal The voltage difference between the terminal and the third terminal and the voltage difference between the second terminal and the third terminal do not exceed the pre-adjustment voltage Vpre, and the voltage difference between the two ends of C2 does not exceed the pre-adjustment voltage Vpre.

The voltage between any two ends of the first switching transistor M1 to the fourth switching transistor M4 and the voltage difference between the two ends of the first switching capacitor and the second switching capacitor do not exceed the pre-adjusted voltage.

In the charge pump circuit provided by the present invention, a voltage regulator module is used to generate a voltage regulation signal related to the first voltage source, and the charge pump circuit is connected between the first voltage source and the voltage regulation signal, so that the second voltage of the switch tube inside the charge pump module is The voltage between any two ends of the one end, the second end and the third end and the voltage swing between the two ends of the capacitor are less than or equal to the magnitude of the pre-adjusted voltage. It not only reduces the voltage swing between any two ends of the three terminals of the switch, but also reduces the voltage swing at both ends of the capacitor, reducing the loss caused by the voltage swing on the parasitic capacitance of the switch and the loss caused by the charging and discharging of the capacitor. , which increases the working efficiency of the charge pump under the same area, and reduces the requirement for the withstand voltage of the MOS tube.

Further, by using a voltage source, the chip area can also be reduced and the cost can be reduced.

An embodiment of the present invention further provides a method for controlling a charge pump circuit, where the charge pump includes a plurality of switch tubes and at least one switch capacitor, and the control method includes the following steps.

In step S01, a voltage regulation signal Vs is generated according to a first voltage source V1, wherein the voltage difference between the first voltage source V1 and the voltage regulation signal Vs is a pre-adjusted voltage Vpre, ie Vs=V1-Vpre.

In step S02, the switched capacitor is charged according to the first voltage source V1 and the voltage regulation signal Vs to generate the output voltage Vo. Wherein, the voltage between any two ends of the first end, the second end and the third end of each switch tube and the voltage swing between the two ends of the capacitor are less than or equal to the magnitude of the pre-adjusted voltage.

The control method further includes step S03.

In step S03, a control signal is generated according to the clock signal CLK, and the control signal is used to control the turn-on and turn-off of the switch.

Specifically, when the control signal is at a high level, the control signal is the first voltage source; when the control signal is at a low level, the control signal is the voltage regulation signal.

In a preferred embodiment, in step S02, the switched capacitor is charged according to the first voltage source V1, the second voltage source V2 and the voltage regulation signal Vs to generate the output voltage Vo.

Embodiments in accordance with the present invention are described above, but these embodiments do not exhaust all the details and do not limit the invention to only the specific embodiments described. Obviously, many modifications and variations are possible in light of the above description. This specification selects and specifically describes these embodiments in order to better explain the principle and practical application of the present invention, so that those skilled in the art can make good use of the present invention and modifications based on the present invention. The present invention is to be limited only by the claims and their full scope and equivalents.

Claims (21)

1. A charge pump circuit, comprising:

the voltage stabilizing module generates a voltage regulating signal according to the first voltage source;

the charge pump module generates output voltage according to a first voltage source and the voltage regulating signal;

the charge pump module comprises a first input end and a second input end, wherein the first input end is connected with a first voltage source, and the second input end is connected with the output end of the voltage stabilizing module and used for receiving a voltage regulating signal.

2. The charge pump circuit of claim 1, wherein the voltage difference between the first voltage source and the voltage regulation signal is a pre-regulated voltage.

3. The charge pump circuit according to claim 2, wherein the charge pump module comprises a plurality of switching tubes and at least one switching capacitor, and a swing of a voltage between any two of the first end, the second end, and the third end of each switching tube and a voltage between two ends of the capacitor is smaller than or equal to the pre-adjusted voltage.

4. The charge pump circuit of claim 3, further comprising:

and the control module is used for generating a control signal according to the clock signal, and the control signal is used for controlling the on-off of the switching tube.

5. The charge pump circuit of claim 4, wherein the control signal is a first voltage source when the control signal is high; when the control signal is at a low level, the control signal is the voltage regulating signal.

6. The charge pump circuit of claim 4, further comprising a third input terminal coupled to a second voltage source.

7. The charge pump circuit of claim 6, wherein the charge pump module comprises first through fourth switching tubes and a first switched capacitor, wherein,

the first switch tube, the first switch capacitor and the third switch tube are connected in series between a first voltage source and the voltage regulating signal;

a first node between the first switch tube and the first switch capacitor is connected with the output end of the charge pump module through a second switch tube;

and a second node between the third switching tube and the first switching capacitor is connected with a second voltage source through a fourth switching tube.

8. The charge pump circuit according to claim 7, wherein the control signals include a first control signal to a fourth control signal, the first control signal controls the first switching tube to be turned on and off, the second control signal controls the second switching tube to be turned on and off, the third control signal controls the third switching tube to be turned on and off, and the fourth control signal controls the fourth switching tube to be turned on and off.

9. The charge pump circuit of claim 8, wherein a dead time exists between the first and third control signals and the second and fourth control signals to prevent the four switching tubes from conducting simultaneously.

10. The charge pump circuit of claim 6, wherein the output voltage is a sum of the second voltage and the pre-adjusted voltage.

11. The charge pump circuit of claim 6, wherein the first voltage source and the second voltage source are the same voltage source.

12. The charge pump circuit of claim 4, wherein the control signal comprises a first control signal and a second control signal, the first control signal and the second control signal being opposite.

13. The charge pump circuit of claim 12, wherein the charge pump module comprises first through fourth switching tubes, a first switching capacitor, and a second switching capacitor, wherein,

the first switching tube and the third switching tube are connected in series between the first voltage source and the output end of the charge pump module;

the second switch tube and the fourth switch tube are connected in series between the first voltage source and the output end of the charge pump module;

the positive end of the first switch capacitor is connected with a fourth node between the first switch tube and the third switch tube, and the negative end of the first switch capacitor is connected with the first control signal;

the control ends of the second switching tube and the fourth switching tube are connected with the fourth node;

the positive end of the second switch capacitor is connected with a fifth node between the second switch tube and the fourth switch tube, and the negative end of the second switch capacitor is connected with a second control signal;

and the control ends of the first switching tube and the third switching tube are connected with the fifth node.

14. The charge pump circuit of claim 13, wherein the charge pump module further comprises first to fourth inverters;

the first control signal outputs a third control signal via a first inverter and a second inverter, the third control signal being connected to a negative terminal of the first switched capacitor;

the second control signal outputs a fourth control signal via a third inverter and a fourth inverter, the fourth control signal being connected to the negative terminal of the second switched capacitor.

15. The charge pump circuit of claim 14, wherein positive power supply terminals of the first to fourth inverters are connected to a first voltage source, and negative power supply terminals are connected to an output terminal of the voltage stabilization module.

16. The charge pump circuit according to claim 7 or 13, wherein the first to fourth switching tubes are MOS transistors.

17. The charge pump circuit of claim 1, wherein the voltage regulator circuit comprises a Zener diode, a current limiting resistor, and a high voltage driver, wherein the Zener diode and the current limiting resistor are connected in series between the first voltage source and the ground terminal, the high voltage driver is connected between the output terminal and the ground terminal of the voltage regulator module, and the gate of the high voltage driver is connected to a fifth node between the Zener diode and the current limiting resistor.

18. A control method of a charge pump circuit, wherein the charge pump circuit comprises a plurality of switching tubes and at least one switching capacitor, the control method comprising:

generating a voltage regulating signal according to a first voltage source, wherein the voltage difference between the first voltage source and the voltage regulating signal is a pre-regulation voltage;

charging a switch capacitor according to the first voltage source and the voltage regulating signal to generate an output voltage;

and the voltage between any two ends of the first end, the second end and the third end of each switching tube and the swing of the voltage between the two ends of the capacitor are less than or equal to the pre-adjustment voltage.

19. The control method according to claim 18, characterized by further comprising:

and generating a control signal according to the clock signal, wherein the control signal is used for controlling the on and off of the switching tube.

20. The control method of claim 19, wherein when the control signal is high, the control signal is a first voltage source; when the control signal is at a low level, the control signal is the voltage regulating signal.

21. The control method according to claim 19, characterized by further comprising:

and charging the switch capacitor according to the first voltage source, the second voltage source and the voltage regulating signal to generate output voltage.

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