CN114765142A - Electronic package and manufacturing method thereof - Google Patents
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- CN114765142A CN114765142A CN202110191613.8A CN202110191613A CN114765142A CN 114765142 A CN114765142 A CN 114765142A CN 202110191613 A CN202110191613 A CN 202110191613A CN 114765142 A CN114765142 A CN 114765142A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
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Abstract
Description
技术领域technical field
本发明有关一种封装结构,尤指一种具散热件的电子封装件及其制法。The present invention relates to a package structure, in particular to an electronic package with a heat sink and a manufacturing method thereof.
背景技术Background technique
随着电子产品在功能及处理速度的需求的提升,作为电子产品的核心组件的半导体芯片需具有更高密度的电子元件(Electronic Components)及电子电路(ElectronicCircuits),故半导体芯片在运行时将随的产生更大量的热能。此外,由于传统包覆该半导体芯片的封装胶体为一种导热系数仅0.8(单位W.m-1.k-1)的不良传热材料(即热量的逸散效率不佳),因而若不能有效逸散半导体芯片所产生的热量,将会造成半导体芯片的损害与产品信赖性问题。With the improvement of the function and processing speed of electronic products, the semiconductor chip as the core component of the electronic product needs to have higher density electronic components (Electronic Components) and electronic circuits (Electronic Circuits), so the semiconductor chip will change with the operation time. to generate a greater amount of heat energy. In addition, since the traditional encapsulating compound covering the semiconductor chip is a poor heat transfer material with a thermal conductivity of only 0.8 (unit Wm -1 .k -1 ) (that is, the heat dissipation efficiency is not good), if it cannot escape effectively The heat generated by dissipating the semiconductor chip will cause damage to the semiconductor chip and problems of product reliability.
因此,为了迅速将热能散逸至外部,业界通常在半导体封装件中配置散热片(HeatSink或Heat Spreader),该散热片通常经由散热胶,如导热介面材(Thermal InterfaceMaterial,简称TIM),结合至半导体芯片背面,以借散热胶与散热片逸散出半导体芯片所产生的热量,此外,通常令散热片的顶面外露出封装胶体或直接外露于大气中,从而取得较佳的散热效果。Therefore, in order to quickly dissipate the heat energy to the outside, the industry usually configures a heat sink (HeatSink or Heat Spreader) in the semiconductor package. The backside of the chip is used to dissipate the heat generated by the semiconductor chip by means of the heat dissipation glue and the heat sink. In addition, the top surface of the heat sink is usually exposed to the encapsulation glue or directly exposed to the atmosphere, so as to achieve better heat dissipation effect.
如图1所示,现有半导体封装件1的制法先将一半导体芯片11以其作用面11a利用覆晶接合方式(即通过导电凸块110与底胶111)设于一封装基板10上,再将一散热件13以其顶片130经由TIM层12结合于该半导体芯片11的非作用面11b上,且该散热件13的支撑脚131通过粘着层14架设于该封装基板10上。接着,进行封装压模作业,以供封装胶体(图略)包覆该半导体芯片11及散热件13,并使该散热件13的顶片130外露出封装胶体。As shown in FIG. 1 , in the conventional manufacturing method of a semiconductor package 1 , a
于运行时,该半导体芯片11所产生的热能经由该非作用面11b、TIM层12而传导至该散热件13的顶片130以散热至该半导体封装件1的外部。During operation, the heat energy generated by the
然而,现有半导体封装件1中,仅采用单一种散热胶作为TIM层12,其热传导能力不佳,导致散热效果受限,尤其是该半导体芯片11的热点(hot spot)区(如该非作用面11b的中间处或角落处)散热不佳,因而难以满足该半导体封装件1的高散热需求。However, in the existing semiconductor package 1, only a single heat-dissipating adhesive is used as the
此外,当面临半导体封装件1的厚度薄化,且面积增大需求时,该散热件13与该TIM层12之间因为热膨胀系数差异(CTE Mismatch)导致变形的情况(即翘曲程度)更加明显,而当变形量过大时,该散热件13的顶片130与该TIM层12(或与该半导体芯片11)之间容易发生脱层,不仅造成导热效果下降,且会造成该半导体芯片11或底胶111发生碎裂,而导致该半导体封装件1的可靠性不佳及制程良率低等问题。In addition, when the thickness of the semiconductor package 1 is reduced and the area is increased, the deformation (ie, the degree of warpage) between the
因此,如何克服上述现有技术的种种问题,实已成为目前业界亟待克服的难题。Therefore, how to overcome the above-mentioned various problems of the prior art has actually become a difficult problem to be overcome in the current industry.
发明内容SUMMARY OF THE INVENTION
鉴于上述现有技术的种种缺陷,本发明提供一种电子封装件及其制法,以利于提升该电子元件的热点区的散热效果。In view of the above-mentioned defects of the prior art, the present invention provides an electronic package and a manufacturing method thereof, so as to improve the heat dissipation effect of the hot spot area of the electronic component.
本发明的电子封装件,包括:电子元件;至少二散热材,其设于该电子元件上,其中,该至少二散热材的其中一者为液态金属;以及散热件,其经由该至少二散热材结合该电子元件。The electronic package of the present invention includes: an electronic component; at least two heat-dissipating materials disposed on the electronic component, wherein one of the at least two heat-dissipating materials is liquid metal; and a heat-dissipating member, which dissipates heat through the at least two heat-dissipating materials material in conjunction with the electronic component.
本发明还提供一种电子封装件的制法,包括:形成至少二散热材于一电子元件上,其中,该至少二散热材的其中一者为液态金属;以及将散热件经由该至少二散热材结合该电子元件。The present invention also provides a method for manufacturing an electronic package, comprising: forming at least two heat dissipation materials on an electronic component, wherein one of the at least two heat dissipation materials is liquid metal; and dissipating heat through the at least two heat dissipation materials material in conjunction with the electronic component.
前述的电子封装件及其制法中,该电子元件与该至少二散热材之间形成有导热层,且该导热层包含一设于该电子元件上的金属部及形成于该金属部上的凹凸部。例如,该凹凸部为网格形,且该至少二散热材结合该凹凸部。In the aforementioned electronic package and its manufacturing method, a thermally conductive layer is formed between the electronic component and the at least two heat dissipation materials, and the thermally conductive layer includes a metal portion provided on the electronic component and a metal portion formed on the metal portion. Concave and convex part. For example, the concave-convex portion is grid-shaped, and the at least two heat dissipation materials are combined with the concave-convex portion.
前述的电子封装件及其制法中,该液态金属的导热系数大于该至少二散热材的其它者的导热系数。In the aforementioned electronic package and its manufacturing method, the thermal conductivity of the liquid metal is greater than the thermal conductivity of the other ones of the at least two heat dissipation materials.
前述的电子封装件及其制法中,该散热件包含有一散热体与设于该散热体上的支撑脚,且该至少二散热材位于该散热体与该电子元件之间。例如,该散热体与该至少二散热材之间形成有导热层,且该导热层包含一设于该散热体上的金属部及形成于该金属部上的凹凸部。进一步,该凹凸部为网格形,且该至少二散热材结合该凹凸部。In the aforementioned electronic package and its manufacturing method, the heat sink includes a heat sink and a support pin disposed on the heat sink, and the at least two heat sinks are located between the heat sink and the electronic element. For example, a heat-conducting layer is formed between the heat-dissipating body and the at least two heat-dissipating materials, and the heat-conducting layer includes a metal portion disposed on the heat-dissipating body and a concave-convex portion formed on the metal portion. Further, the concave-convex portion is grid-shaped, and the at least two heat dissipation materials are combined with the concave-convex portion.
前述的电子封装件及其制法中,该散热件朝向该至少二散热材之侧形成有凹槽。例如,该凹槽的其中一部分区域中填充有该液态金属,而该凹槽的另一部分区域为真空区。In the aforementioned electronic package and the manufacturing method thereof, a groove is formed on the side of the heat dissipation member facing the at least two heat dissipation materials. For example, a part of the groove is filled with the liquid metal, and another part of the groove is a vacuum area.
前述的电子封装件及其制法中,还包括以承载结构承载及电性连接该电子元件。In the aforementioned electronic package and the manufacturing method thereof, the electronic component is also supported and electrically connected by a supporting structure.
前述的电子封装件及其制法中,还包括以封装层包覆该电子元件,且该电子元件外露于该封装层,以令该至少二散热材还设于该封装层上。In the aforementioned electronic package and its manufacturing method, the electronic component is covered with a packaging layer, and the electronic component is exposed on the packaging layer, so that the at least two heat dissipation materials are also disposed on the packaging layer.
由上可知,本发明的电子封装件及其制法,主要经由该电子元件上布设至少二散热材,使该第一散热材降低或分散应力,且该第二散热材(液态金属)提升该电子元件的热点区的散热效果,故相比于现有技术,本发明的电子封装件能避免结构应力集中于该电子元件上,以避免后续制程中,该电子元件发生碎裂而导致可靠性不佳及制程良率低的问题。As can be seen from the above, in the electronic package and the manufacturing method thereof of the present invention, at least two heat-dissipating materials are arranged on the electronic component, so that the first heat-dissipating material reduces or disperses stress, and the second heat-dissipating material (liquid metal) enhances the Compared with the prior art, the electronic package of the present invention can prevent the structural stress from concentrating on the electronic element due to the heat dissipation effect of the hot spot area of the electronic element, so as to prevent the electronic element from being broken during the subsequent manufacturing process, which may lead to reliability. Poor and low process yield problems.
此外,经由该导热层的凹凸部的设计,以增加该导热层的表面积及增强该散热材的结合强度,故本发明不仅能提升导热效果,且不会造成该电子元件发生碎裂,因而能提升该电子封装件的可靠性及制程良率。In addition, through the design of the concave-convex portion of the heat-conducting layer, the surface area of the heat-conducting layer can be increased and the bonding strength of the heat-dissipating material can be enhanced. Therefore, the present invention can not only improve the heat-conducting effect, but also prevent the electronic components from being broken. The reliability and process yield of the electronic package are improved.
附图说明Description of drawings
图1为现有半导体封装件的剖视示意图。FIG. 1 is a schematic cross-sectional view of a conventional semiconductor package.
图2A至图2E为本发明的电子封装件的制法的剖视示意图。2A to 2E are schematic cross-sectional views of the manufacturing method of the electronic package of the present invention.
图2B-1为图2B的局部放大示意图。FIG. 2B-1 is a partial enlarged schematic view of FIG. 2B .
图2D-1为图2D的局部上视示意图。FIG. 2D-1 is a schematic partial top view of FIG. 2D .
图3A至图3D为图2E的导热层的局部上视示意图。3A to 3D are schematic partial top views of the thermally conductive layer of FIG. 2E .
附图标记说明Description of reference numerals
1:半导体封装件1: Semiconductor package
10:封装基板10: Package substrate
11:半导体芯片11: Semiconductor chip
11a,21a:作用面11a, 21a: Action surface
11b,21b:非作用面11b, 21b: Non-active surfaces
110,210:导电凸块110,210: Conductive bumps
111,211:底胶111,211: Primer
12,3a:TIM层12,3a: TIM layer
13,23:散热件13,23: Heat sink
130:顶片130: Top sheet
131,231:支撑脚131, 231: Support feet
14,24:粘着层14,24: Adhesive layer
2:电子封装件2: Electronic packages
2a:封装模组2a: Package module
20:承载结构20: Bearing structure
200:导电体200: Conductor
201,202:载板201, 202: Carrier Board
21,21’:电子元件21,21': Electronic components
22:封装层22: Encapsulation layer
22a:第一表面22a: First surface
22b:第二表面22b: Second surface
230:散热体230: heat sink
232:凹槽232: Groove
25:导电元件25: Conductive elements
30:液态金属30: Liquid Metal
31:第一散热材31: The first heat sink
310:开口310: Opening
32:第一导热层32: The first thermal conductive layer
32’:第二导热层32': Second thermal conductive layer
320:金属部320: Metal Department
321:凹凸部321: Concave and convex part
321a:网格321a: Grid
A:垂直投影区域A: Vertical projection area
P:真空区P: Vacuum area
S:中空区。S: hollow area.
具体实施方式Detailed ways
以下经由特定的具体实施例说明本发明的实施方式,本领域技术人员可由本说明书所揭示的内容轻易地了解本发明的其他优点及功效。The embodiments of the present invention are described below through specific embodiments, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.
须知,本说明书附图所绘示的结构、比例、大小等,均仅用以配合说明书所揭示的内容,以供本领域技术人员的了解与阅读,并非用以限定本发明可实施的限定条件,故不具技术上的实质意义,任何结构的修饰、比例关系的改变或大小的调整,在不影响本发明所能产生的功效及所能达成的目的下,均应仍落在本发明所揭示的技术内容得能涵盖的范围内。同时,本说明书中所引用的如“上”、“第一”、“第二”及“一”等的用语,也仅为便于叙述的明了,而非用以限定本发明可实施的范围,其相对关系的改变或调整,在无实质变更技术内容下,当也视为本发明可实施的范畴。It should be noted that the structures, proportions, sizes, etc. shown in the drawings of this specification are only used to cooperate with the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the conditions for the implementation of the present invention. , therefore does not have technical substantive significance, any structural modification, proportional relationship change or size adjustment, without affecting the effect that the present invention can produce and the purpose that can be achieved, should still fall within the scope of the present invention. The technical content must be able to cover the scope. At the same time, the terms such as "above", "first", "second" and "one" quoted in this specification are only for the convenience of description and clarity, and are not used to limit the scope of the present invention. Changes or adjustments of their relative relationships, without substantial changes to the technical content, should also be regarded as the scope of the present invention.
图2A至图2E为本发明的电子封装件2的制法的剖面示意图。2A to 2E are schematic cross-sectional views of a method for manufacturing the electronic package 2 of the present invention.
如图2A所示,提供一封装模组2a,其包含有一承载结构20、多个电子元件21,21’及封装层22,且该些电子元件21,21’相互分离地配置于该承载结构20上侧,使该封装层22形成于该承载结构20上以包覆该些电子元件21,21’。As shown in FIG. 2A, a
于本实施例中,该承载结构20为通过多个导电体200(可由底胶211包覆)相互电性堆叠的多载板201,202形式,且该载板例如为具有核心层与线路结构的封装基板、无核心层(coreless)形式线路结构的封装基板、具导电硅穿孔(Through-silicon via,简称TSV)的硅中介板(Through Silicon interposer,简称TSI)或其它板型,其包含至少一绝缘层及至少一结合该绝缘层的线路层,如至少一扇出(fan out)型重布线路层(redistributionlayer,简称RDL)。应可理解地,该承载结构20也可为单一载板形式(图未示)或为其它承载芯片的板材,如导线架(lead frame)、晶圆(wafer)、或其它具有金属布线(routing)的板体等,并不限于上述。In this embodiment, the
此外,可于该承载结构20下侧设置多个导电元件25,以供后续制程经由该些导电元件25接置一如电路板的电子装置(图略)。该导电元件25可为如铜柱的金属柱、包覆有绝缘块的金属凸块、焊球(solder ball)、具有核心铜球(Cu core ball)的焊球或其它导电构造等。In addition, a plurality of
另外,该电子元件21,21’为主动元件、被动元件或其组合者,其中,该主动元件例如半导体芯片,而该被动元件例如电阻、电容及电感。于本实施例中,该电子元件21,21’为半导体芯片,其具有相对的作用面21a与非作用面21b,并使该作用面21a经由多个如焊锡材料、金属柱(pillar)或其它等的导电凸块210以覆晶方式设于该承载结构20的线路层上并电性连接该线路层,且以底胶211包覆该些导电凸块210;或者,该电子元件21,21’可经由多个焊线(图未示)以打线方式电性连接该承载结构20的线路层;抑或,该电子元件21,21’可直接接触该承载结构20的线路层。因此,可于该承载结构20上接置所需类型及数量的电子元件,以提升其电性功能,且有关电子元件21,21’电性连接承载结构20的方式繁多,并不限于上述。In addition, the
另外,该封装层22具有相对的第一表面22a与第二表面22b,并以该第一表面22a结合该承载结构20,且该电子元件21的非作用面21b齐平该封装层22的第二表面22b,以令该些电子元件21的非作用面21b外露于该封装层22的第二表面22b。例如,形成该封装层22的材料为绝缘材,如聚酰亚胺(PI)、环氧树脂(epoxy)的封装胶体或封装材,其可用模压(molding)、压合(lamination)或涂布(coating)的方式形成的。In addition, the
如图2B所示,形成第一导热层32于该电子元件21的非作用面21b与该封装层22的第二表面22b上。As shown in FIG. 2B , a first thermal
于本实施例中,该第一导热层32包含一设于该电子元件21与该封装层22上的金属部320及一形成于该金属部320上的凹凸部321,如图2B-1所示。例如,该凹凸部321为网格形(mesh),如图3A至图3D所示的高密度次微米蜂巢微结构,且该凹凸部321具有多个不同规格的网格321a(如图3A所示)或相同规格的网格321a(如图3B至图3D所示的三角形、正方形或多边形等)。In this embodiment, the first thermal
此外,该凹凸部321的制作方式可将金属材氧化,使该金属部320与该凹凸部321可采用同一金属层(如镓、铟、镍、金、银、铜或其它等)制作。In addition, the manufacturing method of the concave-
如图2C所示,形成一第一散热材31于该第一导热层32上,使该第一散热材31结合该凹凸部321,且该第一散热材31于对应该电子元件21处形成有至少一开口310,以外露部分该第一导热层32。As shown in FIG. 2C , a first heat-dissipating
于本实施例中,该第一散热材31视为导热介面材(Thermal Interface Material,简称TIM),其具有低导热系数,约2~20瓦/(公尺.克耳文)(Wm-1K-1)。例如,该第一散热材31为硅胶材或如压克力材的紫外线(UV)胶,其包含金属颗粒、石墨材或其它适当充填物。具体地,该硅胶材不仅具有高延展性,且其热传导系数也高于UV胶,故相比于UV胶,该第一散热材31选用硅胶材较佳。In this embodiment, the first
此外,该第一散热材31填入该凹凸部321的网格321a中,如图2B-1所示,且该第一散热材31可依需求填满或未填满(如图2B-1所示的中空区S)该网格321a。例如,该中空区S可产生真空拉力,以利于控制该第一散热材31的形变量。In addition, the first heat-dissipating
另外,该开口310对应该电子元件21的热点(hot spot)区进行配置。例如,该电子元件21的中间处(或角落处)为热点区。In addition, the
如图2D所示,形成作为第二散热材的液态金属30于该开口310中,以令该液态金属30接触该第一导热层32,使该液态金属30对应位于该电子元件21的热点区上,以增加该电子元件21的热点区的散热效率。As shown in FIG. 2D , a
于本实施例中,该液态金属30也视为导热介面材(TIM),其具有高导热系数,约30~80Wm-1K-1,即该液态金属30的导热系数大于该第一散热材31的导热系数。例如,该液态金属30为纯质,其不包含胶材。In this embodiment, the
此外,该液态金属30的上表面与该第一散热材31的上表面齐平,使该液态金属30填满该凹凸部321的网格321a中(即不会形成该中空区S),且该第一散热材31用以限制该液态金属30的流动范围,以防止该液态金属30溢流。In addition, the upper surface of the
另外,利用该开口310的设计,以利于针对该电子元件21的热点区设置该液态金属30,故无需于该非作用面21b的整面上方形成该液态金属30,因而能减少该液态金属30的使用量,以节省制程材料成本。In addition, the design of the
如图2E所示,将一散热件23设于该承载结构20上,以遮盖该第一散热材31与该液态金属30。As shown in FIG. 2E , a
于本实施例中,该散热件23具有一散热体230与多个自该散热体230边缘向下延伸的支撑脚231,且该散热体230为散热片型式,其下侧压合该第一散热材31与第二散热材(即液态金属30),以令该第一散热材31与该液态金属30位于该散热体230与该电子元件21之间,而该支撑脚231经由粘着层24结合于该承载结构20上。例如,该散热体230与该第一散热材31(及/或该液态金属30)之间形成有第二导热层32’,且该第二导热层32’的构造相同于该第一导热层32的构造,如图2B-1所示,故该第二导热层32’的金属部320设于该散热体230上,且其凹凸部321的制作方式可将金属材氧化,使该散热体230、金属部320与该凹凸部321可采用同一金属层(如镓、铟、镍、金、银、铜或其它等)制作。In this embodiment, the
此外,该支撑脚231的端部也可采用凹凸部的设计,以强化该粘着层24的结合性。In addition, the ends of the supporting
另外,该散热件23(如散热体230)朝向该第一散热材31的侧可形成一用以容置该液态金属30的凹槽232,以防止该液态金属30溢流。例如,该凹槽232的其中一部分区域中填充有该液态金属30,而另一部分区域(如剩余区域)为真空区P。In addition, a
因此,本发明的制法主要经由该电子元件21的非作用面21b的垂直投影区域A上布设至少二散热材(如图2D-1所示的第一散热材31及该液态金属30),使该第一散热材31降低或分散应力,且该液态金属30提升该电子元件21的热点区的散热效果,故相比于现有技术,本发明的电子封装件2于该承载结构20的整体平面封装面积愈大时,能避免结构应力集中于该电子元件21,21’的角落处,进而避免后续制程中,该些电子元件21,21’或底胶211发生碎裂而导致可靠性不佳及制程良率低的问题。Therefore, in the manufacturing method of the present invention, at least two heat-dissipating materials (the first heat-dissipating
进一步地,该第一散热材31为可挠性物质,以经由形变而有效分散热应力,致能有效控制该电子元件21及/或散热体230的变形量(翘曲量)而防止该电子元件21(及/或散热体230)与该第一散热材31之间发生脱层的问题,且该液态金属30的高热导系数可提高TIM层3a(由至少二散热材组成,如第一散热材31及液态金属30)的整体热传效率,并经由该液态金属30的表面张力大的特性,使该第一散热材31能拘束该液态金属30于该电子元件21的表面(如该非作用面21b)上的流动,令该液态金属30附着于该电子元件21(或该第一导热层32)上,故相比于现有技术,本发明的电子封装件2的TIM层3a不仅具有更好的散热效果,且能防止该电子元件21,21’或散热件23发生应力集中而过度翘曲的问题。Further, the first
此外,经由该中空区S(或凹槽232)的设计,以于升温时,该液态金属30的体积会膨胀而能流入该中空区S(或凹槽232)中,因而缓冲该液态金属30的流动,故能避免该液态金属30受压迫而从该第一散热材31与该电子元件21(或该散热件23)之间的界面泄漏。In addition, through the design of the hollow area S (or the groove 232 ), when the temperature is raised, the volume of the
另外,经由该凹凸部321的设计,以增加该第一导热层32及/或第二导热层32’的表面积,故相比于现有技术,本发明的TIM层3a的散热面积增加,使该电子元件21及/或散热体230因散热面积增加而具有更好的散热效果,以满足该电子封装件2的高散热需求。In addition, through the design of the concave-
另外,经由该凹凸部321的设计,以增强该第一散热材31的结合强度并有效分散热应力,致能避免热应力集中于该TIM层3a,以进一步控制该电子元件21(及/或散热体230)的变形量(翘曲量),因而能进一步避免该电子元件21及/或散热体230与该TIM层3a之间发生脱层的问题,故相比于现有技术,本发明的制法不仅能提升导热效果,且不会造成该电子元件21或底胶211发生碎裂,因而能提升该电子封装件2的可靠性及制程良率。In addition, through the design of the concave-
本发明还提供一种电子封装件2,包括:一电子元件21、设于该电子元件21上的至少二散热材(如第一散热材31及第二散热材)以及一设于该至少二散热材上的散热件23,且其中一散热材(如第二散热材)为液态金属30。The present invention also provides an electronic package 2, comprising: an
所述的散热件23经由该第一散热材31与第二散热材(液态金属30)结合该电子元件21。The
于一实施例中,该电子元件21与该第一散热材31及该液态金属30之间形成有第一导热层32。例如,该第一导热层32包含一设于该电子元件21上的金属部320及形成于该金属部320上的凹凸部321。较佳者,该凹凸部321为网格形,且该凹凸部321为氧化金属材,以令该第一散热材31及该液态金属30结合该凹凸部321。In one embodiment, a first thermal
于一实施例中,该液态金属30的导热系数大于该第一散热材31的导热系数。In one embodiment, the thermal conductivity of the
于一实施例中,该散热件23包含有一散热体230与设于该散热体230上的支撑脚231,该散热体230经由该第一散热材31及该液态金属30结合该电子元件21。例如,该散热体230经由第二导热层32’结合该第一散热材31及该液态金属30,且该第二导热层32’包含一设于该散热体230上的金属部320及形成于该金属部320上的凹凸部321。较佳者,该凹凸部321为网格形,且该凹凸部321为氧化金属材,以令该第一散热材31及该液态金属30结合该凹凸部321。In one embodiment, the
于一实施例中,该电子封装件2还包括一承载及电性连接该电子元件21的承载结构20。In one embodiment, the electronic package 2 further includes a carrying
于一实施例中,该电子封装件2还包括一包覆该电子元件21且外露该电子元件21的封装层22,以令该第一散热材31还设于该封装层22上。In one embodiment, the electronic package 2 further includes an
综上所述,本发明的电子封装件及其制法,经由该电子元件上布设至少二散热材,使该第一散热材降低或分散应力,且该第二散热材(液态金属)提升该电子元件的热点区的散热效果,故本发明的电子封装件能避免结构应力集中于该电子元件上,以避免后续制程中,该电子元件发生碎裂而导致可靠性不佳及制程良率低的问题。To sum up, in the electronic package and the manufacturing method thereof of the present invention, at least two heat-dissipating materials are arranged on the electronic component, so that the first heat-dissipating material reduces or disperses stress, and the second heat-dissipating material (liquid metal) enhances the Because of the heat dissipation effect of the hot spot area of the electronic component, the electronic package of the present invention can avoid the concentration of structural stress on the electronic component, so as to prevent the electronic component from being broken in the subsequent process, resulting in poor reliability and low process yield. The problem.
此外,经由该导热层的凹凸部的设计,以增加该导热层的表面积及增强该散热材的结合强度,故本发明不仅能提升导热效果,且不会造成该电子元件发生碎裂,因而能提升该电子封装件的可靠性及制程良率。In addition, through the design of the concave-convex portion of the heat-conducting layer, the surface area of the heat-conducting layer can be increased and the bonding strength of the heat-dissipating material can be enhanced. Therefore, the present invention can not only improve the heat-conducting effect, but also prevent the electronic components from being broken. The reliability and process yield of the electronic package are improved.
上述实施例仅用以例示性说明本发明的原理及其功效,而非用于限制本发明。任何本领域技术人员均可在不违背本发明的精神及范畴下,对上述实施例进行修改。因此本发明的权利保护范围,应如权利要求书所列。The above embodiments are only used to illustrate the principles and effects of the present invention, but not to limit the present invention. Any person skilled in the art can make modifications to the above embodiments without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be as listed in the claims.
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