CN114690842A - Current source circuit for biasing bipolar transistor - Google Patents
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- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is DC
- G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
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Abstract
A current source circuit for biasing a bipolar transistor comprising an input current cell and a mirror current cell, characterized in that: the input current unit comprises a first current source, a regulating field effect transistor and a first bias transistor and is used for generating temperature-sensitive input current based on the first current source; the mirror current unit comprises a first mirror field effect transistor, a second current source and a second bias transistor and is used for generating mirror output current based on the temperature-sensitive input current. Based on the invention, the influence of the current amplification factor on the circuit can be overcome, and a stable current source is provided for the integrated circuit.
Description
Technical Field
The present invention relates to the field of current source integrated circuits, and more particularly, to a current source circuit for biasing a bipolar transistor.
Background
At present, a current source is usually connected to a mirror field effect transistor circuit to generate a mirror current as an input current of a bias bipolar transistor. However, the current source configured in this way causes the following problems: (1) since the current amplification factor β of a transistor is sensitive to temperature, it varies greatly with temperature. If the current source for biasing the bipolar transistor remains unchanged during temperature variation or cannot well follow the variation of the current amplification factor β of the bipolar transistor, the temperature variation of the collector current of the biased bipolar transistor is unstable, which further affects the transconductance, i.e., the transfer resistance, of the device and affects the stability of the circuit. (2) Since the current amplification factors β of different transistors are difficult to be completely the same, the current amplification factors β of different chips may have a certain difference, and thus, the performance of different chips is difficult to maintain consistency.
Therefore, a new current source circuit capable of overcoming the influence of the current amplification factor β in the transistor on the circuit is needed.
Disclosure of Invention
In order to solve the defects in the prior art, an object of the present invention is to provide a current source for biasing a bipolar transistor, which can overcome the influence of current amplification factors on a circuit and provide a stable current source for an integrated circuit.
The invention adopts the following technical scheme. A current source circuit for biasing a bipolar transistor includes an input current cell and a mirror current cell. The input current unit comprises a first current source, a regulating field effect transistor and a first bias transistor and is used for generating temperature-sensitive input current based on the first current source; and the mirror current unit comprises a first mirror field effect transistor, a second current source and a second bias transistor and is used for generating mirror output current based on the temperature-sensitive input current.
Preferably, in the input current unit, one end of the first current source is connected with the high voltage, and the other end of the first current source is connected with the source electrode of the regulating field effect transistor; the drain electrode of the adjusting field effect tube is connected with the second current source, the first mirror image field effect tube and the grid electrode of the second mirror image field effect tube, and the grid electrode of the adjusting field effect tube is connected with bias voltage; the base electrode of the first bias transistor is connected with the base electrode of the second bias transistor and connected with input voltage in parallel, the collector electrode of the first bias transistor is connected with the source electrode of the regulating field effect transistor, and the emitter electrode of the first bias transistor is connected with the drain electrode of the first mirror image field effect transistor.
Preferably, in the mirror current unit, gates of the first mirror field effect transistor and the second mirror field effect transistor are respectively connected with one end of a second current source, sources of the first mirror field effect transistor and the second mirror field effect transistor are respectively connected with the other end of the second current source and grounded, a drain of the first mirror field effect transistor is connected with an emitter of the first bias transistor, a drain of the second mirror field effect transistor is connected with an emitter of the second bias transistor, and a collector of the second bias transistor is connected with a high voltage.
Preferably, the adjusting field effect transistor is a PMOS transistor, and the first mirror field effect transistor and the second mirror field effect transistor are both NMOS transistors.
Preferably, the first bias transistor and the second bias transistor are npn-type bipolar transistors, and the current amplification factor of the first bias transistor is the same as that of the second bias transistor, and both are β.
Preferably, the mirror output current is a current flowing into the collector of the second bias transistor, and the mirror output current is a difference between an output current of the first current source and an output current of the second current source.
Preferably, the temperature-sensitive input current is a collector terminal input current of the first bias transistor; the mirror output current is the collector terminal input current of the second bias transistor.
Preferably, the temperature-sensitive input current and the second bias current are related to the magnitudes of the currents output by the first current source and the second current source, and are independent of the current amplification factors β of the first bias transistor and the second bias transistor.
Compared with the prior art, the current source for the biased bipolar transistor has the advantages that the current source for the biased bipolar transistor can overcome the influence on output current caused by the change of current amplification factors of transistors at different temperatures or in different chips or different factors, so that the transconductance of the biased bipolar transistor is stabilized, and further the working state of a biased device is stabilized.
Drawings
FIG. 1 is a circuit diagram of a current source according to the prior art;
fig. 2 is a circuit diagram of a current source circuit for biasing a bipolar transistor according to the present invention.
Detailed Description
The present application is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present application is not limited thereby.
Fig. 1 is a circuit diagram of a current source according to the prior art. As shown in fig. 1, a prior art mirror current source includes a current source I1, a first mirror fet Mn0, a second mirror fet Mn1, and a bias transistor Qn 0. One end of the current source I1 is connected to a high voltage, and the other end is connected to the gate and the drain of the first mirror fet Mn0 and the gate of the second mirror fet Mn1, respectively. The source of the first mirror image fet Mn0 and the source of the second mirror image fet Mn1 are connected to ground. The drain of the second mirror fet is connected to the emitter of the bias transistor Qn 0. The base of the bias transistor is connected to the input voltage VinThe collector is connected with high voltage.
The first mirror image fet Mn0 and the second mirror image fet Mn1 are both NMOS transistors, and the bias Transistor Qn0 is an NPN-type Bipolar Junction Transistor (BJT).
As can be seen from the circuit shown in FIG. 1, the current output by the current source I1 is equal to the emitter current I of the bias transistor Qn0eThe mirror images are equal. The collector current i of the bias transistor Qn0 is known from the characteristics of the transistorc＝ie-ibWherein i iscIs the collector current, i, of the bias transistor Qn0eIs the emitter current, i, of the bias transistor Qn0bIs the base current of the bias transistor Qn 0. Since the transistor characteristics indicate that the ratio of the collector current to the base current of the bias transistor Qn0 is the current amplification factor β, the formula is derived, and further it can be seen that the collector current and the emitter current of the bias transistor Qn0 are in a direct proportional relationship, specifically, they are in a proportional relationship
When biasing the transistorWhen Qn0 is an ideal element, its current amplification factor β can be considered infinite.
However, in the actual chip production process, the current amplification factor β of the NPN transistor may generally take a value of several tens to one hundred or so, and the current amplification factor β of the corresponding PNP transistor may generally take a value of several tens. Due to process control, the current amplification factor β of the bipolar transistors on different chips is difficult to be the same, and these differences will cause differences in the current sources of the chips, further resulting in different transconductance of the transistors on different chips.
In addition, even in the same chip, since the current amplification factor β of the transistor changes with the change of the ambient temperature of the chip, the output current of the current source in the chip changes unprecedentedly with the change of the temperature. This can cause the transconductance of transistors in the same chip to vary with ambient temperature.
Fig. 2 is a circuit diagram of a current source circuit for biasing a bipolar transistor according to the present invention. As shown in fig. 2, the present invention discloses a current source circuit for biasing a bipolar transistor, which includes an input current unit and a mirror current unit.
An input current unit including a first current source I1, a regulating FET Mp1 and a first bias transistor Qn1 for generating a temperature-sensitive input current I1c1。
Preferably, in the input current unit, one end of the first current source I1 is connected to a high voltage, and the other end is connected to the source of the regulating field effect transistor Mp 1; the drain electrode of the adjusting field effect transistor Mp1 is connected with the gates of a second current source I2, a first mirror image field effect transistor Mn0 and a second mirror image field effect transistor Mn1, and the gate of the adjusting field effect transistor Mp1 is connected with a bias voltage Vb0(ii) a The base of the first bias transistor Qn1 is connected to the base of the second bias transistor Qn0 and receives the input voltage VinThe collector is connected with the source electrode of the adjusting field effect transistor Mp1, and the emitter is connected with the drain electrode of the first mirror image field effect transistor Mn 0.
Preferably, the adjusting field effect transistor Mp1 is a PMOS transistor.
The mirror current unit comprises a first mirror field effect transistor Mn0, a second mirror field effect transistor Mn1, a second current source I2 and a second bias transistor Qn0, and is used for providing a current based on a temperature-sensitive input current Ic1Generating a mirrored output current ic0。
Preferably, in the mirror current unit, gates of the first mirror field effect transistor Mn0 and the second mirror field effect transistor Mn1 are respectively connected with one end of the second current source I2, sources of the first mirror field effect transistor Mn0 are respectively connected with the other end of the second current source I2 and grounded, a drain of the first mirror field effect transistor Mn0 is connected with an emitter of the first bias transistor Qn1, a drain of the second mirror field effect transistor Mn1 is connected with an emitter of the second bias transistor Qn0, and a collector of the second bias transistor Qn0 is connected with a high voltage.
Preferably, the first mirror image fet Mn0 and the second mirror image fet Mn1 are both NMOS transistors.
Preferably, the first bias transistor Qn1 and the second bias transistor Qn0 are npn-type bipolar transistors, and the current amplification factor of the first bias transistor Qn1 is the same as that of the second bias transistor Qn0, and both are β.
Preferably, the output current i is mirroredc0Is the current flowing into the collector of the second bias transistor, and the mirrored output current is the difference between the output current of the first current source I1 and the output current of the second current source I2.
In particular, the temperature-sensitive input current ic1Inputting a current to the collector terminal of the first bias transistor Qn 1; mirror output current ic0A current is input to the collector terminal of the second bias transistor Qn 0. Temperature-sensitive input current ic1And a mirror image output current ic0The current magnitudes output by the first current source I1 and the second current source I2 are related, and the current amplification factors β of the first bias transistor Qn1 and the second bias transistor Qn0 are not related.
As shown in FIG. 2, a current source circuit for biasing a bipolar transistor according to the present invention is additionally provided with a second current source I2, a regulating FET MP1, and a first biasing transistor based on the prior art.
Wherein the second current source I2 is connected with the first current sourceThe gates of the first mirror fet Mn0 and the second mirror fet Mn1 are connected to provide input voltages to the first mirror fet and the second mirror fet. Meanwhile, the gate of the adjusting fet Mp1 is connected with a bias voltage, so that the adjusting fet operates in a saturation state. The input voltages of the two NMOS transistors are provided by a second current source I2. When the current source provided by I2 is greater than a certain level, two NMOS transistors will be turned on and generate source-drain current. Because the first mirror image field effect transistor Mn0 and the second mirror image field effect transistor Mn1 are connected with each other in a current mirror manner, the source-drain current i of the first mirror image field effect transistor Mn0 is obtainede1Source-drain current i of second mirror field effect transistor Mn1e0Should be equal. In addition, the base electrodes of the first biasing transistor and the second biasing transistor are connected with the input voltage VinAnd thus the base input current i acquired by the first and second bias transistors, respectivelyb1And ib0Should also be equal.
Further, the collector current i of the first bias transistor is known from the characteristics of the transistorc1And collector current i of the second bias transistorc0The same is true. And, since the gate of the adjusting field effect photo-PMOS is switched on with a fixed bias voltage which causes the first bias transistor to be in a saturated state, ic0＝ic1＝ib1-ie1。
At this time, the collector current i of the second bias transistor Qn0 is knownc0Only with respect to the input currents of the first and second current sources and not with respect to the current amplification β of the first and second bias transistors.
Compared with the prior art, the current source circuit for the biased bipolar transistor has the advantages that the current source circuit for the biased bipolar transistor can overcome the influence of the change of the current amplification factor of the transistor at different temperatures or in different chips or different influences on output current, so that the transconductance of the biased bipolar transistor is stabilized, and the working state of the transistor is stabilized.
The present applicant has described and illustrated embodiments of the present invention in detail with reference to the accompanying drawings, but it should be understood by those skilled in the art that the above embodiments are only preferred embodiments of the present invention, and the detailed description is only for the purpose of helping the reader to better understand the spirit of the present invention, and not for the purpose of limiting the scope of the present invention, and on the contrary, any modifications or modifications based on the spirit of the present invention should fall within the scope of the present invention.
Claims (8)
1. A current source circuit for biasing a bipolar transistor comprising an input current cell and a mirror current cell, characterized in that:
the input current unit comprises a first current source, a regulating field effect transistor and a first bias transistor and is used for generating temperature-sensitive input current based on the first current source;
the mirror current unit comprises a first mirror field effect transistor, a second current source and a second bias transistor and is used for generating mirror output current based on the temperature-sensitive input current.
2. A current source circuit for biasing a bipolar transistor according to claim 1, wherein:
in the input current unit, one end of the first current source is connected with high voltage, and the other end of the first current source is connected with a source electrode of the regulating field effect transistor;
the drain electrode of the adjusting field effect transistor is connected with the second current source, the first mirror image field effect transistor and the grid electrode of the second mirror image field effect transistor, and the grid electrode of the adjusting field effect transistor is connected with a bias voltage;
the base electrode of the first bias transistor is connected with the base electrode of the second bias transistor and connected with input voltage in parallel, the collector electrode of the first bias transistor is connected with the source electrode of the adjusting field effect transistor, and the emitter electrode of the first bias transistor is connected with the drain electrode of the first mirror image field effect transistor.
3. A current source circuit for a bipolar transistor according to claim 1, wherein:
in the mirror current unit, the grids of the first mirror field effect transistor and the second mirror field effect transistor are respectively connected with one end of a second current source, the source electrodes are respectively connected with the other end of the second current source and are grounded, the drain electrode of the first mirror field effect transistor is connected with the emitting electrode of the first bias transistor, the drain electrode of the second mirror field effect transistor is connected with the emitting electrode of the second bias transistor, and the collector electrode of the second bias transistor is connected with high voltage.
4. A current source circuit for biasing a bipolar transistor according to claim 1, wherein:
the adjusting field effect transistor is a PMOS (P-channel metal oxide semiconductor) transistor, and the first mirror image field effect transistor and the second mirror image field effect transistor are NMOS (N-channel metal oxide semiconductor) transistors.
5. A current source circuit for biasing a bipolar transistor according to claim 1, wherein:
the first bias transistor and the second bias transistor are npn-type bipolar transistors, and the current amplification factor of the first bias transistor is the same as that of the second bias transistor, and both the current amplification factors are beta.
6. A current source circuit for biasing a bipolar transistor according to claim 1, wherein:
the mirror output current is a current flowing into a collector of the second bias transistor, and the mirror output current is a difference between an output current of the first current source and an output current of the second current source.
7. A current source circuit for biasing a bipolar transistor according to claim 1, wherein:
the temperature-sensitive input current is input current of a collector terminal of the first bias transistor;
the mirror output current is a collector terminal input current of the second bias transistor.
8. A current source circuit for biasing a bipolar transistor according to any one of claims 1-7, wherein:
the temperature-sensitive input current and the second bias current are related to the current output by the first current source and the second current source and are unrelated to the current amplification factor beta of the first bias transistor and the second bias transistor.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115454199A (en) * | 2022-09-20 | 2022-12-09 | 圣邦微电子（北京）股份有限公司 | Current selection circuit |
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